Gitiles
Code Review Sign In
review.evervolv.com / android_kernel_htc_msm8960 / 017eb0381fedbfdcad1e8e536d014c4064e6687f / . / drivers / media / dvb / frontends / stv090x.c
blob: e80d163c767f7ee15fb1fb8713ff7ceb88555edc [file] [log] [blame]
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]1/*
2 STV0900/0903 Multistandard Broadcast Frontend driver
3 Copyright (C) Manu Abraham <abraham.manu@gmail.com>
4
5 Copyright (C) ST Microelectronics
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#include <linux/init.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/string.h>
26#include <linux/mutex.h>
27
28#include <linux/dvb/frontend.h>
29#include "dvb_frontend.h"
30
31#include "stv6110x.h" /* for demodulator internal modes */
32
33#include "stv090x_reg.h"
34#include "stv090x.h"
35#include "stv090x_priv.h"
36
37static unsigned int verbose;
38module_param(verbose, int, 0644);
39
40struct mutex demod_lock;
41
42/* DVBS1 and DSS C/N Lookup table */
43static const struct stv090x_tab stv090x_s1cn_tab[] = {
44 { 0, 8917 }, /* 0.0dB */
45 { 5, 8801 }, /* 0.5dB */
46 { 10, 8667 }, /* 1.0dB */
47 { 15, 8522 }, /* 1.5dB */
48 { 20, 8355 }, /* 2.0dB */
49 { 25, 8175 }, /* 2.5dB */
50 { 30, 7979 }, /* 3.0dB */
51 { 35, 7763 }, /* 3.5dB */
52 { 40, 7530 }, /* 4.0dB */
53 { 45, 7282 }, /* 4.5dB */
54 { 50, 7026 }, /* 5.0dB */
55 { 55, 6781 }, /* 5.5dB */
56 { 60, 6514 }, /* 6.0dB */
57 { 65, 6241 }, /* 6.5dB */
58 { 70, 5965 }, /* 7.0dB */
59 { 75, 5690 }, /* 7.5dB */
60 { 80, 5424 }, /* 8.0dB */
61 { 85, 5161 }, /* 8.5dB */
62 { 90, 4902 }, /* 9.0dB */
63 { 95, 4654 }, /* 9.5dB */
64 { 100, 4417 }, /* 10.0dB */
65 { 105, 4186 }, /* 10.5dB */
66 { 110, 3968 }, /* 11.0dB */
67 { 115, 3757 }, /* 11.5dB */
68 { 120, 3558 }, /* 12.0dB */
69 { 125, 3366 }, /* 12.5dB */
70 { 130, 3185 }, /* 13.0dB */
71 { 135, 3012 }, /* 13.5dB */
72 { 140, 2850 }, /* 14.0dB */
73 { 145, 2698 }, /* 14.5dB */
74 { 150, 2550 }, /* 15.0dB */
75 { 160, 2283 }, /* 16.0dB */
76 { 170, 2042 }, /* 17.0dB */
77 { 180, 1827 }, /* 18.0dB */
78 { 190, 1636 }, /* 19.0dB */
79 { 200, 1466 }, /* 20.0dB */
80 { 210, 1315 }, /* 21.0dB */
81 { 220, 1181 }, /* 22.0dB */
82 { 230, 1064 }, /* 23.0dB */
83 { 240, 960 }, /* 24.0dB */
84 { 250, 869 }, /* 25.0dB */
85 { 260, 792 }, /* 26.0dB */
86 { 270, 724 }, /* 27.0dB */
87 { 280, 665 }, /* 28.0dB */
88 { 290, 616 }, /* 29.0dB */
89 { 300, 573 }, /* 30.0dB */
90 { 310, 537 }, /* 31.0dB */
91 { 320, 507 }, /* 32.0dB */
92 { 330, 483 }, /* 33.0dB */
93 { 400, 398 }, /* 40.0dB */
94 { 450, 381 }, /* 45.0dB */
95 { 500, 377 } /* 50.0dB */
96};
97
98/* DVBS2 C/N Lookup table */
99static const struct stv090x_tab stv090x_s2cn_tab[] = {
100 { -30, 13348 }, /* -3.0dB */
101 { -20, 12640 }, /* -2d.0B */
102 { -10, 11883 }, /* -1.0dB */
103 { 0, 11101 }, /* -0.0dB */
104 { 5, 10718 }, /* 0.5dB */
105 { 10, 10339 }, /* 1.0dB */
106 { 15, 9947 }, /* 1.5dB */
107 { 20, 9552 }, /* 2.0dB */
108 { 25, 9183 }, /* 2.5dB */
109 { 30, 8799 }, /* 3.0dB */
110 { 35, 8422 }, /* 3.5dB */
111 { 40, 8062 }, /* 4.0dB */
112 { 45, 7707 }, /* 4.5dB */
113 { 50, 7353 }, /* 5.0dB */
114 { 55, 7025 }, /* 5.5dB */
115 { 60, 6684 }, /* 6.0dB */
116 { 65, 6331 }, /* 6.5dB */
117 { 70, 6036 }, /* 7.0dB */
118 { 75, 5727 }, /* 7.5dB */
119 { 80, 5437 }, /* 8.0dB */
120 { 85, 5164 }, /* 8.5dB */
121 { 90, 4902 }, /* 9.0dB */
122 { 95, 4653 }, /* 9.5dB */
123 { 100, 4408 }, /* 10.0dB */
124 { 105, 4187 }, /* 10.5dB */
125 { 110, 3961 }, /* 11.0dB */
126 { 115, 3751 }, /* 11.5dB */
127 { 120, 3558 }, /* 12.0dB */
128 { 125, 3368 }, /* 12.5dB */
129 { 130, 3191 }, /* 13.0dB */
130 { 135, 3017 }, /* 13.5dB */
131 { 140, 2862 }, /* 14.0dB */
132 { 145, 2710 }, /* 14.5dB */
133 { 150, 2565 }, /* 15.0dB */
134 { 160, 2300 }, /* 16.0dB */
135 { 170, 2058 }, /* 17.0dB */
136 { 180, 1849 }, /* 18.0dB */
137 { 190, 1663 }, /* 19.0dB */
138 { 200, 1495 }, /* 20.0dB */
139 { 210, 1349 }, /* 21.0dB */
140 { 220, 1222 }, /* 22.0dB */
141 { 230, 1110 }, /* 23.0dB */
142 { 240, 1011 }, /* 24.0dB */
143 { 250, 925 }, /* 25.0dB */
144 { 260, 853 }, /* 26.0dB */
145 { 270, 789 }, /* 27.0dB */
146 { 280, 734 }, /* 28.0dB */
147 { 290, 690 }, /* 29.0dB */
148 { 300, 650 }, /* 30.0dB */
149 { 310, 619 }, /* 31.0dB */
150 { 320, 593 }, /* 32.0dB */
151 { 330, 571 }, /* 33.0dB */
152 { 400, 498 }, /* 40.0dB */
153 { 450, 484 }, /* 45.0dB */
154 { 500, 481 } /* 50.0dB */
155};
156
157/* RF level C/N lookup table */
158static const struct stv090x_tab stv090x_rf_tab[] = {
159 { -5, 0xcaa1 }, /* -5dBm */
160 { -10, 0xc229 }, /* -10dBm */
161 { -15, 0xbb08 }, /* -15dBm */
162 { -20, 0xb4bc }, /* -20dBm */
163 { -25, 0xad5a }, /* -25dBm */
164 { -30, 0xa298 }, /* -30dBm */
165 { -35, 0x98a8 }, /* -35dBm */
166 { -40, 0x8389 }, /* -40dBm */
167 { -45, 0x59be }, /* -45dBm */
168 { -50, 0x3a14 }, /* -50dBm */
169 { -55, 0x2d11 }, /* -55dBm */
170 { -60, 0x210d }, /* -60dBm */
171 { -65, 0xa14f }, /* -65dBm */
172 { -70, 0x07aa } /* -70dBm */
173};
174
175
176static struct stv090x_reg stv0900_initval[] = {
177
178 { STV090x_OUTCFG, 0x00 },
179 { STV090x_AGCRF1CFG, 0x11 },
180 { STV090x_AGCRF2CFG, 0x13 },
181 { STV090x_TSTTNR2, 0x21 },
182 { STV090x_TSTTNR4, 0x21 },
183 { STV090x_P2_DISTXCTL, 0x22 },
184 { STV090x_P2_F22TX, 0xc0 },
185 { STV090x_P2_F22RX, 0xc0 },
186 { STV090x_P2_DISRXCTL, 0x00 },
187 { STV090x_P2_DMDCFGMD, 0xF9 },
188 { STV090x_P2_DEMOD, 0x08 },
189 { STV090x_P2_DMDCFG3, 0xc4 },
190 { STV090x_P2_CARFREQ, 0xed },
191 { STV090x_P2_LDT, 0xd0 },
192 { STV090x_P2_LDT2, 0xb8 },
193 { STV090x_P2_TMGCFG, 0xd2 },
194 { STV090x_P2_TMGTHRISE, 0x20 },
195 { STV090x_P1_TMGCFG, 0xd2 },
196
197 { STV090x_P2_TMGTHFALL, 0x00 },
198 { STV090x_P2_FECSPY, 0x88 },
199 { STV090x_P2_FSPYDATA, 0x3a },
200 { STV090x_P2_FBERCPT4, 0x00 },
201 { STV090x_P2_FSPYBER, 0x10 },
202 { STV090x_P2_ERRCTRL1, 0x35 },
203 { STV090x_P2_ERRCTRL2, 0xc1 },
204 { STV090x_P2_CFRICFG, 0xf8 },
205 { STV090x_P2_NOSCFG, 0x1c },
206 { STV090x_P2_CORRELMANT, 0x70 },
207 { STV090x_P2_CORRELABS, 0x88 },
208 { STV090x_P2_AGC2REF, 0x38 },
209 { STV090x_P2_CARCFG, 0xe4 },
210 { STV090x_P2_ACLC, 0x1A },
211 { STV090x_P2_BCLC, 0x09 },
212 { STV090x_P2_CARHDR, 0x08 },
213 { STV090x_P2_KREFTMG, 0xc1 },
214 { STV090x_P2_SFRUPRATIO, 0xf0 },
215 { STV090x_P2_SFRLOWRATIO, 0x70 },
216 { STV090x_P2_SFRSTEP, 0x58 },
217 { STV090x_P2_TMGCFG2, 0x01 },
218 { STV090x_P2_CAR2CFG, 0x26 },
219 { STV090x_P2_BCLC2S2Q, 0x86 },
220 { STV090x_P2_BCLC2S28, 0x86 },
221 { STV090x_P2_SMAPCOEF7, 0x77 },
222 { STV090x_P2_SMAPCOEF6, 0x85 },
223 { STV090x_P2_SMAPCOEF5, 0x77 },
224 { STV090x_P2_TSCFGL, 0x20 },
225 { STV090x_P2_DMDCFG2, 0x3b },
226 { STV090x_P2_MODCODLST0, 0xff },
227 { STV090x_P2_MODCODLST1, 0xff },
228 { STV090x_P2_MODCODLST2, 0xff },
229 { STV090x_P2_MODCODLST3, 0xff },
230 { STV090x_P2_MODCODLST4, 0xff },
231 { STV090x_P2_MODCODLST5, 0xff },
232 { STV090x_P2_MODCODLST6, 0xff },
233 { STV090x_P2_MODCODLST7, 0xcc },
234 { STV090x_P2_MODCODLST8, 0xcc },
235 { STV090x_P2_MODCODLST9, 0xcc },
236 { STV090x_P2_MODCODLSTA, 0xcc },
237 { STV090x_P2_MODCODLSTB, 0xcc },
238 { STV090x_P2_MODCODLSTC, 0xcc },
239 { STV090x_P2_MODCODLSTD, 0xcc },
240 { STV090x_P2_MODCODLSTE, 0xcc },
241 { STV090x_P2_MODCODLSTF, 0xcf },
242 { STV090x_P1_DISTXCTL, 0x22 },
243 { STV090x_P1_F22TX, 0xc0 },
244 { STV090x_P1_F22RX, 0xc0 },
245 { STV090x_P1_DISRXCTL, 0x00 },
246 { STV090x_P1_DMDCFGMD, 0xf9 },
247 { STV090x_P1_DEMOD, 0x08 },
248 { STV090x_P1_DMDCFG3, 0xc4 },
249 { STV090x_P1_CARFREQ, 0xed },
250 { STV090x_P1_LDT, 0xd0 },
251 { STV090x_P1_LDT2, 0xb8 },
252 { STV090x_P1_TMGCFG, 0xd2 },
253 { STV090x_P1_TMGTHRISE, 0x20 },
254 { STV090x_P1_TMGTHFALL, 0x00 },
255 { STV090x_P1_SFRUPRATIO, 0xf0 },
256 { STV090x_P1_SFRLOWRATIO, 0x70 },
257 { STV090x_P1_TSCFGL, 0x20 },
258 { STV090x_P1_FECSPY, 0x88 },
259 { STV090x_P1_FSPYDATA, 0x3a },
260 { STV090x_P1_FBERCPT4, 0x00 },
261 { STV090x_P1_FSPYBER, 0x10 },
262 { STV090x_P1_ERRCTRL1, 0x35 },
263 { STV090x_P1_ERRCTRL2, 0xc1 },
264 { STV090x_P1_CFRICFG, 0xf8 },
265 { STV090x_P1_NOSCFG, 0x1c },
266 { STV090x_P1_CORRELMANT, 0x70 },
267 { STV090x_P1_CORRELABS, 0x88 },
268 { STV090x_P1_AGC2REF, 0x38 },
269 { STV090x_P1_CARCFG, 0xe4 },
270 { STV090x_P1_ACLC, 0x1A },
271 { STV090x_P1_BCLC, 0x09 },
272 { STV090x_P1_CARHDR, 0x08 },
273 { STV090x_P1_KREFTMG, 0xc1 },
274 { STV090x_P1_SFRSTEP, 0x58 },
275 { STV090x_P1_TMGCFG2, 0x01 },
276 { STV090x_P1_CAR2CFG, 0x26 },
277 { STV090x_P1_BCLC2S2Q, 0x86 },
278 { STV090x_P1_BCLC2S28, 0x86 },
279 { STV090x_P1_SMAPCOEF7, 0x77 },
280 { STV090x_P1_SMAPCOEF6, 0x85 },
281 { STV090x_P1_SMAPCOEF5, 0x77 },
282 { STV090x_P1_DMDCFG2, 0x3b },
283 { STV090x_P1_MODCODLST0, 0xff },
284 { STV090x_P1_MODCODLST1, 0xff },
285 { STV090x_P1_MODCODLST2, 0xff },
286 { STV090x_P1_MODCODLST3, 0xff },
287 { STV090x_P1_MODCODLST4, 0xff },
288 { STV090x_P1_MODCODLST5, 0xff },
289 { STV090x_P1_MODCODLST6, 0xff },
290 { STV090x_P1_MODCODLST7, 0xcc },
291 { STV090x_P1_MODCODLST8, 0xcc },
292 { STV090x_P1_MODCODLST9, 0xcc },
293 { STV090x_P1_MODCODLSTA, 0xcc },
294 { STV090x_P1_MODCODLSTB, 0xcc },
295 { STV090x_P1_MODCODLSTC, 0xcc },
296 { STV090x_P1_MODCODLSTD, 0xcc },
297 { STV090x_P1_MODCODLSTE, 0xcc },
298 { STV090x_P1_MODCODLSTF, 0xcf },
299 { STV090x_GENCFG, 0x1d },
300 { STV090x_NBITER_NF4, 0x37 },
301 { STV090x_NBITER_NF5, 0x29 },
302 { STV090x_NBITER_NF6, 0x37 },
303 { STV090x_NBITER_NF7, 0x33 },
304 { STV090x_NBITER_NF8, 0x31 },
305 { STV090x_NBITER_NF9, 0x2f },
306 { STV090x_NBITER_NF10, 0x39 },
307 { STV090x_NBITER_NF11, 0x3a },
308 { STV090x_NBITER_NF12, 0x29 },
309 { STV090x_NBITER_NF13, 0x37 },
310 { STV090x_NBITER_NF14, 0x33 },
311 { STV090x_NBITER_NF15, 0x2f },
312 { STV090x_NBITER_NF16, 0x39 },
313 { STV090x_NBITER_NF17, 0x3a },
314 { STV090x_NBITERNOERR, 0x04 },
315 { STV090x_GAINLLR_NF4, 0x0C },
316 { STV090x_GAINLLR_NF5, 0x0F },
317 { STV090x_GAINLLR_NF6, 0x11 },
318 { STV090x_GAINLLR_NF7, 0x14 },
319 { STV090x_GAINLLR_NF8, 0x17 },
320 { STV090x_GAINLLR_NF9, 0x19 },
321 { STV090x_GAINLLR_NF10, 0x20 },
322 { STV090x_GAINLLR_NF11, 0x21 },
323 { STV090x_GAINLLR_NF12, 0x0D },
324 { STV090x_GAINLLR_NF13, 0x0F },
325 { STV090x_GAINLLR_NF14, 0x13 },
326 { STV090x_GAINLLR_NF15, 0x1A },
327 { STV090x_GAINLLR_NF16, 0x1F },
328 { STV090x_GAINLLR_NF17, 0x21 },
329 { STV090x_P1_FECM, 0x01 }, /* disable DSS modes */
330 { STV090x_P2_FECM, 0x01 }, /* disable DSS modes */
331 { STV090x_P1_PRVIT, 0x2F }, /* disable PR 6/7 */
332 { STV090x_P2_PRVIT, 0x2F }, /* disable PR 6/7 */
333};
334
335static struct stv090x_reg stv0903_initval[] = {
336 { STV090x_OUTCFG, 0x00 },
337 { STV090x_AGCRF1CFG, 0x11 },
338 { STV090x_STOPCLK1, 0x48 },
339 { STV090x_STOPCLK2, 0x14 },
340 { STV090x_TSTTNR1, 0x27 },
341 { STV090x_TSTTNR2, 0x21 },
342 { STV090x_P1_DISTXCTL, 0x22 },
343 { STV090x_P1_F22TX, 0xc0 },
344 { STV090x_P1_F22RX, 0xc0 },
345 { STV090x_P1_DISRXCTL, 0x00 },
346 { STV090x_P1_DMDCFGMD, 0xF9 },
347 { STV090x_P1_DEMOD, 0x08 },
348 { STV090x_P1_DMDCFG3, 0xc4 },
349 { STV090x_P1_CARFREQ, 0xed },
350 { STV090x_P1_TNRCFG2, 0x82 },
351 { STV090x_P1_LDT, 0xd0 },
352 { STV090x_P1_LDT2, 0xb8 },
353 { STV090x_P1_TMGCFG, 0xd2 },
354 { STV090x_P1_TMGTHRISE, 0x20 },
355 { STV090x_P1_TMGTHFALL, 0x00 },
356 { STV090x_P1_SFRUPRATIO, 0xf0 },
357 { STV090x_P1_SFRLOWRATIO, 0x70 },
358 { STV090x_P1_TSCFGL, 0x20 },
359 { STV090x_P1_FECSPY, 0x88 },
360 { STV090x_P1_FSPYDATA, 0x3a },
361 { STV090x_P1_FBERCPT4, 0x00 },
362 { STV090x_P1_FSPYBER, 0x10 },
363 { STV090x_P1_ERRCTRL1, 0x35 },
364 { STV090x_P1_ERRCTRL2, 0xc1 },
365 { STV090x_P1_CFRICFG, 0xf8 },
366 { STV090x_P1_NOSCFG, 0x1c },
367 { STV090x_P1_CORRELMANT, 0x70 },
368 { STV090x_P1_CORRELABS, 0x88 },
369 { STV090x_P1_AGC2REF, 0x38 } ,
370 { STV090x_P1_CARCFG, 0xe4 },
371 { STV090x_P1_ACLC, 0x1A },
372 { STV090x_P1_BCLC, 0x09 } ,
373 { STV090x_P1_CARHDR, 0x08 },
374 { STV090x_P1_KREFTMG, 0xc1 },
375 { STV090x_P1_SFRSTEP, 0x58 },
376 { STV090x_P1_TMGCFG2, 0x01 },
377 { STV090x_P1_CAR2CFG, 0x26 },
378 { STV090x_P1_BCLC2S2Q, 0x86 },
379 { STV090x_P1_BCLC2S28, 0x86 },
380 { STV090x_P1_SMAPCOEF7, 0x77 },
381 { STV090x_P1_SMAPCOEF6, 0x85 },
382 { STV090x_P1_SMAPCOEF5, 0x77 },
383 { STV090x_P1_DMDCFG2, 0x3b },
384 { STV090x_P1_MODCODLST0, 0xff },
385 { STV090x_P1_MODCODLST1, 0xff },
386 { STV090x_P1_MODCODLST2, 0xff },
387 { STV090x_P1_MODCODLST3, 0xff },
388 { STV090x_P1_MODCODLST4, 0xff },
389 { STV090x_P1_MODCODLST5, 0xff },
390 { STV090x_P1_MODCODLST6, 0xff },
391 { STV090x_P1_MODCODLST7, 0xcc },
392 { STV090x_P1_MODCODLST8, 0xcc },
393 { STV090x_P1_MODCODLST9, 0xcc },
394 { STV090x_P1_MODCODLSTA, 0xcc },
395 { STV090x_P1_MODCODLSTB, 0xcc },
396 { STV090x_P1_MODCODLSTC, 0xcc },
397 { STV090x_P1_MODCODLSTD, 0xcc },
398 { STV090x_P1_MODCODLSTE, 0xcc },
399 { STV090x_P1_MODCODLSTF, 0xcf },
400 { STV090x_GENCFG, 0x1c },
401 { STV090x_NBITER_NF4, 0x37 },
402 { STV090x_NBITER_NF5, 0x29 },
403 { STV090x_NBITER_NF6, 0x37 },
404 { STV090x_NBITER_NF7, 0x33 },
405 { STV090x_NBITER_NF8, 0x31 },
406 { STV090x_NBITER_NF9, 0x2f },
407 { STV090x_NBITER_NF10, 0x39 },
408 { STV090x_NBITER_NF11, 0x3a },
409 { STV090x_NBITER_NF12, 0x29 },
410 { STV090x_NBITER_NF13, 0x37 },
411 { STV090x_NBITER_NF14, 0x33 },
412 { STV090x_NBITER_NF15, 0x2f },
413 { STV090x_NBITER_NF16, 0x39 },
414 { STV090x_NBITER_NF17, 0x3a },
415 { STV090x_NBITERNOERR, 0x04 },
416 { STV090x_GAINLLR_NF4, 0x0C },
417 { STV090x_GAINLLR_NF5, 0x0F },
418 { STV090x_GAINLLR_NF6, 0x11 },
419 { STV090x_GAINLLR_NF7, 0x14 },
420 { STV090x_GAINLLR_NF8, 0x17 },
421 { STV090x_GAINLLR_NF9, 0x19 },
422 { STV090x_GAINLLR_NF10, 0x20 },
423 { STV090x_GAINLLR_NF11, 0x21 },
424 { STV090x_GAINLLR_NF12, 0x0D },
425 { STV090x_GAINLLR_NF13, 0x0F },
426 { STV090x_GAINLLR_NF14, 0x13 },
427 { STV090x_GAINLLR_NF15, 0x1A },
428 { STV090x_GAINLLR_NF16, 0x1F },
429 { STV090x_GAINLLR_NF17, 0x21 },
430 { STV090x_P1_FECM, 0x01 }, /*disable the DSS mode */
431 { STV090x_P1_PRVIT, 0x2f } /*disable puncture rate 6/7*/
432};
433
434static struct stv090x_reg stv0900_cut20_val[] = {
435
436 { STV090x_P2_DMDCFG3, 0xe8 },
437 { STV090x_P2_CARFREQ, 0x38 },
438 { STV090x_P2_CARHDR, 0x20 },
439 { STV090x_P2_KREFTMG, 0x5a },
440 { STV090x_P2_SMAPCOEF7, 0x06 },
441 { STV090x_P2_SMAPCOEF6, 0x00 },
442 { STV090x_P2_SMAPCOEF5, 0x04 },
443 { STV090x_P2_NOSCFG, 0x0c },
444 { STV090x_P1_DMDCFG3, 0xe8 },
445 { STV090x_P1_CARFREQ, 0x38 },
446 { STV090x_P1_CARHDR, 0x20 },
447 { STV090x_P1_KREFTMG, 0x5a },
448 { STV090x_P1_SMAPCOEF7, 0x06 },
449 { STV090x_P1_SMAPCOEF6, 0x00 },
450 { STV090x_P1_SMAPCOEF5, 0x04 },
451 { STV090x_P1_NOSCFG, 0x0c },
452 { STV090x_GAINLLR_NF4, 0x21 },
453 { STV090x_GAINLLR_NF5, 0x21 },
454 { STV090x_GAINLLR_NF6, 0x20 },
455 { STV090x_GAINLLR_NF7, 0x1F },
456 { STV090x_GAINLLR_NF8, 0x1E },
457 { STV090x_GAINLLR_NF9, 0x1E },
458 { STV090x_GAINLLR_NF10, 0x1D },
459 { STV090x_GAINLLR_NF11, 0x1B },
460 { STV090x_GAINLLR_NF12, 0x20 },
461 { STV090x_GAINLLR_NF13, 0x20 },
462 { STV090x_GAINLLR_NF14, 0x20 },
463 { STV090x_GAINLLR_NF15, 0x20 },
464 { STV090x_GAINLLR_NF16, 0x20 },
465 { STV090x_GAINLLR_NF17, 0x21 },
466};
467
468static struct stv090x_reg stv0903_cut20_val[] = {
469 { STV090x_P1_DMDCFG3, 0xe8 },
470 { STV090x_P1_CARFREQ, 0x38 },
471 { STV090x_P1_CARHDR, 0x20 },
472 { STV090x_P1_KREFTMG, 0x5a },
473 { STV090x_P1_SMAPCOEF7, 0x06 },
474 { STV090x_P1_SMAPCOEF6, 0x00 },
475 { STV090x_P1_SMAPCOEF5, 0x04 },
476 { STV090x_P1_NOSCFG, 0x0c },
477 { STV090x_GAINLLR_NF4, 0x21 },
478 { STV090x_GAINLLR_NF5, 0x21 },
479 { STV090x_GAINLLR_NF6, 0x20 },
480 { STV090x_GAINLLR_NF7, 0x1F },
481 { STV090x_GAINLLR_NF8, 0x1E },
482 { STV090x_GAINLLR_NF9, 0x1E },
483 { STV090x_GAINLLR_NF10, 0x1D },
484 { STV090x_GAINLLR_NF11, 0x1B },
485 { STV090x_GAINLLR_NF12, 0x20 },
486 { STV090x_GAINLLR_NF13, 0x20 },
487 { STV090x_GAINLLR_NF14, 0x20 },
488 { STV090x_GAINLLR_NF15, 0x20 },
489 { STV090x_GAINLLR_NF16, 0x20 },
490 { STV090x_GAINLLR_NF17, 0x21 }
491};
492
493/* Cut 1.x Long Frame Tracking CR loop */
494static struct stv090x_long_frame_crloop stv090x_s2_crl[] = {
495 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
496 { STV090x_QPSK_12, 0x1c, 0x0d, 0x1b, 0x2c, 0x3a, 0x1c, 0x2a, 0x3b, 0x2a, 0x1b },
497 { STV090x_QPSK_35, 0x2c, 0x0d, 0x2b, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b, 0x2a, 0x0b },
498 { STV090x_QPSK_23, 0x2c, 0x0d, 0x2b, 0x2c, 0x0b, 0x0c, 0x3a, 0x1b, 0x2a, 0x3a },
499 { STV090x_QPSK_34, 0x3c, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
500 { STV090x_QPSK_45, 0x3c, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
501 { STV090x_QPSK_56, 0x0d, 0x0d, 0x3b, 0x1c, 0x0b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
502 { STV090x_QPSK_89, 0x0d, 0x0d, 0x3b, 0x1c, 0x1b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
503 { STV090x_QPSK_910, 0x1d, 0x0d, 0x3b, 0x1c, 0x1b, 0x3b, 0x3a, 0x0b, 0x2a, 0x3a },
504 { STV090x_8PSK_35, 0x29, 0x3b, 0x09, 0x2b, 0x38, 0x0b, 0x18, 0x1a, 0x08, 0x0a },
505 { STV090x_8PSK_23, 0x0a, 0x3b, 0x29, 0x2b, 0x19, 0x0b, 0x38, 0x1a, 0x18, 0x0a },
506 { STV090x_8PSK_34, 0x3a, 0x3b, 0x2a, 0x2b, 0x39, 0x0b, 0x19, 0x1a, 0x38, 0x0a },
507 { STV090x_8PSK_56, 0x1b, 0x3b, 0x0b, 0x2b, 0x1a, 0x0b, 0x39, 0x1a, 0x19, 0x0a },
508 { STV090x_8PSK_89, 0x3b, 0x3b, 0x0b, 0x2b, 0x2a, 0x0b, 0x39, 0x1a, 0x29, 0x39 },
509 { STV090x_8PSK_910, 0x3b, 0x3b, 0x0b, 0x2b, 0x2a, 0x0b, 0x39, 0x1a, 0x29, 0x39 }
510};
511
512/* Cut 2.0 Long Frame Tracking CR loop */
513static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
514 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
515 { STV090x_QPSK_12, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
516 { STV090x_QPSK_35, 0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
517 { STV090x_QPSK_23, 0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
518 { STV090x_QPSK_34, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
519 { STV090x_QPSK_45, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
520 { STV090x_QPSK_56, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
521 { STV090x_QPSK_89, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
522 { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
523 { STV090x_8PSK_35, 0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
524 { STV090x_8PSK_23, 0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
525 { STV090x_8PSK_34, 0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
526 { STV090x_8PSK_56, 0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
527 { STV090x_8PSK_89, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
528 { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
529};
530
531
532/* Cut 2.0 Long Frame Tracking CR Loop */
533static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
534 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
535 { STV090x_16APSK_23, 0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
536 { STV090x_16APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
537 { STV090x_16APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
538 { STV090x_16APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
539 { STV090x_16APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
540 { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
541 { STV090x_32APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
542 { STV090x_32APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
543 { STV090x_32APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
544 { STV090x_32APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
545 { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
546};
547
548
549static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
550 /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
551 { STV090x_QPSK_14, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
552 { STV090x_QPSK_13, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
553 { STV090x_QPSK_25, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
554};
555
556
557/* Cut 1.2 & 2.0 Short Frame Tracking CR Loop */
558static struct stv090x_short_frame_crloop stv090x_s2_short_crl[] = {
559 /* MODCOD 2M_cut1.2 2M_cut2.0 5M_cut1.2 5M_cut2.0 10M_cut1.2 10M_cut2.0 20M_cut1.2 20M_cut2.0 30M_cut1.2 30M_cut2.0 */
560 { STV090x_QPSK, 0x3c, 0x2f, 0x2b, 0x2e, 0x0b, 0x0e, 0x3a, 0x0e, 0x2a, 0x3d },
561 { STV090x_8PSK, 0x0b, 0x3e, 0x2a, 0x0e, 0x0a, 0x2d, 0x19, 0x0d, 0x09, 0x3c },
562 { STV090x_16APSK, 0x1b, 0x1e, 0x1b, 0x1e, 0x1b, 0x1e, 0x3a, 0x3d, 0x2a, 0x2d },
563 { STV090x_32APSK, 0x1b, 0x1e, 0x1b, 0x1e, 0x1b, 0x1e, 0x3a, 0x3d, 0x2a, 0x2d }
564};
565
566
567static inline s32 comp2(s32 __x, s32 __width)
568{
569 if (__width == 32)
570 return __x;
571 else
572 return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
573}
574
575static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
576{
577 const struct stv090x_config *config = state->config;
578 int ret;
579
580 u8 b0[] = { reg >> 8, reg & 0xff };
581 u8 buf;
582
583 struct i2c_msg msg[] = {
584 { .addr = config->address, .flags = 0, .buf = b0, .len = 2 },
585 { .addr = config->address, .flags = I2C_M_RD, .buf = &buf, .len = 1 }
586 };
587
588 ret = i2c_transfer(state->i2c, msg, 2);
589 if (ret != 2) {
590 if (ret != -ERESTARTSYS)
591 dprintk(FE_ERROR, 1,
592 "Read error, Reg=[0x%02x], Status=%d",
593 reg, ret);
594
595 return ret < 0 ? ret : -EREMOTEIO;
596 }
597 if (unlikely(*state->verbose >= FE_DEBUGREG))
598 dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
599 reg, buf);
600
601 return (unsigned int) buf;
602}
603
604static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
605{
606 const struct stv090x_config *config = state->config;
607 int ret;
608 u8 buf[2 + count];
609 struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
610
611 buf[0] = reg >> 8;
612 buf[1] = reg & 0xff;
613 memcpy(&buf[2], data, count);
614
615 if (unlikely(*state->verbose >= FE_DEBUGREG)) {
616 int i;
617
618 printk(KERN_DEBUG "%s [0x%04x]:", __func__, reg);
619 for (i = 0; i < count; i++)
620 printk(" %02x", data[i]);
621 printk("\n");
622 }
623
624 ret = i2c_transfer(state->i2c, &i2c_msg, 1);
625 if (ret != 1) {
626 if (ret != -ERESTARTSYS)
627 dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
628 reg, data[0], count, ret);
629 return ret < 0 ? ret : -EREMOTEIO;
630 }
631
632 return 0;
633}
634
635static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
636{
637 return stv090x_write_regs(state, reg, &data, 1);
638}
639
640static int stv090x_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
641{
642 struct stv090x_state *state = fe->demodulator_priv;
Manu Abraham017eb032009-04-07 05:19:54 -0300[diff] [blame^]643 const struct stv090x_config *config = state->config;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]644 u32 reg;
645
646 reg = STV090x_READ_DEMOD(state, I2CRPT);
Manu Abraham017eb032009-04-07 05:19:54 -0300[diff] [blame^]647// STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]648 if (enable) {
Manu Abraham017eb032009-04-07 05:19:54 -0300[diff] [blame^]649 dprintk(FE_DEBUG, 1, "Enable Gate");
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]650 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
651 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
652 goto err;
653
654 } else {
Manu Abraham017eb032009-04-07 05:19:54 -0300[diff] [blame^]655 dprintk(FE_DEBUG, 1, "Disable Gate");
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]656 STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
657 if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
658 goto err;
659 }
660 return 0;
661err:
662 dprintk(FE_ERROR, 1, "I/O error");
663 return -1;
664}
665
666static void stv090x_get_lock_tmg(struct stv090x_state *state)
667{
668 switch (state->algo) {
669 case STV090x_BLIND_SEARCH:
670 dprintk(FE_DEBUG, 1, "Blind Search");
671 if (state->srate <= 1500000) { /*10Msps< SR <=15Msps*/
672 state->DemodTimeout = 1500;
673 state->FecTimeout = 400;
674 } else if (state->srate <= 5000000) { /*10Msps< SR <=15Msps*/
675 state->DemodTimeout = 1000;
676 state->FecTimeout = 300;
677 } else { /*SR >20Msps*/
678 state->DemodTimeout = 700;
679 state->FecTimeout = 100;
680 }
681 break;
682
683 case STV090x_COLD_SEARCH:
684 case STV090x_WARM_SEARCH:
685 default:
686 dprintk(FE_DEBUG, 1, "Normal Search");
687 if (state->srate <= 1000000) { /*SR <=1Msps*/
688 state->DemodTimeout = 4500;
689 state->FecTimeout = 1700;
690 } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
691 state->DemodTimeout = 2500;
692 state->FecTimeout = 1100;
693 } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
694 state->DemodTimeout = 1000;
695 state->FecTimeout = 550;
696 } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
697 state->DemodTimeout = 700;
698 state->FecTimeout = 250;
699 } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
700 state->DemodTimeout = 400;
701 state->FecTimeout = 130;
702 } else { /*SR >20Msps*/
703 state->DemodTimeout = 300;
704 state->FecTimeout = 100;
705 }
706 break;
707 }
708
709 if (state->algo == STV090x_WARM_SEARCH)
710 state->DemodTimeout /= 2;
711}
712
713static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
714{
715 u32 sym;
716
717 if (srate > 6000000) {
718 sym = (srate / 1000) * 65536;
719 sym /= (state->mclk / 1000);
720 } else {
721 sym = (srate / 100) * 65536;
722 sym /= (state->mclk / 100);
723 }
724
725 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0) /* MSB */
726 goto err;
727 if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
728 goto err;
729 return 0;
730err:
731 dprintk(FE_ERROR, 1, "I/O error");
732 return -1;
733}
734
735static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
736{
737 u32 sym;
738
739 srate = 105 * (srate / 100);
740 if (srate > 6000000) {
741 sym = (srate / 1000) * 65536;
742 sym /= (clk / 1000);
743 } else {
744 sym = (srate / 100) * 65536;
745 sym /= (clk / 100);
746 }
747 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
748 goto err;
749 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
750 goto err;
751 return 0;
752err:
753 dprintk(FE_ERROR, 1, "I/O error");
754 return -1;
755}
756
757static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
758{
759 u32 sym;
760
761 srate = 95 * (srate / 100);
762 if (srate > 6000000) {
763 sym = (srate / 1000) * 65536;
764 sym /= (clk / 1000);
765 } else {
766 sym = (srate / 100) * 65536;
767 sym /= (clk / 100);
768 }
769 if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0xff)) < 0) /* MSB */
770 goto err;
771 if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
772 goto err;
773 return 0;
774err:
775 dprintk(FE_ERROR, 1, "I/O error");
776 return -1;
777}
778
779static u32 stv090x_car_width(u32 srate, u32 rolloff)
780{
781 return srate + (srate * rolloff) / 100;
782}
783
784static int stv090x_set_vit_thacq(struct stv090x_state *state)
785{
786 if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
787 goto err;
788 if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
789 goto err;
790 if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
791 goto err;
792 if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
793 goto err;
794 if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
795 goto err;
796 if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
797 goto err;
798 return 0;
799err:
800 dprintk(FE_ERROR, 1, "I/O error");
801 return -1;
802}
803
804static int stv090x_set_vit_thtracq(struct stv090x_state *state)
805{
806 if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
807 goto err;
808 if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
809 goto err;
810 if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
811 goto err;
812 if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
813 goto err;
814 if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
815 goto err;
816 if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
817 goto err;
818 return 0;
819err:
820 dprintk(FE_ERROR, 1, "I/O error");
821 return -1;
822}
823
824static int stv090x_set_viterbi(struct stv090x_state *state)
825{
826 switch (state->search_mode) {
827 case STV090x_SEARCH_AUTO:
828 if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
829 goto err;
830 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
831 goto err;
832 break;
833 case STV090x_SEARCH_DVBS1:
834 if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
835 goto err;
836 switch (state->fec) {
837 case STV090x_PR12:
838 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
839 goto err;
840 break;
841
842 case STV090x_PR23:
843 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
844 goto err;
845 break;
846
847 case STV090x_PR34:
848 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
849 goto err;
850 break;
851
852 case STV090x_PR56:
853 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
854 goto err;
855 break;
856
857 case STV090x_PR78:
858 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
859 goto err;
860 break;
861
862 default:
863 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
864 goto err;
865 break;
866 }
867 break;
868 case STV090x_SEARCH_DSS:
869 if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
870 goto err;
871 switch (state->fec) {
872 case STV090x_PR12:
873 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
874 goto err;
875 break;
876
877 case STV090x_PR23:
878 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
879 goto err;
880 break;
881
882 case STV090x_PR67:
883 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
884 goto err;
885 break;
886
887 default:
888 if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
889 goto err;
890 break;
891 }
892 break;
893 default:
894 break;
895 }
896 return 0;
897err:
898 dprintk(FE_ERROR, 1, "I/O error");
899 return -1;
900}
901
902static int stv090x_stop_modcod(struct stv090x_state *state)
903{
904 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
905 goto err;
906 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
907 goto err;
908 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
909 goto err;
910 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
911 goto err;
912 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
913 goto err;
914 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
915 goto err;
916 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
917 goto err;
918 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
919 goto err;
920 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
921 goto err;
922 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
923 goto err;
924 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
925 goto err;
926 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
927 goto err;
928 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
929 goto err;
930 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
931 goto err;
932 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
933 goto err;
934 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
935 goto err;
936 return 0;
937err:
938 dprintk(FE_ERROR, 1, "I/O error");
939 return -1;
940}
941
942static int stv090x_activate_modcod(struct stv090x_state *state)
943{
944 u32 matype, modcod, f_mod, index;
945
946 if (state->dev_ver <= 0x11) {
947 msleep(5);
948 modcod = STV090x_READ_DEMOD(state, PLHMODCOD);
949 matype = modcod & 0x03;
950 modcod = (modcod & 0x7f) >> 2;
951 index = STV090x_ADDR_OFFST(state, MODCODLSTF) - (modcod / 2);
952
953 switch (matype) {
954 default:
955 case 0:
956 f_mod = 14;
957 break;
958 case 1:
959 f_mod = 13;
960 break;
961 case 2:
962 f_mod = 11;
963 break;
964 case 3:
965 f_mod = 7;
966 break;
967 }
968 if (matype <= 1) {
969 if (modcod % 2) {
970 if (stv090x_write_reg(state, index, 0xf0 | f_mod) < 0)
971 goto err;
972 } else {
973 if (stv090x_write_reg(state, index, (f_mod << 4) | 0x0f) < 0)
974 goto err;
975 }
976 }
977 } else if (state->dev_ver >= 0x12) {
978 if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
979 goto err;
980 if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
981 goto err;
982 if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
983 goto err;
984 if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
985 goto err;
986 if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
987 goto err;
988 if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
989 goto err;
990 if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
991 goto err;
992 if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
993 goto err;
994 if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
995 goto err;
996 if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
997 goto err;
998 if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
999 goto err;
1000 if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
1001 goto err;
1002 if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
1003 goto err;
1004 if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
1005 goto err;
1006 if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
1007 goto err;
1008 if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
1009 goto err;
1010 }
1011 return 0;
1012err:
1013 dprintk(FE_ERROR, 1, "I/O error");
1014 return -1;
1015}
1016
1017static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
1018{
1019 u32 reg;
1020
1021 switch (state->demod) {
1022 case STV090x_DEMODULATOR_0:
1023 mutex_lock(&demod_lock);
1024 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1025 STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
1026 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1027 goto err;
1028 mutex_unlock(&demod_lock);
1029 break;
1030
1031 case STV090x_DEMODULATOR_1:
1032 mutex_lock(&demod_lock);
1033 reg = stv090x_read_reg(state, STV090x_STOPCLK2);
1034 STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
1035 if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
1036 goto err;
1037 mutex_unlock(&demod_lock);
1038 break;
1039
1040 default:
1041 dprintk(FE_ERROR, 1, "Wrong demodulator!");
1042 break;
1043 }
1044 return 0;
1045err:
1046 mutex_unlock(&demod_lock);
1047 dprintk(FE_ERROR, 1, "I/O error");
1048 return -1;
1049}
1050
1051static int stv090x_delivery_search(struct stv090x_state *state)
1052{
1053 u32 reg;
1054
1055 switch (state->search_mode) {
1056 case STV090x_SEARCH_DVBS1:
1057 case STV090x_SEARCH_DSS:
1058 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1059 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1060 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1061 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1062 goto err;
1063
1064 /* Activate Viterbi decoder in legacy search, do not use FRESVIT1, might impact VITERBI2 */
1065 if (stv090x_vitclk_ctl(state, 0) < 0)
1066 goto err;
1067
1068 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1069 goto err;
1070 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1071 goto err;
1072 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
1073 goto err;
1074
1075 stv090x_set_vit_thacq(state);
1076 stv090x_set_viterbi(state);
1077 break;
1078
1079 case STV090x_SEARCH_DVBS2:
1080 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1081 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1082 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1083 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1084 goto err;
1085 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1086 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1087 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1088 goto err;
1089
1090 if (stv090x_vitclk_ctl(state, 1) < 0)
1091 goto err;
1092
1093 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
1094 goto err;
1095 if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
1096 goto err;
1097 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1098 goto err;
1099
1100 if (state->demod_mode != STV090x_SINGLE) {
1101 if (state->dev_ver <= 0x11) /* 900 in dual TS mode */
1102 stv090x_stop_modcod(state);
1103 else
1104 stv090x_activate_modcod(state);
1105 }
1106 break;
1107
1108 case STV090x_SEARCH_AUTO:
1109 default:
1110 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1111 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1112 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1113 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1114 goto err;
1115 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1116 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1117 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1118 goto err;
1119
1120 if (stv090x_vitclk_ctl(state, 1) < 0)
1121 goto err;
1122
1123 if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
1124 goto err;
1125 if (STV090x_WRITE_DEMOD(state, ACLC, 0x09) < 0)
1126 goto err;
1127 if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
1128 goto err;
1129
1130 if (state->demod_mode != STV090x_SINGLE) {
1131 if (state->dev_ver <= 0x11) /* 900 in dual TS mode */
1132 stv090x_stop_modcod(state);
1133 else
1134 stv090x_activate_modcod(state);
1135 }
1136 stv090x_set_vit_thacq(state);
1137 stv090x_set_viterbi(state);
1138 break;
1139 }
1140 return 0;
1141err:
1142 dprintk(FE_ERROR, 1, "I/O error");
1143 return -1;
1144}
1145
1146static int stv090x_start_search(struct stv090x_state *state)
1147{
1148 u32 reg;
1149
1150 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1151 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
1152 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1153 goto err;
1154
1155 if (state->dev_ver == 0x10) {
1156 if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0xaa) < 0)
1157 goto err;
1158 }
1159 if (state->dev_ver < 0x20) {
1160 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x55) < 0)
1161 goto err;
1162 }
1163 if (state->srate <= 5000000) {
1164 if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
1165 goto err;
1166 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
1167 goto err;
1168 if (STV090x_WRITE_DEMOD(state, CFRUP1, 0xff) < 0)
1169 goto err;
1170 if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
1171 goto err;
1172 if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
1173 goto err;
1174
1175 /*enlarge the timing bandwith for Low SR*/
1176 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
1177 goto err;
1178 } else {
1179 /* If the symbol rate is >5 Msps
1180 Set The carrier search up and low to auto mode */
1181 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1182 goto err;
1183 /*reduce the timing bandwith for high SR*/
1184 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1185 goto err;
1186 }
1187 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
1188 goto err;
1189 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
1190 goto err;
1191
1192 if (state->dev_ver >= 0x20) {
1193 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1194 goto err;
1195 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1196 goto err;
1197
1198 if ((state->search_mode == STV090x_DVBS1) ||
1199 (state->search_mode == STV090x_DSS) ||
1200 (state->search_mode == STV090x_SEARCH_AUTO)) {
1201
1202 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1203 goto err;
1204 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
1205 goto err;
1206 }
1207 }
1208
1209 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
1210 goto err;
1211 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
1212 goto err;
1213 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
1214 goto err;
1215
1216 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1217 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
1218 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
1219 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1220 goto err;
1221 reg = STV090x_READ_DEMOD(state, DMDCFG2);
1222 STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
1223 if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
1224 goto err;
1225
1226 if (state->dev_ver >= 0x20) { /*Frequency offset detector setting*/
1227 if (state->srate < 10000000) {
1228 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
1229 goto err;
1230 } else {
1231 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
1232 goto err;
1233 }
1234 } else {
1235 if (state->srate < 10000000) {
1236 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
1237 goto err;
1238 } else {
1239 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1240 goto err;
1241 }
1242 }
1243
1244 switch (state->algo) {
1245 case STV090x_WARM_SEARCH:/*The symbol rate and the exact carrier Frequency are known */
1246 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1247 goto err;
1248 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
1249 goto err;
1250 break;
1251
1252 case STV090x_COLD_SEARCH:/*The symbol rate is known*/
1253 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1254 goto err;
1255 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1256 goto err;
1257 break;
1258
1259 default:
1260 break;
1261 }
1262 return 0;
1263err:
1264 dprintk(FE_ERROR, 1, "I/O error");
1265 return -1;
1266}
1267
1268static int stv090x_get_agc2_min_level(struct stv090x_state *state)
1269{
1270 u32 agc2_min = 0, agc2 = 0, freq_init, freq_step, reg;
1271 s32 i, j, steps, dir;
1272
1273 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1274 goto err;
1275 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1276 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1277 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 1);
1278 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1279 goto err;
1280
1281 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
1282 goto err;
1283 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1284 goto err;
1285 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
1286 goto err;
1287 if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1288 goto err;
1289 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
1290 goto err;
1291 stv090x_set_srate(state, 1000000);
1292
1293 steps = -1 + state->search_range / 1000000;
1294 steps /= 2;
1295 steps = (2 * steps) + 1;
1296 if (steps < 0)
1297 steps = 1;
1298
1299 dir = 1;
1300 freq_step = (1000000 * 256) / (state->mclk / 256);
1301 freq_init = 0;
1302
1303 for (i = 0; i < steps; i++) {
1304 if (dir > 0)
1305 freq_init = freq_init + (freq_step * i);
1306 else
1307 freq_init = freq_init - (freq_step * i);
1308
1309 dir = -1;
1310
1311 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
1312 goto err;
1313 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
1314 goto err;
1315 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
1316 goto err;
1317 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
1318 goto err;
1319 msleep(10);
1320 for (j = 0; j < 10; j++) {
1321 agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
1322 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1323 }
1324 agc2 /= 10;
1325 agc2_min = 0xffff;
1326 if (agc2 < 0xffff)
1327 agc2_min = agc2;
1328 }
1329
1330 return agc2_min;
1331err:
1332 dprintk(FE_ERROR, 1, "I/O error");
1333 return -1;
1334}
1335
1336static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
1337{
1338 u8 r3, r2, r1, r0;
1339 s32 srate, int_1, int_2, tmp_1, tmp_2;
1340 u32 pow2;
1341
1342 r3 = STV090x_READ_DEMOD(state, SFR3);
1343 r2 = STV090x_READ_DEMOD(state, SFR2);
1344 r1 = STV090x_READ_DEMOD(state, SFR1);
1345 r0 = STV090x_READ_DEMOD(state, SFR0);
1346
1347 srate = ((r3 << 24) | (r2 << 16) | (r1 << 8) | r0);
1348
1349 pow2 = 1 << 16;
1350 int_1 = clk / pow2;
1351 int_2 = srate / pow2;
1352
1353 tmp_1 = clk % pow2;
1354 tmp_2 = srate % pow2;
1355
1356 srate = (int_1 * int_2) +
1357 ((int_1 * tmp_2) / pow2) +
1358 ((int_2 * tmp_1) / pow2);
1359
1360 return srate;
1361}
1362
1363static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
1364{
1365 struct dvb_frontend *fe = &state->frontend;
1366
1367 int tmg_lock = 0, i;
1368 s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
1369 u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
1370
1371 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1372 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
1373 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1374 goto err;
1375 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
1376 goto err;
1377 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
1378 goto err;
1379 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
1380 goto err;
1381 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1382 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
1383 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 1);
1384 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1385 goto err;
1386
1387 if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
1388 goto err;
1389 if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
1390 goto err;
1391 if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
1392 goto err;
1393 if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
1394 goto err;
1395 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
1396 goto err;
1397 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0)
1398 goto err;
1399
1400 if (state->dev_ver >= 0x20) {
1401 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
1402 goto err;
1403 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
1404 goto err;
1405 } else {
1406 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1407 goto err;
1408 if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x73) < 0)
1409 goto err;
1410 }
1411
1412 if (state->srate <= 2000000)
1413 car_step = 1000;
1414 else if (state->srate <= 5000000)
1415 car_step = 2000;
1416 else if (state->srate <= 12000000)
1417 car_step = 3000;
1418 else
1419 car_step = 5000;
1420
1421 steps = -1 + ((state->search_range / 1000) / car_step);
1422 steps /= 2;
1423 steps = (2 * steps) + 1;
1424 if (steps < 0)
1425 steps = 1;
1426 else if (steps > 10) {
1427 steps = 11;
1428 car_step = (state->search_range / 1000) / 10;
1429 }
1430 cur_step = 0;
1431 dir = 1;
1432 freq = state->frequency;
1433
1434 while ((!tmg_lock) && (cur_step < steps)) {
1435 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
1436 goto err;
1437 reg = STV090x_READ_DEMOD(state, DMDISTATE);
1438 STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x00); /* trigger acquisition */
1439 if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
1440 goto err;
1441 msleep(50);
1442 for (i = 0; i < 10; i++) {
1443 reg = STV090x_READ_DEMOD(state, DSTATUS);
1444 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1445 tmg_cpt++;
1446 agc2 += STV090x_READ_DEMOD(state, AGC2I1) << 8;
1447 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1448 }
1449 agc2 /= 10;
1450 srate_coarse = stv090x_get_srate(state, state->mclk);
1451 cur_step++;
1452 dir *= -1;
1453 if ((tmg_cpt >= 5) && (agc2 < 0x1f00) && (srate_coarse < 55000000) && (srate_coarse > 850000))
1454 tmg_lock = 1;
1455 else if (cur_step < steps) {
1456 if (dir > 0)
1457 freq += cur_step * car_step;
1458 else
1459 freq -= cur_step * car_step;
1460
1461 /* Setup tuner */
1462 stv090x_i2c_gate_ctrl(fe, 1);
1463
1464 if (state->config->tuner_set_frequency)
1465 state->config->tuner_set_frequency(fe, state->frequency);
1466
1467 if (state->config->tuner_set_bandwidth)
1468 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
1469
1470 stv090x_i2c_gate_ctrl(fe, 0);
1471 msleep(50);
1472 stv090x_i2c_gate_ctrl(fe, 1);
1473
1474 if (state->config->tuner_get_status)
1475 state->config->tuner_get_status(fe, &reg);
1476
1477 if (reg)
1478 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1479 else
1480 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1481
1482 stv090x_i2c_gate_ctrl(fe, 0);
1483
1484 }
1485 }
1486 if (!tmg_lock)
1487 srate_coarse = 0;
1488 else
1489 srate_coarse = stv090x_get_srate(state, state->mclk);
1490
1491 return srate_coarse;
1492err:
1493 dprintk(FE_ERROR, 1, "I/O error");
1494 return -1;
1495}
1496
1497static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
1498{
1499 u32 srate_coarse, freq_coarse, sym, reg;
1500
1501 srate_coarse = stv090x_get_srate(state, state->mclk);
1502 freq_coarse = STV090x_READ_DEMOD(state, CFR2) << 8;
1503 freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
1504 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1505
1506 if (sym < state->srate)
1507 srate_coarse = 0;
1508 else {
1509 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
1510 goto err;
1511 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0)
1512 goto err;
1513 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1514 goto err;
1515 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1516 goto err;
1517 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
1518 goto err;
1519 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1520 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
1521 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1522 goto err;
1523
1524 if (state->dev_ver >= 0x20) {
1525 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
1526 goto err;
1527 } else {
1528 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
1529 goto err;
1530 }
1531
1532 if (srate_coarse > 3000000) {
1533 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1534 sym = (sym / 1000) * 65536;
1535 sym /= (state->mclk / 1000);
1536 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1537 goto err;
1538 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1539 goto err;
1540 sym = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
1541 sym = (sym / 1000) * 65536;
1542 sym /= (state->mclk / 1000);
1543 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1544 goto err;
1545 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1546 goto err;
1547 sym = (srate_coarse / 1000) * 65536;
1548 sym /= (state->mclk / 1000);
1549 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1550 goto err;
1551 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1552 goto err;
1553 } else {
1554 sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
1555 sym = (sym / 100) * 65536;
1556 sym /= (state->mclk / 100);
1557 if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
1558 goto err;
1559 if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
1560 goto err;
1561 sym = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
1562 sym = (sym / 100) * 65536;
1563 sym /= (state->mclk / 100);
1564 if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
1565 goto err;
1566 if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
1567 goto err;
1568 sym = (srate_coarse / 100) * 65536;
1569 sym /= (state->mclk / 100);
1570 if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
1571 goto err;
1572 if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
1573 goto err;
1574 }
1575 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
1576 goto err;
1577 if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
1578 goto err;
1579 if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
1580 goto err;
1581 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
1582 goto err;
1583 }
1584
1585 return srate_coarse;
1586
1587err:
1588 dprintk(FE_ERROR, 1, "I/O error");
1589 return -1;
1590}
1591
1592static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
1593{
1594 s32 timer = 0, lock = 0;
1595 u32 reg;
1596 u8 stat;
1597
1598 while ((timer < timeout) && (!lock)) {
1599 reg = STV090x_READ_DEMOD(state, DMDSTATE);
1600 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
1601
1602 switch (stat) {
1603 case 0: /* searching */
1604 case 1: /* first PLH detected */
1605 default:
1606 dprintk(FE_DEBUG, 1, "Demodulator searching ..");
1607 lock = 0;
1608 break;
1609 case 2: /* DVB-S2 mode */
1610 case 3: /* DVB-S1/legacy mode */
1611 reg = STV090x_READ_DEMOD(state, DSTATUS);
1612 lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
1613 break;
1614 }
1615
1616 if (!lock)
1617 msleep(10);
1618 else
1619 dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
1620
1621 timer += 10;
1622 }
1623 return lock;
1624}
1625
1626static int stv090x_blind_search(struct stv090x_state *state)
1627{
1628 u32 agc2, reg, srate_coarse;
1629 s32 timeout_dmd = 500, cpt_fail, agc2_ovflw, i;
1630 u8 k_ref, k_max, k_min;
1631 int coarse_fail, lock;
1632
1633 if (state->dev_ver < 0x20) {
1634 k_max = 233;
1635 k_min = 143;
1636 } else {
1637 k_max = 120;
1638 k_min = 30;
1639 }
1640
1641 agc2 = stv090x_get_agc2_min_level(state);
1642
1643 if (agc2 > STV090x_SEARCH_AGC2_TH) {
1644 lock = 0;
1645 } else {
1646 if (state->dev_ver == 0x10) {
1647 if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0xaa) < 0)
1648 goto err;
1649 }
1650 if (state->dev_ver < 0x20) {
1651 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x55) < 0)
1652 goto err;
1653 }
1654
1655 if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
1656 goto err;
1657 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
1658 goto err;
1659 if (state->dev_ver >= 0x20) {
1660 if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
1661 goto err;
1662 if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
1663 goto err;
1664 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
1665 goto err;
1666 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
1667 goto err;
1668 }
1669
1670 k_ref = k_max;
1671 do {
1672 if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
1673 goto err;
1674 if (stv090x_srate_srch_coarse(state) != 0) {
1675 srate_coarse = stv090x_srate_srch_fine(state);
1676 if (srate_coarse != 0) {
1677 stv090x_get_lock_tmg(state);
1678 lock = stv090x_get_dmdlock(state, timeout_dmd);
1679 } else {
1680 lock = 0;
1681 }
1682 } else {
1683 cpt_fail = 0;
1684 agc2_ovflw = 0;
1685 for (i = 0; i < 10; i++) {
1686 agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
1687 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1688 if (agc2 >= 0xff00)
1689 agc2_ovflw++;
1690 reg = STV090x_READ_DEMOD(state, DSTATUS2);
1691 if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
1692 (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
1693
1694 cpt_fail++;
1695 }
1696 if ((cpt_fail > 7) || (agc2_ovflw > 7))
1697 coarse_fail = 1;
1698
1699 lock = 0;
1700 }
1701 k_ref -= 30;
1702 } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
1703 }
1704
1705 return lock;
1706
1707err:
1708 dprintk(FE_ERROR, 1, "I/O error");
1709 return -1;
1710}
1711
1712static int stv090x_chk_tmg(struct stv090x_state *state)
1713{
1714 u32 reg;
1715 s32 tmg_cpt, i;
1716 u8 freq, tmg_thh, tmg_thl;
1717 int tmg_lock;
1718
1719 freq = STV090x_READ_DEMOD(state, CARFREQ);
1720 tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
1721 tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
1722 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
1723 goto err;
1724 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
1725 goto err;
1726
1727 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1728 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
1729 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1730 goto err;
1731 if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
1732 goto err;
1733
1734 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
1735 goto err;
1736 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
1737 goto err;
1738
1739 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
1740 goto err;
1741 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1742 goto err;
1743 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
1744 goto err;
1745
1746 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
1747 goto err;
1748 msleep(10);
1749
1750 for (i = 0; i < 10; i++) {
1751 reg = STV090x_READ_DEMOD(state, DSTATUS);
1752 if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
1753 tmg_cpt++;
1754 msleep(1);
1755 }
1756 if (tmg_cpt >= 3)
1757 tmg_lock = 1;
1758
1759 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
1760 goto err;
1761 if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
1762 goto err;
1763 if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
1764 goto err;
1765
1766 if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
1767 goto err;
1768 if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
1769 goto err;
1770 if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
1771 goto err;
1772
1773 return tmg_lock;
1774
1775err:
1776 dprintk(FE_ERROR, 1, "I/O error");
1777 return -1;
1778}
1779
1780static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
1781{
1782 struct dvb_frontend *fe = &state->frontend;
1783
1784 u32 reg;
1785 s32 car_step, steps, cur_step, dir, freq, timeout_lock;
1786 int lock = 0;
1787
1788 if (state->srate >= 10000000)
1789 timeout_lock = timeout_dmd / 3;
1790 else
1791 timeout_lock = timeout_dmd / 2;
1792
1793 lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
1794 if (!lock) {
1795 if (state->srate >= 10000000) {
1796 if (stv090x_chk_tmg(state)) {
1797 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1798 goto err;
1799 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1800 goto err;
1801 lock = stv090x_get_dmdlock(state, timeout_dmd);
1802 } else {
1803 lock = 0;
1804 }
1805 } else {
1806 if (state->srate <= 4000000)
1807 car_step = 1000;
1808 else if (state->srate <= 7000000)
1809 car_step = 2000;
1810 else if (state->srate <= 10000000)
1811 car_step = 3000;
1812 else
1813 car_step = 5000;
1814
1815 steps = (state->search_range / 1000) / car_step;
1816 steps /= 2;
1817 steps = 2 * (steps + 1);
1818 if (steps < 0)
1819 steps = 2;
1820 else if (steps > 12)
1821 steps = 12;
1822
1823 cur_step = 1;
1824 dir = 1;
1825
1826 if (!lock) {
1827 freq = state->frequency;
1828 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
1829 while ((cur_step <= steps) && (!lock)) {
1830 if (dir > 0)
1831 freq += cur_step * car_step;
1832 else
1833 freq -= cur_step * car_step;
1834
1835 /* Setup tuner */
1836 stv090x_i2c_gate_ctrl(fe, 1);
1837
1838 if (state->config->tuner_set_frequency)
1839 state->config->tuner_set_frequency(fe, state->frequency);
1840
1841 if (state->config->tuner_set_bandwidth)
1842 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
1843
1844 stv090x_i2c_gate_ctrl(fe, 0);
1845
1846 msleep(50);
1847
1848 stv090x_i2c_gate_ctrl(fe, 1);
1849
1850 if (state->config->tuner_get_status)
1851 state->config->tuner_get_status(fe, &reg);
1852
1853 if (reg)
1854 dprintk(FE_DEBUG, 1, "Tuner phase locked");
1855 else
1856 dprintk(FE_DEBUG, 1, "Tuner unlocked");
1857
1858 stv090x_i2c_gate_ctrl(fe, 0);
1859
1860 STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
1861 if (state->delsys == STV090x_DVBS2) {
1862 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
1863 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
1864 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
1865 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1866 goto err;
1867 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
1868 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
1869 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
1870 goto err;
1871 }
1872 if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
1873 goto err;
1874 if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
1875 goto err;
1876 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
1877 goto err;
1878 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
1879 goto err;
1880 lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
1881
1882 dir *= -1;
1883 cur_step++;
1884 }
1885 }
1886 }
1887 }
1888
1889 return lock;
1890
1891err:
1892 dprintk(FE_ERROR, 1, "I/O error");
1893 return -1;
1894}
1895
1896static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
1897{
1898 s32 timeout, inc, steps_max, srate, car_max;
1899
1900 srate = state->srate;
1901 car_max = state->search_range / 1000;
1902 car_max = 65536 * (car_max / 2);
1903 car_max /= (state->mclk / 1000);
1904
1905 if (car_max > 0x4000)
1906 car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
1907
1908 inc = srate;
1909 inc /= state->mclk / 1000;
1910 inc *= 256;
1911 inc *= 256;
1912 inc /= 1000;
1913
1914 switch (state->algo) {
1915 case STV090x_SEARCH_DVBS1:
1916 case STV090x_SEARCH_DSS:
1917 inc *= 3; /* freq step = 3% of srate */
1918 timeout = 20;
1919 break;
1920
1921 case STV090x_SEARCH_DVBS2:
1922 inc *= 4;
1923 timeout = 25;
1924 break;
1925
1926 case STV090x_SEARCH_AUTO:
1927 default:
1928 inc *= 3;
1929 timeout = 25;
1930 break;
1931 }
1932 inc /= 100;
1933 if ((inc > car_max) || (inc < 0))
1934 inc = car_max / 2; /* increment <= 1/8 Mclk */
1935
1936 timeout *= 27500; /* 27.5 Msps reference */
1937 if (srate > 0)
1938 timeout /= (srate / 1000);
1939
1940 if ((timeout > 100) || (timeout < 0))
1941 timeout = 100;
1942
1943 steps_max = (car_max / inc) + 1; /* min steps = 3 */
1944 if ((steps_max > 100) || (steps_max < 0)) {
1945 steps_max = 100; /* max steps <= 100 */
1946 inc = car_max / steps_max;
1947 }
1948 *freq_inc = inc;
1949 *timeout_sw = timeout;
1950 *steps = steps_max;
1951
1952 return 0;
1953}
1954
1955static int stv090x_chk_signal(struct stv090x_state *state)
1956{
1957 s32 offst_car, agc2, car_max;
1958 int no_signal;
1959
1960 offst_car = STV090x_READ_DEMOD(state, CFR2) << 8;
1961 offst_car |= STV090x_READ_DEMOD(state, CFR1);
1962
1963 agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
1964 agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
1965 car_max = state->search_range / 1000;
1966
1967 car_max += (car_max / 10); /* 10% margin */
1968 car_max = (65536 * car_max / 2);
1969 car_max /= state->mclk / 1000;
1970
1971 if (car_max > 0x4000)
1972 car_max = 0x4000;
1973
1974 if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
1975 no_signal = 1;
1976 dprintk(FE_DEBUG, 1, "No Signal");
1977 } else {
1978 no_signal = 0;
1979 dprintk(FE_DEBUG, 1, "Found Signal");
1980 }
1981
1982 return no_signal;
1983}
1984
1985static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
1986{
1987 int no_signal, lock = 0;
1988 s32 cpt_step, offst_freq, car_max;
1989 u32 reg;
1990
1991 car_max = state->search_range / 1000;
1992 car_max += (car_max / 10);
1993 car_max = (65536 * car_max / 2);
1994 car_max /= (state->mclk / 1000);
1995 if (car_max > 0x4000)
1996 car_max = 0x4000;
1997
1998 if (zigzag)
1999 offst_freq = 0;
2000 else
2001 offst_freq = -car_max + inc;
2002
2003 cpt_step = 0;
2004 do {
2005 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2006 goto err;
2007 if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
2008 goto err;
2009 if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
2010 goto err;
2011 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2012 goto err;
2013
2014 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2015 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
2016 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2017 goto err;
2018
2019 if (state->dev_ver == 0x12) {
2020 reg = STV090x_READ_DEMOD(state, TSCFGH);
2021 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x1);
2022 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2023 goto err;
2024 }
2025
2026 if (zigzag) {
2027 if (offst_freq >= 0)
2028 offst_freq = -offst_freq - 2 * inc;
2029 else
2030 offst_freq = -offst_freq;
2031 } else {
2032 offst_freq += 2 * inc;
2033 }
2034
2035 lock = stv090x_get_dmdlock(state, timeout);
2036 no_signal = stv090x_chk_signal(state);
2037
2038 } while ((!lock) &&
2039 (!no_signal) &&
2040 ((offst_freq - inc) < car_max) &&
2041 ((offst_freq + inc) > -car_max) &&
2042 (cpt_step < steps_max));
2043
2044 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
2045 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
2046 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
2047 goto err;
2048
2049 return lock;
2050err:
2051 dprintk(FE_ERROR, 1, "I/O error");
2052 return -1;
2053}
2054
2055static int stv090x_sw_algo(struct stv090x_state *state)
2056{
2057 int no_signal, zigzag, lock = 0;
2058 u32 reg;
2059
2060 s32 dvbs2_fly_wheel;
2061 s32 inc, timeout_step, trials, steps_max;
2062
2063 stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max); /* get params */
2064
2065 switch (state->algo) {
2066 case STV090x_SEARCH_DVBS1:
2067 case STV090x_SEARCH_DSS:
2068 /* accelerate the frequency detector */
2069 if (state->dev_ver >= 0x20) {
2070 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
2071 goto err;
2072 } else {
2073 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
2074 goto err;
2075 }
2076 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
2077 goto err;
2078 zigzag = 0;
2079 break;
2080
2081 case STV090x_SEARCH_DVBS2:
2082 if (state->dev_ver >= 0x20) {
2083 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2084 goto err;
2085 } else {
2086 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0)
2087 goto err;
2088 }
2089 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2090 goto err;
2091 zigzag = 1;
2092 break;
2093
2094 case STV090x_SEARCH_AUTO:
2095 default:
2096 /* accelerate the frequency detector */
2097 if (state->dev_ver >= 0x20) {
2098 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
2099 goto err;
2100 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2101 goto err;
2102 } else {
2103 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
2104 goto err;
2105 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0)
2106 goto err;
2107 }
2108 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x69) < 0)
2109 goto err;
2110 zigzag = 0;
2111 break;
2112 }
2113
2114 trials = 0;
2115 do {
2116 lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
2117 no_signal = stv090x_chk_signal(state);
2118 trials++;
2119
2120 /*run the SW search 2 times maximum*/
2121 if (lock || no_signal || (trials == 2)) {
2122 /*Check if the demod is not losing lock in DVBS2*/
2123 if (state->dev_ver >= 0x20) {
2124 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2125 goto err;
2126 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
2127 goto err;
2128 } else {
2129 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
2130 goto err;
2131 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x88) < 0)
2132 goto err;
2133 }
2134
2135 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2136 if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
2137 /*Check if the demod is not losing lock in DVBS2*/
2138 msleep(timeout_step);
2139 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2140 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2141 if (dvbs2_fly_wheel < 0xd) { /*if correct frames is decrementing */
2142 msleep(timeout_step);
2143 reg = STV090x_READ_DEMOD(state, DMDFLYW);
2144 dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
2145 }
2146 if (dvbs2_fly_wheel < 0xd) {
2147 /*FALSE lock, The demod is loosing lock */
2148 lock = 0;
2149 if (trials < 2) {
2150 if (state->dev_ver >= 0x20) {
2151 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
2152 goto err;
2153 } else {
2154 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x68) < 0)
2155 goto err;
2156 }
2157 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
2158 goto err;
2159 }
2160 }
2161 }
2162 }
2163 } while ((!lock) && (trials < 2) && (!no_signal));
2164
2165 return lock;
2166err:
2167 dprintk(FE_ERROR, 1, "I/O error");
2168 return -1;
2169}
2170
2171static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
2172{
2173 u32 reg;
2174 enum stv090x_delsys delsys;
2175
2176 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2177 if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
2178 delsys = STV090x_DVBS2;
2179 else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
2180 reg = STV090x_READ_DEMOD(state, FECM);
2181 if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
2182 delsys = STV090x_DSS;
2183 else
2184 delsys = STV090x_DVBS1;
2185 } else {
2186 delsys = STV090x_ERROR;
2187 }
2188
2189 return delsys;
2190}
2191
2192/* in Hz */
2193static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
2194{
2195 s32 derot, int_1, int_2, tmp_1, tmp_2;
2196 u32 pow2;
2197
2198 derot = STV090x_READ_DEMOD(state, CFR2) << 16;
2199 derot |= STV090x_READ_DEMOD(state, CFR1) << 8;
2200 derot |= STV090x_READ_DEMOD(state, CFR0);
2201
2202 derot = comp2(derot, 24);
2203 pow2 = 1 << 12;
2204 int_1 = state->mclk / pow2;
2205 int_2 = derot / pow2;
2206
2207 tmp_1 = state->mclk % pow2;
2208 tmp_2 = derot % pow2;
2209
2210 derot = (int_1 * int_2) +
2211 ((int_1 * tmp_2) / pow2) +
2212 ((int_1 * tmp_1) / pow2);
2213
2214 return derot;
2215}
2216
2217static int stv090x_get_viterbi(struct stv090x_state *state)
2218{
2219 u32 reg, rate;
2220
2221 reg = STV090x_READ_DEMOD(state, VITCURPUN);
2222 rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
2223
2224 switch (rate) {
2225 case 13:
2226 state->fec = STV090x_PR12;
2227 break;
2228
2229 case 18:
2230 state->fec = STV090x_PR23;
2231 break;
2232
2233 case 21:
2234 state->fec = STV090x_PR34;
2235 break;
2236
2237 case 24:
2238 state->fec = STV090x_PR56;
2239 break;
2240
2241 case 25:
2242 state->fec = STV090x_PR67;
2243 break;
2244
2245 case 26:
2246 state->fec = STV090x_PR78;
2247 break;
2248
2249 default:
2250 state->fec = STV090x_PRERR;
2251 break;
2252 }
2253
2254 return 0;
2255}
2256
2257static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
2258{
2259 struct dvb_frontend *fe = &state->frontend;
2260
2261 u8 tmg;
2262 u32 reg;
2263 s32 i = 0, offst_freq;
2264
2265 msleep(5);
2266
2267 if (state->algo == STV090x_BLIND_SEARCH) {
2268 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2269 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
2270 while ((i <= 50) && (!tmg) && (tmg != 0xff)) {
2271 tmg = STV090x_READ_DEMOD(state, TMGREG2);
2272 msleep(5);
2273 i += 5;
2274 }
2275 }
2276 state->delsys = stv090x_get_std(state);
2277
2278 stv090x_i2c_gate_ctrl(fe, 1);
2279
2280 if (state->config->tuner_get_frequency)
2281 state->config->tuner_get_frequency(fe, &state->frequency);
2282
2283 stv090x_i2c_gate_ctrl(fe, 0);
2284
2285 offst_freq = stv090x_get_car_freq(state, state->mclk) / 1000;
2286 state->frequency += offst_freq;
2287 stv090x_get_viterbi(state);
2288 reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2289 state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2290 state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2291 state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
2292 reg = STV090x_READ_DEMOD(state, TMGOBS);
2293 state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2294 reg = STV090x_READ_DEMOD(state, FECM);
2295 state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
2296
2297 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
2298
2299 stv090x_i2c_gate_ctrl(fe, 1);
2300
2301 if (state->config->tuner_get_frequency)
2302 state->config->tuner_get_frequency(fe, &state->frequency);
2303
2304 stv090x_i2c_gate_ctrl(fe, 0);
2305
2306 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2307 return STV090x_RANGEOK;
2308 else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
2309 return STV090x_RANGEOK;
2310 else
2311 return STV090x_OUTOFRANGE; /* Out of Range */
2312 } else {
2313 if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
2314 return STV090x_RANGEOK;
2315 else
2316 return STV090x_OUTOFRANGE;
2317 }
2318
2319 return STV090x_OUTOFRANGE;
2320}
2321
2322static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
2323{
2324 s32 offst_tmg;
2325 s32 pow2;
2326
2327 offst_tmg = STV090x_READ_DEMOD(state, TMGREG2) << 16;
2328 offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) << 8;
2329 offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
2330
2331 pow2 = 1 << 24;
2332
2333 offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
2334 if (!offst_tmg)
2335 offst_tmg = 1;
2336
2337 offst_tmg = ((s32) srate * 10) / (pow2 / offst_tmg);
2338 offst_tmg /= 320;
2339
2340 return offst_tmg;
2341}
2342
2343static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
2344{
2345 u8 aclc = 0x29;
2346 s32 i;
2347 struct stv090x_long_frame_crloop *car_loop;
2348
2349 if (state->dev_ver <= 0x12)
2350 car_loop = stv090x_s2_crl;
2351 else if (state->dev_ver == 0x20)
2352 car_loop = stv090x_s2_crl_cut20;
2353 else
2354 car_loop = stv090x_s2_crl;
2355
2356
2357 if (modcod < STV090x_QPSK_12) {
2358 i = 0;
2359 while ((i < 3) && (modcod != stv090x_s2_lowqpsk_crl_cut20[i].modcod))
2360 i++;
2361
2362 if (i >= 3)
2363 i = 2;
2364
2365 } else {
2366 i = 0;
2367 while ((i < 14) && (modcod != car_loop[i].modcod))
2368 i++;
2369
2370 if (i >= 14) {
2371 i = 0;
2372 while ((i < 11) && (modcod != stv090x_s2_lowqpsk_crl_cut20[i].modcod))
2373 i++;
2374
2375 if (i >= 11)
2376 i = 10;
2377 }
2378 }
2379
2380 if (modcod <= STV090x_QPSK_25) {
2381 if (pilots) {
2382 if (state->srate <= 3000000)
2383 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_2;
2384 else if (state->srate <= 7000000)
2385 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_5;
2386 else if (state->srate <= 15000000)
2387 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_10;
2388 else if (state->srate <= 25000000)
2389 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_20;
2390 else
2391 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_on_30;
2392 } else {
2393 if (state->srate <= 3000000)
2394 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_2;
2395 else if (state->srate <= 7000000)
2396 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_5;
2397 else if (state->srate <= 15000000)
2398 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_10;
2399 else if (state->srate <= 25000000)
2400 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_20;
2401 else
2402 aclc = stv090x_s2_lowqpsk_crl_cut20[i].crl_pilots_off_30;
2403 }
2404
2405 } else if (modcod <= STV090x_8PSK_910) {
2406 if (pilots) {
2407 if (state->srate <= 3000000)
2408 aclc = car_loop[i].crl_pilots_on_2;
2409 else if (state->srate <= 7000000)
2410 aclc = car_loop[i].crl_pilots_on_5;
2411 else if (state->srate <= 15000000)
2412 aclc = car_loop[i].crl_pilots_on_10;
2413 else if (state->srate <= 25000000)
2414 aclc = car_loop[i].crl_pilots_on_20;
2415 else
2416 aclc = car_loop[i].crl_pilots_on_30;
2417 } else {
2418 if (state->srate <= 3000000)
2419 aclc = car_loop[i].crl_pilots_off_2;
2420 else if (state->srate <= 7000000)
2421 aclc = car_loop[i].crl_pilots_off_5;
2422 else if (state->srate <= 15000000)
2423 aclc = car_loop[i].crl_pilots_off_10;
2424 else if (state->srate <= 25000000)
2425 aclc = car_loop[i].crl_pilots_off_20;
2426 else
2427 aclc = car_loop[i].crl_pilots_off_30;
2428 }
2429 } else { /* 16APSK and 32APSK */
2430 if (state->srate <= 3000000)
2431 aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_2;
2432 else if (state->srate <= 7000000)
2433 aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_5;
2434 else if (state->srate <= 15000000)
2435 aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_10;
2436 else if (state->srate <= 25000000)
2437 aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_20;
2438 else
2439 aclc = stv090x_s2_apsk_crl_cut20[i].crl_pilots_on_30;
2440 }
2441
2442 return aclc;
2443}
2444
2445static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
2446{
2447 s32 index = 0;
2448 u8 aclc = 0x0b;
2449
2450 switch (state->modulation) {
2451 case STV090x_QPSK:
2452 default:
2453 index = 0;
2454 break;
2455 case STV090x_8PSK:
2456 index = 1;
2457 break;
2458 case STV090x_16APSK:
2459 index = 2;
2460 break;
2461 case STV090x_32APSK:
2462 index = 3;
2463 break;
2464 }
2465
2466 switch (state->dev_ver) {
2467 case 0x20:
2468 if (state->srate <= 3000000)
2469 aclc = stv090x_s2_short_crl[index].crl_cut20_2;
2470 else if (state->srate <= 7000000)
2471 aclc = stv090x_s2_short_crl[index].crl_cut20_5;
2472 else if (state->srate <= 15000000)
2473 aclc = stv090x_s2_short_crl[index].crl_cut20_10;
2474 else if (state->srate <= 25000000)
2475 aclc = stv090x_s2_short_crl[index].crl_cut20_20;
2476 else
2477 aclc = stv090x_s2_short_crl[index].crl_cut20_30;
2478 break;
2479
2480 case 0x12:
2481 default:
2482 if (state->srate <= 3000000)
2483 aclc = stv090x_s2_short_crl[index].crl_cut12_2;
2484 else if (state->srate <= 7000000)
2485 aclc = stv090x_s2_short_crl[index].crl_cut12_5;
2486 else if (state->srate <= 15000000)
2487 aclc = stv090x_s2_short_crl[index].crl_cut12_10;
2488 else if (state->srate <= 25000000)
2489 aclc = stv090x_s2_short_crl[index].crl_cut12_20;
2490 else
2491 aclc = stv090x_s2_short_crl[index].crl_cut12_30;
2492 break;
2493 }
2494
2495 return aclc;
2496}
2497
2498static int stv090x_optimize_track(struct stv090x_state *state)
2499{
2500 struct dvb_frontend *fe = &state->frontend;
2501
2502 enum stv090x_rolloff rolloff;
2503 enum stv090x_modcod modcod;
2504
2505 s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
2506 u32 reg;
2507
2508 srate = stv090x_get_srate(state, state->mclk);
2509 srate += stv090x_get_tmgoffst(state, srate);
2510
2511 switch (state->delsys) {
2512 case STV090x_DVBS1:
2513 case STV090x_DSS:
2514 if (state->algo == STV090x_SEARCH_AUTO) {
2515 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2516 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2517 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2518 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2519 goto err;
2520 }
2521 reg = STV090x_READ_DEMOD(state, DEMOD);
2522 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
2523 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x01);
2524 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2525 goto err;
2526 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
2527 goto err;
2528 break;
2529
2530 case STV090x_DVBS2:
2531 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2532 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2533 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
2534 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2535 goto err;
2536 if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
2537 goto err;
2538 if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
2539 goto err;
2540 if (state->frame_len == STV090x_LONG_FRAME) {
2541 reg = STV090x_READ_DEMOD(state, DMDMODCOD);
2542 modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
2543 pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
2544 aclc = stv090x_optimize_carloop(state, modcod, pilots);
2545 if (modcod <= STV090x_QPSK_910) {
2546 STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
2547 } else if (modcod <= STV090x_8PSK_910) {
2548 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2549 goto err;
2550 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2551 goto err;
2552 }
2553 if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
2554 if (modcod <= STV090x_16APSK_910) {
2555 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2556 goto err;
2557 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2558 goto err;
2559 } else {
2560 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2561 goto err;
2562 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2563 goto err;
2564 }
2565 }
2566 } else {
2567 /*Carrier loop setting for short frame*/
2568 aclc = stv090x_optimize_carloop_short(state);
2569 if (state->modulation == STV090x_QPSK) {
2570 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
2571 goto err;
2572 } else if (state->modulation == STV090x_8PSK) {
2573 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2574 goto err;
2575 if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
2576 goto err;
2577 } else if (state->modulation == STV090x_16APSK) {
2578 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2579 goto err;
2580 if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
2581 goto err;
2582 } else if (state->modulation == STV090x_32APSK) {
2583 if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
2584 goto err;
2585 if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
2586 goto err;
2587 }
2588 }
2589 if (state->dev_ver <= 0x11) {
2590 if (state->demod_mode != STV090x_SINGLE)
2591 stv090x_activate_modcod(state); /* link to LDPC after demod LOCK */
2592 }
2593 STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
2594 break;
2595
2596 case STV090x_UNKNOWN:
2597 default:
2598 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2599 STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
2600 STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
2601 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2602 goto err;
2603 break;
2604 }
2605
2606 f_1 = STV090x_READ_DEMOD(state, CFR2);
2607 f_0 = STV090x_READ_DEMOD(state, CFR1);
2608 reg = STV090x_READ_DEMOD(state, TMGOBS);
2609 rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
2610
2611 if (state->algo == STV090x_BLIND_SEARCH) {
2612 STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
2613 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2614 STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
2615 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
2616 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2617 goto err;
2618 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0)
2619 goto err;
2620 stv090x_set_srate(state, srate);
2621 stv090x_set_max_srate(state, state->mclk, srate);
2622 stv090x_set_min_srate(state, state->mclk, srate);
2623 blind_tune = 1;
2624 }
2625
2626 if (state->dev_ver >= 0x20) {
2627 if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
2628 (state->search_mode == STV090x_SEARCH_DSS) ||
2629 (state->search_mode == STV090x_SEARCH_AUTO)) {
2630
2631 if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
2632 goto err;
2633 if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
2634 goto err;
2635 }
2636 }
2637
2638 if (state->dev_ver < 0x20) {
2639 if (STV090x_WRITE_DEMOD(state, CARHDR, 0x08) < 0)
2640 goto err;
2641 }
2642 if (state->dev_ver == 0x10) {
2643 if (STV090x_WRITE_DEMOD(state, CORRELEXP, 0x0a) < 0)
2644 goto err;
2645 }
2646
2647 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
2648 goto err;
2649
2650 if ((state->dev_ver >= 0x20) || (blind_tune == 1) || (state->srate < 10000000)) {
2651
2652 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2653 goto err;
2654 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2655 goto err;
2656 state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
2657
2658 if ((state->dev_ver >= 0x20) || (blind_tune == 1)) {
2659
2660 if (state->algo != STV090x_WARM_SEARCH) {
2661
2662 stv090x_i2c_gate_ctrl(fe, 1);
2663
2664 if (state->config->tuner_set_bandwidth)
2665 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
2666
2667 stv090x_i2c_gate_ctrl(fe, 0);
2668
2669 }
2670 }
2671 if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
2672 msleep(50); /* blind search: wait 50ms for SR stabilization */
2673 else
2674 msleep(5);
2675
2676 stv090x_get_lock_tmg(state);
2677
2678 if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
2679 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2680 goto err;
2681 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2682 goto err;
2683 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2684 goto err;
2685 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2686 goto err;
2687
2688 i = 0;
2689
2690 while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
2691
2692 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
2693 goto err;
2694 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2695 goto err;
2696 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
2697 goto err;
2698 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
2699 goto err;
2700 i++;
2701 }
2702 }
2703
2704 }
2705
2706 if (state->dev_ver >= 0x20) {
2707 if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
2708 goto err;
2709 }
2710 if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
2711 stv090x_set_vit_thtracq(state);
2712
2713 return 0;
2714err:
2715 dprintk(FE_ERROR, 1, "I/O error");
2716 return -1;
2717}
2718
2719static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
2720{
2721 s32 timer = 0, lock = 0, stat;
2722 u32 reg;
2723
2724 while ((timer < timeout) && (!lock)) {
2725 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2726 stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
2727
2728 switch (stat) {
2729 case 0: /* searching */
2730 case 1: /* first PLH detected */
2731 default:
2732 lock = 0;
2733 break;
2734
2735 case 2: /* DVB-S2 mode */
2736 reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
2737 lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
2738 break;
2739
2740 case 3: /* DVB-S1/legacy mode */
2741 reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
2742 lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
2743 break;
2744 }
2745 if (!lock) {
2746 msleep(10);
2747 timer += 10;
2748 }
2749 }
2750 return lock;
2751}
2752
2753static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
2754{
2755 u32 reg;
2756 s32 timer = 0;
2757 int lock;
2758
2759 lock = stv090x_get_dmdlock(state, timeout_dmd);
2760 if (lock)
2761 lock = stv090x_get_feclock(state, timeout_fec);
2762
2763 if (lock) {
2764 lock = 0;
2765
2766 while ((timer < timeout_fec) && (!lock)) {
2767 reg = STV090x_READ_DEMOD(state, TSSTATUS);
2768 lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
2769 msleep(1);
2770 timer++;
2771 }
2772 }
2773
2774 return lock;
2775}
2776
2777static int stv090x_set_s2rolloff(struct stv090x_state *state)
2778{
2779 s32 rolloff;
2780 u32 reg;
2781
2782 if (state->dev_ver == 0x10) {
2783 reg = STV090x_READ_DEMOD(state, DEMOD);
2784 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x01);
2785 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2786 goto err;
2787 rolloff = STV090x_READ_DEMOD(state, MATSTR1) & 0x03;
2788 reg = STV090x_READ_DEMOD(state, DEMOD);
2789 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, reg);
2790 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2791 goto err;
2792 } else {
2793 reg = STV090x_READ_DEMOD(state, DEMOD);
2794 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 0x00);
2795 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2796 goto err;
2797 }
2798 return 0;
2799err:
2800 dprintk(FE_ERROR, 1, "I/O error");
2801 return -1;
2802}
2803
2804static enum stv090x_signal_state stv090x_acq_fixs1(struct stv090x_state *state)
2805{
2806 s32 srate, f_1, f_2;
2807 enum stv090x_signal_state signal_state = STV090x_NODATA;
2808 u32 reg;
2809 int lock;
2810
2811 reg = STV090x_READ_DEMOD(state, DMDSTATE);
2812 if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) { /* DVB-S mode */
2813 srate = stv090x_get_srate(state, state->mclk);
2814 srate += stv090x_get_tmgoffst(state, state->srate);
2815
2816 if (state->algo == STV090x_BLIND_SEARCH)
2817 stv090x_set_srate(state, state->srate);
2818
2819 stv090x_get_lock_tmg(state);
2820
2821 f_1 = STV090x_READ_DEMOD(state, CFR2);
2822 f_2 = STV090x_READ_DEMOD(state, CFR1);
2823
2824 reg = STV090x_READ_DEMOD(state, DMDCFGMD);
2825 STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
2826 if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
2827 goto err;
2828
2829 reg = STV090x_READ_DEMOD(state, DEMOD);
2830 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, STV090x_IQ_SWAP);
2831 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2832 goto err;
2833 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0) /* stop demod */
2834 goto err;
2835 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2836 goto err;
2837 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_2) < 0)
2838 goto err;
2839 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* warm start trigger */
2840 goto err;
2841
2842 if (stv090x_get_lock(state, state->DemodTimeout, state->FecTimeout)) {
2843 lock = 1;
2844 stv090x_get_sig_params(state);
2845 stv090x_optimize_track(state);
2846 } else {
2847 reg = STV090x_READ_DEMOD(state, DEMOD);
2848 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, STV090x_IQ_NORMAL);
2849 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2850 goto err;
2851 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
2852 goto err;
2853 if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
2854 goto err;
2855 if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_2) < 0)
2856 goto err;
2857 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* warm start trigger */
2858 goto err;
2859 if (stv090x_get_lock(state, state->DemodTimeout, state->FecTimeout)) {
2860 lock = 1;
2861 signal_state = stv090x_get_sig_params(state);
2862 stv090x_optimize_track(state);
2863 }
2864 }
2865 } else {
2866 lock = 0;
2867 }
2868
2869 return signal_state;
2870
2871err:
2872 dprintk(FE_ERROR, 1, "I/O error");
2873 return -1;
2874}
2875
2876static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
2877{
2878 struct dvb_frontend *fe = &state->frontend;
2879 enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
2880 u32 reg;
2881 s32 timeout_dmd = 500, timeout_fec = 50;
2882 int lock = 0, low_sr, no_signal = 0;
2883
2884 reg = STV090x_READ_DEMOD(state, TSCFGH);
2885 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
2886 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2887 goto err;
2888
2889 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
2890 goto err;
2891
2892 if (state->dev_ver >= 0x20) {
2893 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0) /* cut 2.0 */
2894 goto err;
2895 } else {
2896 if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x88) < 0) /* cut 1.x */
2897 goto err;
2898 }
2899
2900 stv090x_get_lock_tmg(state);
2901
2902 if (state->algo == STV090x_BLIND_SEARCH) {
2903 state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
2904 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x00) < 0) /* wider srate scan */
2905 goto err;
2906 stv090x_set_srate(state, 1000000); /* inital srate = 1Msps */
2907 } else {
2908 /* known srate */
2909 if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
2910 goto err;
2911 if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
2912 goto err;
2913
2914 if (state->srate >= 10000000) {
2915 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0) /* High SR */
2916 goto err;
2917 } else {
2918 if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x60) < 0) /* Low SR */
2919 goto err;
2920 }
2921
2922 if (state->dev_ver >= 0x20) {
2923 if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
2924 goto err;
2925 if (state->algo == STV090x_COLD_SEARCH)
2926 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 1000000)) / 10;
2927 else if (state->algo == STV090x_WARM_SEARCH)
2928 state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
2929 } else {
2930 if (STV090x_WRITE_DEMOD(state, KREFTMG, 0xc1) < 0)
2931 goto err;
2932 state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
2933 }
2934 if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0x01) < 0) /* narrow srate scan */
2935 goto err;
2936 stv090x_set_srate(state, state->srate);
2937 stv090x_set_max_srate(state, state->mclk, state->srate);
2938 stv090x_set_min_srate(state, state->mclk, state->srate);
2939
2940 if (state->srate >= 10000000)
2941 low_sr = 1;
2942 }
2943
2944 /* Setup tuner */
2945 stv090x_i2c_gate_ctrl(fe, 1);
2946
2947 if (state->config->tuner_set_bbgain)
2948 state->config->tuner_set_bbgain(fe, 10); /* 10dB */
2949
2950 if (state->config->tuner_set_frequency)
2951 state->config->tuner_set_frequency(fe, state->frequency);
2952
2953 if (state->config->tuner_set_bandwidth)
2954 state->config->tuner_set_bandwidth(fe, state->tuner_bw);
2955
2956 stv090x_i2c_gate_ctrl(fe, 0);
2957
2958 msleep(50);
2959
2960 stv090x_i2c_gate_ctrl(fe, 1);
2961
2962 if (state->config->tuner_get_status)
2963 state->config->tuner_get_status(fe, &reg);
2964
2965 if (reg)
2966 dprintk(FE_DEBUG, 1, "Tuner phase locked");
2967 else
2968 dprintk(FE_DEBUG, 1, "Tuner unlocked");
2969
2970 stv090x_i2c_gate_ctrl(fe, 0);
2971
2972 reg = STV090x_READ_DEMOD(state, DEMOD);
2973 STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
2974 STV090x_SETFIELD_Px(reg, MANUAL_ROLLOFF_FIELD, 1);
2975 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
2976 goto err;
2977 stv090x_delivery_search(state);
2978 if (state->algo == STV090x_BLIND_SEARCH)
2979 stv090x_start_search(state);
2980
2981 if (state->dev_ver == 0x12) {
2982 reg = STV090x_READ_DEMOD(state, TSCFGH);
2983 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
2984 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2985 goto err;
2986 msleep(3);
2987 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
2988 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2989 goto err;
2990 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
2991 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
2992 goto err;
2993 }
2994
2995 if (state->algo == STV090x_BLIND_SEARCH)
2996 lock = stv090x_blind_search(state);
2997 else if (state->algo == STV090x_COLD_SEARCH)
2998 lock = stv090x_get_coldlock(state, timeout_dmd);
2999 else if (state->algo == STV090x_WARM_SEARCH)
3000 lock = stv090x_get_dmdlock(state, timeout_dmd);
3001
3002 if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
3003 if (!low_sr) {
3004 if (stv090x_chk_tmg(state))
3005 lock = stv090x_sw_algo(state);
3006 }
3007 }
3008
3009 if (lock)
3010 signal_state = stv090x_get_sig_params(state);
3011
3012 if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
3013 stv090x_optimize_track(state);
3014 if (state->dev_ver <= 0x11) { /*workaround for dual DVBS1 cut 1.1 and 1.0 only*/
3015 if (stv090x_get_std(state) == STV090x_DVBS1) {
3016 msleep(20);
3017 reg = STV090x_READ_DEMOD(state, TSCFGH);
3018 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3019 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3020 goto err;
3021 } else {
3022 reg = STV090x_READ_DEMOD(state, TSCFGH);
3023 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3024 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3025 goto err;
3026 msleep(3);
3027 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3028 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3029 goto err;
3030 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3031 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3032 goto err;
3033 }
3034 } else if (state->dev_ver == 0x20) { /*cut 2.0 :release TS reset after demod lock and TrackingOptimization*/
3035 reg = STV090x_READ_DEMOD(state, TSCFGH);
3036 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3037 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3038 goto err;
3039 msleep(3);
3040 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
3041 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3042 goto err;
3043
3044 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
3045 if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
3046 goto err;
3047 }
3048
3049 if (stv090x_get_lock(state, timeout_fec, timeout_fec)) {
3050 lock = 1;
3051 if (state->delsys == STV090x_DVBS2) {
3052 stv090x_set_s2rolloff(state);
3053 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, 0x40) < 0)
3054 goto err;
3055 if (STV090x_WRITE_DEMOD(state, PDELCTRL2, 0x00) < 0) /* RESET counter */
3056 goto err;
3057 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
3058 goto err;
3059 } else {
3060 if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
3061 goto err;
3062 }
3063 if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
3064 goto err;
3065 if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3066 goto err;
3067 } else {
3068 lock = 0;
3069 signal_state = STV090x_NODATA;
3070 no_signal = stv090x_chk_signal(state);
3071 }
3072 }
3073 if ((signal_state == STV090x_NODATA) && (!no_signal)) {
3074 if (state->dev_ver <= 0x11) {
3075 reg = STV090x_READ_DEMOD(state, DMDSTATE);
3076 if (((STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD)) == STV090x_DVBS2) && (state->inversion == INVERSION_AUTO))
3077 signal_state = stv090x_acq_fixs1(state);
3078 }
3079 }
3080 return signal_state;
3081
3082err:
3083 dprintk(FE_ERROR, 1, "I/O error");
3084 return -1;
3085}
3086
3087static enum dvbfe_search stv090x_search(struct dvb_frontend *fe, struct dvb_frontend_parameters *p)
3088{
3089 struct stv090x_state *state = fe->demodulator_priv;
3090 struct dtv_frontend_properties *props = &fe->dtv_property_cache;
3091
3092 state->delsys = props->delivery_system;
3093 state->frequency = p->frequency;
3094 state->srate = p->u.qpsk.symbol_rate;
3095
3096 if (!stv090x_algo(state)) {
3097 dprintk(FE_DEBUG, 1, "Search success!");
3098 return DVBFE_ALGO_SEARCH_SUCCESS;
3099 } else {
3100 dprintk(FE_DEBUG, 1, "Search failed!");
3101 return DVBFE_ALGO_SEARCH_FAILED;
3102 }
3103
3104 return DVBFE_ALGO_SEARCH_ERROR;
3105}
3106
3107/* FIXME! */
3108static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
3109{
3110 struct stv090x_state *state = fe->demodulator_priv;
3111 u32 reg;
3112 u8 search_state;
3113 int locked = 0;
3114
3115 reg = STV090x_READ_DEMOD(state, DMDSTATE);
3116 search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
3117
3118 switch (search_state) {
3119 case 0: /* searching */
3120 case 1: /* first PLH detected */
3121 default:
3122 dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
3123 locked = 0;
3124 break;
3125
3126 case 2: /* DVB-S2 mode */
3127 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
3128 reg = STV090x_READ_DEMOD(state, DSTATUS);
3129 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3130 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3131 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3132 locked = 1;
3133 *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3134 }
3135 }
3136 break;
3137
3138 case 3: /* DVB-S1/legacy mode */
3139 dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
3140 reg = STV090x_READ_DEMOD(state, DSTATUS);
3141 if (STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD)) {
3142 reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
3143 if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
3144 reg = STV090x_READ_DEMOD(state, TSSTATUS);
3145 if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD)) {
3146 locked = 1;
3147 *status = FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
3148 }
3149 }
3150 }
3151 break;
3152 }
3153
3154 return locked;
3155}
3156
3157static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
3158{
3159 struct stv090x_state *state = fe->demodulator_priv;
3160
3161 s32 count_4, count_3, count_2, count_1, count_0, count;
3162 u32 reg, h, m, l;
3163 enum fe_status status;
3164
3165 if (!stv090x_read_status(fe, &status)) {
3166 *per = 1 << 23; /* Max PER */
3167 } else {
3168 /* Counter 2 */
3169 reg = STV090x_READ_DEMOD(state, ERRCNT22);
3170 h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
3171
3172 reg = STV090x_READ_DEMOD(state, ERRCNT21);
3173 m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
3174
3175 reg = STV090x_READ_DEMOD(state, ERRCNT20);
3176 l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
3177
3178 *per = ((h << 16) | (m << 8) | l);
3179
3180 count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
3181 count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
3182 count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
3183 count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
3184 count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
3185
3186 if ((!count_4) && (!count_3)) {
3187 count = (count_2 & 0xff) << 16;
3188 count |= (count_1 & 0xff) << 8;
3189 count |= count_0 & 0xff;
3190 } else {
3191 count = 1 << 24;
3192 }
3193 if (count == 0)
3194 *per = 1;
3195 }
3196 if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
3197 goto err;
3198 if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
3199 goto err;
3200
3201 return 0;
3202err:
3203 dprintk(FE_ERROR, 1, "I/O error");
3204 return -1;
3205}
3206
3207static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
3208{
3209 int res = 0;
3210 int min = 0, med;
3211
3212 if (val < tab[min].read)
3213 res = tab[min].real;
3214 else if (val >= tab[max].read)
3215 res = tab[max].real;
3216 else {
3217 while ((max - min) > 1) {
3218 med = (max + min) / 2;
3219 if (val >= tab[min].read && val < tab[med].read)
3220 max = med;
3221 else
3222 min = med;
3223 }
3224 res = ((val - tab[min].read) *
3225 (tab[max].real - tab[min].real) /
3226 (tab[max].read - tab[min].read)) +
3227 tab[min].real;
3228 }
3229
3230 return res;
3231}
3232
3233static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
3234{
3235 struct stv090x_state *state = fe->demodulator_priv;
3236 u32 reg;
3237 s32 agc;
3238
3239 reg = STV090x_READ_DEMOD(state, AGCIQIN1);
3240 agc = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
3241
3242 *strength = stv090x_table_lookup(stv090x_rf_tab, ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
3243 if (agc > stv090x_rf_tab[0].read)
3244 *strength = 5;
3245 else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
3246 *strength = -100;
3247
3248 return 0;
3249}
3250
3251static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
3252{
3253 struct stv090x_state *state = fe->demodulator_priv;
3254 u32 reg_0, reg_1, reg, i;
3255 s32 val_0, val_1, val = 0;
3256 u8 lock_f;
3257
3258 switch (state->delsys) {
3259 case STV090x_DVBS2:
3260 reg = STV090x_READ_DEMOD(state, DSTATUS);
3261 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3262 if (lock_f) {
3263 msleep(5);
3264 for (i = 0; i < 16; i++) {
3265 reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
3266 val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3267 reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
3268 val_0 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
3269 val += MAKEWORD16(val_1, val_0);
3270 msleep(1);
3271 }
3272 val /= 16;
3273 *cnr = stv090x_table_lookup(stv090x_s2cn_tab, ARRAY_SIZE(stv090x_s2cn_tab) - 1, val);
3274 if (val < stv090x_s2cn_tab[ARRAY_SIZE(stv090x_s2cn_tab) - 1].read)
3275 *cnr = 1000;
3276 }
3277 break;
3278
3279 case STV090x_DVBS1:
3280 case STV090x_DSS:
3281 reg = STV090x_READ_DEMOD(state, DSTATUS);
3282 lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
3283 if (lock_f) {
3284 msleep(5);
3285 for (i = 0; i < 16; i++) {
3286 reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
3287 val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3288 reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
3289 val_0 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
3290 val += MAKEWORD16(val_1, val_0);
3291 msleep(1);
3292 }
3293 val /= 16;
3294 *cnr = stv090x_table_lookup(stv090x_s1cn_tab, ARRAY_SIZE(stv090x_s1cn_tab) - 1, val);
3295 if (val < stv090x_s2cn_tab[ARRAY_SIZE(stv090x_s1cn_tab) - 1].read)
3296 *cnr = 1000;
3297 }
3298 break;
3299 default:
3300 break;
3301 }
3302
3303 return 0;
3304}
3305
3306static int stv090x_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
3307{
3308 struct stv090x_state *state = fe->demodulator_priv;
3309 u32 reg;
3310
3311 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3312 switch (tone) {
3313 case SEC_TONE_ON:
3314 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3315 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3316 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3317 goto err;
3318 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
3319 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3320 goto err;
3321 break;
3322
3323 case SEC_TONE_OFF:
3324 STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
3325 STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
3326 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3327 goto err;
3328 break;
3329 default:
3330 return -EINVAL;
3331 }
3332
3333 return 0;
3334err:
3335 dprintk(FE_ERROR, 1, "I/O error");
3336 return -1;
3337}
3338
3339
3340static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
3341{
3342 return DVBFE_ALGO_CUSTOM;
3343}
3344
3345static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
3346{
3347 struct stv090x_state *state = fe->demodulator_priv;
3348 u32 reg, idle = 0, fifo_full = 1;
3349 int i;
3350
3351 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3352 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
3353 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3354 goto err;
3355
3356 for (i = 0; i < cmd->msg_len; i++) {
3357
3358 while (fifo_full) {
3359 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3360 fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
3361 }
3362
3363 if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
3364 goto err;
3365 i++;
3366 }
3367 reg = STV090x_READ_DEMOD(state, DISTXCTL);
3368 STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
3369 if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
3370 goto err;
3371
3372 i = 0;
3373
3374 while ((!idle) && (i < 10)) {
3375 reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
3376 idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
3377 msleep(10);
3378 i++;
3379 }
3380
3381 return 0;
3382err:
3383 dprintk(FE_ERROR, 1, "I/O error");
3384 return -1;
3385}
3386
3387static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
3388{
3389 struct stv090x_state *state = fe->demodulator_priv;
3390 u32 reg = 0, i = 0, rx_end = 0;
3391
3392 while ((rx_end != 1) && (i < 10)) {
3393 msleep(10);
3394 i++;
3395 reg = STV090x_READ_DEMOD(state, DISRX_ST0);
3396 rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
3397 }
3398
3399 if (rx_end) {
3400 reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
3401 for (i = 0; i < reply->msg_len; i++)
3402 reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
3403 }
3404
3405 return 0;
3406}
3407
3408static int stv090x_sleep(struct dvb_frontend *fe)
3409{
3410 struct stv090x_state *state = fe->demodulator_priv;
3411 u32 reg;
3412
3413 dprintk(FE_DEBUG, 1, "Set %s to sleep",
3414 state->device == STV0900 ? "STV0900" : "STV0903");
3415
3416 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3417 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
3418 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3419 goto err;
3420
3421 return 0;
3422err:
3423 dprintk(FE_ERROR, 1, "I/O error");
3424 return -1;
3425}
3426
3427static int stv090x_wakeup(struct dvb_frontend *fe)
3428{
3429 struct stv090x_state *state = fe->demodulator_priv;
3430 u32 reg;
3431
3432 dprintk(FE_DEBUG, 1, "Wake %s from standby",
3433 state->device == STV0900 ? "STV0900" : "STV0903");
3434
3435 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3436 STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
3437 if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
3438 goto err;
3439
3440 return 0;
3441err:
3442 dprintk(FE_ERROR, 1, "I/O error");
3443 return -1;
3444}
3445
3446static void stv090x_release(struct dvb_frontend *fe)
3447{
3448 struct stv090x_state *state = fe->demodulator_priv;
3449
3450 kfree(state);
3451}
3452
3453static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
3454{
3455 u32 reg;
3456
3457 switch (ldpc_mode) {
3458 case STV090x_DUAL:
3459 default:
3460 reg = stv090x_read_reg(state, STV090x_GENCFG);
3461 if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
3462 /* follow LDPC default state */
3463 if (stv090x_write_reg(state, STV090x_GENCFG, reg) < 0)
3464 goto err;
3465 state->demod_mode = STV090x_DUAL;
3466 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3467 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3468 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3469 goto err;
3470 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3471 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3472 goto err;
3473 }
3474 break;
3475
3476 case STV090x_SINGLE:
3477 if (state->demod == STV090x_DEMODULATOR_1) {
3478 if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
3479 goto err;
3480 } else {
3481 if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
3482 goto err;
3483 }
3484
3485 reg = stv090x_read_reg(state, STV090x_TSTRES0);
3486 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
3487 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3488 goto err;
3489 STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
3490 if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
3491 goto err;
3492
3493 reg = STV090x_READ_DEMOD(state, PDELCTRL1);
3494 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
3495 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3496 goto err;
3497 STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
3498 if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
3499 goto err;
3500 break;
3501 }
3502
3503 return 0;
3504err:
3505 dprintk(FE_ERROR, 1, "I/O error");
3506 return -1;
3507}
3508
3509/* return (Hz), clk in Hz*/
3510static u32 stv090x_get_mclk(struct stv090x_state *state)
3511{
3512 const struct stv090x_config *config = state->config;
3513 u32 div, reg;
3514 u8 ratio;
3515
3516 div = stv090x_read_reg(state, STV090x_NCOARSE);
3517 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3518 ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
3519
3520 return (div + 1) * config->xtal / ratio; /* kHz */
3521}
3522
3523static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
3524{
3525 const struct stv090x_config *config = state->config;
3526 u32 reg, div, clk_sel;
3527
3528 reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
3529 clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
3530
3531 div = ((clk_sel * mclk) / config->xtal) - 1;
3532
3533 reg = stv090x_read_reg(state, STV090x_NCOARSE);
3534 STV090x_SETFIELD(reg, M_DIV_FIELD, div);
3535 if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
3536 goto err;
3537
3538 state->mclk = stv090x_get_mclk(state);
3539
3540 return 0;
3541err:
3542 dprintk(FE_ERROR, 1, "I/O error");
3543 return -1;
3544}
3545
3546static int stv090x_set_tspath(struct stv090x_state *state)
3547{
3548 u32 reg;
3549
3550 if (state->dev_ver >= 0x20) {
3551 switch (state->config->ts1_mode) {
3552 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3553 case STV090x_TSMODE_DVBCI:
3554 switch (state->config->ts2_mode) {
3555 case STV090x_TSMODE_SERIAL_PUNCTURED:
3556 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3557 default:
3558 stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
3559 break;
3560
3561 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3562 case STV090x_TSMODE_DVBCI:
3563 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
3564 goto err;
3565 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3566 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3567 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3568 goto err;
3569 reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
3570 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3571 if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
3572 goto err;
3573 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
3574 goto err;
3575 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
3576 goto err;
3577 break;
3578 }
3579 break;
3580
3581 case STV090x_TSMODE_SERIAL_PUNCTURED:
3582 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3583 default:
3584 switch (state->config->ts2_mode) {
3585 case STV090x_TSMODE_SERIAL_PUNCTURED:
3586 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3587 default:
3588 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
3589 goto err;
3590 break;
3591
3592 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3593 case STV090x_TSMODE_DVBCI:
3594 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
3595 goto err;
3596 break;
3597 }
3598 break;
3599 }
3600 } else {
3601 switch (state->config->ts1_mode) {
3602 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3603 case STV090x_TSMODE_DVBCI:
3604 switch (state->config->ts2_mode) {
3605 case STV090x_TSMODE_SERIAL_PUNCTURED:
3606 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3607 default:
3608 break;
3609
3610 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3611 case STV090x_TSMODE_DVBCI:
3612 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3613 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
3614 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3615 goto err;
3616 reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
3617 STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
3618 if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
3619 goto err;
3620 if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
3621 goto err;
3622 if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
3623 goto err;
3624 break;
3625 }
3626 break;
3627
3628 case STV090x_TSMODE_SERIAL_PUNCTURED:
3629 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3630 default:
3631 switch (state->config->ts2_mode) {
3632 case STV090x_TSMODE_SERIAL_PUNCTURED:
3633 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3634 default:
3635 break;
3636
3637 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3638 case STV090x_TSMODE_DVBCI:
3639 break;
3640 }
3641 break;
3642 }
3643 }
3644
3645 switch (state->config->ts1_mode) {
3646 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3647 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3648 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3649 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3650 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3651 goto err;
3652 break;
3653
3654 case STV090x_TSMODE_DVBCI:
3655 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3656 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3657 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3658 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3659 goto err;
3660 break;
3661
3662 case STV090x_TSMODE_SERIAL_PUNCTURED:
3663 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3664 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3665 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3666 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3667 goto err;
3668 break;
3669
3670 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3671 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3672 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3673 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3674 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3675 goto err;
3676 break;
3677
3678 default:
3679 break;
3680 }
3681
3682 switch (state->config->ts2_mode) {
3683 case STV090x_TSMODE_PARALLEL_PUNCTURED:
3684 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3685 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3686 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3687 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3688 goto err;
3689 break;
3690
3691 case STV090x_TSMODE_DVBCI:
3692 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3693 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
3694 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3695 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3696 goto err;
3697 break;
3698
3699 case STV090x_TSMODE_SERIAL_PUNCTURED:
3700 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3701 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3702 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
3703 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3704 goto err;
3705 break;
3706
3707 case STV090x_TSMODE_SERIAL_CONTINUOUS:
3708 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3709 STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
3710 STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
3711 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3712 goto err;
3713 break;
3714
3715 default:
3716 break;
3717 }
3718 reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
3719 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
3720 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3721 goto err;
3722 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
3723 if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
3724 goto err;
3725
3726 reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
3727 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
3728 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3729 goto err;
3730 STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
3731 if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
3732 goto err;
3733
3734 return 0;
3735err:
3736 dprintk(FE_ERROR, 1, "I/O error");
3737 return -1;
3738}
3739
3740static int stv090x_init(struct dvb_frontend *fe)
3741{
3742 struct stv090x_state *state = fe->demodulator_priv;
3743 const struct stv090x_config *config = state->config;
3744 u32 reg;
3745
3746 stv090x_ldpc_mode(state, state->demod_mode);
3747
3748 reg = STV090x_READ_DEMOD(state, TNRCFG2);
3749 STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
3750 if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
3751 goto err;
3752 reg = STV090x_READ_DEMOD(state, DEMOD);
3753 STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
3754 if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
3755 goto err;
3756
3757 stv090x_i2c_gate_ctrl(fe, 1);
3758
3759 if (config->tuner_init)
3760 config->tuner_init(fe);
3761
3762 stv090x_i2c_gate_ctrl(fe, 0);
3763
3764 stv090x_set_tspath(state);
3765
3766 return 0;
3767err:
3768 dprintk(FE_ERROR, 1, "I/O error");
3769 return -1;
3770}
3771
3772static int stv090x_setup(struct dvb_frontend *fe)
3773{
3774 struct stv090x_state *state = fe->demodulator_priv;
3775 const struct stv090x_config *config = state->config;
3776 const struct stv090x_reg *stv090x_initval = NULL;
3777 const struct stv090x_reg *stv090x_cut20_val = NULL;
3778 unsigned long t1_size = 0, t2_size = 0;
Manu Abraham017eb032009-04-07 05:19:54 -0300[diff] [blame^]3779 u32 reg = 0;
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3780
3781 int i;
3782
3783 if (state->device == STV0900) {
3784 dprintk(FE_DEBUG, 1, "Initializing STV0900");
3785 stv090x_initval = stv0900_initval;
3786 t1_size = ARRAY_SIZE(stv0900_initval);
3787 stv090x_cut20_val = stv0900_cut20_val;
3788 t2_size = ARRAY_SIZE(stv0900_cut20_val);
3789 } else if (state->device == STV0903) {
3790 dprintk(FE_DEBUG, 1, "Initializing STV0903");
3791 stv090x_initval = stv0903_initval;
3792 t1_size = ARRAY_SIZE(stv0903_initval);
3793 stv090x_cut20_val = stv0903_cut20_val;
3794 t2_size = ARRAY_SIZE(stv0903_cut20_val);
3795 }
3796
3797 /* STV090x init */
3798 if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Stop Demod */
3799 goto err;
3800
3801 msleep(5);
3802
3803 if (STV090x_WRITE_DEMOD(state, TNRCFG, 0x6c) < 0) /* check register ! (No Tuner Mode) */
3804 goto err;
3805
Manu Abraham017eb032009-04-07 05:19:54 -0300[diff] [blame^]3806 STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
3807 if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0) /* repeater OFF */
Manu Abrahame415c682009-04-06 15:45:20 -0300[diff] [blame]3808 goto err;
3809
3810 if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
3811 goto err;
3812 msleep(5);
3813 if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
3814 goto err;
3815 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
3816 goto err;
3817 msleep(5);
3818
3819 /* write initval */
3820 for (i = 0; i < t1_size; i++) {
3821 dprintk(FE_DEBUG, 1, "Setting up initial values");
3822 if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
3823 goto err;
3824 }
3825
3826 if (state->dev_ver >= 0x20) {
3827 if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
3828 goto err;
3829
3830 /* write cut20_val*/
3831 dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
3832 for (i = 0; i < t2_size; i++) {
3833 if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
3834 goto err;
3835 }
3836 }
3837
3838 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
3839 goto err;
3840 if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
3841 goto err;
3842
3843 stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
3844 msleep(5);
3845 if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0)
3846 goto err;
3847 stv090x_get_mclk(state);
3848
3849 return 0;
3850err:
3851 dprintk(FE_ERROR, 1, "I/O error");
3852 return -1;
3853}
3854
3855static struct dvb_frontend_ops stv090x_ops = {
3856
3857 .info = {
3858 .name = "STV090x Multistandard",
3859 },
3860
3861 .release = stv090x_release,
3862 .init = stv090x_init,
3863
3864 .sleep = stv090x_sleep,
3865 .get_frontend_algo = stv090x_frontend_algo,
3866
3867 .i2c_gate_ctrl = stv090x_i2c_gate_ctrl,
3868
3869 .diseqc_send_master_cmd = stv090x_send_diseqc_msg,
3870 .diseqc_recv_slave_reply = stv090x_recv_slave_reply,
3871 .set_tone = stv090x_set_tone,
3872
3873 .search = stv090x_search,
3874 .read_status = stv090x_read_status,
3875 .read_ber = stv090x_read_per,
3876 .read_signal_strength = stv090x_read_signal_strength,
3877 .read_snr = stv090x_read_cnr
3878};
3879
3880
3881struct dvb_frontend *stv090x_attach(const struct stv090x_config *config,
3882 struct i2c_adapter *i2c,
3883 enum stv090x_demodulator demod)
3884{
3885 struct stv090x_state *state = NULL;
3886
3887 state = kzalloc(sizeof (struct stv090x_state), GFP_KERNEL);
3888 if (state == NULL)
3889 goto error;
3890
3891 state->verbose = &verbose;
3892 state->config = config;
3893 state->i2c = i2c;
3894 state->frontend.ops = stv090x_ops;
3895 state->frontend.demodulator_priv = state;
3896 state->demod_mode = config->demod_mode; /* Single or Dual mode */
3897 state->device = config->device;
3898 state->rolloff = 35; /* default */
3899
3900 if (state->demod == STV090x_DEMODULATOR_0)
3901 mutex_init(&demod_lock);
3902
3903 if (stv090x_sleep(&state->frontend) < 0) {
3904 dprintk(FE_ERROR, 1, "Error putting device to sleep");
3905 goto error;
3906 }
3907
3908 if (stv090x_setup(&state->frontend) < 0) {
3909 dprintk(FE_ERROR, 1, "Error setting up device");
3910 goto error;
3911 }
3912 if (stv090x_wakeup(&state->frontend) < 0) {
3913 dprintk(FE_ERROR, 1, "Error waking device");
3914 goto error;
3915 }
3916 state->dev_ver = stv090x_read_reg(state, STV090x_MID);
3917
3918 dprintk(FE_ERROR, 1, "Attaching %s demodulator(%d) Cut=0x%02x\n",
3919 state->device == STV0900 ? "STV0900" : "STV0903",
3920 demod,
3921 state->dev_ver);
3922
3923 return &state->frontend;
3924
3925error:
3926 kfree(state);
3927 return NULL;
3928}
3929EXPORT_SYMBOL(stv090x_attach);
3930MODULE_PARM_DESC(verbose, "Set Verbosity level");
3931MODULE_AUTHOR("Manu Abraham");
3932MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
3933MODULE_LICENSE("GPL");