| Russell King | e8ce0eb | 2011-08-26 20:28:52 +0100 | [diff] [blame] | 1 | #include <linux/init.h> | 
 | 2 |  | 
| Will Deacon | e6eadc6 | 2011-11-15 11:11:19 +0000 | [diff] [blame] | 3 | #include <asm/idmap.h> | 
| Russell King | e8ce0eb | 2011-08-26 20:28:52 +0100 | [diff] [blame] | 4 | #include <asm/pgalloc.h> | 
 | 5 | #include <asm/pgtable.h> | 
 | 6 | #include <asm/memory.h> | 
 | 7 | #include <asm/suspend.h> | 
 | 8 | #include <asm/tlbflush.h> | 
 | 9 |  | 
| Russell King | abda1bd | 2011-09-01 11:52:33 +0100 | [diff] [blame] | 10 | extern int __cpu_suspend(unsigned long, int (*)(unsigned long)); | 
| Russell King | 62b2d07 | 2011-08-31 23:26:18 +0100 | [diff] [blame] | 11 | extern void cpu_resume_mmu(void); | 
| Russell King | e8ce0eb | 2011-08-26 20:28:52 +0100 | [diff] [blame] | 12 |  | 
 | 13 | /* | 
| Russell King | abda1bd | 2011-09-01 11:52:33 +0100 | [diff] [blame] | 14 |  * This is called by __cpu_suspend() to save the state, and do whatever | 
 | 15 |  * flushing is required to ensure that when the CPU goes to sleep we have | 
 | 16 |  * the necessary data available when the caches are not searched. | 
 | 17 |  */ | 
 | 18 | void __cpu_suspend_save(u32 *ptr, u32 ptrsz, u32 sp, u32 *save_ptr) | 
 | 19 | { | 
 | 20 | 	*save_ptr = virt_to_phys(ptr); | 
 | 21 |  | 
 | 22 | 	/* This must correspond to the LDM in cpu_resume() assembly */ | 
| Will Deacon | e6eadc6 | 2011-11-15 11:11:19 +0000 | [diff] [blame] | 23 | 	*ptr++ = virt_to_phys(idmap_pgd); | 
| Russell King | abda1bd | 2011-09-01 11:52:33 +0100 | [diff] [blame] | 24 | 	*ptr++ = sp; | 
 | 25 | 	*ptr++ = virt_to_phys(cpu_do_resume); | 
 | 26 |  | 
 | 27 | 	cpu_do_suspend(ptr); | 
 | 28 |  | 
 | 29 | 	flush_cache_all(); | 
| Russell King | 8e6f83b | 2011-09-01 11:57:59 +0100 | [diff] [blame] | 30 | 	outer_clean_range(*save_ptr, *save_ptr + ptrsz); | 
 | 31 | 	outer_clean_range(virt_to_phys(save_ptr), | 
 | 32 | 			  virt_to_phys(save_ptr) + sizeof(*save_ptr)); | 
| Russell King | abda1bd | 2011-09-01 11:52:33 +0100 | [diff] [blame] | 33 | } | 
 | 34 |  | 
 | 35 | /* | 
| Russell King | e8ce0eb | 2011-08-26 20:28:52 +0100 | [diff] [blame] | 36 |  * Hide the first two arguments to __cpu_suspend - these are an implementation | 
 | 37 |  * detail which platform code shouldn't have to know about. | 
 | 38 |  */ | 
 | 39 | int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) | 
 | 40 | { | 
 | 41 | 	struct mm_struct *mm = current->active_mm; | 
 | 42 | 	int ret; | 
 | 43 |  | 
| Will Deacon | e6eadc6 | 2011-11-15 11:11:19 +0000 | [diff] [blame] | 44 | 	if (!idmap_pgd) | 
| Russell King | e8ce0eb | 2011-08-26 20:28:52 +0100 | [diff] [blame] | 45 | 		return -EINVAL; | 
 | 46 |  | 
 | 47 | 	/* | 
| Russell King | de8e71c | 2011-08-27 22:39:09 +0100 | [diff] [blame] | 48 | 	 * Provide a temporary page table with an identity mapping for | 
 | 49 | 	 * the MMU-enable code, required for resuming.  On successful | 
 | 50 | 	 * resume (indicated by a zero return code), we need to switch | 
 | 51 | 	 * back to the correct page tables. | 
| Russell King | e8ce0eb | 2011-08-26 20:28:52 +0100 | [diff] [blame] | 52 | 	 */ | 
| Russell King | abda1bd | 2011-09-01 11:52:33 +0100 | [diff] [blame] | 53 | 	ret = __cpu_suspend(arg, fn); | 
| Russell King | de8e71c | 2011-08-27 22:39:09 +0100 | [diff] [blame] | 54 | 	if (ret == 0) { | 
 | 55 | 		cpu_switch_mm(mm->pgd, mm); | 
 | 56 | 		local_flush_tlb_all(); | 
 | 57 | 	} | 
| Russell King | e8ce0eb | 2011-08-26 20:28:52 +0100 | [diff] [blame] | 58 |  | 
 | 59 | 	return ret; | 
 | 60 | } |