Nicolas Ferre | e261501 | 2011-11-22 22:26:09 +0100 | [diff] [blame] | 1 | * Advanced Interrupt Controller (AIC) |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: Should be "atmel,<chip>-aic" |
| 5 | - interrupt-controller: Identifies the node as an interrupt controller. |
| 6 | - interrupt-parent: For single AIC system, it is an empty property. |
| 7 | - #interrupt-cells: The number of cells to define the interrupts. It sould be 2. |
| 8 | The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). |
| 9 | The second cell is used to specify flags: |
| 10 | bits[3:0] trigger type and level flags: |
| 11 | 1 = low-to-high edge triggered. |
| 12 | 2 = high-to-low edge triggered. |
| 13 | 4 = active high level-sensitive. |
| 14 | 8 = active low level-sensitive. |
| 15 | Valid combinations are 1, 2, 3, 4, 8. |
| 16 | Default flag for internal sources should be set to 4 (active high). |
| 17 | - reg: Should contain AIC registers location and length |
| 18 | |
| 19 | Examples: |
| 20 | /* |
| 21 | * AIC |
| 22 | */ |
| 23 | aic: interrupt-controller@fffff000 { |
| 24 | compatible = "atmel,at91rm9200-aic"; |
| 25 | interrupt-controller; |
| 26 | interrupt-parent; |
| 27 | #interrupt-cells = <2>; |
| 28 | reg = <0xfffff000 0x200>; |
| 29 | }; |
| 30 | |
| 31 | /* |
| 32 | * An interrupt generating device that is wired to an AIC. |
| 33 | */ |
| 34 | dma: dma-controller@ffffec00 { |
| 35 | compatible = "atmel,at91sam9g45-dma"; |
| 36 | reg = <0xffffec00 0x200>; |
| 37 | interrupts = <21 4>; |
| 38 | }; |