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Ben Dooksd58153d2007-07-22 16:07:09 +01001# Copyright 2007 Simtec Electronics
2#
3# Licensed under GPLv2
4
5config PLAT_S3C
6 bool
Ben Dooksa08ab632008-10-21 14:06:39 +01007 depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
Ben Dooksbcae8ae2008-10-21 14:06:32 +01008 default y
Ben Dooksd58153d2007-07-22 16:07:09 +01009 select NO_IOPORT
10 help
11 Base platform code for any Samsung S3C device
12
Ben Dooksb2627582007-07-22 16:09:44 +010013# low-level serial option nodes
14
Russell Kingd83a12a2008-12-21 15:02:07 +000015if PLAT_S3C
16
Ben Dooksb2627582007-07-22 16:09:44 +010017config CPU_LLSERIAL_S3C2410_ONLY
18 bool
Ben Dooksb2627582007-07-22 16:09:44 +010019 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
20
21config CPU_LLSERIAL_S3C2440_ONLY
22 bool
Ben Dooksb2627582007-07-22 16:09:44 +010023 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
24
25config CPU_LLSERIAL_S3C2410
26 bool
Ben Dooksb2627582007-07-22 16:09:44 +010027 help
28 Selected if there is an S3C2410 (or register compatible) serial
29 low-level implementation needed
30
31config CPU_LLSERIAL_S3C2440
32 bool
Ben Dooksb2627582007-07-22 16:09:44 +010033 help
34 Selected if there is an S3C2440 (or register compatible) serial
35 low-level implementation needed
36
37# boot configurations
38
Ben Dooksd58153d2007-07-22 16:07:09 +010039comment "Boot options"
40
Ben Dooksa45f8262007-07-22 16:16:51 +010041config S3C_BOOT_WATCHDOG
42 bool "S3C Initialisation watchdog"
Russell Kingd83a12a2008-12-21 15:02:07 +000043 depends on S3C2410_WATCHDOG
Ben Dooksd58153d2007-07-22 16:07:09 +010044 help
45 Say y to enable the watchdog during the kernel decompression
46 stage. If the kernel fails to uncompress, then the watchdog
47 will trigger a reset and the system should restart.
48
Ben Dooksa45f8262007-07-22 16:16:51 +010049config S3C_BOOT_ERROR_RESET
50 bool "S3C Reboot on decompression error"
Ben Dooksd58153d2007-07-22 16:07:09 +010051 help
52 Say y here to use the watchdog to reset the system if the
53 kernel decompressor detects an error during decompression.
54
Ben Dookse7aa6f42008-12-02 19:34:52 +000055config S3C_BOOT_UART_FORCE_FIFO
56 bool "Force UART FIFO on during boot process"
Ben Dookse7aa6f42008-12-02 19:34:52 +000057 default y
58 help
59 Say Y here to force the UART FIFOs on during the kernel
60 uncompressor
61
Ben Dooksd58153d2007-07-22 16:07:09 +010062comment "Power management"
63
64config S3C2410_PM_DEBUG
65 bool "S3C2410 PM Suspend debug"
Russell Kingd83a12a2008-12-21 15:02:07 +000066 depends on PM
Ben Dooksd58153d2007-07-22 16:07:09 +010067 help
68 Say Y here if you want verbose debugging from the PM Suspend and
69 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
70 for more information.
71
Ben Dooksbd117bd2009-03-10 18:19:35 +000072config S3C_PM_DEBUG_LED_SMDK
73 bool "SMDK LED suspend/resume debugging"
74 depends on PM && (MACH_SMDK6410)
75 help
76 Say Y here to enable the use of the SMDK LEDs on the baseboard
77 for debugging of the state of the suspend and resume process.
78
79 Note, this currently only works for S3C64XX based SMDK boards.
80
Ben Dooksd58153d2007-07-22 16:07:09 +010081config S3C2410_PM_CHECK
82 bool "S3C2410 PM Suspend Memory CRC"
Russell Kingd83a12a2008-12-21 15:02:07 +000083 depends on PM && CRC32
Ben Dooksd58153d2007-07-22 16:07:09 +010084 help
85 Enable the PM code's memory area checksum over sleep. This option
86 will generate CRCs of all blocks of memory, and store them before
87 going to sleep. The blocks are then checked on resume for any
88 errors.
89
90 Note, this can take several seconds depending on memory size
91 and CPU speed.
92
93 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
94
95config S3C2410_PM_CHECK_CHUNKSIZE
96 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
Russell Kingd83a12a2008-12-21 15:02:07 +000097 depends on PM && S3C2410_PM_CHECK
Ben Dooksd58153d2007-07-22 16:07:09 +010098 default 64
99 help
100 Set the chunksize in Kilobytes of the CRC for checking memory
101 corruption over suspend and resume. A smaller value will mean that
102 the CRC data block will take more memory, but wil identify any
103 faults with better precision.
104
105 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
106
Ben Dooksc7657842007-07-22 16:11:20 +0100107config S3C_LOWLEVEL_UART_PORT
108 int "S3C UART to use for low-level messages"
Ben Dooksd58153d2007-07-22 16:07:09 +0100109 default 0
110 help
111 Choice of which UART port to use for the low-level messages,
112 such as the `Uncompressing...` at start time. The value of
113 this configuration should be between zero and two. The port
114 must have been initialised by the boot-loader before use.
Ben Dooks5b323c72008-10-31 16:14:28 +0000115
Ben Dooksefd3a8e2008-10-31 16:14:30 +0000116# options for gpiolib support
117
118config S3C_GPIO_SPACE
119 int "Space between gpio banks"
120 default 0
121 help
122 Add a number of spare GPIO entries between each bank for debugging
123 purposes. This allows any problems where an counter overflows from
124 one bank to another to be caught, at the expense of using a little
125 more memory.
126
Ben Dooks8a53bdb2008-10-31 16:14:32 +0000127config S3C_GPIO_TRACK
128 bool
129 help
130 Internal configuration option to enable the s3c specific gpio
131 chip tracking if the platform requires it.
132
Ben Dooks21b23662008-10-31 16:14:34 +0000133config S3C_GPIO_PULL_UPDOWN
134 bool
135 help
136 Internal configuration to enable the correct GPIO pull helper
137
138config S3C_GPIO_PULL_DOWN
139 bool
140 help
141 Internal configuration to enable the correct GPIO pull helper
142
143config S3C_GPIO_PULL_UP
144 bool
145 help
146 Internal configuration to enable the correct GPIO pull helper
147
148config S3C_GPIO_CFG_S3C24XX
149 bool
150 help
151 Internal configuration to enable S3C24XX style GPIO configuration
152 functions.
153
154config S3C_GPIO_CFG_S3C64XX
155 bool
156 help
157 Internal configuration to enable S3C64XX style GPIO configuration
158 functions.
159
Kyungmin Parkb0d52172009-11-17 08:41:16 +0100160config S5P_GPIO_CFG_S5PC1XX
161 bool
162 help
163 Internal configuration to enable S5PC1XX style GPIO configuration
164 functions.
165
Ben Dooks97c1b142009-03-19 15:02:39 +0000166# DMA
167
168config S3C_DMA
169 bool
170 help
171 Internal configuration for S3C DMA core
172
Ben Dooks5b323c72008-10-31 16:14:28 +0000173# device definitions to compile in
174
175config S3C_DEV_HSMMC
176 bool
Ben Dooks5b323c72008-10-31 16:14:28 +0000177 help
178 Compile in platform device definitions for HSMMC code
Ben Dooksa2205cd2008-10-31 16:14:39 +0000179
180config S3C_DEV_HSMMC1
181 bool
Ben Dooksa2205cd2008-10-31 16:14:39 +0000182 help
183 Compile in platform device definitions for HSMMC channel 1
Ben Dooks1aba8342008-10-31 16:14:55 +0000184
Kyungmin Park86cd4f52009-11-17 08:41:23 +0100185config S3C_DEV_HSMMC2
186 bool
187 help
188 Compile in platform device definitions for HSMMC channel 2
189
Ben Dooks1aba8342008-10-31 16:14:55 +0000190config S3C_DEV_I2C1
191 bool
Ben Dooks1aba8342008-10-31 16:14:55 +0000192 help
193 Compile in platform device definitions for I2C channel 1
Ben Dooks58435f72008-11-19 15:41:31 +0000194
195config S3C_DEV_FB
196 bool
Ben Dooks58435f72008-11-19 15:41:31 +0000197 help
198 Compile in platform device definition for framebuffer
Russell Kingd83a12a2008-12-21 15:02:07 +0000199
Ben Dookseca86552009-03-06 19:49:48 +0000200config S3C_DEV_USB_HOST
201 bool
202 help
203 Compile in platform device definition for USB host.
204
Ben Dooksf0e1fa72009-05-16 22:05:27 +0100205config S3C_DEV_USB_HSOTG
206 bool
207 help
208 Compile in platform device definition for USB high-speed OtG
209
Ben Dooksdb616eb2009-08-16 23:54:58 +0100210config S3C_DEV_NAND
211 bool
212 help
213 Compile in platform device definition for NAND controller
214
Russell Kingd83a12a2008-12-21 15:02:07 +0000215endif