| Greg Ungerer | bc4f4ac | 2011-06-24 16:15:40 +1000 | [diff] [blame] | 1 | /* | 
|  | 2 | *  vectors.c | 
|  | 3 | * | 
|  | 4 | *  Copyright (C) 1993, 1994 by Hamish Macdonald | 
|  | 5 | * | 
|  | 6 | *  68040 fixes by Michael Rausch | 
|  | 7 | *  68040 fixes by Martin Apel | 
|  | 8 | *  68040 fixes and writeback by Richard Zidlicky | 
|  | 9 | *  68060 fixes by Roman Hodek | 
|  | 10 | *  68060 fixes by Jesper Skov | 
|  | 11 | * | 
|  | 12 | * This file is subject to the terms and conditions of the GNU General Public | 
|  | 13 | * License.  See the file COPYING in the main directory of this archive | 
|  | 14 | * for more details. | 
|  | 15 | */ | 
|  | 16 |  | 
|  | 17 | /* | 
|  | 18 | * Sets up all exception vectors | 
|  | 19 | */ | 
|  | 20 | #include <linux/sched.h> | 
|  | 21 | #include <linux/kernel.h> | 
|  | 22 | #include <linux/linkage.h> | 
|  | 23 | #include <linux/init.h> | 
|  | 24 | #include <linux/kallsyms.h> | 
|  | 25 |  | 
|  | 26 | #include <asm/setup.h> | 
|  | 27 | #include <asm/fpu.h> | 
|  | 28 | #include <asm/system.h> | 
|  | 29 | #include <asm/traps.h> | 
|  | 30 |  | 
|  | 31 | /* assembler routines */ | 
|  | 32 | asmlinkage void system_call(void); | 
|  | 33 | asmlinkage void buserr(void); | 
|  | 34 | asmlinkage void trap(void); | 
|  | 35 | asmlinkage void nmihandler(void); | 
|  | 36 | #ifdef CONFIG_M68KFPU_EMU | 
|  | 37 | asmlinkage void fpu_emu(void); | 
|  | 38 | #endif | 
|  | 39 |  | 
|  | 40 | e_vector vectors[256]; | 
|  | 41 |  | 
|  | 42 | /* nmi handler for the Amiga */ | 
|  | 43 | asm(".text\n" | 
|  | 44 | __ALIGN_STR "\n" | 
|  | 45 | "nmihandler: rte"); | 
|  | 46 |  | 
|  | 47 | /* | 
|  | 48 | * this must be called very early as the kernel might | 
|  | 49 | * use some instruction that are emulated on the 060 | 
|  | 50 | * and so we're prepared for early probe attempts (e.g. nf_init). | 
|  | 51 | */ | 
|  | 52 | void __init base_trap_init(void) | 
|  | 53 | { | 
|  | 54 | if (MACH_IS_SUN3X) { | 
|  | 55 | extern e_vector *sun3x_prom_vbr; | 
|  | 56 |  | 
|  | 57 | __asm__ volatile ("movec %%vbr, %0" : "=r" (sun3x_prom_vbr)); | 
|  | 58 | } | 
|  | 59 |  | 
|  | 60 | /* setup the exception vector table */ | 
|  | 61 | __asm__ volatile ("movec %0,%%vbr" : : "r" ((void*)vectors)); | 
|  | 62 |  | 
|  | 63 | if (CPU_IS_060) { | 
|  | 64 | /* set up ISP entry points */ | 
|  | 65 | asmlinkage void unimp_vec(void) asm ("_060_isp_unimp"); | 
|  | 66 |  | 
|  | 67 | vectors[VEC_UNIMPII] = unimp_vec; | 
|  | 68 | } | 
|  | 69 |  | 
|  | 70 | vectors[VEC_BUSERR] = buserr; | 
|  | 71 | vectors[VEC_ILLEGAL] = trap; | 
|  | 72 | vectors[VEC_SYS] = system_call; | 
|  | 73 | } | 
|  | 74 |  | 
|  | 75 | void __init trap_init (void) | 
|  | 76 | { | 
|  | 77 | int i; | 
|  | 78 |  | 
|  | 79 | for (i = VEC_SPUR; i <= VEC_INT7; i++) | 
|  | 80 | vectors[i] = bad_inthandler; | 
|  | 81 |  | 
|  | 82 | for (i = 0; i < VEC_USER; i++) | 
|  | 83 | if (!vectors[i]) | 
|  | 84 | vectors[i] = trap; | 
|  | 85 |  | 
|  | 86 | for (i = VEC_USER; i < 256; i++) | 
|  | 87 | vectors[i] = bad_inthandler; | 
|  | 88 |  | 
|  | 89 | #ifdef CONFIG_M68KFPU_EMU | 
|  | 90 | if (FPU_IS_EMU) | 
|  | 91 | vectors[VEC_LINE11] = fpu_emu; | 
|  | 92 | #endif | 
|  | 93 |  | 
|  | 94 | if (CPU_IS_040 && !FPU_IS_EMU) { | 
|  | 95 | /* set up FPSP entry points */ | 
|  | 96 | asmlinkage void dz_vec(void) asm ("dz"); | 
|  | 97 | asmlinkage void inex_vec(void) asm ("inex"); | 
|  | 98 | asmlinkage void ovfl_vec(void) asm ("ovfl"); | 
|  | 99 | asmlinkage void unfl_vec(void) asm ("unfl"); | 
|  | 100 | asmlinkage void snan_vec(void) asm ("snan"); | 
|  | 101 | asmlinkage void operr_vec(void) asm ("operr"); | 
|  | 102 | asmlinkage void bsun_vec(void) asm ("bsun"); | 
|  | 103 | asmlinkage void fline_vec(void) asm ("fline"); | 
|  | 104 | asmlinkage void unsupp_vec(void) asm ("unsupp"); | 
|  | 105 |  | 
|  | 106 | vectors[VEC_FPDIVZ] = dz_vec; | 
|  | 107 | vectors[VEC_FPIR] = inex_vec; | 
|  | 108 | vectors[VEC_FPOVER] = ovfl_vec; | 
|  | 109 | vectors[VEC_FPUNDER] = unfl_vec; | 
|  | 110 | vectors[VEC_FPNAN] = snan_vec; | 
|  | 111 | vectors[VEC_FPOE] = operr_vec; | 
|  | 112 | vectors[VEC_FPBRUC] = bsun_vec; | 
|  | 113 | vectors[VEC_LINE11] = fline_vec; | 
|  | 114 | vectors[VEC_FPUNSUP] = unsupp_vec; | 
|  | 115 | } | 
|  | 116 |  | 
|  | 117 | if (CPU_IS_060 && !FPU_IS_EMU) { | 
|  | 118 | /* set up IFPSP entry points */ | 
|  | 119 | asmlinkage void snan_vec6(void) asm ("_060_fpsp_snan"); | 
|  | 120 | asmlinkage void operr_vec6(void) asm ("_060_fpsp_operr"); | 
|  | 121 | asmlinkage void ovfl_vec6(void) asm ("_060_fpsp_ovfl"); | 
|  | 122 | asmlinkage void unfl_vec6(void) asm ("_060_fpsp_unfl"); | 
|  | 123 | asmlinkage void dz_vec6(void) asm ("_060_fpsp_dz"); | 
|  | 124 | asmlinkage void inex_vec6(void) asm ("_060_fpsp_inex"); | 
|  | 125 | asmlinkage void fline_vec6(void) asm ("_060_fpsp_fline"); | 
|  | 126 | asmlinkage void unsupp_vec6(void) asm ("_060_fpsp_unsupp"); | 
|  | 127 | asmlinkage void effadd_vec6(void) asm ("_060_fpsp_effadd"); | 
|  | 128 |  | 
|  | 129 | vectors[VEC_FPNAN] = snan_vec6; | 
|  | 130 | vectors[VEC_FPOE] = operr_vec6; | 
|  | 131 | vectors[VEC_FPOVER] = ovfl_vec6; | 
|  | 132 | vectors[VEC_FPUNDER] = unfl_vec6; | 
|  | 133 | vectors[VEC_FPDIVZ] = dz_vec6; | 
|  | 134 | vectors[VEC_FPIR] = inex_vec6; | 
|  | 135 | vectors[VEC_LINE11] = fline_vec6; | 
|  | 136 | vectors[VEC_FPUNSUP] = unsupp_vec6; | 
|  | 137 | vectors[VEC_UNIMPEA] = effadd_vec6; | 
|  | 138 | } | 
|  | 139 |  | 
|  | 140 | /* if running on an amiga, make the NMI interrupt do nothing */ | 
|  | 141 | if (MACH_IS_AMIGA) { | 
|  | 142 | vectors[VEC_INT7] = nmihandler; | 
|  | 143 | } | 
|  | 144 | } | 
|  | 145 |  |