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SAN People73a59c12006-01-09 17:05:41 +00001/*
2 * include/asm-arm/arch-at91rm9200/hardware.h
3 *
4 * Copyright (C) 2003 SAN People
5 * Copyright (C) 2003 ATMEL
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 */
13
14#ifndef __ASM_ARCH_HARDWARE_H
15#define __ASM_ARCH_HARDWARE_H
16
17#include <asm/sizes.h>
18
Andrew Victor55d8bae2006-11-30 17:16:43 +010019#if defined(CONFIG_ARCH_AT91RM9200)
SAN People73a59c12006-01-09 17:05:41 +000020#include <asm/arch/at91rm9200.h>
Andrew Victor55d8bae2006-11-30 17:16:43 +010021#elif defined(CONFIG_ARCH_AT91SAM9260)
22#include <asm/arch/at91sam9260.h>
23#elif defined(CONFIG_ARCH_AT91SAM9261)
24#include <asm/arch/at91sam9261.h>
25#else
26#error "Unsupported AT91 processor"
27#endif
28
SAN People73a59c12006-01-09 17:05:41 +000029
30/*
31 * Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF
32 * to 0xFEFA0000 .. 0xFF000000. (384Kb)
33 */
34#define AT91_IO_PHYS_BASE 0xFFFA0000
35#define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1)
36#define AT91_IO_VIRT_BASE (0xFF000000 - AT91_IO_SIZE)
37
38 /* Convert a physical IO address to virtual IO address */
39#define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
40
41/*
42 * Virtual to Physical Address mapping for IO devices.
43 */
44#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
Andrew Victor72729912006-09-27 09:44:11 +010045#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC)
SAN People73a59c12006-01-09 17:05:41 +000046
Andrew Victor10e8e1f2006-06-19 15:26:51 +010047 /* Internal SRAM is mapped below the IO devices */
Andrew Victor05043d02006-12-01 11:51:19 +010048#define AT91_SRAM_MAX SZ_1M
49#define AT91_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_MAX)
Andrew Victor10e8e1f2006-06-19 15:26:51 +010050
SAN People73a59c12006-01-09 17:05:41 +000051/* Serial ports */
Andrew Victor05043d02006-12-01 11:51:19 +010052#define ATMEL_MAX_UART 7 /* 6 USART3's and one DBGU port (SAM9260) */
SAN People73a59c12006-01-09 17:05:41 +000053
Andrew Victor05043d02006-12-01 11:51:19 +010054/* External Memory Map */
55#define AT91_CHIPSELECT_0 0x10000000
56#define AT91_CHIPSELECT_1 0x20000000
57#define AT91_CHIPSELECT_2 0x30000000
58#define AT91_CHIPSELECT_3 0x40000000
59#define AT91_CHIPSELECT_4 0x50000000
60#define AT91_CHIPSELECT_5 0x60000000
61#define AT91_CHIPSELECT_6 0x70000000
62#define AT91_CHIPSELECT_7 0x80000000
SAN People73a59c12006-01-09 17:05:41 +000063
64/* SDRAM */
Andrew Victor05043d02006-12-01 11:51:19 +010065#define AT91_SDRAM_BASE AT91_CHIPSELECT_1
Andrew Victor2c1f3b72006-02-21 12:56:52 +020066
SAN People73a59c12006-01-09 17:05:41 +000067/* Clocks */
68#define AT91_SLOW_CLOCK 32768 /* slow clock */
69
70#ifndef __ASSEMBLY__
71#include <asm/io.h>
72
73static inline unsigned int at91_sys_read(unsigned int reg_offset)
74{
75 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
76
Andrew Victor5c3fddc2006-06-20 19:30:20 +010077 return __raw_readl(addr + reg_offset);
SAN People73a59c12006-01-09 17:05:41 +000078}
79
80static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
81{
82 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
83
Andrew Victor5c3fddc2006-06-20 19:30:20 +010084 __raw_writel(value, addr + reg_offset);
SAN People73a59c12006-01-09 17:05:41 +000085}
86#endif
87
88#endif