| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* head-uc-fr451.S: FR451 uc-linux specific bits of initialisation |
| 2 | * |
| 3 | * Copyright (C) 2004 Red Hat, Inc. All Rights Reserved. |
| 4 | * Written by David Howells (dhowells@redhat.com) |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU General Public License |
| 8 | * as published by the Free Software Foundation; either version |
| 9 | * 2 of the License, or (at your option) any later version. |
| 10 | */ |
| 11 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <linux/threads.h> |
| 13 | #include <linux/linkage.h> |
| 14 | #include <asm/ptrace.h> |
| 15 | #include <asm/page.h> |
| 16 | #include <asm/spr-regs.h> |
| 17 | #include <asm/mb86943a.h> |
| 18 | #include "head.inc" |
| 19 | |
| 20 | |
| 21 | #define __400_DBR0 0xfe000e00 |
| 22 | #define __400_DBR1 0xfe000e08 |
| 23 | #define __400_DBR2 0xfe000e10 |
| 24 | #define __400_DBR3 0xfe000e18 |
| 25 | #define __400_DAM0 0xfe000f00 |
| 26 | #define __400_DAM1 0xfe000f08 |
| 27 | #define __400_DAM2 0xfe000f10 |
| 28 | #define __400_DAM3 0xfe000f18 |
| 29 | #define __400_LGCR 0xfe000010 |
| 30 | #define __400_LCR 0xfe000100 |
| 31 | #define __400_LSBR 0xfe000c00 |
| 32 | |
| 33 | .section .text.init,"ax" |
| 34 | .balign 4 |
| 35 | |
| 36 | ############################################################################### |
| 37 | # |
| 38 | # set the protection map with the I/DAMPR registers |
| 39 | # |
| 40 | # ENTRY: EXIT: |
| 41 | # GR25 SDRAM size [saved] |
| 42 | # GR26 &__head_reference [saved] |
| 43 | # GR30 LED address [saved] |
| 44 | # |
| 45 | ############################################################################### |
| 46 | .globl __head_fr451_set_protection |
| 47 | __head_fr451_set_protection: |
| 48 | movsg lr,gr27 |
| 49 | |
| 50 | movgs gr0,dampr10 |
| 51 | movgs gr0,damlr10 |
| 52 | movgs gr0,dampr9 |
| 53 | movgs gr0,damlr9 |
| 54 | movgs gr0,dampr8 |
| 55 | movgs gr0,damlr8 |
| 56 | |
| 57 | # set the I/O region protection registers for FR401/3/5 |
| 58 | sethi.p %hi(__region_IO),gr5 |
| 59 | setlo %lo(__region_IO),gr5 |
| 60 | sethi.p %hi(0x1fffffff),gr7 |
| 61 | setlo %lo(0x1fffffff),gr7 |
| 62 | ori gr5,#xAMPRx_SS_512Mb|xAMPRx_S_KERNEL|xAMPRx_C|xAMPRx_V,gr5 |
| 63 | movgs gr5,dampr11 ; General I/O tile |
| 64 | movgs gr7,damlr11 |
| 65 | |
| 66 | # need to tile the remaining IAMPR/DAMPR registers to cover as much of the RAM as possible |
| 67 | # - start with the highest numbered registers |
| 68 | sethi.p %hi(__kernel_image_end),gr8 |
| 69 | setlo %lo(__kernel_image_end),gr8 |
| 70 | sethi.p %hi(32768),gr4 ; allow for a maximal allocator bitmap |
| 71 | setlo %lo(32768),gr4 |
| 72 | add gr8,gr4,gr8 |
| 73 | sethi.p %hi(1024*2048-1),gr4 ; round up to nearest 2MiB |
| 74 | setlo %lo(1024*2048-1),gr4 |
| 75 | add.p gr8,gr4,gr8 |
| 76 | not gr4,gr4 |
| 77 | and gr8,gr4,gr8 |
| 78 | |
| 79 | sethi.p %hi(__page_offset),gr9 |
| 80 | setlo %lo(__page_offset),gr9 |
| 81 | add gr9,gr25,gr9 |
| 82 | |
| 83 | sethi.p %hi(0xffffc000),gr11 |
| 84 | setlo %lo(0xffffc000),gr11 |
| 85 | |
| 86 | # GR8 = base of uncovered RAM |
| 87 | # GR9 = top of uncovered RAM |
| 88 | # GR11 = xAMLR mask |
| 89 | LEDS 0x3317 |
| 90 | call __head_split_region |
| 91 | movgs gr4,iampr7 |
| 92 | movgs gr6,iamlr7 |
| 93 | movgs gr5,dampr7 |
| 94 | movgs gr7,damlr7 |
| 95 | |
| 96 | LEDS 0x3316 |
| 97 | call __head_split_region |
| 98 | movgs gr4,iampr6 |
| 99 | movgs gr6,iamlr6 |
| 100 | movgs gr5,dampr6 |
| 101 | movgs gr7,damlr6 |
| 102 | |
| 103 | LEDS 0x3315 |
| 104 | call __head_split_region |
| 105 | movgs gr4,iampr5 |
| 106 | movgs gr6,iamlr5 |
| 107 | movgs gr5,dampr5 |
| 108 | movgs gr7,damlr5 |
| 109 | |
| 110 | LEDS 0x3314 |
| 111 | call __head_split_region |
| 112 | movgs gr4,iampr4 |
| 113 | movgs gr6,iamlr4 |
| 114 | movgs gr5,dampr4 |
| 115 | movgs gr7,damlr4 |
| 116 | |
| 117 | LEDS 0x3313 |
| 118 | call __head_split_region |
| 119 | movgs gr4,iampr3 |
| 120 | movgs gr6,iamlr3 |
| 121 | movgs gr5,dampr3 |
| 122 | movgs gr7,damlr3 |
| 123 | |
| 124 | LEDS 0x3312 |
| 125 | call __head_split_region |
| 126 | movgs gr4,iampr2 |
| 127 | movgs gr6,iamlr2 |
| 128 | movgs gr5,dampr2 |
| 129 | movgs gr7,damlr2 |
| 130 | |
| 131 | LEDS 0x3311 |
| 132 | call __head_split_region |
| 133 | movgs gr4,iampr1 |
| 134 | movgs gr6,iamlr1 |
| 135 | movgs gr5,dampr1 |
| 136 | movgs gr7,damlr1 |
| 137 | |
| 138 | # cover kernel core image with kernel-only segment |
| 139 | LEDS 0x3310 |
| 140 | sethi.p %hi(__page_offset),gr8 |
| 141 | setlo %lo(__page_offset),gr8 |
| 142 | call __head_split_region |
| 143 | |
| 144 | #ifdef CONFIG_PROTECT_KERNEL |
| 145 | ori.p gr4,#xAMPRx_S_KERNEL,gr4 |
| 146 | ori gr5,#xAMPRx_S_KERNEL,gr5 |
| 147 | #endif |
| 148 | |
| 149 | movgs gr4,iampr0 |
| 150 | movgs gr6,iamlr0 |
| 151 | movgs gr5,dampr0 |
| 152 | movgs gr7,damlr0 |
| 153 | |
| 154 | # start in TLB context 0 with no page tables |
| 155 | movgs gr0,cxnr |
| 156 | movgs gr0,ttbr |
| 157 | |
| 158 | # the FR451 also has an extra trap base register |
| 159 | movsg tbr,gr4 |
| 160 | movgs gr4,btbr |
| 161 | |
| 162 | # turn on the timers as appropriate |
| 163 | movgs gr0,timerh |
| 164 | movgs gr0,timerl |
| 165 | movgs gr0,timerd |
| 166 | movsg hsr0,gr4 |
| 167 | sethi.p %hi(HSR0_ETMI),gr5 |
| 168 | setlo %lo(HSR0_ETMI),gr5 |
| 169 | or gr4,gr5,gr4 |
| 170 | movgs gr4,hsr0 |
| 171 | |
| 172 | LEDS 0x3300 |
| 173 | jmpl @(gr27,gr0) |