| Ben Dooks | 8997de3 | 2010-03-04 23:14:44 +0000 | [diff] [blame] | 1 | /* arch/arm/mach-s3c2440/s3c2440-pll-16934400.c | 
| Ben Dooks | 78278d6 | 2009-07-30 23:23:30 +0100 | [diff] [blame] | 2 |  * | 
 | 3 |  * Copyright (c) 2006-2008 Simtec Electronics | 
 | 4 |  *	http://armlinux.simtec.co.uk/ | 
 | 5 |  *	Ben Dooks <ben@simtec.co.uk> | 
 | 6 |  *	Vincent Sanders <vince@arm.linux.org.uk> | 
 | 7 |  * | 
 | 8 |  * S3C2440/S3C2442 CPU PLL tables (16.93444MHz Crystal) | 
 | 9 |  * | 
 | 10 |  * This program is free software; you can redistribute it and/or modify | 
 | 11 |  * it under the terms of the GNU General Public License version 2 as | 
 | 12 |  * published by the Free Software Foundation. | 
 | 13 | */ | 
 | 14 |  | 
 | 15 | #include <linux/types.h> | 
 | 16 | #include <linux/kernel.h> | 
 | 17 | #include <linux/sysdev.h> | 
 | 18 | #include <linux/clk.h> | 
 | 19 | #include <linux/err.h> | 
 | 20 |  | 
 | 21 | #include <plat/cpu.h> | 
 | 22 | #include <plat/cpu-freq-core.h> | 
 | 23 |  | 
 | 24 | static struct cpufreq_frequency_table s3c2440_plls_169344[] __initdata = { | 
 | 25 | 	{ .frequency = 78019200,	.index = PLLVAL(121, 5, 3), 	}, 	/* FVco 624.153600 */ | 
 | 26 | 	{ .frequency = 84067200,	.index = PLLVAL(131, 5, 3), 	}, 	/* FVco 672.537600 */ | 
 | 27 | 	{ .frequency = 90115200,	.index = PLLVAL(141, 5, 3), 	}, 	/* FVco 720.921600 */ | 
 | 28 | 	{ .frequency = 96163200,	.index = PLLVAL(151, 5, 3), 	}, 	/* FVco 769.305600 */ | 
 | 29 | 	{ .frequency = 102135600,	.index = PLLVAL(185, 6, 3), 	}, 	/* FVco 817.084800 */ | 
 | 30 | 	{ .frequency = 108259200,	.index = PLLVAL(171, 5, 3), 	}, 	/* FVco 866.073600 */ | 
 | 31 | 	{ .frequency = 114307200,	.index = PLLVAL(127, 3, 3), 	}, 	/* FVco 914.457600 */ | 
 | 32 | 	{ .frequency = 120234240,	.index = PLLVAL(134, 3, 3), 	}, 	/* FVco 961.873920 */ | 
 | 33 | 	{ .frequency = 126161280,	.index = PLLVAL(141, 3, 3), 	}, 	/* FVco 1009.290240 */ | 
 | 34 | 	{ .frequency = 132088320,	.index = PLLVAL(148, 3, 3), 	}, 	/* FVco 1056.706560 */ | 
 | 35 | 	{ .frequency = 138015360,	.index = PLLVAL(155, 3, 3), 	}, 	/* FVco 1104.122880 */ | 
 | 36 | 	{ .frequency = 144789120,	.index = PLLVAL(163, 3, 3), 	}, 	/* FVco 1158.312960 */ | 
 | 37 | 	{ .frequency = 150100363,	.index = PLLVAL(187, 9, 2), 	}, 	/* FVco 600.401454 */ | 
 | 38 | 	{ .frequency = 156038400,	.index = PLLVAL(121, 5, 2), 	}, 	/* FVco 624.153600 */ | 
 | 39 | 	{ .frequency = 162086400,	.index = PLLVAL(126, 5, 2), 	}, 	/* FVco 648.345600 */ | 
 | 40 | 	{ .frequency = 168134400,	.index = PLLVAL(131, 5, 2), 	}, 	/* FVco 672.537600 */ | 
 | 41 | 	{ .frequency = 174048000,	.index = PLLVAL(177, 7, 2), 	}, 	/* FVco 696.192000 */ | 
 | 42 | 	{ .frequency = 180230400,	.index = PLLVAL(141, 5, 2), 	}, 	/* FVco 720.921600 */ | 
 | 43 | 	{ .frequency = 186278400,	.index = PLLVAL(124, 4, 2), 	}, 	/* FVco 745.113600 */ | 
 | 44 | 	{ .frequency = 192326400,	.index = PLLVAL(151, 5, 2), 	}, 	/* FVco 769.305600 */ | 
 | 45 | 	{ .frequency = 198132480,	.index = PLLVAL(109, 3, 2), 	}, 	/* FVco 792.529920 */ | 
 | 46 | 	{ .frequency = 204271200,	.index = PLLVAL(185, 6, 2), 	}, 	/* FVco 817.084800 */ | 
 | 47 | 	{ .frequency = 210268800,	.index = PLLVAL(141, 4, 2), 	}, 	/* FVco 841.075200 */ | 
 | 48 | 	{ .frequency = 216518400,	.index = PLLVAL(171, 5, 2), 	}, 	/* FVco 866.073600 */ | 
 | 49 | 	{ .frequency = 222264000,	.index = PLLVAL(97, 2, 2), 	}, 	/* FVco 889.056000 */ | 
 | 50 | 	{ .frequency = 228614400,	.index = PLLVAL(127, 3, 2), 	}, 	/* FVco 914.457600 */ | 
 | 51 | 	{ .frequency = 234259200,	.index = PLLVAL(158, 4, 2), 	}, 	/* FVco 937.036800 */ | 
 | 52 | 	{ .frequency = 240468480,	.index = PLLVAL(134, 3, 2), 	}, 	/* FVco 961.873920 */ | 
 | 53 | 	{ .frequency = 246960000,	.index = PLLVAL(167, 4, 2), 	}, 	/* FVco 987.840000 */ | 
 | 54 | 	{ .frequency = 252322560,	.index = PLLVAL(141, 3, 2), 	}, 	/* FVco 1009.290240 */ | 
 | 55 | 	{ .frequency = 258249600,	.index = PLLVAL(114, 2, 2), 	}, 	/* FVco 1032.998400 */ | 
 | 56 | 	{ .frequency = 264176640,	.index = PLLVAL(148, 3, 2), 	}, 	/* FVco 1056.706560 */ | 
 | 57 | 	{ .frequency = 270950400,	.index = PLLVAL(120, 2, 2), 	}, 	/* FVco 1083.801600 */ | 
 | 58 | 	{ .frequency = 276030720,	.index = PLLVAL(155, 3, 2), 	}, 	/* FVco 1104.122880 */ | 
 | 59 | 	{ .frequency = 282240000,	.index = PLLVAL(92, 1, 2), 	}, 	/* FVco 1128.960000 */ | 
 | 60 | 	{ .frequency = 289578240,	.index = PLLVAL(163, 3, 2), 	}, 	/* FVco 1158.312960 */ | 
 | 61 | 	{ .frequency = 294235200,	.index = PLLVAL(131, 2, 2), 	}, 	/* FVco 1176.940800 */ | 
 | 62 | 	{ .frequency = 300200727,	.index = PLLVAL(187, 9, 1), 	}, 	/* FVco 600.401454 */ | 
 | 63 | 	{ .frequency = 306358690,	.index = PLLVAL(191, 9, 1), 	}, 	/* FVco 612.717380 */ | 
 | 64 | 	{ .frequency = 312076800,	.index = PLLVAL(121, 5, 1), 	}, 	/* FVco 624.153600 */ | 
 | 65 | 	{ .frequency = 318366720,	.index = PLLVAL(86, 3, 1), 	}, 	/* FVco 636.733440 */ | 
 | 66 | 	{ .frequency = 324172800,	.index = PLLVAL(126, 5, 1), 	}, 	/* FVco 648.345600 */ | 
 | 67 | 	{ .frequency = 330220800,	.index = PLLVAL(109, 4, 1), 	}, 	/* FVco 660.441600 */ | 
 | 68 | 	{ .frequency = 336268800,	.index = PLLVAL(131, 5, 1), 	}, 	/* FVco 672.537600 */ | 
 | 69 | 	{ .frequency = 342074880,	.index = PLLVAL(93, 3, 1), 	}, 	/* FVco 684.149760 */ | 
 | 70 | 	{ .frequency = 348096000,	.index = PLLVAL(177, 7, 1), 	}, 	/* FVco 696.192000 */ | 
 | 71 | 	{ .frequency = 355622400,	.index = PLLVAL(118, 4, 1), 	}, 	/* FVco 711.244800 */ | 
 | 72 | 	{ .frequency = 360460800,	.index = PLLVAL(141, 5, 1), 	}, 	/* FVco 720.921600 */ | 
 | 73 | 	{ .frequency = 366206400,	.index = PLLVAL(165, 6, 1), 	}, 	/* FVco 732.412800 */ | 
 | 74 | 	{ .frequency = 372556800,	.index = PLLVAL(124, 4, 1), 	}, 	/* FVco 745.113600 */ | 
 | 75 | 	{ .frequency = 378201600,	.index = PLLVAL(126, 4, 1), 	}, 	/* FVco 756.403200 */ | 
 | 76 | 	{ .frequency = 384652800,	.index = PLLVAL(151, 5, 1), 	}, 	/* FVco 769.305600 */ | 
 | 77 | 	{ .frequency = 391608000,	.index = PLLVAL(177, 6, 1), 	}, 	/* FVco 783.216000 */ | 
 | 78 | 	{ .frequency = 396264960,	.index = PLLVAL(109, 3, 1), 	}, 	/* FVco 792.529920 */ | 
 | 79 | 	{ .frequency = 402192000,	.index = PLLVAL(87, 2, 1), 	}, 	/* FVco 804.384000 */ | 
 | 80 | }; | 
 | 81 |  | 
 | 82 | static int s3c2440_plls169344_add(struct sys_device *dev) | 
 | 83 | { | 
 | 84 | 	struct clk *xtal_clk; | 
 | 85 | 	unsigned long xtal; | 
 | 86 |  | 
 | 87 | 	xtal_clk = clk_get(NULL, "xtal"); | 
 | 88 | 	if (IS_ERR(xtal_clk)) | 
 | 89 | 		return PTR_ERR(xtal_clk); | 
 | 90 |  | 
 | 91 | 	xtal = clk_get_rate(xtal_clk); | 
 | 92 | 	clk_put(xtal_clk); | 
 | 93 |  | 
 | 94 | 	if (xtal == 169344000) { | 
 | 95 | 		printk(KERN_INFO "Using PLL table for 16.9344MHz crystal\n"); | 
 | 96 | 		return s3c_plltab_register(s3c2440_plls_169344, | 
 | 97 | 					   ARRAY_SIZE(s3c2440_plls_169344)); | 
 | 98 | 	} | 
 | 99 |  | 
 | 100 | 	return 0; | 
 | 101 | } | 
 | 102 |  | 
 | 103 | static struct sysdev_driver s3c2440_plls169344_drv = { | 
 | 104 | 	.add	= s3c2440_plls169344_add, | 
 | 105 | }; | 
 | 106 |  | 
 | 107 | static int __init s3c2440_pll_16934400(void) | 
 | 108 | { | 
 | 109 | 	return sysdev_driver_register(&s3c2440_sysclass, | 
 | 110 | 				      &s3c2440_plls169344_drv); | 
 | 111 |  | 
 | 112 | } | 
 | 113 |  | 
 | 114 | arch_initcall(s3c2440_pll_16934400); | 
 | 115 |  | 
 | 116 | static struct sysdev_driver s3c2442_plls169344_drv = { | 
 | 117 | 	.add	= s3c2440_plls169344_add, | 
 | 118 | }; | 
 | 119 |  | 
 | 120 | static int __init s3c2442_pll_16934400(void) | 
 | 121 | { | 
 | 122 | 	return sysdev_driver_register(&s3c2442_sysclass, | 
 | 123 | 				      &s3c2442_plls169344_drv); | 
 | 124 |  | 
 | 125 | } | 
 | 126 |  | 
 | 127 | arch_initcall(s3c2442_pll_16934400); |