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Nagamalleswararao Ganji70fac1e2011-12-29 19:06:37 -08001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Marc Zyngier89bdafd12011-12-22 11:39:20 +053056#include <asm/hardware/gic.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080059#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#include <mach/irqs.h>
61#include <mach/msm_spi.h>
62#include <mach/msm_serial_hs.h>
63#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080064#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070065#include <mach/msm_memtypes.h>
66#include <asm/mach/mmc.h>
67#include <mach/msm_battery.h>
68#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070069#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#ifdef CONFIG_MSM_DSPS
71#include <mach/msm_dsps.h>
72#endif
73#include <mach/msm_xo.h>
74#include <mach/msm_bus_board.h>
75#include <mach/socinfo.h>
76#include <linux/i2c/isl9519.h>
77#ifdef CONFIG_USB_G_ANDROID
78#include <linux/usb/android.h>
79#include <mach/usbdiag.h>
80#endif
81#include <linux/regulator/consumer.h>
82#include <linux/regulator/machine.h>
83#include <mach/sdio_al.h>
84#include <mach/rpm.h>
85#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070086#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053087#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070089#include "devices.h"
90#include "devices-msm8x60.h"
Abhijeet Dharmapurikarefaca4f2011-12-27 16:24:07 -080091#include <mach/cpuidle.h>
92#include <mach/pm.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070093#include "mpm.h"
94#include "spm.h"
95#include "rpm_log.h"
96#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097#include "gpiomux-8x60.h"
98#include "rpm_stats.h"
99#include "peripheral-loader.h"
100#include <linux/platform_data/qcom_crypto_device.h>
101#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700102#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600103#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700104
105#include <linux/ion.h>
106#include <mach/ion.h>
107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109#define MDM2AP_SYNC 129
110
Terence Hampson1c73fef2011-07-19 17:10:49 -0400111#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112#define LCDC_SPI_GPIO_CLK 73
113#define LCDC_SPI_GPIO_CS 72
114#define LCDC_SPI_GPIO_MOSI 70
115#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
116#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
117#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
118#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
119#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400120#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700122#define PANEL_NAME_MAX_LEN 30
123#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
124#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
125#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
126#define HDMI_PANEL_NAME "hdmi_msm"
127#define TVOUT_PANEL_NAME "tvout_msm"
128
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700129#define DSPS_PIL_GENERIC_NAME "dsps"
130#define DSPS_PIL_FLUID_NAME "dsps_fluid"
131
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800132#ifdef CONFIG_ION_MSM
133static struct platform_device ion_dev;
134#endif
135
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700136enum {
137 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530138 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700139 /* CORE expander */
140 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
141 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
142 GPIO_WLAN_DEEP_SLEEP_N,
143 GPIO_LVDS_SHUTDOWN_N,
144 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
145 GPIO_MS_SYS_RESET_N,
146 GPIO_CAP_TS_RESOUT_N,
147 GPIO_CAP_GAUGE_BI_TOUT,
148 GPIO_ETHERNET_PME,
149 GPIO_EXT_GPS_LNA_EN,
150 GPIO_MSM_WAKES_BT,
151 GPIO_ETHERNET_RESET_N,
152 GPIO_HEADSET_DET_N,
153 GPIO_USB_UICC_EN,
154 GPIO_BACKLIGHT_EN,
155 GPIO_EXT_CAMIF_PWR_EN,
156 GPIO_BATT_GAUGE_INT_N,
157 GPIO_BATT_GAUGE_EN,
158 /* DOCKING expander */
159 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
160 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
161 GPIO_AUX_JTAG_DET_N,
162 GPIO_DONGLE_DET_N,
163 GPIO_SVIDEO_LOAD_DET,
164 GPIO_SVID_AMP_SHUTDOWN1_N,
165 GPIO_SVID_AMP_SHUTDOWN0_N,
166 GPIO_SDC_WP,
167 GPIO_IRDA_PWDN,
168 GPIO_IRDA_RESET_N,
169 GPIO_DONGLE_GPIO0,
170 GPIO_DONGLE_GPIO1,
171 GPIO_DONGLE_GPIO2,
172 GPIO_DONGLE_GPIO3,
173 GPIO_DONGLE_PWR_EN,
174 GPIO_EMMC_RESET_N,
175 GPIO_TP_EXP2_IO15,
176 /* SURF expander */
177 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
178 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
179 GPIO_SD_CARD_DET_2,
180 GPIO_SD_CARD_DET_4,
181 GPIO_SD_CARD_DET_5,
182 GPIO_UIM3_RST,
183 GPIO_SURF_EXPANDER_IO5,
184 GPIO_SURF_EXPANDER_IO6,
185 GPIO_ADC_I2C_EN,
186 GPIO_SURF_EXPANDER_IO8,
187 GPIO_SURF_EXPANDER_IO9,
188 GPIO_SURF_EXPANDER_IO10,
189 GPIO_SURF_EXPANDER_IO11,
190 GPIO_SURF_EXPANDER_IO12,
191 GPIO_SURF_EXPANDER_IO13,
192 GPIO_SURF_EXPANDER_IO14,
193 GPIO_SURF_EXPANDER_IO15,
194 /* LEFT KB IO expander */
195 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
196 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
197 GPIO_LEFT_LED_2,
198 GPIO_LEFT_LED_3,
199 GPIO_LEFT_LED_WLAN,
200 GPIO_JOYSTICK_EN,
201 GPIO_CAP_TS_SLEEP,
202 GPIO_LEFT_KB_IO6,
203 GPIO_LEFT_LED_5,
204 /* RIGHT KB IO expander */
205 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
206 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
207 GPIO_RIGHT_LED_2,
208 GPIO_RIGHT_LED_3,
209 GPIO_RIGHT_LED_BT,
210 GPIO_WEB_CAMIF_STANDBY,
211 GPIO_COMPASS_RST_N,
212 GPIO_WEB_CAMIF_RESET_N,
213 GPIO_RIGHT_LED_5,
214 GPIO_R_ALTIMETER_RESET_N,
215 /* FLUID S IO expander */
216 GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
218 GPIO_MIC1_ANCL_SEL,
219 GPIO_HS_MIC4_SEL,
220 GPIO_FML_MIC3_SEL,
221 GPIO_FMR_MIC5_SEL,
222 GPIO_TS_SLEEP,
223 GPIO_HAP_SHIFT_LVL_OE,
224 GPIO_HS_SW_DIR,
225 /* FLUID N IO expander */
226 GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
228 GPIO_EPM_5V_BOOST_EN,
229 GPIO_AUX_CAM_2P7_EN,
230 GPIO_LED_FLASH_EN,
231 GPIO_LED1_GREEN_N,
232 GPIO_LED2_RED_N,
233 GPIO_FRONT_CAM_RESET_N,
234 GPIO_EPM_LVLSFT_EN,
235 GPIO_N_ALTIMETER_RESET_N,
236 /* EPM expander */
237 GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
239 GPIO_PWR_MON_RESET_N,
240 GPIO_ADC1_PWDN_N,
241 GPIO_ADC2_PWDN_N,
242 GPIO_EPM_EXPANDER_IO4,
243 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
244 GPIO_ADC2_MUX_SPI_INT_N,
245 GPIO_EPM_EXPANDER_IO7,
246 GPIO_PWR_MON_ENABLE,
247 GPIO_EPM_SPI_ADC1_CS_N,
248 GPIO_EPM_SPI_ADC2_CS_N,
249 GPIO_EPM_EXPANDER_IO11,
250 GPIO_EPM_EXPANDER_IO12,
251 GPIO_EPM_EXPANDER_IO13,
252 GPIO_EPM_EXPANDER_IO14,
253 GPIO_EPM_EXPANDER_IO15,
254};
255
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530256struct pm8xxx_mpp_init_info {
257 unsigned mpp;
258 struct pm8xxx_mpp_config_data config;
259};
260
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530261#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530262{ \
263 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
264 .config = { \
265 .type = PM8XXX_MPP_TYPE_##_type, \
266 .level = _level, \
267 .control = PM8XXX_MPP_##_control, \
268 } \
269}
270
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530271#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
272{ \
273 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
274 .config = { \
275 .type = PM8XXX_MPP_TYPE_##_type, \
276 .level = _level, \
277 .control = PM8XXX_MPP_##_control, \
278 } \
279}
280
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700281/*
282 * The UI_INTx_N lines are pmic gpio lines which connect i2c
283 * gpio expanders to the pm8058.
284 */
285#define UI_INT1_N 25
286#define UI_INT2_N 34
287#define UI_INT3_N 14
288/*
289FM GPIO is GPIO 18 on PMIC 8058.
290As the index starts from 0 in the PMIC driver, and hence 17
291corresponds to GPIO 18 on PMIC 8058.
292*/
293#define FM_GPIO 17
294
295#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
296static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
297static void *sdc2_status_notify_cb_devid;
298#endif
299
300#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
301static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
302static void *sdc5_status_notify_cb_devid;
303#endif
304
305static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
306 [0] = {
307 .reg_base_addr = MSM_SAW0_BASE,
308
309#ifdef CONFIG_MSM_AVS_HW
310 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
311#endif
312 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
315 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
316
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
319 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
320
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
322 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
323 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
324
325 .awake_vlevel = 0x94,
326 .retention_vlevel = 0x81,
327 .collapse_vlevel = 0x20,
328 .retention_mid_vlevel = 0x94,
329 .collapse_mid_vlevel = 0x8C,
330
331 .vctl_timeout_us = 50,
332 },
333
334 [1] = {
335 .reg_base_addr = MSM_SAW1_BASE,
336
337#ifdef CONFIG_MSM_AVS_HW
338 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
339#endif
340 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
343 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
344
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
347 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
348
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
350 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
351 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
352
353 .awake_vlevel = 0x94,
354 .retention_vlevel = 0x81,
355 .collapse_vlevel = 0x20,
356 .retention_mid_vlevel = 0x94,
357 .collapse_mid_vlevel = 0x8C,
358
359 .vctl_timeout_us = 50,
360 },
361};
362
363static struct msm_spm_platform_data msm_spm_data[] __initdata = {
364 [0] = {
365 .reg_base_addr = MSM_SAW0_BASE,
366
367#ifdef CONFIG_MSM_AVS_HW
368 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
369#endif
370 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
373 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
374
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
377 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
378
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
380 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
381 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
382
383 .awake_vlevel = 0xA0,
384 .retention_vlevel = 0x89,
385 .collapse_vlevel = 0x20,
386 .retention_mid_vlevel = 0x89,
387 .collapse_mid_vlevel = 0x89,
388
389 .vctl_timeout_us = 50,
390 },
391
392 [1] = {
393 .reg_base_addr = MSM_SAW1_BASE,
394
395#ifdef CONFIG_MSM_AVS_HW
396 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
397#endif
398 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
401 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
402
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
405 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
406
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
408 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
409 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
410
411 .awake_vlevel = 0xA0,
412 .retention_vlevel = 0x89,
413 .collapse_vlevel = 0x20,
414 .retention_mid_vlevel = 0x89,
415 .collapse_mid_vlevel = 0x89,
416
417 .vctl_timeout_us = 50,
418 },
419};
420
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700421/*
422 * Consumer specific regulator names:
423 * regulator name consumer dev_name
424 */
425static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
426 REGULATOR_SUPPLY("8901_s0", NULL),
427};
428static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
429 REGULATOR_SUPPLY("8901_s1", NULL),
430};
431
432static struct regulator_init_data saw_s0_init_data = {
433 .constraints = {
434 .name = "8901_s0",
435 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700436 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700437 .max_uV = 1250000,
438 },
439 .consumer_supplies = vreg_consumers_8901_S0,
440 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
441};
442
443static struct regulator_init_data saw_s1_init_data = {
444 .constraints = {
445 .name = "8901_s1",
446 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700447 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448 .max_uV = 1250000,
449 },
450 .consumer_supplies = vreg_consumers_8901_S1,
451 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
452};
453
454static struct platform_device msm_device_saw_s0 = {
455 .name = "saw-regulator",
456 .id = 0,
457 .dev = {
458 .platform_data = &saw_s0_init_data,
459 },
460};
461
462static struct platform_device msm_device_saw_s1 = {
463 .name = "saw-regulator",
464 .id = 1,
465 .dev = {
466 .platform_data = &saw_s1_init_data,
467 },
468};
469
470/*
471 * The smc91x configuration varies depending on platform.
472 * The resources data structure is filled in at runtime.
473 */
474static struct resource smc91x_resources[] = {
475 [0] = {
476 .flags = IORESOURCE_MEM,
477 },
478 [1] = {
479 .flags = IORESOURCE_IRQ,
480 },
481};
482
483static struct platform_device smc91x_device = {
484 .name = "smc91x",
485 .id = 0,
486 .num_resources = ARRAY_SIZE(smc91x_resources),
487 .resource = smc91x_resources,
488};
489
490static struct resource smsc911x_resources[] = {
491 [0] = {
492 .flags = IORESOURCE_MEM,
493 .start = 0x1b800000,
494 .end = 0x1b8000ff
495 },
496 [1] = {
497 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
498 },
499};
500
501static struct smsc911x_platform_config smsc911x_config = {
502 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
503 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
504 .flags = SMSC911X_USE_16BIT,
505 .has_reset_gpio = 1,
506 .reset_gpio = GPIO_ETHERNET_RESET_N
507};
508
509static struct platform_device smsc911x_device = {
510 .name = "smsc911x",
511 .id = 0,
512 .num_resources = ARRAY_SIZE(smsc911x_resources),
513 .resource = smsc911x_resources,
514 .dev = {
515 .platform_data = &smsc911x_config
516 }
517};
518
519#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
520 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
522 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
523
524#define QCE_SIZE 0x10000
525#define QCE_0_BASE 0x18500000
526
527#define QCE_HW_KEY_SUPPORT 0
528#define QCE_SHA_HMAC_SUPPORT 0
529#define QCE_SHARE_CE_RESOURCE 2
530#define QCE_CE_SHARED 1
531
532static struct resource qcrypto_resources[] = {
533 [0] = {
534 .start = QCE_0_BASE,
535 .end = QCE_0_BASE + QCE_SIZE - 1,
536 .flags = IORESOURCE_MEM,
537 },
538 [1] = {
539 .name = "crypto_channels",
540 .start = DMOV_CE_IN_CHAN,
541 .end = DMOV_CE_OUT_CHAN,
542 .flags = IORESOURCE_DMA,
543 },
544 [2] = {
545 .name = "crypto_crci_in",
546 .start = DMOV_CE_IN_CRCI,
547 .end = DMOV_CE_IN_CRCI,
548 .flags = IORESOURCE_DMA,
549 },
550 [3] = {
551 .name = "crypto_crci_out",
552 .start = DMOV_CE_OUT_CRCI,
553 .end = DMOV_CE_OUT_CRCI,
554 .flags = IORESOURCE_DMA,
555 },
556 [4] = {
557 .name = "crypto_crci_hash",
558 .start = DMOV_CE_HASH_CRCI,
559 .end = DMOV_CE_HASH_CRCI,
560 .flags = IORESOURCE_DMA,
561 },
562};
563
564static struct resource qcedev_resources[] = {
565 [0] = {
566 .start = QCE_0_BASE,
567 .end = QCE_0_BASE + QCE_SIZE - 1,
568 .flags = IORESOURCE_MEM,
569 },
570 [1] = {
571 .name = "crypto_channels",
572 .start = DMOV_CE_IN_CHAN,
573 .end = DMOV_CE_OUT_CHAN,
574 .flags = IORESOURCE_DMA,
575 },
576 [2] = {
577 .name = "crypto_crci_in",
578 .start = DMOV_CE_IN_CRCI,
579 .end = DMOV_CE_IN_CRCI,
580 .flags = IORESOURCE_DMA,
581 },
582 [3] = {
583 .name = "crypto_crci_out",
584 .start = DMOV_CE_OUT_CRCI,
585 .end = DMOV_CE_OUT_CRCI,
586 .flags = IORESOURCE_DMA,
587 },
588 [4] = {
589 .name = "crypto_crci_hash",
590 .start = DMOV_CE_HASH_CRCI,
591 .end = DMOV_CE_HASH_CRCI,
592 .flags = IORESOURCE_DMA,
593 },
594};
595
596#endif
597
598#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
599 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
600
601static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
602 .ce_shared = QCE_CE_SHARED,
603 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
604 .hw_key_support = QCE_HW_KEY_SUPPORT,
605 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800606 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700607};
608
609static struct platform_device qcrypto_device = {
610 .name = "qcrypto",
611 .id = 0,
612 .num_resources = ARRAY_SIZE(qcrypto_resources),
613 .resource = qcrypto_resources,
614 .dev = {
615 .coherent_dma_mask = DMA_BIT_MASK(32),
616 .platform_data = &qcrypto_ce_hw_suppport,
617 },
618};
619#endif
620
621#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
622 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
623
624static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
625 .ce_shared = QCE_CE_SHARED,
626 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
627 .hw_key_support = QCE_HW_KEY_SUPPORT,
628 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800629 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700630};
631
632static struct platform_device qcedev_device = {
633 .name = "qce",
634 .id = 0,
635 .num_resources = ARRAY_SIZE(qcedev_resources),
636 .resource = qcedev_resources,
637 .dev = {
638 .coherent_dma_mask = DMA_BIT_MASK(32),
639 .platform_data = &qcedev_ce_hw_suppport,
640 },
641};
642#endif
643
644#if defined(CONFIG_HAPTIC_ISA1200) || \
645 defined(CONFIG_HAPTIC_ISA1200_MODULE)
646
647static const char *vregs_isa1200_name[] = {
648 "8058_s3",
649 "8901_l4",
650};
651
652static const int vregs_isa1200_val[] = {
653 1800000,/* uV */
654 2600000,
655};
656static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
657static struct msm_xo_voter *xo_handle_a1;
658
659static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800660{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700661 int i, rc = 0;
662
663 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
664 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
665 regulator_disable(vregs_isa1200[i]);
666 if (rc < 0) {
667 pr_err("%s: vreg %s %s failed (%d)\n",
668 __func__, vregs_isa1200_name[i],
669 vreg_on ? "enable" : "disable", rc);
670 goto vreg_fail;
671 }
672 }
673
674 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
675 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
676 if (rc < 0) {
677 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
678 __func__, vreg_on ? "" : "de-", rc);
679 goto vreg_fail;
680 }
681 return 0;
682
683vreg_fail:
684 while (i--)
685 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
686 regulator_disable(vregs_isa1200[i]);
687 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800688}
689
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700690static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800691{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700692 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700694 if (enable == true) {
695 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
696 vregs_isa1200[i] = regulator_get(NULL,
697 vregs_isa1200_name[i]);
698 if (IS_ERR(vregs_isa1200[i])) {
699 pr_err("%s: regulator get of %s failed (%ld)\n",
700 __func__, vregs_isa1200_name[i],
701 PTR_ERR(vregs_isa1200[i]));
702 rc = PTR_ERR(vregs_isa1200[i]);
703 goto vreg_get_fail;
704 }
705 rc = regulator_set_voltage(vregs_isa1200[i],
706 vregs_isa1200_val[i], vregs_isa1200_val[i]);
707 if (rc) {
708 pr_err("%s: regulator_set_voltage(%s) failed\n",
709 __func__, vregs_isa1200_name[i]);
710 goto vreg_get_fail;
711 }
712 }
Steve Muckle9161d302010-02-11 11:50:40 -0800713
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700714 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
715 if (rc) {
716 pr_err("%s: unable to request gpio %d (%d)\n",
717 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
718 goto vreg_get_fail;
719 }
Steve Muckle9161d302010-02-11 11:50:40 -0800720
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700721 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
722 if (rc) {
723 pr_err("%s: Unable to set direction\n", __func__);;
724 goto free_gpio;
725 }
726
727 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
728 if (IS_ERR(xo_handle_a1)) {
729 rc = PTR_ERR(xo_handle_a1);
730 pr_err("%s: failed to get the handle for A1(%d)\n",
731 __func__, rc);
732 goto gpio_set_dir;
733 }
734 } else {
735 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
736 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
737
738 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
739 regulator_put(vregs_isa1200[i]);
740
741 msm_xo_put(xo_handle_a1);
742 }
743
744 return 0;
745gpio_set_dir:
746 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
747free_gpio:
748 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
749vreg_get_fail:
750 while (i)
751 regulator_put(vregs_isa1200[--i]);
752 return rc;
753}
754
755#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530756#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700757static struct isa1200_platform_data isa1200_1_pdata = {
758 .name = "vibrator",
759 .power_on = isa1200_power,
760 .dev_setup = isa1200_dev_setup,
761 /*gpio to enable haptic*/
762 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530763 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700764 .max_timeout = 15000,
765 .mode_ctrl = PWM_GEN_MODE,
766 .pwm_fd = {
767 .pwm_div = 256,
768 },
769 .is_erm = false,
770 .smart_en = true,
771 .ext_clk_en = true,
772 .chip_en = 1,
773};
774
775static struct i2c_board_info msm_isa1200_board_info[] = {
776 {
777 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
778 .platform_data = &isa1200_1_pdata,
779 },
780};
781#endif
782
783#if defined(CONFIG_BATTERY_BQ27520) || \
784 defined(CONFIG_BATTERY_BQ27520_MODULE)
785static struct bq27520_platform_data bq27520_pdata = {
786 .name = "fuel-gauge",
787 .vreg_name = "8058_s3",
788 .vreg_value = 1800000,
789 .soc_int = GPIO_BATT_GAUGE_INT_N,
790 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
791 .chip_en = GPIO_BATT_GAUGE_EN,
792 .enable_dlog = 0, /* if enable coulomb counter logger */
793};
794
795static struct i2c_board_info msm_bq27520_board_info[] = {
796 {
797 I2C_BOARD_INFO("bq27520", 0xaa>>1),
798 .platform_data = &bq27520_pdata,
799 },
800};
801#endif
802
803static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
804 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
805 .idle_supported = 1,
806 .suspend_supported = 1,
807 .idle_enabled = 0,
808 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700809 },
810
811 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
812 .idle_supported = 1,
813 .suspend_supported = 1,
814 .idle_enabled = 0,
815 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700816 },
817
818 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
819 .idle_supported = 1,
820 .suspend_supported = 1,
821 .idle_enabled = 1,
822 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700823 },
824
825 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
826 .idle_supported = 1,
827 .suspend_supported = 1,
828 .idle_enabled = 0,
829 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700830 },
831
832 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
833 .idle_supported = 1,
834 .suspend_supported = 1,
835 .idle_enabled = 0,
836 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700837 },
838
839 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
840 .idle_supported = 1,
841 .suspend_supported = 1,
842 .idle_enabled = 1,
843 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700844 },
845};
846
847static struct msm_cpuidle_state msm_cstates[] __initdata = {
848 {0, 0, "C0", "WFI",
849 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
850
851 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
852 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
853
854 {0, 2, "C2", "POWER_COLLAPSE",
855 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
856
857 {1, 0, "C0", "WFI",
858 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
859
860 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
861 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
862};
863
864static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
865 {
866 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
867 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
868 true,
869 1, 8000, 100000, 1,
870 },
871
872 {
873 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
874 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
875 true,
876 1500, 5000, 60100000, 3000,
877 },
878
879 {
880 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
881 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
882 false,
883 1800, 5000, 60350000, 3500,
884 },
885 {
886 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
887 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
888 false,
889 3800, 4500, 65350000, 5500,
890 },
891
892 {
893 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
894 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
895 false,
896 2800, 2500, 66850000, 4800,
897 },
898
899 {
900 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
901 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
902 false,
903 4800, 2000, 71850000, 6800,
904 },
905
906 {
907 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
908 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
909 false,
910 6800, 500, 75850000, 8800,
911 },
912
913 {
914 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
915 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
916 false,
917 7800, 0, 76350000, 9800,
918 },
919};
920
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600921static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
922 .mode = MSM_PM_BOOT_CONFIG_TZ,
923};
924
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700925#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
926
927#define ISP1763_INT_GPIO 117
928#define ISP1763_RST_GPIO 152
929static struct resource isp1763_resources[] = {
930 [0] = {
931 .flags = IORESOURCE_MEM,
932 .start = 0x1D000000,
933 .end = 0x1D005FFF, /* 24KB */
934 },
935 [1] = {
936 .flags = IORESOURCE_IRQ,
937 },
938};
939static void __init msm8x60_cfg_isp1763(void)
940{
941 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
942 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
943}
944
945static int isp1763_setup_gpio(int enable)
946{
947 int status = 0;
948
949 if (enable) {
950 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
951 if (status) {
952 pr_err("%s:Failed to request GPIO %d\n",
953 __func__, ISP1763_INT_GPIO);
954 return status;
955 }
956 status = gpio_direction_input(ISP1763_INT_GPIO);
957 if (status) {
958 pr_err("%s:Failed to configure GPIO %d\n",
959 __func__, ISP1763_INT_GPIO);
960 goto gpio_free_int;
961 }
962 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
963 if (status) {
964 pr_err("%s:Failed to request GPIO %d\n",
965 __func__, ISP1763_RST_GPIO);
966 goto gpio_free_int;
967 }
968 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
969 if (status) {
970 pr_err("%s:Failed to configure GPIO %d\n",
971 __func__, ISP1763_RST_GPIO);
972 goto gpio_free_rst;
973 }
974 pr_debug("\nISP GPIO configuration done\n");
975 return status;
976 }
977
978gpio_free_rst:
979 gpio_free(ISP1763_RST_GPIO);
980gpio_free_int:
981 gpio_free(ISP1763_INT_GPIO);
982
983 return status;
984}
985static struct isp1763_platform_data isp1763_pdata = {
986 .reset_gpio = ISP1763_RST_GPIO,
987 .setup_gpio = isp1763_setup_gpio
988};
989
990static struct platform_device isp1763_device = {
991 .name = "isp1763_usb",
992 .num_resources = ARRAY_SIZE(isp1763_resources),
993 .resource = isp1763_resources,
994 .dev = {
995 .platform_data = &isp1763_pdata
996 }
997};
998#endif
999
1000#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301001static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001002static struct regulator *ldo6_3p3;
1003static struct regulator *ldo7_1p8;
1004static struct regulator *vdd_cx;
1005#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301006#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001007notify_vbus_state notify_vbus_state_func_ptr;
1008static int usb_phy_susp_dig_vol = 750000;
1009static int pmic_id_notif_supported;
1010
1011#ifdef CONFIG_USB_EHCI_MSM_72K
1012#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1013struct delayed_work pmic_id_det;
1014
1015static int __init usb_id_pin_rework_setup(char *support)
1016{
1017 if (strncmp(support, "true", 4) == 0)
1018 pmic_id_notif_supported = 1;
1019
1020 return 1;
1021}
1022__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1023
1024static void pmic_id_detect(struct work_struct *w)
1025{
1026 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1027 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1028
1029 if (notify_vbus_state_func_ptr)
1030 (*notify_vbus_state_func_ptr) (val);
1031}
1032
1033static irqreturn_t pmic_id_on_irq(int irq, void *data)
1034{
1035 /*
1036 * Spurious interrupts are observed on pmic gpio line
1037 * even though there is no state change on USB ID. Schedule the
1038 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001039 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001040 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001041
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001042 return IRQ_HANDLED;
1043}
1044
Anji jonnalaae745e92011-11-14 18:34:31 +05301045static int msm_hsusb_phy_id_setup_init(int init)
1046{
1047 unsigned ret;
1048
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301049 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1050 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1051 .level = PM8901_MPP_DIG_LEVEL_L5,
1052 };
1053
Anji jonnalaae745e92011-11-14 18:34:31 +05301054 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301055 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1056 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1057 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301058 if (ret < 0)
1059 pr_err("%s:MPP2 configuration failed\n", __func__);
1060 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301061 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1062 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1063 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301064 if (ret < 0)
1065 pr_err("%s:MPP2 un config failed\n", __func__);
1066 }
1067 return ret;
1068}
1069
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001070static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1071{
1072 unsigned ret = -ENODEV;
1073
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301074 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301075 .direction = PM_GPIO_DIR_IN,
1076 .pull = PM_GPIO_PULL_UP_1P5,
1077 .function = PM_GPIO_FUNC_NORMAL,
1078 .vin_sel = 2,
1079 .inv_int_pol = 0,
1080 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301081 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301082 .direction = PM_GPIO_DIR_IN,
1083 .pull = PM_GPIO_PULL_NO,
1084 .function = PM_GPIO_FUNC_NORMAL,
1085 .vin_sel = 2,
1086 .inv_int_pol = 0,
1087 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001088 if (!callback)
1089 return -EINVAL;
1090
1091 if (machine_is_msm8x60_fluid())
1092 return -ENOTSUPP;
1093
1094 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1095 pr_debug("%s: USB_ID pin is not routed to PMIC"
1096 "on V1 surf/ffa\n", __func__);
1097 return -ENOTSUPP;
1098 }
1099
Manu Gautam62158eb2011-11-24 16:20:46 +05301100 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1101 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001102 pr_debug("%s: USB_ID is not routed to PMIC"
1103 "on V2 ffa\n", __func__);
1104 return -ENOTSUPP;
1105 }
1106
1107 usb_phy_susp_dig_vol = 500000;
1108
1109 if (init) {
1110 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301111 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301112 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1113 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301114 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301115 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301116 __func__, ret);
1117 return ret;
1118 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001119 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1120 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1121 "msm_otg_id", NULL);
1122 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001123 pr_err("%s:pmic_usb_id interrupt registration failed",
1124 __func__);
1125 return ret;
1126 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301127 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001128 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301129 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001130 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301131 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1132 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301133 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301134 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301135 __func__, ret);
1136 return ret;
1137 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301138 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001139 cancel_delayed_work_sync(&pmic_id_det);
1140 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001141 }
1142 return 0;
1143}
1144#endif
1145
1146#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1147#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1148static int msm_hsusb_init_vddcx(int init)
1149{
1150 int ret = 0;
1151
1152 if (init) {
1153 vdd_cx = regulator_get(NULL, "8058_s1");
1154 if (IS_ERR(vdd_cx)) {
1155 return PTR_ERR(vdd_cx);
1156 }
1157
1158 ret = regulator_set_voltage(vdd_cx,
1159 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1160 USB_PHY_MAX_VDD_DIG_VOL);
1161 if (ret) {
1162 pr_err("%s: unable to set the voltage for regulator"
1163 "vdd_cx\n", __func__);
1164 regulator_put(vdd_cx);
1165 return ret;
1166 }
1167
1168 ret = regulator_enable(vdd_cx);
1169 if (ret) {
1170 pr_err("%s: unable to enable regulator"
1171 "vdd_cx\n", __func__);
1172 regulator_put(vdd_cx);
1173 }
1174 } else {
1175 ret = regulator_disable(vdd_cx);
1176 if (ret) {
1177 pr_err("%s: Unable to disable the regulator:"
1178 "vdd_cx\n", __func__);
1179 return ret;
1180 }
1181
1182 regulator_put(vdd_cx);
1183 }
1184
1185 return ret;
1186}
1187
1188static int msm_hsusb_config_vddcx(int high)
1189{
1190 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1191 int min_vol;
1192 int ret;
1193
1194 if (high)
1195 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1196 else
1197 min_vol = usb_phy_susp_dig_vol;
1198
1199 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1200 if (ret) {
1201 pr_err("%s: unable to set the voltage for regulator"
1202 "vdd_cx\n", __func__);
1203 return ret;
1204 }
1205
1206 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1207
1208 return ret;
1209}
1210
1211#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1212#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1213#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1214#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1215
1216#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1217#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1218#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1219#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1220static int msm_hsusb_ldo_init(int init)
1221{
1222 int rc = 0;
1223
1224 if (init) {
1225 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1226 if (IS_ERR(ldo6_3p3))
1227 return PTR_ERR(ldo6_3p3);
1228
1229 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1230 if (IS_ERR(ldo7_1p8)) {
1231 rc = PTR_ERR(ldo7_1p8);
1232 goto put_3p3;
1233 }
1234
1235 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1236 USB_PHY_3P3_VOL_MAX);
1237 if (rc) {
1238 pr_err("%s: Unable to set voltage level for"
1239 "ldo6_3p3 regulator\n", __func__);
1240 goto put_1p8;
1241 }
1242 rc = regulator_enable(ldo6_3p3);
1243 if (rc) {
1244 pr_err("%s: Unable to enable the regulator:"
1245 "ldo6_3p3\n", __func__);
1246 goto put_1p8;
1247 }
1248 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1249 USB_PHY_1P8_VOL_MAX);
1250 if (rc) {
1251 pr_err("%s: Unable to set voltage level for"
1252 "ldo7_1p8 regulator\n", __func__);
1253 goto disable_3p3;
1254 }
1255 rc = regulator_enable(ldo7_1p8);
1256 if (rc) {
1257 pr_err("%s: Unable to enable the regulator:"
1258 "ldo7_1p8\n", __func__);
1259 goto disable_3p3;
1260 }
1261
1262 return 0;
1263 }
1264
1265 regulator_disable(ldo7_1p8);
1266disable_3p3:
1267 regulator_disable(ldo6_3p3);
1268put_1p8:
1269 regulator_put(ldo7_1p8);
1270put_3p3:
1271 regulator_put(ldo6_3p3);
1272 return rc;
1273}
1274
1275static int msm_hsusb_ldo_enable(int on)
1276{
1277 int ret = 0;
1278
1279 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1280 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1281 return -ENODEV;
1282 }
1283
1284 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1285 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1286 return -ENODEV;
1287 }
1288
1289 if (on) {
1290 ret = regulator_set_optimum_mode(ldo7_1p8,
1291 USB_PHY_1P8_HPM_LOAD);
1292 if (ret < 0) {
1293 pr_err("%s: Unable to set HPM of the regulator:"
1294 "ldo7_1p8\n", __func__);
1295 return ret;
1296 }
1297 ret = regulator_set_optimum_mode(ldo6_3p3,
1298 USB_PHY_3P3_HPM_LOAD);
1299 if (ret < 0) {
1300 pr_err("%s: Unable to set HPM of the regulator:"
1301 "ldo6_3p3\n", __func__);
1302 regulator_set_optimum_mode(ldo7_1p8,
1303 USB_PHY_1P8_LPM_LOAD);
1304 return ret;
1305 }
1306 } else {
1307 ret = regulator_set_optimum_mode(ldo7_1p8,
1308 USB_PHY_1P8_LPM_LOAD);
1309 if (ret < 0)
1310 pr_err("%s: Unable to set LPM of the regulator:"
1311 "ldo7_1p8\n", __func__);
1312 ret = regulator_set_optimum_mode(ldo6_3p3,
1313 USB_PHY_3P3_LPM_LOAD);
1314 if (ret < 0)
1315 pr_err("%s: Unable to set LPM of the regulator:"
1316 "ldo6_3p3\n", __func__);
1317 }
1318
1319 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1320 return ret < 0 ? ret : 0;
1321 }
1322#endif
1323#ifdef CONFIG_USB_EHCI_MSM_72K
1324#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1325static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1326{
1327 static int vbus_is_on;
1328
1329 /* If VBUS is already on (or off), do nothing. */
1330 if (on == vbus_is_on)
1331 return;
1332 smb137b_otg_power(on);
1333 vbus_is_on = on;
1334}
1335#endif
1336static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1337{
1338 static struct regulator *votg_5v_switch;
1339 static struct regulator *ext_5v_reg;
1340 static int vbus_is_on;
1341
1342 /* If VBUS is already on (or off), do nothing. */
1343 if (on == vbus_is_on)
1344 return;
1345
1346 if (!votg_5v_switch) {
1347 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1348 if (IS_ERR(votg_5v_switch)) {
1349 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1350 return;
1351 }
1352 }
1353 if (!ext_5v_reg) {
1354 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1355 if (IS_ERR(ext_5v_reg)) {
1356 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1357 return;
1358 }
1359 }
1360 if (on) {
1361 if (regulator_enable(ext_5v_reg)) {
1362 pr_err("%s: Unable to enable the regulator:"
1363 " ext_5v_reg\n", __func__);
1364 return;
1365 }
1366 if (regulator_enable(votg_5v_switch)) {
1367 pr_err("%s: Unable to enable the regulator:"
1368 " votg_5v_switch\n", __func__);
1369 return;
1370 }
1371 } else {
1372 if (regulator_disable(votg_5v_switch))
1373 pr_err("%s: Unable to enable the regulator:"
1374 " votg_5v_switch\n", __func__);
1375 if (regulator_disable(ext_5v_reg))
1376 pr_err("%s: Unable to enable the regulator:"
1377 " ext_5v_reg\n", __func__);
1378 }
1379
1380 vbus_is_on = on;
1381}
1382
1383static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1384 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1385 .power_budget = 390,
1386};
1387#endif
1388
1389#ifdef CONFIG_BATTERY_MSM8X60
1390static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1391 int init)
1392{
1393 int ret = -ENOTSUPP;
1394
1395#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1396 if (machine_is_msm8x60_fluid()) {
1397 if (init)
1398 msm_charger_register_vbus_sn(callback);
1399 else
1400 msm_charger_unregister_vbus_sn(callback);
1401 return 0;
1402 }
1403#endif
1404 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1405 * hence, irrespective of either peripheral only mode or
1406 * OTG (host and peripheral) modes, can depend on pmic for
1407 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001408 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001409 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1410 && (machine_is_msm8x60_surf() ||
1411 pmic_id_notif_supported)) {
1412 if (init)
1413 ret = msm_charger_register_vbus_sn(callback);
1414 else {
1415 msm_charger_unregister_vbus_sn(callback);
1416 ret = 0;
1417 }
1418 } else {
1419#if !defined(CONFIG_USB_EHCI_MSM_72K)
1420 if (init)
1421 ret = msm_charger_register_vbus_sn(callback);
1422 else {
1423 msm_charger_unregister_vbus_sn(callback);
1424 ret = 0;
1425 }
1426#endif
1427 }
1428 return ret;
1429}
1430#endif
1431
1432#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
1433static struct msm_otg_platform_data msm_otg_pdata = {
1434 /* if usb link is in sps there is no need for
1435 * usb pclk as dayatona fabric clock will be
1436 * used instead
1437 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001438 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1439 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1440 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301441 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001442#ifdef CONFIG_USB_EHCI_MSM_72K
1443 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301444 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001445#endif
1446#ifdef CONFIG_USB_EHCI_MSM_72K
1447 .vbus_power = msm_hsusb_vbus_power,
1448#endif
1449#ifdef CONFIG_BATTERY_MSM8X60
1450 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1451#endif
1452 .ldo_init = msm_hsusb_ldo_init,
1453 .ldo_enable = msm_hsusb_ldo_enable,
1454 .config_vddcx = msm_hsusb_config_vddcx,
1455 .init_vddcx = msm_hsusb_init_vddcx,
1456#ifdef CONFIG_BATTERY_MSM8X60
1457 .chg_vbus_draw = msm_charger_vbus_draw,
1458#endif
1459};
1460#endif
1461
1462#ifdef CONFIG_USB_GADGET_MSM_72K
1463static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1464 .is_phy_status_timer_on = 1,
1465};
1466#endif
1467
1468#ifdef CONFIG_USB_G_ANDROID
1469
1470#define PID_MAGIC_ID 0x71432909
1471#define SERIAL_NUM_MAGIC_ID 0x61945374
1472#define SERIAL_NUMBER_LENGTH 127
1473#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1474
1475struct magic_num_struct {
1476 uint32_t pid;
1477 uint32_t serial_num;
1478};
1479
1480struct dload_struct {
1481 uint32_t reserved1;
1482 uint32_t reserved2;
1483 uint32_t reserved3;
1484 uint16_t reserved4;
1485 uint16_t pid;
1486 char serial_number[SERIAL_NUMBER_LENGTH];
1487 uint16_t reserved5;
1488 struct magic_num_struct
1489 magic_struct;
1490};
1491
1492static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1493{
1494 struct dload_struct __iomem *dload = 0;
1495
1496 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1497 if (!dload) {
1498 pr_err("%s: cannot remap I/O memory region: %08x\n",
1499 __func__, DLOAD_USB_BASE_ADD);
1500 return -ENXIO;
1501 }
1502
1503 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1504 __func__, dload, pid, snum);
1505 /* update pid */
1506 dload->magic_struct.pid = PID_MAGIC_ID;
1507 dload->pid = pid;
1508
1509 /* update serial number */
1510 dload->magic_struct.serial_num = 0;
1511 if (!snum)
1512 return 0;
1513
1514 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1515 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1516 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1517
1518 iounmap(dload);
1519
1520 return 0;
1521}
1522
1523static struct android_usb_platform_data android_usb_pdata = {
1524 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1525};
1526
1527static struct platform_device android_usb_device = {
1528 .name = "android_usb",
1529 .id = -1,
1530 .dev = {
1531 .platform_data = &android_usb_pdata,
1532 },
1533};
1534
1535
1536#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001537
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001538#ifdef CONFIG_MSM_VPE
1539static struct resource msm_vpe_resources[] = {
1540 {
1541 .start = 0x05300000,
1542 .end = 0x05300000 + SZ_1M - 1,
1543 .flags = IORESOURCE_MEM,
1544 },
1545 {
1546 .start = INT_VPE,
1547 .end = INT_VPE,
1548 .flags = IORESOURCE_IRQ,
1549 },
1550};
1551
1552static struct platform_device msm_vpe_device = {
1553 .name = "msm_vpe",
1554 .id = 0,
1555 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1556 .resource = msm_vpe_resources,
1557};
1558#endif
1559
1560#ifdef CONFIG_MSM_CAMERA
1561#ifdef CONFIG_MSM_CAMERA_FLASH
1562#define VFE_CAMIF_TIMER1_GPIO 29
1563#define VFE_CAMIF_TIMER2_GPIO 30
1564#define VFE_CAMIF_TIMER3_GPIO_INT 31
1565#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1566static struct msm_camera_sensor_flash_src msm_flash_src = {
1567 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1568 ._fsrc.pmic_src.num_of_src = 2,
1569 ._fsrc.pmic_src.low_current = 100,
1570 ._fsrc.pmic_src.high_current = 300,
1571 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1572 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1573 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1574};
1575#ifdef CONFIG_IMX074
1576static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1577 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1578 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1579 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1580 .flash_recharge_duration = 50000,
1581 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1582};
1583#endif
1584#endif
1585
1586int msm_cam_gpio_tbl[] = {
1587 32,/*CAMIF_MCLK*/
1588 47,/*CAMIF_I2C_DATA*/
1589 48,/*CAMIF_I2C_CLK*/
1590 105,/*STANDBY*/
1591};
1592
1593enum msm_cam_stat{
1594 MSM_CAM_OFF,
1595 MSM_CAM_ON,
1596};
1597
1598static int config_gpio_table(enum msm_cam_stat stat)
1599{
1600 int rc = 0, i = 0;
1601 if (stat == MSM_CAM_ON) {
1602 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1603 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1604 if (unlikely(rc < 0)) {
1605 pr_err("%s not able to get gpio\n", __func__);
1606 for (i--; i >= 0; i--)
1607 gpio_free(msm_cam_gpio_tbl[i]);
1608 break;
1609 }
1610 }
1611 } else {
1612 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1613 gpio_free(msm_cam_gpio_tbl[i]);
1614 }
1615 return rc;
1616}
1617
1618static struct msm_camera_sensor_platform_info sensor_board_info = {
1619 .mount_angle = 0
1620};
1621
1622/*external regulator VREG_5V*/
1623static struct regulator *reg_flash_5V;
1624
1625static int config_camera_on_gpios_fluid(void)
1626{
1627 int rc = 0;
1628
1629 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1630 if (IS_ERR(reg_flash_5V)) {
1631 pr_err("'%s' regulator not found, rc=%ld\n",
1632 "8901_mpp0", IS_ERR(reg_flash_5V));
1633 return -ENODEV;
1634 }
1635
1636 rc = regulator_enable(reg_flash_5V);
1637 if (rc) {
1638 pr_err("'%s' regulator enable failed, rc=%d\n",
1639 "8901_mpp0", rc);
1640 regulator_put(reg_flash_5V);
1641 return rc;
1642 }
1643
1644#ifdef CONFIG_IMX074
1645 sensor_board_info.mount_angle = 90;
1646#endif
1647 rc = config_gpio_table(MSM_CAM_ON);
1648 if (rc < 0) {
1649 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1650 "failed\n", __func__);
1651 return rc;
1652 }
1653
1654 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1655 if (rc < 0) {
1656 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1657 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1658 regulator_disable(reg_flash_5V);
1659 regulator_put(reg_flash_5V);
1660 return rc;
1661 }
1662 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1663 msleep(20);
1664 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1665
1666
1667 /*Enable LED_FLASH_EN*/
1668 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1669 if (rc < 0) {
1670 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1671 "failed\n", __func__, GPIO_LED_FLASH_EN);
1672
1673 regulator_disable(reg_flash_5V);
1674 regulator_put(reg_flash_5V);
1675 config_gpio_table(MSM_CAM_OFF);
1676 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1677 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1678 return rc;
1679 }
1680 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1681 msleep(20);
1682 return rc;
1683}
1684
1685
1686static void config_camera_off_gpios_fluid(void)
1687{
1688 regulator_disable(reg_flash_5V);
1689 regulator_put(reg_flash_5V);
1690
1691 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1692 gpio_free(GPIO_LED_FLASH_EN);
1693
1694 config_gpio_table(MSM_CAM_OFF);
1695
1696 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1697 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1698}
1699static int config_camera_on_gpios(void)
1700{
1701 int rc = 0;
1702
1703 if (machine_is_msm8x60_fluid())
1704 return config_camera_on_gpios_fluid();
1705
1706 rc = config_gpio_table(MSM_CAM_ON);
1707 if (rc < 0) {
1708 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1709 "failed\n", __func__);
1710 return rc;
1711 }
1712
Jilai Wang971f97f2011-07-13 14:25:25 -04001713 if (!machine_is_msm8x60_dragon()) {
1714 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1715 if (rc < 0) {
1716 config_gpio_table(MSM_CAM_OFF);
1717 pr_err("%s: CAMSENSOR gpio %d request"
1718 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1719 return rc;
1720 }
1721 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1722 msleep(20);
1723 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001724 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001725
1726#ifdef CONFIG_MSM_CAMERA_FLASH
1727#ifdef CONFIG_IMX074
1728 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1729 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1730#endif
1731#endif
1732 return rc;
1733}
1734
1735static void config_camera_off_gpios(void)
1736{
1737 if (machine_is_msm8x60_fluid())
1738 return config_camera_off_gpios_fluid();
1739
1740
1741 config_gpio_table(MSM_CAM_OFF);
1742
Jilai Wang971f97f2011-07-13 14:25:25 -04001743 if (!machine_is_msm8x60_dragon()) {
1744 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1745 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1746 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001747}
1748
1749#ifdef CONFIG_QS_S5K4E1
1750
1751#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1752
1753static int config_camera_on_gpios_qs_cam_fluid(void)
1754{
1755 int rc = 0;
1756
1757 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1758 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1759 if (rc < 0) {
1760 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1761 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1762 return rc;
1763 }
1764 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1765 msleep(20);
1766 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1767 msleep(20);
1768
1769 /*
1770 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1771 * to enable 2.7V power to Camera
1772 */
1773 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1774 if (rc < 0) {
1775 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1776 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1777 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1778 gpio_free(QS_CAM_HC37_CAM_PD);
1779 return rc;
1780 }
1781 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1782 msleep(20);
1783 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1784 msleep(20);
1785
1786 rc = config_camera_on_gpios_fluid();
1787 if (rc < 0) {
1788 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1789 " failed\n", __func__);
1790 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1791 gpio_free(QS_CAM_HC37_CAM_PD);
1792 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1793 gpio_free(GPIO_AUX_CAM_2P7_EN);
1794 return rc;
1795 }
1796 return rc;
1797}
1798
1799static void config_camera_off_gpios_qs_cam_fluid(void)
1800{
1801 /*
1802 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1803 * to disable 2.7V power to Camera
1804 */
1805 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1806 gpio_free(GPIO_AUX_CAM_2P7_EN);
1807
1808 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1809 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1810 gpio_free(QS_CAM_HC37_CAM_PD);
1811
1812 config_camera_off_gpios_fluid();
1813 return;
1814}
1815
1816static int config_camera_on_gpios_qs_cam(void)
1817{
1818 int rc = 0;
1819
1820 if (machine_is_msm8x60_fluid())
1821 return config_camera_on_gpios_qs_cam_fluid();
1822
1823 rc = config_camera_on_gpios();
1824 return rc;
1825}
1826
1827static void config_camera_off_gpios_qs_cam(void)
1828{
1829 if (machine_is_msm8x60_fluid())
1830 return config_camera_off_gpios_qs_cam_fluid();
1831
1832 config_camera_off_gpios();
1833 return;
1834}
1835#endif
1836
1837static int config_camera_on_gpios_web_cam(void)
1838{
1839 int rc = 0;
1840 rc = config_gpio_table(MSM_CAM_ON);
1841 if (rc < 0) {
1842 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1843 "failed\n", __func__);
1844 return rc;
1845 }
1846
Jilai Wang53d27a82011-07-13 14:32:58 -04001847 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001848 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1849 if (rc < 0) {
1850 config_gpio_table(MSM_CAM_OFF);
1851 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1852 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1853 return rc;
1854 }
1855 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1856 }
1857 return rc;
1858}
1859
1860static void config_camera_off_gpios_web_cam(void)
1861{
1862 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001863 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001864 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1865 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1866 }
1867 return;
1868}
1869
1870#ifdef CONFIG_MSM_BUS_SCALING
1871static struct msm_bus_vectors cam_init_vectors[] = {
1872 {
1873 .src = MSM_BUS_MASTER_VFE,
1874 .dst = MSM_BUS_SLAVE_SMI,
1875 .ab = 0,
1876 .ib = 0,
1877 },
1878 {
1879 .src = MSM_BUS_MASTER_VFE,
1880 .dst = MSM_BUS_SLAVE_EBI_CH0,
1881 .ab = 0,
1882 .ib = 0,
1883 },
1884 {
1885 .src = MSM_BUS_MASTER_VPE,
1886 .dst = MSM_BUS_SLAVE_SMI,
1887 .ab = 0,
1888 .ib = 0,
1889 },
1890 {
1891 .src = MSM_BUS_MASTER_VPE,
1892 .dst = MSM_BUS_SLAVE_EBI_CH0,
1893 .ab = 0,
1894 .ib = 0,
1895 },
1896 {
1897 .src = MSM_BUS_MASTER_JPEG_ENC,
1898 .dst = MSM_BUS_SLAVE_SMI,
1899 .ab = 0,
1900 .ib = 0,
1901 },
1902 {
1903 .src = MSM_BUS_MASTER_JPEG_ENC,
1904 .dst = MSM_BUS_SLAVE_EBI_CH0,
1905 .ab = 0,
1906 .ib = 0,
1907 },
1908};
1909
1910static struct msm_bus_vectors cam_preview_vectors[] = {
1911 {
1912 .src = MSM_BUS_MASTER_VFE,
1913 .dst = MSM_BUS_SLAVE_SMI,
1914 .ab = 0,
1915 .ib = 0,
1916 },
1917 {
1918 .src = MSM_BUS_MASTER_VFE,
1919 .dst = MSM_BUS_SLAVE_EBI_CH0,
1920 .ab = 283115520,
1921 .ib = 452984832,
1922 },
1923 {
1924 .src = MSM_BUS_MASTER_VPE,
1925 .dst = MSM_BUS_SLAVE_SMI,
1926 .ab = 0,
1927 .ib = 0,
1928 },
1929 {
1930 .src = MSM_BUS_MASTER_VPE,
1931 .dst = MSM_BUS_SLAVE_EBI_CH0,
1932 .ab = 0,
1933 .ib = 0,
1934 },
1935 {
1936 .src = MSM_BUS_MASTER_JPEG_ENC,
1937 .dst = MSM_BUS_SLAVE_SMI,
1938 .ab = 0,
1939 .ib = 0,
1940 },
1941 {
1942 .src = MSM_BUS_MASTER_JPEG_ENC,
1943 .dst = MSM_BUS_SLAVE_EBI_CH0,
1944 .ab = 0,
1945 .ib = 0,
1946 },
1947};
1948
1949static struct msm_bus_vectors cam_video_vectors[] = {
1950 {
1951 .src = MSM_BUS_MASTER_VFE,
1952 .dst = MSM_BUS_SLAVE_SMI,
1953 .ab = 283115520,
1954 .ib = 452984832,
1955 },
1956 {
1957 .src = MSM_BUS_MASTER_VFE,
1958 .dst = MSM_BUS_SLAVE_EBI_CH0,
1959 .ab = 283115520,
1960 .ib = 452984832,
1961 },
1962 {
1963 .src = MSM_BUS_MASTER_VPE,
1964 .dst = MSM_BUS_SLAVE_SMI,
1965 .ab = 319610880,
1966 .ib = 511377408,
1967 },
1968 {
1969 .src = MSM_BUS_MASTER_VPE,
1970 .dst = MSM_BUS_SLAVE_EBI_CH0,
1971 .ab = 0,
1972 .ib = 0,
1973 },
1974 {
1975 .src = MSM_BUS_MASTER_JPEG_ENC,
1976 .dst = MSM_BUS_SLAVE_SMI,
1977 .ab = 0,
1978 .ib = 0,
1979 },
1980 {
1981 .src = MSM_BUS_MASTER_JPEG_ENC,
1982 .dst = MSM_BUS_SLAVE_EBI_CH0,
1983 .ab = 0,
1984 .ib = 0,
1985 },
1986};
1987
1988static struct msm_bus_vectors cam_snapshot_vectors[] = {
1989 {
1990 .src = MSM_BUS_MASTER_VFE,
1991 .dst = MSM_BUS_SLAVE_SMI,
1992 .ab = 566231040,
1993 .ib = 905969664,
1994 },
1995 {
1996 .src = MSM_BUS_MASTER_VFE,
1997 .dst = MSM_BUS_SLAVE_EBI_CH0,
1998 .ab = 69984000,
1999 .ib = 111974400,
2000 },
2001 {
2002 .src = MSM_BUS_MASTER_VPE,
2003 .dst = MSM_BUS_SLAVE_SMI,
2004 .ab = 0,
2005 .ib = 0,
2006 },
2007 {
2008 .src = MSM_BUS_MASTER_VPE,
2009 .dst = MSM_BUS_SLAVE_EBI_CH0,
2010 .ab = 0,
2011 .ib = 0,
2012 },
2013 {
2014 .src = MSM_BUS_MASTER_JPEG_ENC,
2015 .dst = MSM_BUS_SLAVE_SMI,
2016 .ab = 320864256,
2017 .ib = 513382810,
2018 },
2019 {
2020 .src = MSM_BUS_MASTER_JPEG_ENC,
2021 .dst = MSM_BUS_SLAVE_EBI_CH0,
2022 .ab = 320864256,
2023 .ib = 513382810,
2024 },
2025};
2026
2027static struct msm_bus_vectors cam_zsl_vectors[] = {
2028 {
2029 .src = MSM_BUS_MASTER_VFE,
2030 .dst = MSM_BUS_SLAVE_SMI,
2031 .ab = 566231040,
2032 .ib = 905969664,
2033 },
2034 {
2035 .src = MSM_BUS_MASTER_VFE,
2036 .dst = MSM_BUS_SLAVE_EBI_CH0,
2037 .ab = 706199040,
2038 .ib = 1129918464,
2039 },
2040 {
2041 .src = MSM_BUS_MASTER_VPE,
2042 .dst = MSM_BUS_SLAVE_SMI,
2043 .ab = 0,
2044 .ib = 0,
2045 },
2046 {
2047 .src = MSM_BUS_MASTER_VPE,
2048 .dst = MSM_BUS_SLAVE_EBI_CH0,
2049 .ab = 0,
2050 .ib = 0,
2051 },
2052 {
2053 .src = MSM_BUS_MASTER_JPEG_ENC,
2054 .dst = MSM_BUS_SLAVE_SMI,
2055 .ab = 320864256,
2056 .ib = 513382810,
2057 },
2058 {
2059 .src = MSM_BUS_MASTER_JPEG_ENC,
2060 .dst = MSM_BUS_SLAVE_EBI_CH0,
2061 .ab = 320864256,
2062 .ib = 513382810,
2063 },
2064};
2065
2066static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2067 {
2068 .src = MSM_BUS_MASTER_VFE,
2069 .dst = MSM_BUS_SLAVE_SMI,
2070 .ab = 212336640,
2071 .ib = 339738624,
2072 },
2073 {
2074 .src = MSM_BUS_MASTER_VFE,
2075 .dst = MSM_BUS_SLAVE_EBI_CH0,
2076 .ab = 25090560,
2077 .ib = 40144896,
2078 },
2079 {
2080 .src = MSM_BUS_MASTER_VPE,
2081 .dst = MSM_BUS_SLAVE_SMI,
2082 .ab = 239708160,
2083 .ib = 383533056,
2084 },
2085 {
2086 .src = MSM_BUS_MASTER_VPE,
2087 .dst = MSM_BUS_SLAVE_EBI_CH0,
2088 .ab = 79902720,
2089 .ib = 127844352,
2090 },
2091 {
2092 .src = MSM_BUS_MASTER_JPEG_ENC,
2093 .dst = MSM_BUS_SLAVE_SMI,
2094 .ab = 0,
2095 .ib = 0,
2096 },
2097 {
2098 .src = MSM_BUS_MASTER_JPEG_ENC,
2099 .dst = MSM_BUS_SLAVE_EBI_CH0,
2100 .ab = 0,
2101 .ib = 0,
2102 },
2103};
2104
2105static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2106 {
2107 .src = MSM_BUS_MASTER_VFE,
2108 .dst = MSM_BUS_SLAVE_SMI,
2109 .ab = 0,
2110 .ib = 0,
2111 },
2112 {
2113 .src = MSM_BUS_MASTER_VFE,
2114 .dst = MSM_BUS_SLAVE_EBI_CH0,
2115 .ab = 300902400,
2116 .ib = 481443840,
2117 },
2118 {
2119 .src = MSM_BUS_MASTER_VPE,
2120 .dst = MSM_BUS_SLAVE_SMI,
2121 .ab = 230307840,
2122 .ib = 368492544,
2123 },
2124 {
2125 .src = MSM_BUS_MASTER_VPE,
2126 .dst = MSM_BUS_SLAVE_EBI_CH0,
2127 .ab = 245113344,
2128 .ib = 392181351,
2129 },
2130 {
2131 .src = MSM_BUS_MASTER_JPEG_ENC,
2132 .dst = MSM_BUS_SLAVE_SMI,
2133 .ab = 106536960,
2134 .ib = 170459136,
2135 },
2136 {
2137 .src = MSM_BUS_MASTER_JPEG_ENC,
2138 .dst = MSM_BUS_SLAVE_EBI_CH0,
2139 .ab = 106536960,
2140 .ib = 170459136,
2141 },
2142};
2143
2144static struct msm_bus_paths cam_bus_client_config[] = {
2145 {
2146 ARRAY_SIZE(cam_init_vectors),
2147 cam_init_vectors,
2148 },
2149 {
2150 ARRAY_SIZE(cam_preview_vectors),
2151 cam_preview_vectors,
2152 },
2153 {
2154 ARRAY_SIZE(cam_video_vectors),
2155 cam_video_vectors,
2156 },
2157 {
2158 ARRAY_SIZE(cam_snapshot_vectors),
2159 cam_snapshot_vectors,
2160 },
2161 {
2162 ARRAY_SIZE(cam_zsl_vectors),
2163 cam_zsl_vectors,
2164 },
2165 {
2166 ARRAY_SIZE(cam_stereo_video_vectors),
2167 cam_stereo_video_vectors,
2168 },
2169 {
2170 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2171 cam_stereo_snapshot_vectors,
2172 },
2173};
2174
2175static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2176 cam_bus_client_config,
2177 ARRAY_SIZE(cam_bus_client_config),
2178 .name = "msm_camera",
2179};
2180#endif
2181
2182struct msm_camera_device_platform_data msm_camera_device_data = {
2183 .camera_gpio_on = config_camera_on_gpios,
2184 .camera_gpio_off = config_camera_off_gpios,
2185 .ioext.csiphy = 0x04800000,
2186 .ioext.csisz = 0x00000400,
2187 .ioext.csiirq = CSI_0_IRQ,
2188 .ioclk.mclk_clk_rate = 24000000,
2189 .ioclk.vfe_clk_rate = 228570000,
2190#ifdef CONFIG_MSM_BUS_SCALING
2191 .cam_bus_scale_table = &cam_bus_client_pdata,
2192#endif
2193};
2194
2195#ifdef CONFIG_QS_S5K4E1
2196struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2197 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2198 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2199 .ioext.csiphy = 0x04800000,
2200 .ioext.csisz = 0x00000400,
2201 .ioext.csiirq = CSI_0_IRQ,
2202 .ioclk.mclk_clk_rate = 24000000,
2203 .ioclk.vfe_clk_rate = 228570000,
2204#ifdef CONFIG_MSM_BUS_SCALING
2205 .cam_bus_scale_table = &cam_bus_client_pdata,
2206#endif
2207};
2208#endif
2209
2210struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2211 .camera_gpio_on = config_camera_on_gpios_web_cam,
2212 .camera_gpio_off = config_camera_off_gpios_web_cam,
2213 .ioext.csiphy = 0x04900000,
2214 .ioext.csisz = 0x00000400,
2215 .ioext.csiirq = CSI_1_IRQ,
2216 .ioclk.mclk_clk_rate = 24000000,
2217 .ioclk.vfe_clk_rate = 228570000,
2218#ifdef CONFIG_MSM_BUS_SCALING
2219 .cam_bus_scale_table = &cam_bus_client_pdata,
2220#endif
2221};
2222
2223struct resource msm_camera_resources[] = {
2224 {
2225 .start = 0x04500000,
2226 .end = 0x04500000 + SZ_1M - 1,
2227 .flags = IORESOURCE_MEM,
2228 },
2229 {
2230 .start = VFE_IRQ,
2231 .end = VFE_IRQ,
2232 .flags = IORESOURCE_IRQ,
2233 },
2234};
2235#ifdef CONFIG_MT9E013
2236static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2237 .mount_angle = 0
2238};
2239
2240static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2241 .flash_type = MSM_CAMERA_FLASH_LED,
2242 .flash_src = &msm_flash_src
2243};
2244
2245static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2246 .sensor_name = "mt9e013",
2247 .sensor_reset = 106,
2248 .sensor_pwd = 85,
2249 .vcm_pwd = 1,
2250 .vcm_enable = 0,
2251 .pdata = &msm_camera_device_data,
2252 .resource = msm_camera_resources,
2253 .num_resources = ARRAY_SIZE(msm_camera_resources),
2254 .flash_data = &flash_mt9e013,
2255 .strobe_flash_data = &strobe_flash_xenon,
2256 .sensor_platform_info = &mt9e013_sensor_8660_info,
2257 .csi_if = 1
2258};
2259struct platform_device msm_camera_sensor_mt9e013 = {
2260 .name = "msm_camera_mt9e013",
2261 .dev = {
2262 .platform_data = &msm_camera_sensor_mt9e013_data,
2263 },
2264};
2265#endif
2266
2267#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302268static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2269 .mount_angle = 180
2270};
2271
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002272static struct msm_camera_sensor_flash_data flash_imx074 = {
2273 .flash_type = MSM_CAMERA_FLASH_LED,
2274 .flash_src = &msm_flash_src
2275};
2276
2277static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2278 .sensor_name = "imx074",
2279 .sensor_reset = 106,
2280 .sensor_pwd = 85,
2281 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2282 .vcm_enable = 1,
2283 .pdata = &msm_camera_device_data,
2284 .resource = msm_camera_resources,
2285 .num_resources = ARRAY_SIZE(msm_camera_resources),
2286 .flash_data = &flash_imx074,
2287 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302288 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002289 .csi_if = 1
2290};
2291struct platform_device msm_camera_sensor_imx074 = {
2292 .name = "msm_camera_imx074",
2293 .dev = {
2294 .platform_data = &msm_camera_sensor_imx074_data,
2295 },
2296};
2297#endif
2298#ifdef CONFIG_WEBCAM_OV9726
2299
2300static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2301 .mount_angle = 0
2302};
2303
2304static struct msm_camera_sensor_flash_data flash_ov9726 = {
2305 .flash_type = MSM_CAMERA_FLASH_LED,
2306 .flash_src = &msm_flash_src
2307};
2308static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2309 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002310 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002311 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2312 .sensor_pwd = 85,
2313 .vcm_pwd = 1,
2314 .vcm_enable = 0,
2315 .pdata = &msm_camera_device_data_web_cam,
2316 .resource = msm_camera_resources,
2317 .num_resources = ARRAY_SIZE(msm_camera_resources),
2318 .flash_data = &flash_ov9726,
2319 .sensor_platform_info = &ov9726_sensor_8660_info,
2320 .csi_if = 1
2321};
2322struct platform_device msm_camera_sensor_webcam_ov9726 = {
2323 .name = "msm_camera_ov9726",
2324 .dev = {
2325 .platform_data = &msm_camera_sensor_ov9726_data,
2326 },
2327};
2328#endif
2329#ifdef CONFIG_WEBCAM_OV7692
2330static struct msm_camera_sensor_flash_data flash_ov7692 = {
2331 .flash_type = MSM_CAMERA_FLASH_LED,
2332 .flash_src = &msm_flash_src
2333};
2334static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2335 .sensor_name = "ov7692",
2336 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2337 .sensor_pwd = 85,
2338 .vcm_pwd = 1,
2339 .vcm_enable = 0,
2340 .pdata = &msm_camera_device_data_web_cam,
2341 .resource = msm_camera_resources,
2342 .num_resources = ARRAY_SIZE(msm_camera_resources),
2343 .flash_data = &flash_ov7692,
2344 .csi_if = 1
2345};
2346
2347static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2348 .name = "msm_camera_ov7692",
2349 .dev = {
2350 .platform_data = &msm_camera_sensor_ov7692_data,
2351 },
2352};
2353#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002354#ifdef CONFIG_VX6953
2355static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2356 .mount_angle = 270
2357};
2358
2359static struct msm_camera_sensor_flash_data flash_vx6953 = {
2360 .flash_type = MSM_CAMERA_FLASH_NONE,
2361 .flash_src = &msm_flash_src
2362};
2363
2364static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2365 .sensor_name = "vx6953",
2366 .sensor_reset = 63,
2367 .sensor_pwd = 63,
2368 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2369 .vcm_enable = 1,
2370 .pdata = &msm_camera_device_data,
2371 .resource = msm_camera_resources,
2372 .num_resources = ARRAY_SIZE(msm_camera_resources),
2373 .flash_data = &flash_vx6953,
2374 .sensor_platform_info = &vx6953_sensor_8660_info,
2375 .csi_if = 1
2376};
2377struct platform_device msm_camera_sensor_vx6953 = {
2378 .name = "msm_camera_vx6953",
2379 .dev = {
2380 .platform_data = &msm_camera_sensor_vx6953_data,
2381 },
2382};
2383#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002384#ifdef CONFIG_QS_S5K4E1
2385
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302386static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2387#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2388 .mount_angle = 90
2389#else
2390 .mount_angle = 0
2391#endif
2392};
2393
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002394static char eeprom_data[864];
2395static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2396 .flash_type = MSM_CAMERA_FLASH_LED,
2397 .flash_src = &msm_flash_src
2398};
2399
2400static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2401 .sensor_name = "qs_s5k4e1",
2402 .sensor_reset = 106,
2403 .sensor_pwd = 85,
2404 .vcm_pwd = 1,
2405 .vcm_enable = 0,
2406 .pdata = &msm_camera_device_data_qs_cam,
2407 .resource = msm_camera_resources,
2408 .num_resources = ARRAY_SIZE(msm_camera_resources),
2409 .flash_data = &flash_qs_s5k4e1,
2410 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302411 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002412 .csi_if = 1,
2413 .eeprom_data = eeprom_data,
2414};
2415struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2416 .name = "msm_camera_qs_s5k4e1",
2417 .dev = {
2418 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2419 },
2420};
2421#endif
2422static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2423 #ifdef CONFIG_MT9E013
2424 {
2425 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2426 },
2427 #endif
2428 #ifdef CONFIG_IMX074
2429 {
2430 I2C_BOARD_INFO("imx074", 0x1A),
2431 },
2432 #endif
2433 #ifdef CONFIG_WEBCAM_OV7692
2434 {
2435 I2C_BOARD_INFO("ov7692", 0x78),
2436 },
2437 #endif
2438 #ifdef CONFIG_WEBCAM_OV9726
2439 {
2440 I2C_BOARD_INFO("ov9726", 0x10),
2441 },
2442 #endif
2443 #ifdef CONFIG_QS_S5K4E1
2444 {
2445 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2446 },
2447 #endif
2448};
Jilai Wang971f97f2011-07-13 14:25:25 -04002449
2450static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002451 #ifdef CONFIG_WEBCAM_OV9726
2452 {
2453 I2C_BOARD_INFO("ov9726", 0x10),
2454 },
2455 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002456 #ifdef CONFIG_VX6953
2457 {
2458 I2C_BOARD_INFO("vx6953", 0x20),
2459 },
2460 #endif
2461};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002462#endif
2463
2464#ifdef CONFIG_MSM_GEMINI
2465static struct resource msm_gemini_resources[] = {
2466 {
2467 .start = 0x04600000,
2468 .end = 0x04600000 + SZ_1M - 1,
2469 .flags = IORESOURCE_MEM,
2470 },
2471 {
2472 .start = INT_JPEG,
2473 .end = INT_JPEG,
2474 .flags = IORESOURCE_IRQ,
2475 },
2476};
2477
2478static struct platform_device msm_gemini_device = {
2479 .name = "msm_gemini",
2480 .resource = msm_gemini_resources,
2481 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2482};
2483#endif
2484
2485#ifdef CONFIG_I2C_QUP
2486static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2487{
2488}
2489
2490static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2491 .clk_freq = 384000,
2492 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002493 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2494};
2495
2496static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2497 .clk_freq = 100000,
2498 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002499 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2500};
2501
2502static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2503 .clk_freq = 100000,
2504 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002505 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2506};
2507
2508static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2509 .clk_freq = 100000,
2510 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002511 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2512};
2513
2514static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2515 .clk_freq = 100000,
2516 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002517 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2518};
2519
2520static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2521 .clk_freq = 100000,
2522 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002523 .use_gsbi_shared_mode = 1,
2524 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2525};
2526#endif
2527
2528#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2529static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2530 .max_clock_speed = 24000000,
2531};
2532
2533static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2534 .max_clock_speed = 24000000,
2535};
2536#endif
2537
2538#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002539/* CODEC/TSSC SSBI */
2540static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2541 .controller_type = MSM_SBI_CTRL_SSBI,
2542};
2543#endif
2544
2545#ifdef CONFIG_BATTERY_MSM
2546/* Use basic value for fake MSM battery */
2547static struct msm_psy_batt_pdata msm_psy_batt_data = {
2548 .avail_chg_sources = AC_CHG,
2549};
2550
2551static struct platform_device msm_batt_device = {
2552 .name = "msm-battery",
2553 .id = -1,
2554 .dev.platform_data = &msm_psy_batt_data,
2555};
2556#endif
2557
2558#ifdef CONFIG_FB_MSM_LCDC_DSUB
2559/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2560 prim = 1024 x 600 x 4(bpp) x 2(pages)
2561 This is the difference. */
2562#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2563#else
2564#define MSM_FB_DSUB_PMEM_ADDER (0)
2565#endif
2566
2567/* Sensors DSPS platform data */
2568#ifdef CONFIG_MSM_DSPS
2569
2570static struct dsps_gpio_info dsps_surf_gpios[] = {
2571 {
2572 .name = "compass_rst_n",
2573 .num = GPIO_COMPASS_RST_N,
2574 .on_val = 1, /* device not in reset */
2575 .off_val = 0, /* device in reset */
2576 },
2577 {
2578 .name = "gpio_r_altimeter_reset_n",
2579 .num = GPIO_R_ALTIMETER_RESET_N,
2580 .on_val = 1, /* device not in reset */
2581 .off_val = 0, /* device in reset */
2582 }
2583};
2584
2585static struct dsps_gpio_info dsps_fluid_gpios[] = {
2586 {
2587 .name = "gpio_n_altimeter_reset_n",
2588 .num = GPIO_N_ALTIMETER_RESET_N,
2589 .on_val = 1, /* device not in reset */
2590 .off_val = 0, /* device in reset */
2591 }
2592};
2593
2594static void __init msm8x60_init_dsps(void)
2595{
2596 struct msm_dsps_platform_data *pdata =
2597 msm_dsps_device.dev.platform_data;
2598 /*
2599 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2600 * to the power supply and not controled via GPIOs. Fluid uses a
2601 * different IO-Expender (north) than used on surf/ffa.
2602 */
2603 if (machine_is_msm8x60_fluid()) {
2604 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002605 pdata->pil_name = DSPS_PIL_FLUID_NAME;
2606 pdata->gpios = dsps_fluid_gpios;
2607 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2608 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002609 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
2610 pdata->gpios = dsps_surf_gpios;
2611 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2612 }
2613
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002614 platform_device_register(&msm_dsps_device);
2615}
2616#endif /* CONFIG_MSM_DSPS */
2617
2618#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002619#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002620#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002621#define MSM_FB_PRIM_BUF_SIZE (1024 * 600 * 4 * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002622#endif
2623
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002624#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
2625#define MSM_FB_EXT_BUF_SIZE (1920 * 1080 * 2 * 1) /* 2 bpp x 1 page */
2626#elif defined(CONFIG_FB_MSM_TVOUT)
2627#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
2628#else
2629#define MSM_FB_EXT_BUFT_SIZE 0
2630#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002632#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2633/* 4 bpp x 2 page HDMI case */
2634#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
2635#else
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002636/* Note: must be multiple of 4096 */
2637#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002638 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002639#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002640
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002641#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
2642#define MSM_PMEM_SF_SIZE 0x8000000 /* 128 Mbytes */
2643#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002644#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002645#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002646
Huaibin Yanga5419422011-12-08 23:52:10 -08002647#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2648#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2649#else
2650#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2651#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2652
2653#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2654#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2655#else
2656#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2657#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2658
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002659#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2660#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002661#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002662
2663#define MSM_SMI_BASE 0x38000000
2664#define MSM_SMI_SIZE 0x4000000
2665
2666#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002667#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002668
2669#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2670#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2671#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2672
Olav Hauganb5be7992011-11-18 14:29:02 -08002673#define MSM_ION_SF_SIZE 0x1800000 /* 24MB */
2674#define MSM_ION_CAMERA_SIZE MSM_PMEM_ADSP_SIZE
2675#define MSM_ION_MM_SIZE 0x3800000 /* 56MB */
2676#define MSM_ION_MFC_SIZE SZ_8K
2677#define MSM_ION_WB_SIZE 0x600000 /* 6MB */
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002678
2679#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Olav Hauganb5be7992011-11-18 14:29:02 -08002680#define MSM_ION_HEAP_NUM 6
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002681#else
Olav Hauganb5be7992011-11-18 14:29:02 -08002682#define MSM_ION_HEAP_NUM 1
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002683#endif
2684
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002685static unsigned fb_size;
2686static int __init fb_size_setup(char *p)
2687{
2688 fb_size = memparse(p, NULL);
2689 return 0;
2690}
2691early_param("fb_size", fb_size_setup);
2692
2693static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2694static int __init pmem_kernel_ebi1_size_setup(char *p)
2695{
2696 pmem_kernel_ebi1_size = memparse(p, NULL);
2697 return 0;
2698}
2699early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2700
2701#ifdef CONFIG_ANDROID_PMEM
2702static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2703static int __init pmem_sf_size_setup(char *p)
2704{
2705 pmem_sf_size = memparse(p, NULL);
2706 return 0;
2707}
2708early_param("pmem_sf_size", pmem_sf_size_setup);
2709
2710static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2711
2712static int __init pmem_adsp_size_setup(char *p)
2713{
2714 pmem_adsp_size = memparse(p, NULL);
2715 return 0;
2716}
2717early_param("pmem_adsp_size", pmem_adsp_size_setup);
2718
2719static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2720
2721static int __init pmem_audio_size_setup(char *p)
2722{
2723 pmem_audio_size = memparse(p, NULL);
2724 return 0;
2725}
2726early_param("pmem_audio_size", pmem_audio_size_setup);
2727#endif
2728
2729static struct resource msm_fb_resources[] = {
2730 {
2731 .flags = IORESOURCE_DMA,
2732 }
2733};
2734
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002735static int msm_fb_detect_panel(const char *name)
2736{
2737 if (machine_is_msm8x60_fluid()) {
2738 uint32_t soc_platform_version = socinfo_get_platform_version();
2739 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2740#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2741 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002742 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2743 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002744 return 0;
2745#endif
2746 } else { /*P3 and up use AUO panel */
2747#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2748 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002749 strnlen(LCDC_AUO_PANEL_NAME,
2750 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002751 return 0;
2752#endif
2753 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002754#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2755 } else if machine_is_msm8x60_dragon() {
2756 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002757 strnlen(LCDC_NT35582_PANEL_NAME,
2758 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002759 return 0;
2760#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002761 } else {
2762 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002763 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2764 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002765 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002766
2767#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2768 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2769 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2770 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2771 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2772 PANEL_NAME_MAX_LEN)))
2773 return 0;
2774
2775 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2776 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2777 PANEL_NAME_MAX_LEN)))
2778 return 0;
2779
2780 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2781 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2782 PANEL_NAME_MAX_LEN)))
2783 return 0;
2784#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002785 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002786
2787 if (!strncmp(name, HDMI_PANEL_NAME,
2788 strnlen(HDMI_PANEL_NAME,
2789 PANEL_NAME_MAX_LEN)))
2790 return 0;
2791
2792 if (!strncmp(name, TVOUT_PANEL_NAME,
2793 strnlen(TVOUT_PANEL_NAME,
2794 PANEL_NAME_MAX_LEN)))
2795 return 0;
2796
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002797 pr_warning("%s: not supported '%s'", __func__, name);
2798 return -ENODEV;
2799}
2800
2801static struct msm_fb_platform_data msm_fb_pdata = {
2802 .detect_client = msm_fb_detect_panel,
2803};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002804
2805static struct platform_device msm_fb_device = {
2806 .name = "msm_fb",
2807 .id = 0,
2808 .num_resources = ARRAY_SIZE(msm_fb_resources),
2809 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002810 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002811};
2812
2813#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002814#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002815static struct android_pmem_platform_data android_pmem_pdata = {
2816 .name = "pmem",
2817 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2818 .cached = 1,
2819 .memory_type = MEMTYPE_EBI1,
2820};
2821
2822static struct platform_device android_pmem_device = {
2823 .name = "android_pmem",
2824 .id = 0,
2825 .dev = {.platform_data = &android_pmem_pdata},
2826};
2827
2828static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2829 .name = "pmem_adsp",
2830 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2831 .cached = 0,
2832 .memory_type = MEMTYPE_EBI1,
2833};
2834
2835static struct platform_device android_pmem_adsp_device = {
2836 .name = "android_pmem",
2837 .id = 2,
2838 .dev = { .platform_data = &android_pmem_adsp_pdata },
2839};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002840#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002841static struct android_pmem_platform_data android_pmem_audio_pdata = {
2842 .name = "pmem_audio",
2843 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2844 .cached = 0,
2845 .memory_type = MEMTYPE_EBI1,
2846};
2847
2848static struct platform_device android_pmem_audio_device = {
2849 .name = "android_pmem",
2850 .id = 4,
2851 .dev = { .platform_data = &android_pmem_audio_pdata },
2852};
2853
Laura Abbott1e36a022011-06-22 17:08:13 -07002854#define PMEM_BUS_WIDTH(_bw) \
2855 { \
2856 .vectors = &(struct msm_bus_vectors){ \
2857 .src = MSM_BUS_MASTER_AMPSS_M0, \
2858 .dst = MSM_BUS_SLAVE_SMI, \
2859 .ib = (_bw), \
2860 .ab = 0, \
2861 }, \
2862 .num_paths = 1, \
2863 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002864
2865static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002866 [0] = PMEM_BUS_WIDTH(0), /* Off */
2867 [1] = PMEM_BUS_WIDTH(1), /* On */
2868};
2869
2870static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002871 .usecase = mem_smi_table,
2872 .num_usecases = ARRAY_SIZE(mem_smi_table),
2873 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002874};
2875
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002876int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002877{
2878 int bus_id = (int) data;
2879
2880 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002881 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002882}
2883
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002884int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002885{
2886 int bus_id = (int) data;
2887
2888 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002889 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002890}
2891
Alex Bird199980e2011-10-21 11:29:27 -07002892void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002893{
2894 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2895}
Olav Hauganee0f7802011-12-19 13:28:57 -08002896#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002897static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2898 .name = "pmem_smipool",
2899 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2900 .cached = 0,
2901 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002902 .request_region = request_smi_region,
2903 .release_region = release_smi_region,
2904 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002905 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002906};
2907static struct platform_device android_pmem_smipool_device = {
2908 .name = "android_pmem",
2909 .id = 7,
2910 .dev = { .platform_data = &android_pmem_smipool_pdata },
2911};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002912#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002913#endif
2914
2915#define GPIO_DONGLE_PWR_EN 258
2916static void setup_display_power(void);
2917static int lcdc_vga_enabled;
2918static int vga_enable_request(int enable)
2919{
2920 if (enable)
2921 lcdc_vga_enabled = 1;
2922 else
2923 lcdc_vga_enabled = 0;
2924 setup_display_power();
2925
2926 return 0;
2927}
2928
2929#define GPIO_BACKLIGHT_PWM0 0
2930#define GPIO_BACKLIGHT_PWM1 1
2931
2932static int pmic_backlight_gpio[2]
2933 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2934static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2935 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2936 .vga_switch = vga_enable_request,
2937};
2938
2939static struct platform_device lcdc_samsung_panel_device = {
2940 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2941 .id = 0,
2942 .dev = {
2943 .platform_data = &lcdc_samsung_panel_data,
2944 }
2945};
2946#if (!defined(CONFIG_SPI_QUP)) && \
2947 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2948 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2949
2950static int lcdc_spi_gpio_array_num[] = {
2951 LCDC_SPI_GPIO_CLK,
2952 LCDC_SPI_GPIO_CS,
2953 LCDC_SPI_GPIO_MOSI,
2954};
2955
2956static uint32_t lcdc_spi_gpio_config_data[] = {
2957 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2958 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2959 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
2960 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2961 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
2962 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2963};
2964
2965static void lcdc_config_spi_gpios(int enable)
2966{
2967 int n;
2968 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
2969 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
2970}
2971#endif
2972
2973#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2974#ifdef CONFIG_SPI_QUP
2975static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
2976 {
2977 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
2978 .mode = SPI_MODE_3,
2979 .bus_num = 1,
2980 .chip_select = 0,
2981 .max_speed_hz = 10800000,
2982 }
2983};
2984#endif /* CONFIG_SPI_QUP */
2985
2986static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
2987#ifndef CONFIG_SPI_QUP
2988 .panel_config_gpio = lcdc_config_spi_gpios,
2989 .gpio_num = lcdc_spi_gpio_array_num,
2990#endif
2991};
2992
2993static struct platform_device lcdc_samsung_oled_panel_device = {
2994 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
2995 .id = 0,
2996 .dev.platform_data = &lcdc_samsung_oled_panel_data,
2997};
2998#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
2999
3000#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
3001#ifdef CONFIG_SPI_QUP
3002static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3003 {
3004 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3005 .mode = SPI_MODE_3,
3006 .bus_num = 1,
3007 .chip_select = 0,
3008 .max_speed_hz = 10800000,
3009 }
3010};
3011#endif
3012
3013static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3014#ifndef CONFIG_SPI_QUP
3015 .panel_config_gpio = lcdc_config_spi_gpios,
3016 .gpio_num = lcdc_spi_gpio_array_num,
3017#endif
3018};
3019
3020static struct platform_device lcdc_auo_wvga_panel_device = {
3021 .name = LCDC_AUO_PANEL_NAME,
3022 .id = 0,
3023 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3024};
3025#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3026
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003027#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3028
3029#define GPIO_NT35582_RESET 94
3030#define GPIO_NT35582_BL_EN_HW_PIN 24
3031#define GPIO_NT35582_BL_EN \
3032 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3033
3034static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3035
3036static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3037 .gpio_num = lcdc_nt35582_pmic_gpio,
3038};
3039
3040static struct platform_device lcdc_nt35582_panel_device = {
3041 .name = LCDC_NT35582_PANEL_NAME,
3042 .id = 0,
3043 .dev = {
3044 .platform_data = &lcdc_nt35582_panel_data,
3045 }
3046};
3047
3048static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3049 {
3050 .modalias = "lcdc_nt35582_spi",
3051 .mode = SPI_MODE_0,
3052 .bus_num = 0,
3053 .chip_select = 0,
3054 .max_speed_hz = 1100000,
3055 }
3056};
3057#endif
3058
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003059#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3060static struct resource hdmi_msm_resources[] = {
3061 {
3062 .name = "hdmi_msm_qfprom_addr",
3063 .start = 0x00700000,
3064 .end = 0x007060FF,
3065 .flags = IORESOURCE_MEM,
3066 },
3067 {
3068 .name = "hdmi_msm_hdmi_addr",
3069 .start = 0x04A00000,
3070 .end = 0x04A00FFF,
3071 .flags = IORESOURCE_MEM,
3072 },
3073 {
3074 .name = "hdmi_msm_irq",
3075 .start = HDMI_IRQ,
3076 .end = HDMI_IRQ,
3077 .flags = IORESOURCE_IRQ,
3078 },
3079};
3080
3081static int hdmi_enable_5v(int on);
3082static int hdmi_core_power(int on, int show);
3083static int hdmi_cec_power(int on);
3084
3085static struct msm_hdmi_platform_data hdmi_msm_data = {
3086 .irq = HDMI_IRQ,
3087 .enable_5v = hdmi_enable_5v,
3088 .core_power = hdmi_core_power,
3089 .cec_power = hdmi_cec_power,
3090};
3091
3092static struct platform_device hdmi_msm_device = {
3093 .name = "hdmi_msm",
3094 .id = 0,
3095 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3096 .resource = hdmi_msm_resources,
3097 .dev.platform_data = &hdmi_msm_data,
3098};
3099#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3100
3101#ifdef CONFIG_FB_MSM_MIPI_DSI
3102static struct platform_device mipi_dsi_toshiba_panel_device = {
3103 .name = "mipi_toshiba",
3104 .id = 0,
3105};
3106
3107#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3108
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003109static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003110 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003111 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003112};
3113
3114static struct platform_device mipi_dsi_novatek_panel_device = {
3115 .name = "mipi_novatek",
3116 .id = 0,
3117 .dev = {
3118 .platform_data = &novatek_pdata,
3119 }
3120};
3121#endif
3122
3123static void __init msm8x60_allocate_memory_regions(void)
3124{
3125 void *addr;
3126 unsigned long size;
3127
3128 size = MSM_FB_SIZE;
3129 addr = alloc_bootmem_align(size, 0x1000);
3130 msm_fb_resources[0].start = __pa(addr);
3131 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3132 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3133 size, addr, __pa(addr));
3134
3135}
3136
3137#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3138 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3139/*virtual key support */
3140static ssize_t tma300_vkeys_show(struct kobject *kobj,
3141 struct kobj_attribute *attr, char *buf)
3142{
3143 return sprintf(buf,
3144 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3145 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3146 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3147 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3148 "\n");
3149}
3150
3151static struct kobj_attribute tma300_vkeys_attr = {
3152 .attr = {
3153 .mode = S_IRUGO,
3154 },
3155 .show = &tma300_vkeys_show,
3156};
3157
3158static struct attribute *tma300_properties_attrs[] = {
3159 &tma300_vkeys_attr.attr,
3160 NULL
3161};
3162
3163static struct attribute_group tma300_properties_attr_group = {
3164 .attrs = tma300_properties_attrs,
3165};
3166
3167static struct kobject *properties_kobj;
3168
3169
3170
3171#define CYTTSP_TS_GPIO_IRQ 61
3172static int cyttsp_platform_init(struct i2c_client *client)
3173{
3174 int rc = -EINVAL;
3175 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3176
3177 if (machine_is_msm8x60_fluid()) {
3178 pm8058_l5 = regulator_get(NULL, "8058_l5");
3179 if (IS_ERR(pm8058_l5)) {
3180 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3181 __func__, PTR_ERR(pm8058_l5));
3182 rc = PTR_ERR(pm8058_l5);
3183 return rc;
3184 }
3185 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3186 if (rc) {
3187 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3188 __func__, rc);
3189 goto reg_l5_put;
3190 }
3191
3192 rc = regulator_enable(pm8058_l5);
3193 if (rc) {
3194 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3195 __func__, rc);
3196 goto reg_l5_put;
3197 }
3198 }
3199 /* vote for s3 to enable i2c communication lines */
3200 pm8058_s3 = regulator_get(NULL, "8058_s3");
3201 if (IS_ERR(pm8058_s3)) {
3202 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3203 __func__, PTR_ERR(pm8058_s3));
3204 rc = PTR_ERR(pm8058_s3);
3205 goto reg_l5_disable;
3206 }
3207
3208 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3209 if (rc) {
3210 pr_err("%s: regulator_set_voltage() = %d\n",
3211 __func__, rc);
3212 goto reg_s3_put;
3213 }
3214
3215 rc = regulator_enable(pm8058_s3);
3216 if (rc) {
3217 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3218 __func__, rc);
3219 goto reg_s3_put;
3220 }
3221
3222 /* wait for vregs to stabilize */
3223 usleep_range(10000, 10000);
3224
3225 /* check this device active by reading first byte/register */
3226 rc = i2c_smbus_read_byte_data(client, 0x01);
3227 if (rc < 0) {
3228 pr_err("%s: i2c sanity check failed\n", __func__);
3229 goto reg_s3_disable;
3230 }
3231
3232 /* virtual keys */
3233 if (machine_is_msm8x60_fluid()) {
3234 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3235 properties_kobj = kobject_create_and_add("board_properties",
3236 NULL);
3237 if (properties_kobj)
3238 rc = sysfs_create_group(properties_kobj,
3239 &tma300_properties_attr_group);
3240 if (!properties_kobj || rc)
3241 pr_err("%s: failed to create board_properties\n",
3242 __func__);
3243 }
3244 return CY_OK;
3245
3246reg_s3_disable:
3247 regulator_disable(pm8058_s3);
3248reg_s3_put:
3249 regulator_put(pm8058_s3);
3250reg_l5_disable:
3251 if (machine_is_msm8x60_fluid())
3252 regulator_disable(pm8058_l5);
3253reg_l5_put:
3254 if (machine_is_msm8x60_fluid())
3255 regulator_put(pm8058_l5);
3256 return rc;
3257}
3258
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303259/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3260static int cyttsp_platform_suspend(struct i2c_client *client)
3261{
3262 msleep(20);
3263
3264 return CY_OK;
3265}
3266
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003267static int cyttsp_platform_resume(struct i2c_client *client)
3268{
3269 /* add any special code to strobe a wakeup pin or chip reset */
3270 msleep(10);
3271
3272 return CY_OK;
3273}
3274
3275static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3276 .flags = 0x04,
3277 .gen = CY_GEN3, /* or */
3278 .use_st = CY_USE_ST,
3279 .use_mt = CY_USE_MT,
3280 .use_hndshk = CY_SEND_HNDSHK,
3281 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303282 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003283 .use_gestures = CY_USE_GESTURES,
3284 /* activate up to 4 groups
3285 * and set active distance
3286 */
3287 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3288 CY_GEST_GRP3 | CY_GEST_GRP4 |
3289 CY_ACT_DIST,
3290 /* change act_intrvl to customize the Active power state
3291 * scanning/processing refresh interval for Operating mode
3292 */
3293 .act_intrvl = CY_ACT_INTRVL_DFLT,
3294 /* change tch_tmout to customize the touch timeout for the
3295 * Active power state for Operating mode
3296 */
3297 .tch_tmout = CY_TCH_TMOUT_DFLT,
3298 /* change lp_intrvl to customize the Low Power power state
3299 * scanning/processing refresh interval for Operating mode
3300 */
3301 .lp_intrvl = CY_LP_INTRVL_DFLT,
3302 .sleep_gpio = -1,
3303 .resout_gpio = -1,
3304 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3305 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303306 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003307 .init = cyttsp_platform_init,
3308};
3309
3310static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3311 .panel_maxx = 1083,
3312 .panel_maxy = 659,
3313 .disp_minx = 30,
3314 .disp_maxx = 1053,
3315 .disp_miny = 30,
3316 .disp_maxy = 629,
3317 .correct_fw_ver = 8,
3318 .fw_fname = "cyttsp_8660_ffa.hex",
3319 .flags = 0x00,
3320 .gen = CY_GEN2, /* or */
3321 .use_st = CY_USE_ST,
3322 .use_mt = CY_USE_MT,
3323 .use_hndshk = CY_SEND_HNDSHK,
3324 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303325 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003326 .use_gestures = CY_USE_GESTURES,
3327 /* activate up to 4 groups
3328 * and set active distance
3329 */
3330 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3331 CY_GEST_GRP3 | CY_GEST_GRP4 |
3332 CY_ACT_DIST,
3333 /* change act_intrvl to customize the Active power state
3334 * scanning/processing refresh interval for Operating mode
3335 */
3336 .act_intrvl = CY_ACT_INTRVL_DFLT,
3337 /* change tch_tmout to customize the touch timeout for the
3338 * Active power state for Operating mode
3339 */
3340 .tch_tmout = CY_TCH_TMOUT_DFLT,
3341 /* change lp_intrvl to customize the Low Power power state
3342 * scanning/processing refresh interval for Operating mode
3343 */
3344 .lp_intrvl = CY_LP_INTRVL_DFLT,
3345 .sleep_gpio = -1,
3346 .resout_gpio = -1,
3347 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3348 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303349 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003350 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303351 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003352};
3353static void cyttsp_set_params(void)
3354{
3355 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3356 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3357 cyttsp_fluid_pdata.panel_maxx = 539;
3358 cyttsp_fluid_pdata.panel_maxy = 994;
3359 cyttsp_fluid_pdata.disp_minx = 30;
3360 cyttsp_fluid_pdata.disp_maxx = 509;
3361 cyttsp_fluid_pdata.disp_miny = 60;
3362 cyttsp_fluid_pdata.disp_maxy = 859;
3363 cyttsp_fluid_pdata.correct_fw_ver = 4;
3364 } else {
3365 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3366 cyttsp_fluid_pdata.panel_maxx = 550;
3367 cyttsp_fluid_pdata.panel_maxy = 1013;
3368 cyttsp_fluid_pdata.disp_minx = 35;
3369 cyttsp_fluid_pdata.disp_maxx = 515;
3370 cyttsp_fluid_pdata.disp_miny = 69;
3371 cyttsp_fluid_pdata.disp_maxy = 869;
3372 cyttsp_fluid_pdata.correct_fw_ver = 5;
3373 }
3374
3375}
3376
3377static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3378 {
3379 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3380 .platform_data = &cyttsp_fluid_pdata,
3381#ifndef CY_USE_TIMER
3382 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3383#endif /* CY_USE_TIMER */
3384 },
3385};
3386
3387static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3388 {
3389 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3390 .platform_data = &cyttsp_tmg240_pdata,
3391#ifndef CY_USE_TIMER
3392 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3393#endif /* CY_USE_TIMER */
3394 },
3395};
3396#endif
3397
3398static struct regulator *vreg_tmg200;
3399
3400#define TS_PEN_IRQ_GPIO 61
3401static int tmg200_power(int vreg_on)
3402{
3403 int rc = -EINVAL;
3404
3405 if (!vreg_tmg200) {
3406 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3407 __func__, rc);
3408 return rc;
3409 }
3410
3411 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3412 regulator_disable(vreg_tmg200);
3413 if (rc < 0)
3414 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3415 __func__, vreg_on ? "enable" : "disable", rc);
3416
3417 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003418 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003419
3420 return rc;
3421}
3422
3423static int tmg200_dev_setup(bool enable)
3424{
3425 int rc;
3426
3427 if (enable) {
3428 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3429 if (IS_ERR(vreg_tmg200)) {
3430 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3431 __func__, PTR_ERR(vreg_tmg200));
3432 rc = PTR_ERR(vreg_tmg200);
3433 return rc;
3434 }
3435
3436 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3437 if (rc) {
3438 pr_err("%s: regulator_set_voltage() = %d\n",
3439 __func__, rc);
3440 goto reg_put;
3441 }
3442 } else {
3443 /* put voltage sources */
3444 regulator_put(vreg_tmg200);
3445 }
3446 return 0;
3447reg_put:
3448 regulator_put(vreg_tmg200);
3449 return rc;
3450}
3451
3452static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3453 .ts_name = "msm_tmg200_ts",
3454 .dis_min_x = 0,
3455 .dis_max_x = 1023,
3456 .dis_min_y = 0,
3457 .dis_max_y = 599,
3458 .min_tid = 0,
3459 .max_tid = 255,
3460 .min_touch = 0,
3461 .max_touch = 255,
3462 .min_width = 0,
3463 .max_width = 255,
3464 .power_on = tmg200_power,
3465 .dev_setup = tmg200_dev_setup,
3466 .nfingers = 2,
3467 .irq_gpio = TS_PEN_IRQ_GPIO,
3468 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3469};
3470
3471static struct i2c_board_info cy8ctmg200_board_info[] = {
3472 {
3473 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3474 .platform_data = &cy8ctmg200_pdata,
3475 }
3476};
3477
Zhang Chang Ken211df572011-07-05 19:16:39 -04003478static struct regulator *vreg_tma340;
3479
3480static int tma340_power(int vreg_on)
3481{
3482 int rc = -EINVAL;
3483
3484 if (!vreg_tma340) {
3485 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3486 __func__, rc);
3487 return rc;
3488 }
3489
3490 rc = vreg_on ? regulator_enable(vreg_tma340) :
3491 regulator_disable(vreg_tma340);
3492 if (rc < 0)
3493 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3494 __func__, vreg_on ? "enable" : "disable", rc);
3495
3496 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003497 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003498
3499 return rc;
3500}
3501
3502static struct kobject *tma340_prop_kobj;
3503
3504static int tma340_dragon_dev_setup(bool enable)
3505{
3506 int rc;
3507
3508 if (enable) {
3509 vreg_tma340 = regulator_get(NULL, "8901_l2");
3510 if (IS_ERR(vreg_tma340)) {
3511 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3512 __func__, PTR_ERR(vreg_tma340));
3513 rc = PTR_ERR(vreg_tma340);
3514 return rc;
3515 }
3516
3517 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3518 if (rc) {
3519 pr_err("%s: regulator_set_voltage() = %d\n",
3520 __func__, rc);
3521 goto reg_put;
3522 }
3523 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3524 tma340_prop_kobj = kobject_create_and_add("board_properties",
3525 NULL);
3526 if (tma340_prop_kobj) {
3527 rc = sysfs_create_group(tma340_prop_kobj,
3528 &tma300_properties_attr_group);
3529 if (rc) {
3530 kobject_put(tma340_prop_kobj);
3531 pr_err("%s: failed to create board_properties\n",
3532 __func__);
3533 goto reg_put;
3534 }
3535 }
3536
3537 } else {
3538 /* put voltage sources */
3539 regulator_put(vreg_tma340);
3540 /* destroy virtual keys */
3541 if (tma340_prop_kobj) {
3542 sysfs_remove_group(tma340_prop_kobj,
3543 &tma300_properties_attr_group);
3544 kobject_put(tma340_prop_kobj);
3545 }
3546 }
3547 return 0;
3548reg_put:
3549 regulator_put(vreg_tma340);
3550 return rc;
3551}
3552
3553
3554static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3555 .ts_name = "cy8ctma340",
3556 .dis_min_x = 0,
3557 .dis_max_x = 479,
3558 .dis_min_y = 0,
3559 .dis_max_y = 799,
3560 .min_tid = 0,
3561 .max_tid = 255,
3562 .min_touch = 0,
3563 .max_touch = 255,
3564 .min_width = 0,
3565 .max_width = 255,
3566 .power_on = tma340_power,
3567 .dev_setup = tma340_dragon_dev_setup,
3568 .nfingers = 2,
3569 .irq_gpio = TS_PEN_IRQ_GPIO,
3570 .resout_gpio = -1,
3571};
3572
3573static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3574 {
3575 I2C_BOARD_INFO("cy8ctma340", 0x24),
3576 .platform_data = &cy8ctma340_dragon_pdata,
3577 }
3578};
3579
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003580#ifdef CONFIG_SERIAL_MSM_HS
3581static int configure_uart_gpios(int on)
3582{
3583 int ret = 0, i;
3584 int uart_gpios[] = {53, 54, 55, 56};
3585 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3586 if (on) {
3587 ret = msm_gpiomux_get(uart_gpios[i]);
3588 if (unlikely(ret))
3589 break;
3590 } else {
3591 ret = msm_gpiomux_put(uart_gpios[i]);
3592 if (unlikely(ret))
3593 return ret;
3594 }
3595 }
3596 if (ret)
3597 for (; i >= 0; i--)
3598 msm_gpiomux_put(uart_gpios[i]);
3599 return ret;
3600}
3601static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3602 .inject_rx_on_wakeup = 1,
3603 .rx_to_inject = 0xFD,
3604 .gpio_config = configure_uart_gpios,
3605};
3606#endif
3607
3608
3609#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3610
3611static struct gpio_led gpio_exp_leds_config[] = {
3612 {
3613 .name = "left_led1:green",
3614 .gpio = GPIO_LEFT_LED_1,
3615 .active_low = 1,
3616 .retain_state_suspended = 0,
3617 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3618 },
3619 {
3620 .name = "left_led2:red",
3621 .gpio = GPIO_LEFT_LED_2,
3622 .active_low = 1,
3623 .retain_state_suspended = 0,
3624 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3625 },
3626 {
3627 .name = "left_led3:green",
3628 .gpio = GPIO_LEFT_LED_3,
3629 .active_low = 1,
3630 .retain_state_suspended = 0,
3631 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3632 },
3633 {
3634 .name = "wlan_led:orange",
3635 .gpio = GPIO_LEFT_LED_WLAN,
3636 .active_low = 1,
3637 .retain_state_suspended = 0,
3638 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3639 },
3640 {
3641 .name = "left_led5:green",
3642 .gpio = GPIO_LEFT_LED_5,
3643 .active_low = 1,
3644 .retain_state_suspended = 0,
3645 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3646 },
3647 {
3648 .name = "right_led1:green",
3649 .gpio = GPIO_RIGHT_LED_1,
3650 .active_low = 1,
3651 .retain_state_suspended = 0,
3652 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3653 },
3654 {
3655 .name = "right_led2:red",
3656 .gpio = GPIO_RIGHT_LED_2,
3657 .active_low = 1,
3658 .retain_state_suspended = 0,
3659 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3660 },
3661 {
3662 .name = "right_led3:green",
3663 .gpio = GPIO_RIGHT_LED_3,
3664 .active_low = 1,
3665 .retain_state_suspended = 0,
3666 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3667 },
3668 {
3669 .name = "bt_led:blue",
3670 .gpio = GPIO_RIGHT_LED_BT,
3671 .active_low = 1,
3672 .retain_state_suspended = 0,
3673 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3674 },
3675 {
3676 .name = "right_led5:green",
3677 .gpio = GPIO_RIGHT_LED_5,
3678 .active_low = 1,
3679 .retain_state_suspended = 0,
3680 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3681 },
3682};
3683
3684static struct gpio_led_platform_data gpio_leds_pdata = {
3685 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3686 .leds = gpio_exp_leds_config,
3687};
3688
3689static struct platform_device gpio_leds = {
3690 .name = "leds-gpio",
3691 .id = -1,
3692 .dev = {
3693 .platform_data = &gpio_leds_pdata,
3694 },
3695};
3696
3697static struct gpio_led fluid_gpio_leds[] = {
3698 {
3699 .name = "dual_led:green",
3700 .gpio = GPIO_LED1_GREEN_N,
3701 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3702 .active_low = 1,
3703 .retain_state_suspended = 0,
3704 },
3705 {
3706 .name = "dual_led:red",
3707 .gpio = GPIO_LED2_RED_N,
3708 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3709 .active_low = 1,
3710 .retain_state_suspended = 0,
3711 },
3712};
3713
3714static struct gpio_led_platform_data gpio_led_pdata = {
3715 .leds = fluid_gpio_leds,
3716 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3717};
3718
3719static struct platform_device fluid_leds_gpio = {
3720 .name = "leds-gpio",
3721 .id = -1,
3722 .dev = {
3723 .platform_data = &gpio_led_pdata,
3724 },
3725};
3726
3727#endif
3728
3729#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
3730
3731static struct msm_rpm_log_platform_data msm_rpm_log_pdata = {
3732 .phys_addr_base = 0x00106000,
3733 .reg_offsets = {
3734 [MSM_RPM_LOG_PAGE_INDICES] = 0x00000C80,
3735 [MSM_RPM_LOG_PAGE_BUFFER] = 0x00000CA0,
3736 },
3737 .phys_size = SZ_8K,
3738 .log_len = 4096, /* log's buffer length in bytes */
3739 .log_len_mask = (4096 >> 2) - 1, /* length mask in units of u32 */
3740};
3741
3742static struct platform_device msm_rpm_log_device = {
3743 .name = "msm_rpm_log",
3744 .id = -1,
3745 .dev = {
3746 .platform_data = &msm_rpm_log_pdata,
3747 },
3748};
3749#endif
3750
3751#ifdef CONFIG_BATTERY_MSM8X60
3752static struct msm_charger_platform_data msm_charger_data = {
3753 .safety_time = 180,
3754 .update_time = 1,
3755 .max_voltage = 4200,
3756 .min_voltage = 3200,
3757};
3758
3759static struct platform_device msm_charger_device = {
3760 .name = "msm-charger",
3761 .id = -1,
3762 .dev = {
3763 .platform_data = &msm_charger_data,
3764 }
3765};
3766#endif
3767
3768/*
3769 * Consumer specific regulator names:
3770 * regulator name consumer dev_name
3771 */
3772static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3773 REGULATOR_SUPPLY("8058_l0", NULL),
3774};
3775static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3776 REGULATOR_SUPPLY("8058_l1", NULL),
3777};
3778static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3779 REGULATOR_SUPPLY("8058_l2", NULL),
3780};
3781static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3782 REGULATOR_SUPPLY("8058_l3", NULL),
3783};
3784static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3785 REGULATOR_SUPPLY("8058_l4", NULL),
3786};
3787static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3788 REGULATOR_SUPPLY("8058_l5", NULL),
3789};
3790static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3791 REGULATOR_SUPPLY("8058_l6", NULL),
3792};
3793static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3794 REGULATOR_SUPPLY("8058_l7", NULL),
3795};
3796static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3797 REGULATOR_SUPPLY("8058_l8", NULL),
3798};
3799static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3800 REGULATOR_SUPPLY("8058_l9", NULL),
3801};
3802static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3803 REGULATOR_SUPPLY("8058_l10", NULL),
3804};
3805static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3806 REGULATOR_SUPPLY("8058_l11", NULL),
3807};
3808static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3809 REGULATOR_SUPPLY("8058_l12", NULL),
3810};
3811static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3812 REGULATOR_SUPPLY("8058_l13", NULL),
3813};
3814static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3815 REGULATOR_SUPPLY("8058_l14", NULL),
3816};
3817static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3818 REGULATOR_SUPPLY("8058_l15", NULL),
3819};
3820static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3821 REGULATOR_SUPPLY("8058_l16", NULL),
3822};
3823static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3824 REGULATOR_SUPPLY("8058_l17", NULL),
3825};
3826static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3827 REGULATOR_SUPPLY("8058_l18", NULL),
3828};
3829static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3830 REGULATOR_SUPPLY("8058_l19", NULL),
3831};
3832static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3833 REGULATOR_SUPPLY("8058_l20", NULL),
3834};
3835static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3836 REGULATOR_SUPPLY("8058_l21", NULL),
3837};
3838static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3839 REGULATOR_SUPPLY("8058_l22", NULL),
3840};
3841static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3842 REGULATOR_SUPPLY("8058_l23", NULL),
3843};
3844static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3845 REGULATOR_SUPPLY("8058_l24", NULL),
3846};
3847static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3848 REGULATOR_SUPPLY("8058_l25", NULL),
3849};
3850static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3851 REGULATOR_SUPPLY("8058_s0", NULL),
3852};
3853static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3854 REGULATOR_SUPPLY("8058_s1", NULL),
3855};
3856static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3857 REGULATOR_SUPPLY("8058_s2", NULL),
3858};
3859static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3860 REGULATOR_SUPPLY("8058_s3", NULL),
3861};
3862static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3863 REGULATOR_SUPPLY("8058_s4", NULL),
3864};
3865static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3866 REGULATOR_SUPPLY("8058_lvs0", NULL),
3867};
3868static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3869 REGULATOR_SUPPLY("8058_lvs1", NULL),
3870};
3871static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3872 REGULATOR_SUPPLY("8058_ncp", NULL),
3873};
3874
3875static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3876 REGULATOR_SUPPLY("8901_l0", NULL),
3877};
3878static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3879 REGULATOR_SUPPLY("8901_l1", NULL),
3880};
3881static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3882 REGULATOR_SUPPLY("8901_l2", NULL),
3883};
3884static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3885 REGULATOR_SUPPLY("8901_l3", NULL),
3886};
3887static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3888 REGULATOR_SUPPLY("8901_l4", NULL),
3889};
3890static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3891 REGULATOR_SUPPLY("8901_l5", NULL),
3892};
3893static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3894 REGULATOR_SUPPLY("8901_l6", NULL),
3895};
3896static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3897 REGULATOR_SUPPLY("8901_s2", NULL),
3898};
3899static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3900 REGULATOR_SUPPLY("8901_s3", NULL),
3901};
3902static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3903 REGULATOR_SUPPLY("8901_s4", NULL),
3904};
3905static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3906 REGULATOR_SUPPLY("8901_lvs0", NULL),
3907};
3908static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3909 REGULATOR_SUPPLY("8901_lvs1", NULL),
3910};
3911static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3912 REGULATOR_SUPPLY("8901_lvs2", NULL),
3913};
3914static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3915 REGULATOR_SUPPLY("8901_lvs3", NULL),
3916};
3917static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3918 REGULATOR_SUPPLY("8901_mvs0", NULL),
3919};
3920
David Collins6f032ba2011-08-31 14:08:15 -07003921/* Pin control regulators */
3922static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3923 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3924};
3925static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3926 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3927};
3928static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3929 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3930};
3931static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3932 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3933};
3934static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3935 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3936};
3937static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3938 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3939};
3940
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003941#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3942 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins6f032ba2011-08-31 14:08:15 -07003943 _freq, _pin_fn, _force_mode, _state, _sleep_selectable, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003944 _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003945 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003946 .init_data = { \
3947 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003948 .valid_modes_mask = _modes, \
3949 .valid_ops_mask = _ops, \
3950 .min_uV = _min_uV, \
3951 .max_uV = _max_uV, \
3952 .input_uV = _min_uV, \
3953 .apply_uV = _apply_uV, \
3954 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003955 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003956 .consumer_supplies = vreg_consumers_##_id, \
3957 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003958 ARRAY_SIZE(vreg_consumers_##_id), \
3959 }, \
David Collins6f032ba2011-08-31 14:08:15 -07003960 .id = RPM_VREG_ID_##_id, \
3961 .default_uV = _default_uV, \
3962 .peak_uA = _peak_uA, \
3963 .avg_uA = _avg_uA, \
3964 .pull_down_enable = _pull_down, \
3965 .pin_ctrl = _pin_ctrl, \
3966 .freq = RPM_VREG_FREQ_##_freq, \
3967 .pin_fn = _pin_fn, \
3968 .force_mode = _force_mode, \
3969 .state = _state, \
3970 .sleep_selectable = _sleep_selectable, \
3971 }
3972
3973/* Pin control initialization */
3974#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
3975 { \
3976 .init_data = { \
3977 .constraints = { \
3978 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
3979 .always_on = _always_on, \
3980 }, \
3981 .num_consumer_supplies = \
3982 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
3983 .consumer_supplies = vreg_consumers_##_id##_PC, \
3984 }, \
3985 .id = RPM_VREG_ID_##_id##_PC, \
3986 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003987 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003988 }
3989
3990/*
3991 * The default LPM/HPM state of an RPM controlled regulator can be controlled
3992 * via the peak_uA value specified in the table below. If the value is less
3993 * than the high power min threshold for the regulator, then the regulator will
3994 * be set to LPM. Otherwise, it will be set to HPM.
3995 *
3996 * This value can be further overridden by specifying an initial mode via
3997 * .init_data.constraints.initial_mode.
3998 */
3999
David Collins6f032ba2011-08-31 14:08:15 -07004000#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4001 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004002 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4003 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4004 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4005 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4006 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004007 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4008 RPM_VREG_PIN_FN_8660_ENABLE, \
4009 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004010 _sleep_selectable, _always_on)
4011
David Collins6f032ba2011-08-31 14:08:15 -07004012#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4013 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004014 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4015 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4016 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4017 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4018 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004019 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4020 RPM_VREG_PIN_FN_8660_ENABLE, \
4021 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4022 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004023
David Collins6f032ba2011-08-31 14:08:15 -07004024#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004025 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4026 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004027 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4028 RPM_VREG_PIN_FN_8660_ENABLE, \
4029 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4030 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004031
David Collins6f032ba2011-08-31 14:08:15 -07004032#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004033 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4034 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004035 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4036 RPM_VREG_PIN_FN_8660_ENABLE, \
4037 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4038 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004039
David Collins6f032ba2011-08-31 14:08:15 -07004040#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4041#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4042#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4043#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4044#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004045
David Collins6f032ba2011-08-31 14:08:15 -07004046/* RPM early regulator constraints */
4047static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4048 /* ID a_on pd ss min_uV max_uV init_ip freq */
4049 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4050 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004051};
4052
David Collins6f032ba2011-08-31 14:08:15 -07004053/* RPM regulator constraints */
4054static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4055 /* ID a_on pd ss min_uV max_uV init_ip */
4056 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4057 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4058 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4059 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4060 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4061 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4062 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4063 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4064 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4065 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4066 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4067 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4068 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4069 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4070 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4071 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4072 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4073 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4074 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4075 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4076 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4077 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4078 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4079 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4080 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4081 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004082
David Collins6f032ba2011-08-31 14:08:15 -07004083 /* ID a_on pd ss min_uV max_uV init_ip freq */
4084 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4085 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4086 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4087
4088 /* ID a_on pd ss */
4089 RPM_VS(PM8058_LVS0, 0, 1, 0),
4090 RPM_VS(PM8058_LVS1, 0, 1, 0),
4091
4092 /* ID a_on pd ss min_uV max_uV */
4093 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4094
4095 /* ID a_on pd ss min_uV max_uV init_ip */
4096 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4097 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4098 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4099 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4100 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4101 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4102 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4103
4104 /* ID a_on pd ss min_uV max_uV init_ip freq */
4105 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4106 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4107 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4108
4109 /* ID a_on pd ss */
4110 RPM_VS(PM8901_LVS0, 1, 1, 0),
4111 RPM_VS(PM8901_LVS1, 0, 1, 0),
4112 RPM_VS(PM8901_LVS2, 0, 1, 0),
4113 RPM_VS(PM8901_LVS3, 0, 1, 0),
4114 RPM_VS(PM8901_MVS0, 0, 1, 0),
4115
4116 /* ID a_on pin_func pin_ctrl */
4117 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4118 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4119 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4120 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4121 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4122 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4123};
4124
4125static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4126 .init_data = rpm_regulator_early_init_data,
4127 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4128 .version = RPM_VREG_VERSION_8660,
4129 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4130 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4131};
4132
4133static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4134 .init_data = rpm_regulator_init_data,
4135 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4136 .version = RPM_VREG_VERSION_8660,
4137};
4138
4139static struct platform_device rpm_regulator_early_device = {
4140 .name = "rpm-regulator",
4141 .id = 0,
4142 .dev = {
4143 .platform_data = &rpm_regulator_early_pdata,
4144 },
4145};
4146
4147static struct platform_device rpm_regulator_device = {
4148 .name = "rpm-regulator",
4149 .id = 1,
4150 .dev = {
4151 .platform_data = &rpm_regulator_pdata,
4152 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004153};
4154
4155static struct platform_device *early_regulators[] __initdata = {
4156 &msm_device_saw_s0,
4157 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004158 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004159};
4160
4161static struct platform_device *early_devices[] __initdata = {
4162#ifdef CONFIG_MSM_BUS_SCALING
4163 &msm_bus_apps_fabric,
4164 &msm_bus_sys_fabric,
4165 &msm_bus_mm_fabric,
4166 &msm_bus_sys_fpb,
4167 &msm_bus_cpss_fpb,
4168#endif
4169 &msm_device_dmov_adm0,
4170 &msm_device_dmov_adm1,
4171};
4172
4173#if (defined(CONFIG_MARIMBA_CORE)) && \
4174 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4175
4176static int bluetooth_power(int);
4177static struct platform_device msm_bt_power_device = {
4178 .name = "bt_power",
4179 .id = -1,
4180 .dev = {
4181 .platform_data = &bluetooth_power,
4182 },
4183};
4184#endif
4185
4186static struct platform_device msm_tsens_device = {
4187 .name = "tsens-tm",
4188 .id = -1,
4189};
4190
4191static struct platform_device *rumi_sim_devices[] __initdata = {
4192 &smc91x_device,
4193 &msm_device_uart_dm12,
4194#ifdef CONFIG_I2C_QUP
4195 &msm_gsbi3_qup_i2c_device,
4196 &msm_gsbi4_qup_i2c_device,
4197 &msm_gsbi7_qup_i2c_device,
4198 &msm_gsbi8_qup_i2c_device,
4199 &msm_gsbi9_qup_i2c_device,
4200 &msm_gsbi12_qup_i2c_device,
4201#endif
4202#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004203 &msm_device_ssbi3,
4204#endif
4205#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004206#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004207 &android_pmem_device,
4208 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004209 &android_pmem_smipool_device,
4210#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004211 &android_pmem_audio_device,
4212#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004213#ifdef CONFIG_MSM_ROTATOR
4214 &msm_rotator_device,
4215#endif
4216 &msm_fb_device,
4217 &msm_kgsl_3d0,
4218 &msm_kgsl_2d0,
4219 &msm_kgsl_2d1,
4220 &lcdc_samsung_panel_device,
4221#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4222 &hdmi_msm_device,
4223#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4224#ifdef CONFIG_MSM_CAMERA
4225#ifdef CONFIG_MT9E013
4226 &msm_camera_sensor_mt9e013,
4227#endif
4228#ifdef CONFIG_IMX074
4229 &msm_camera_sensor_imx074,
4230#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004231#ifdef CONFIG_VX6953
4232 &msm_camera_sensor_vx6953,
4233#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004234#ifdef CONFIG_WEBCAM_OV7692
4235 &msm_camera_sensor_webcam_ov7692,
4236#endif
4237#ifdef CONFIG_WEBCAM_OV9726
4238 &msm_camera_sensor_webcam_ov9726,
4239#endif
4240#ifdef CONFIG_QS_S5K4E1
4241 &msm_camera_sensor_qs_s5k4e1,
4242#endif
4243#endif
4244#ifdef CONFIG_MSM_GEMINI
4245 &msm_gemini_device,
4246#endif
4247#ifdef CONFIG_MSM_VPE
4248 &msm_vpe_device,
4249#endif
4250 &msm_device_vidc,
4251};
4252
4253#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4254enum {
4255 SX150X_CORE,
4256 SX150X_DOCKING,
4257 SX150X_SURF,
4258 SX150X_LEFT_FHA,
4259 SX150X_RIGHT_FHA,
4260 SX150X_SOUTH,
4261 SX150X_NORTH,
4262 SX150X_CORE_FLUID,
4263};
4264
4265static struct sx150x_platform_data sx150x_data[] __initdata = {
4266 [SX150X_CORE] = {
4267 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4268 .oscio_is_gpo = false,
4269 .io_pullup_ena = 0x0c08,
4270 .io_pulldn_ena = 0x4060,
4271 .io_open_drain_ena = 0x000c,
4272 .io_polarity = 0,
4273 .irq_summary = -1, /* see fixup_i2c_configs() */
4274 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4275 },
4276 [SX150X_DOCKING] = {
4277 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4278 .oscio_is_gpo = false,
4279 .io_pullup_ena = 0x5e06,
4280 .io_pulldn_ena = 0x81b8,
4281 .io_open_drain_ena = 0,
4282 .io_polarity = 0,
4283 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4284 UI_INT2_N),
4285 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4286 GPIO_DOCKING_EXPANDER_BASE -
4287 GPIO_EXPANDER_GPIO_BASE,
4288 },
4289 [SX150X_SURF] = {
4290 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4291 .oscio_is_gpo = false,
4292 .io_pullup_ena = 0,
4293 .io_pulldn_ena = 0,
4294 .io_open_drain_ena = 0,
4295 .io_polarity = 0,
4296 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4297 UI_INT1_N),
4298 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4299 GPIO_SURF_EXPANDER_BASE -
4300 GPIO_EXPANDER_GPIO_BASE,
4301 },
4302 [SX150X_LEFT_FHA] = {
4303 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4304 .oscio_is_gpo = false,
4305 .io_pullup_ena = 0,
4306 .io_pulldn_ena = 0x40,
4307 .io_open_drain_ena = 0,
4308 .io_polarity = 0,
4309 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4310 UI_INT3_N),
4311 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4312 GPIO_LEFT_KB_EXPANDER_BASE -
4313 GPIO_EXPANDER_GPIO_BASE,
4314 },
4315 [SX150X_RIGHT_FHA] = {
4316 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4317 .oscio_is_gpo = true,
4318 .io_pullup_ena = 0,
4319 .io_pulldn_ena = 0,
4320 .io_open_drain_ena = 0,
4321 .io_polarity = 0,
4322 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4323 UI_INT3_N),
4324 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4325 GPIO_RIGHT_KB_EXPANDER_BASE -
4326 GPIO_EXPANDER_GPIO_BASE,
4327 },
4328 [SX150X_SOUTH] = {
4329 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4330 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4331 GPIO_SOUTH_EXPANDER_BASE -
4332 GPIO_EXPANDER_GPIO_BASE,
4333 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4334 },
4335 [SX150X_NORTH] = {
4336 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4337 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4338 GPIO_NORTH_EXPANDER_BASE -
4339 GPIO_EXPANDER_GPIO_BASE,
4340 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4341 .oscio_is_gpo = true,
4342 .io_open_drain_ena = 0x30,
4343 },
4344 [SX150X_CORE_FLUID] = {
4345 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4346 .oscio_is_gpo = false,
4347 .io_pullup_ena = 0x0408,
4348 .io_pulldn_ena = 0x4060,
4349 .io_open_drain_ena = 0x0008,
4350 .io_polarity = 0,
4351 .irq_summary = -1, /* see fixup_i2c_configs() */
4352 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4353 },
4354};
4355
4356#ifdef CONFIG_SENSORS_MSM_ADC
4357/* Configuration of EPM expander is done when client
4358 * request an adc read
4359 */
4360static struct sx150x_platform_data sx150x_epmdata = {
4361 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4362 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4363 GPIO_EPM_EXPANDER_BASE -
4364 GPIO_EXPANDER_GPIO_BASE,
4365 .irq_summary = -1,
4366};
4367#endif
4368
4369/* sx150x_low_power_cfg
4370 *
4371 * This data and init function are used to put unused gpio-expander output
4372 * lines into their low-power states at boot. The init
4373 * function must be deferred until a later init stage because the i2c
4374 * gpio expander drivers do not probe until after they are registered
4375 * (see register_i2c_devices) and the work-queues for those registrations
4376 * are processed. Because these lines are unused, there is no risk of
4377 * competing with a device driver for the gpio.
4378 *
4379 * gpio lines whose low-power states are input are naturally in their low-
4380 * power configurations once probed, see the platform data structures above.
4381 */
4382struct sx150x_low_power_cfg {
4383 unsigned gpio;
4384 unsigned val;
4385};
4386
4387static struct sx150x_low_power_cfg
4388common_sx150x_lp_cfgs[] __initdata = {
4389 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4390 {GPIO_EXT_GPS_LNA_EN, 0},
4391 {GPIO_MSM_WAKES_BT, 0},
4392 {GPIO_USB_UICC_EN, 0},
4393 {GPIO_BATT_GAUGE_EN, 0},
4394};
4395
4396static struct sx150x_low_power_cfg
4397surf_ffa_sx150x_lp_cfgs[] __initdata = {
4398 {GPIO_MIPI_DSI_RST_N, 0},
4399 {GPIO_DONGLE_PWR_EN, 0},
4400 {GPIO_CAP_TS_SLEEP, 1},
4401 {GPIO_WEB_CAMIF_RESET_N, 0},
4402};
4403
4404static void __init
4405cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4406{
4407 unsigned n;
4408 int rc;
4409
4410 for (n = 0; n < nelems; ++n) {
4411 rc = gpio_request(cfgs[n].gpio, NULL);
4412 if (!rc) {
4413 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4414 gpio_free(cfgs[n].gpio);
4415 }
4416
4417 if (rc) {
4418 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4419 __func__, cfgs[n].gpio, rc);
4420 }
Steve Muckle9161d302010-02-11 11:50:40 -08004421 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004422}
4423
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004424static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004425{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004426 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4427 ARRAY_SIZE(common_sx150x_lp_cfgs));
4428 if (!machine_is_msm8x60_fluid())
4429 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4430 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4431 return 0;
4432}
4433module_init(cfg_sx150xs_low_power);
4434
4435#ifdef CONFIG_I2C
4436static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4437 {
4438 I2C_BOARD_INFO("sx1509q", 0x3e),
4439 .platform_data = &sx150x_data[SX150X_CORE]
4440 },
4441};
4442
4443static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4444 {
4445 I2C_BOARD_INFO("sx1509q", 0x3f),
4446 .platform_data = &sx150x_data[SX150X_DOCKING]
4447 },
4448};
4449
4450static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4451 {
4452 I2C_BOARD_INFO("sx1509q", 0x70),
4453 .platform_data = &sx150x_data[SX150X_SURF]
4454 }
4455};
4456
4457static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4458 {
4459 I2C_BOARD_INFO("sx1508q", 0x21),
4460 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4461 },
4462 {
4463 I2C_BOARD_INFO("sx1508q", 0x22),
4464 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4465 }
4466};
4467
4468static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4469 {
4470 I2C_BOARD_INFO("sx1508q", 0x23),
4471 .platform_data = &sx150x_data[SX150X_SOUTH]
4472 },
4473 {
4474 I2C_BOARD_INFO("sx1508q", 0x20),
4475 .platform_data = &sx150x_data[SX150X_NORTH]
4476 }
4477};
4478
4479static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4480 {
4481 I2C_BOARD_INFO("sx1509q", 0x3e),
4482 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4483 },
4484};
4485
4486#ifdef CONFIG_SENSORS_MSM_ADC
4487static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4488 {
4489 I2C_BOARD_INFO("sx1509q", 0x3e),
4490 .platform_data = &sx150x_epmdata
4491 },
4492};
4493#endif
4494#endif
4495#endif
4496
4497#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004498
4499static struct adc_access_fn xoadc_fn = {
4500 pm8058_xoadc_select_chan_and_start_conv,
4501 pm8058_xoadc_read_adc_code,
4502 pm8058_xoadc_get_properties,
4503 pm8058_xoadc_slot_request,
4504 pm8058_xoadc_restore_slot,
4505 pm8058_xoadc_calibrate,
4506};
4507
4508#if defined(CONFIG_I2C) && \
4509 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4510static struct regulator *vreg_adc_epm1;
4511
4512static struct i2c_client *epm_expander_i2c_register_board(void)
4513
4514{
4515 struct i2c_adapter *i2c_adap;
4516 struct i2c_client *client = NULL;
4517 i2c_adap = i2c_get_adapter(0x0);
4518
4519 if (i2c_adap == NULL)
4520 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4521
4522 if (i2c_adap != NULL)
4523 client = i2c_new_device(i2c_adap,
4524 &fluid_expanders_i2c_epm_info[0]);
4525 return client;
4526
4527}
4528
4529static unsigned int msm_adc_gpio_configure_expander_enable(void)
4530{
4531 int rc = 0;
4532 static struct i2c_client *epm_i2c_client;
4533
4534 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4535
4536 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4537
4538 if (IS_ERR(vreg_adc_epm1)) {
4539 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4540 return 0;
4541 }
4542
4543 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4544 if (rc)
4545 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4546 "regulator set voltage failed\n");
4547
4548 rc = regulator_enable(vreg_adc_epm1);
4549 if (rc) {
4550 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4551 "Error while enabling regulator for epm s3 %d\n", rc);
4552 return rc;
4553 }
4554
4555 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4556 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4557
4558 msleep(1000);
4559
4560 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4561 if (!rc) {
4562 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4563 "Configure 5v boost\n");
4564 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4565 } else {
4566 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4567 "Error for epm 5v boost en\n");
4568 goto exit_vreg_epm;
4569 }
4570
4571 msleep(500);
4572
4573 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4574 if (!rc) {
4575 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4576 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4577 "Configure epm 3.3v\n");
4578 } else {
4579 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4580 "Error for gpio 3.3ven\n");
4581 goto exit_vreg_epm;
4582 }
4583 msleep(500);
4584
4585 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4586 "Trying to request EPM LVLSFT_EN\n");
4587 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4588 if (!rc) {
4589 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4590 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4591 "Configure the lvlsft\n");
4592 } else {
4593 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4594 "Error for epm lvlsft_en\n");
4595 goto exit_vreg_epm;
4596 }
4597
4598 msleep(500);
4599
4600 if (!epm_i2c_client)
4601 epm_i2c_client = epm_expander_i2c_register_board();
4602
4603 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4604 if (!rc)
4605 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4606 if (rc) {
4607 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4608 ": GPIO PWR MON Enable issue\n");
4609 goto exit_vreg_epm;
4610 }
4611
4612 msleep(1000);
4613
4614 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4615 if (!rc) {
4616 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4617 if (rc) {
4618 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4619 ": ADC1_PWDN error direction out\n");
4620 goto exit_vreg_epm;
4621 }
4622 }
4623
4624 msleep(100);
4625
4626 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4627 if (!rc) {
4628 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4629 if (rc) {
4630 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4631 ": ADC2_PWD error direction out\n");
4632 goto exit_vreg_epm;
4633 }
4634 }
4635
4636 msleep(1000);
4637
4638 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4639 if (!rc) {
4640 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4641 if (rc) {
4642 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4643 "Gpio request problem %d\n", rc);
4644 goto exit_vreg_epm;
4645 }
4646 }
4647
4648 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4649 if (!rc) {
4650 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4651 if (rc) {
4652 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4653 ": EPM_SPI_ADC1_CS_N error\n");
4654 goto exit_vreg_epm;
4655 }
4656 }
4657
4658 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4659 if (!rc) {
4660 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4661 if (rc) {
4662 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4663 ": EPM_SPI_ADC2_Cs_N error\n");
4664 goto exit_vreg_epm;
4665 }
4666 }
4667
4668 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4669 "the power monitor reset for epm\n");
4670
4671 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4672 if (!rc) {
4673 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4674 if (rc) {
4675 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4676 ": Error in the power mon reset\n");
4677 goto exit_vreg_epm;
4678 }
4679 }
4680
4681 msleep(1000);
4682
4683 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4684
4685 msleep(500);
4686
4687 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4688
4689 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4690
4691 return rc;
4692
4693exit_vreg_epm:
4694 regulator_disable(vreg_adc_epm1);
4695
4696 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4697 " rc = %d.\n", rc);
4698 return rc;
4699};
4700
4701static unsigned int msm_adc_gpio_configure_expander_disable(void)
4702{
4703 int rc = 0;
4704
4705 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4706 gpio_free(GPIO_PWR_MON_RESET_N);
4707
4708 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4709 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4710
4711 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4712 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4713
4714 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4715 gpio_free(GPIO_PWR_MON_START);
4716
4717 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4718 gpio_free(GPIO_ADC1_PWDN_N);
4719
4720 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4721 gpio_free(GPIO_ADC2_PWDN_N);
4722
4723 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4724 gpio_free(GPIO_PWR_MON_ENABLE);
4725
4726 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4727 gpio_free(GPIO_EPM_LVLSFT_EN);
4728
4729 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4730 gpio_free(GPIO_EPM_5V_BOOST_EN);
4731
4732 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4733 gpio_free(GPIO_EPM_3_3V_EN);
4734
4735 rc = regulator_disable(vreg_adc_epm1);
4736 if (rc)
4737 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4738 "Error while enabling regulator for epm s3 %d\n", rc);
4739 regulator_put(vreg_adc_epm1);
4740
4741 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4742 return rc;
4743};
4744
4745unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4746{
4747 int rc = 0;
4748
4749 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4750 cs_enable);
4751
4752 if (cs_enable < 16) {
4753 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4754 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4755 } else {
4756 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4757 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4758 }
4759 return rc;
4760};
4761
4762unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4763{
4764 int rc = 0;
4765
4766 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4767
4768 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4769
4770 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4771
4772 return rc;
4773};
4774#endif
4775
4776static struct msm_adc_channels msm_adc_channels_data[] = {
4777 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4778 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4779 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4780 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4781 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4782 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4783 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4784 CHAN_PATH_TYPE4,
4785 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4786 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4787 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4788 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4789 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4790 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4791 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4792 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4793 CHAN_PATH_TYPE12,
4794 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4795 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4796 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4797 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4798 CHAN_PATH_TYPE_NONE,
4799 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4800 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4801 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4802 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4803 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4804 scale_xtern_chgr_cur},
4805 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4806 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4807 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4808 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4809 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4810 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4811 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4812 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4813 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4814 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4815 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4816 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4817};
4818
4819static char *msm_adc_fluid_device_names[] = {
4820 "ADS_ADC1",
4821 "ADS_ADC2",
4822};
4823
4824static struct msm_adc_platform_data msm_adc_pdata = {
4825 .channel = msm_adc_channels_data,
4826 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4827#if defined(CONFIG_I2C) && \
4828 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4829 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4830 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4831 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4832 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4833#endif
4834};
4835
4836static struct platform_device msm_adc_device = {
4837 .name = "msm_adc",
4838 .id = -1,
4839 .dev = {
4840 .platform_data = &msm_adc_pdata,
4841 },
4842};
4843
4844static void pmic8058_xoadc_mpp_config(void)
4845{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304846 int rc, i;
4847 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304848 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304849 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304850 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304851 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304852 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304853 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304854 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304855 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304856 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304857 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304858 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4859 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304860 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004861
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304862 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4863 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4864 &xoadc_mpps[i].config);
4865 if (rc) {
4866 pr_err("%s: Config MPP %d of PM8058 failed\n",
4867 __func__, xoadc_mpps[i].mpp);
4868 }
4869 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004870}
4871
4872static struct regulator *vreg_ldo18_adc;
4873
4874static int pmic8058_xoadc_vreg_config(int on)
4875{
4876 int rc;
4877
4878 if (on) {
4879 rc = regulator_enable(vreg_ldo18_adc);
4880 if (rc)
4881 pr_err("%s: Enable of regulator ldo18_adc "
4882 "failed\n", __func__);
4883 } else {
4884 rc = regulator_disable(vreg_ldo18_adc);
4885 if (rc)
4886 pr_err("%s: Disable of regulator ldo18_adc "
4887 "failed\n", __func__);
4888 }
4889
4890 return rc;
4891}
4892
4893static int pmic8058_xoadc_vreg_setup(void)
4894{
4895 int rc;
4896
4897 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4898 if (IS_ERR(vreg_ldo18_adc)) {
4899 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4900 __func__, PTR_ERR(vreg_ldo18_adc));
4901 rc = PTR_ERR(vreg_ldo18_adc);
4902 goto fail;
4903 }
4904
4905 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4906 if (rc) {
4907 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4908 goto fail;
4909 }
4910
4911 return rc;
4912fail:
4913 regulator_put(vreg_ldo18_adc);
4914 return rc;
4915}
4916
4917static void pmic8058_xoadc_vreg_shutdown(void)
4918{
4919 regulator_put(vreg_ldo18_adc);
4920}
4921
4922/* usec. For this ADC,
4923 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4924 * Each channel has different configuration, thus at the time of starting
4925 * the conversion, xoadc will return actual conversion time
4926 * */
4927static struct adc_properties pm8058_xoadc_data = {
4928 .adc_reference = 2200, /* milli-voltage for this adc */
4929 .bitresolution = 15,
4930 .bipolar = 0,
4931 .conversiontime = 54,
4932};
4933
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304934static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004935 .xoadc_prop = &pm8058_xoadc_data,
4936 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4937 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4938 .xoadc_num = XOADC_PMIC_0,
4939 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4940 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4941};
4942#endif
4943
4944#ifdef CONFIG_MSM_SDIO_AL
4945
4946static unsigned mdm2ap_status = 140;
4947
4948static int configure_mdm2ap_status(int on)
4949{
4950 int ret = 0;
4951 if (on)
4952 ret = msm_gpiomux_get(mdm2ap_status);
4953 else
4954 ret = msm_gpiomux_put(mdm2ap_status);
4955
4956 if (ret)
4957 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
4958 on);
4959
4960 return ret;
4961}
4962
4963
4964static int get_mdm2ap_status(void)
4965{
4966 return gpio_get_value(mdm2ap_status);
4967}
4968
4969static struct sdio_al_platform_data sdio_al_pdata = {
4970 .config_mdm2ap_status = configure_mdm2ap_status,
4971 .get_mdm2ap_status = get_mdm2ap_status,
4972 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03004973 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004974 .peer_sdioc_version_major = 0x0004,
4975 .peer_sdioc_boot_version_minor = 0x0001,
4976 .peer_sdioc_boot_version_major = 0x0003
4977};
4978
4979struct platform_device msm_device_sdio_al = {
4980 .name = "msm_sdio_al",
4981 .id = -1,
4982 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03004983 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004984 .platform_data = &sdio_al_pdata,
4985 },
4986};
4987
4988#endif /* CONFIG_MSM_SDIO_AL */
4989
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304990#define GPIO_VREG_ID_EXT_5V 0
4991
4992static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
4993 REGULATOR_SUPPLY("ext_5v", NULL),
4994 REGULATOR_SUPPLY("8901_mpp0", NULL),
4995};
4996
4997#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
4998 [GPIO_VREG_ID_##_id] = { \
4999 .init_data = { \
5000 .constraints = { \
5001 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5002 }, \
5003 .num_consumer_supplies = \
5004 ARRAY_SIZE(vreg_consumers_##_id), \
5005 .consumer_supplies = vreg_consumers_##_id, \
5006 }, \
5007 .regulator_name = _reg_name, \
5008 .active_low = _active_low, \
5009 .gpio_label = _gpio_label, \
5010 .gpio = _gpio, \
5011 }
5012
5013/* GPIO regulator constraints */
5014static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5015 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5016 PM8901_MPP_PM_TO_SYS(0), 0),
5017};
5018
5019/* GPIO regulator */
5020static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5021 .name = GPIO_REGULATOR_DEV_NAME,
5022 .id = PM8901_MPP_PM_TO_SYS(0),
5023 .dev = {
5024 .platform_data =
5025 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5026 },
5027};
5028
5029static void __init pm8901_vreg_mpp0_init(void)
5030{
5031 int rc;
5032
5033 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5034 .mpp = PM8901_MPP_PM_TO_SYS(0),
5035 .config = {
5036 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5037 .level = PM8901_MPP_DIG_LEVEL_VPH,
5038 },
5039 };
5040
5041 /*
5042 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5043 * implies that the regulator connected to MPP0 is enabled when
5044 * MPP0 is low.
5045 */
5046 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5047 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5048 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5049 } else {
5050 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5051 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5052 }
5053
5054 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5055 if (rc)
5056 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5057}
5058
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005059static struct platform_device *charm_devices[] __initdata = {
5060 &msm_charm_modem,
5061#ifdef CONFIG_MSM_SDIO_AL
5062 &msm_device_sdio_al,
5063#endif
5064};
5065
Lei Zhou338cab82011-08-19 13:38:17 -04005066#ifdef CONFIG_SND_SOC_MSM8660_APQ
5067static struct platform_device *dragon_alsa_devices[] __initdata = {
5068 &msm_pcm,
5069 &msm_pcm_routing,
5070 &msm_cpudai0,
5071 &msm_cpudai1,
5072 &msm_cpudai_hdmi_rx,
5073 &msm_cpudai_bt_rx,
5074 &msm_cpudai_bt_tx,
5075 &msm_cpudai_fm_rx,
5076 &msm_cpudai_fm_tx,
5077 &msm_cpu_fe,
5078 &msm_stub_codec,
5079 &msm_lpa_pcm,
5080};
5081#endif
5082
5083static struct platform_device *asoc_devices[] __initdata = {
5084 &asoc_msm_pcm,
5085 &asoc_msm_dai0,
5086 &asoc_msm_dai1,
5087};
5088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005089static struct platform_device *surf_devices[] __initdata = {
5090 &msm_device_smd,
5091 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005092 &msm_pil_q6v3,
Stephen Boyd4eb885b2011-09-29 01:16:03 -07005093 &msm_pil_modem,
Stephen Boydd89eebe2011-09-28 23:28:11 -07005094 &msm_pil_tzapps,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005095#ifdef CONFIG_I2C_QUP
5096 &msm_gsbi3_qup_i2c_device,
5097 &msm_gsbi4_qup_i2c_device,
5098 &msm_gsbi7_qup_i2c_device,
5099 &msm_gsbi8_qup_i2c_device,
5100 &msm_gsbi9_qup_i2c_device,
5101 &msm_gsbi12_qup_i2c_device,
5102#endif
5103#ifdef CONFIG_SERIAL_MSM_HS
5104 &msm_device_uart_dm1,
5105#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305106#ifdef CONFIG_MSM_SSBI
5107 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305108 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305109#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005110#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005111 &msm_device_ssbi3,
5112#endif
5113#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5114 &isp1763_device,
5115#endif
5116
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005117#if defined (CONFIG_MSM_8x60_VOIP)
5118 &asoc_msm_mvs,
5119 &asoc_mvs_dai0,
5120 &asoc_mvs_dai1,
5121#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005122
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005123#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
5124 &msm_device_otg,
5125#endif
5126#ifdef CONFIG_USB_GADGET_MSM_72K
5127 &msm_device_gadget_peripheral,
5128#endif
5129#ifdef CONFIG_USB_G_ANDROID
5130 &android_usb_device,
5131#endif
5132#ifdef CONFIG_BATTERY_MSM
5133 &msm_batt_device,
5134#endif
5135#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005136#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005137 &android_pmem_device,
5138 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005139 &android_pmem_smipool_device,
5140#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005141 &android_pmem_audio_device,
5142#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005143#ifdef CONFIG_MSM_ROTATOR
5144 &msm_rotator_device,
5145#endif
5146 &msm_fb_device,
5147 &msm_kgsl_3d0,
5148 &msm_kgsl_2d0,
5149 &msm_kgsl_2d1,
5150 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005151#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5152 &lcdc_nt35582_panel_device,
5153#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005154#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5155 &lcdc_samsung_oled_panel_device,
5156#endif
5157#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5158 &lcdc_auo_wvga_panel_device,
5159#endif
5160#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5161 &hdmi_msm_device,
5162#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5163#ifdef CONFIG_FB_MSM_MIPI_DSI
5164 &mipi_dsi_toshiba_panel_device,
5165 &mipi_dsi_novatek_panel_device,
5166#endif
5167#ifdef CONFIG_MSM_CAMERA
5168#ifdef CONFIG_MT9E013
5169 &msm_camera_sensor_mt9e013,
5170#endif
5171#ifdef CONFIG_IMX074
5172 &msm_camera_sensor_imx074,
5173#endif
5174#ifdef CONFIG_WEBCAM_OV7692
5175 &msm_camera_sensor_webcam_ov7692,
5176#endif
5177#ifdef CONFIG_WEBCAM_OV9726
5178 &msm_camera_sensor_webcam_ov9726,
5179#endif
5180#ifdef CONFIG_QS_S5K4E1
5181 &msm_camera_sensor_qs_s5k4e1,
5182#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005183#ifdef CONFIG_VX6953
5184 &msm_camera_sensor_vx6953,
5185#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005186#endif
5187#ifdef CONFIG_MSM_GEMINI
5188 &msm_gemini_device,
5189#endif
5190#ifdef CONFIG_MSM_VPE
5191 &msm_vpe_device,
5192#endif
5193
5194#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
5195 &msm_rpm_log_device,
5196#endif
5197#if defined(CONFIG_MSM_RPM_STATS_LOG)
5198 &msm_rpm_stat_device,
5199#endif
5200 &msm_device_vidc,
5201#if (defined(CONFIG_MARIMBA_CORE)) && \
5202 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5203 &msm_bt_power_device,
5204#endif
5205#ifdef CONFIG_SENSORS_MSM_ADC
5206 &msm_adc_device,
5207#endif
David Collins6f032ba2011-08-31 14:08:15 -07005208 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005209
5210#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5211 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5212 &qcrypto_device,
5213#endif
5214
5215#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5216 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5217 &qcedev_device,
5218#endif
5219
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005220
5221#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5222#ifdef CONFIG_MSM_USE_TSIF1
5223 &msm_device_tsif[1],
5224#else
5225 &msm_device_tsif[0],
5226#endif /* CONFIG_MSM_USE_TSIF1 */
5227#endif /* CONFIG_TSIF */
5228
5229#ifdef CONFIG_HW_RANDOM_MSM
5230 &msm_device_rng,
5231#endif
5232
5233 &msm_tsens_device,
Praveen Chidambaram043f4ce2011-08-02 09:37:59 -06005234 &msm_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005235#ifdef CONFIG_ION_MSM
5236 &ion_dev,
5237#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005238 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005239};
5240
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005241#ifdef CONFIG_ION_MSM
Olav Haugan0703dbf2011-12-19 17:53:38 -08005242#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5243static struct ion_cp_heap_pdata cp_mm_ion_pdata = {
5244 .permission_type = IPT_TYPE_MM_CARVEOUT,
5245 .request_region = request_smi_region,
5246 .release_region = release_smi_region,
5247 .setup_region = setup_smi_region,
5248};
5249
5250static struct ion_cp_heap_pdata cp_mfc_ion_pdata = {
5251 .permission_type = IPT_TYPE_MFC_SHAREDMEM,
5252 .request_region = request_smi_region,
5253 .release_region = release_smi_region,
5254 .setup_region = setup_smi_region,
5255};
5256
5257static struct ion_cp_heap_pdata cp_wb_ion_pdata = {
5258 .permission_type = IPT_TYPE_MDP_WRITEBACK,
5259};
5260
5261static struct ion_co_heap_pdata co_ion_pdata = {
5262};
5263#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005264static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005265 .nr = MSM_ION_HEAP_NUM,
5266 .heaps = {
5267 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005268 .id = ION_SYSTEM_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005269 .type = ION_HEAP_TYPE_SYSTEM,
5270 .name = ION_VMALLOC_HEAP_NAME,
5271 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005272#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5273 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005274 .id = ION_SF_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005275 .type = ION_HEAP_TYPE_CARVEOUT,
Olav Hauganb5be7992011-11-18 14:29:02 -08005276 .name = ION_SF_HEAP_NAME,
5277 .size = MSM_ION_SF_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005278 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005279 .extra_data = &co_ion_pdata,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005280 },
5281 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005282 .id = ION_CP_MM_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005283 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005284 .name = ION_MM_HEAP_NAME,
5285 .size = MSM_ION_MM_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005286 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005287 .extra_data = (void *) &cp_mm_ion_pdata,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005288 },
Olav Hauganb5be7992011-11-18 14:29:02 -08005289 {
5290 .id = ION_CAMERA_HEAP_ID,
5291 .type = ION_HEAP_TYPE_CARVEOUT,
5292 .name = ION_CAMERA_HEAP_NAME,
5293 .size = MSM_ION_CAMERA_SIZE,
5294 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005295 .extra_data = &co_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005296 },
5297 {
5298 .id = ION_CP_MFC_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005299 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005300 .name = ION_MFC_HEAP_NAME,
5301 .size = MSM_ION_MFC_SIZE,
5302 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005303 .extra_data = (void *) &cp_mfc_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005304 },
5305 {
5306 .id = ION_CP_WB_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005307 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005308 .name = ION_WB_HEAP_NAME,
5309 .size = MSM_ION_WB_SIZE,
5310 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005311 .extra_data = (void *) &cp_wb_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005312 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005313#endif
5314 }
5315};
5316
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005317static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005318 .name = "ion-msm",
5319 .id = 1,
5320 .dev = { .platform_data = &ion_pdata },
5321};
5322#endif
5323
5324
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005325static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5326 /* Kernel SMI memory pool for video core, used for firmware */
5327 /* and encoder, decoder scratch buffers */
5328 /* Kernel SMI memory pool should always precede the user space */
5329 /* SMI memory pool, as the video core will use offset address */
5330 /* from the Firmware base */
5331 [MEMTYPE_SMI_KERNEL] = {
5332 .start = KERNEL_SMI_BASE,
5333 .limit = KERNEL_SMI_SIZE,
5334 .size = KERNEL_SMI_SIZE,
5335 .flags = MEMTYPE_FLAGS_FIXED,
5336 },
5337 /* User space SMI memory pool for video core */
5338 /* used for encoder, decoder input & output buffers */
5339 [MEMTYPE_SMI] = {
5340 .start = USER_SMI_BASE,
5341 .limit = USER_SMI_SIZE,
5342 .flags = MEMTYPE_FLAGS_FIXED,
5343 },
5344 [MEMTYPE_EBI0] = {
5345 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5346 },
5347 [MEMTYPE_EBI1] = {
5348 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5349 },
5350};
5351
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005352static void reserve_ion_memory(void)
5353{
5354#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
Olav Hauganb5be7992011-11-18 14:29:02 -08005355 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_SF_SIZE;
5356 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_SIZE;
5357 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MFC_SIZE;
5358 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_CAMERA_SIZE;
5359 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_WB_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005360#endif
5361}
5362
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005363static void __init size_pmem_devices(void)
5364{
5365#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005366#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005367 android_pmem_adsp_pdata.size = pmem_adsp_size;
5368 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005369 android_pmem_pdata.size = pmem_sf_size;
5370#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005371 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5372#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005373}
5374
5375static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5376{
5377 msm8x60_reserve_table[p->memory_type].size += p->size;
5378}
5379
5380static void __init reserve_pmem_memory(void)
5381{
5382#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005383#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005384 reserve_memory_for(&android_pmem_adsp_pdata);
5385 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005386 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005387#endif
5388 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005389 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5390#endif
5391}
5392
Huaibin Yanga5419422011-12-08 23:52:10 -08005393static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005394
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005395static void __init msm8x60_calculate_reserve_sizes(void)
5396{
5397 size_pmem_devices();
5398 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005399 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005400 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005401}
5402
5403static int msm8x60_paddr_to_memtype(unsigned int paddr)
5404{
5405 if (paddr >= 0x40000000 && paddr < 0x60000000)
5406 return MEMTYPE_EBI1;
5407 if (paddr >= 0x38000000 && paddr < 0x40000000)
5408 return MEMTYPE_SMI;
5409 return MEMTYPE_NONE;
5410}
5411
5412static struct reserve_info msm8x60_reserve_info __initdata = {
5413 .memtype_reserve_table = msm8x60_reserve_table,
5414 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5415 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5416};
5417
5418static void __init msm8x60_reserve(void)
5419{
5420 reserve_info = &msm8x60_reserve_info;
5421 msm_reserve();
5422}
5423
5424#define EXT_CHG_VALID_MPP 10
5425#define EXT_CHG_VALID_MPP_2 11
5426
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305427static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305428 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305429 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305430 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305431 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5432};
5433
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005434#ifdef CONFIG_ISL9519_CHARGER
5435static int isl_detection_setup(void)
5436{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305437 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005438
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305439 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5440 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5441 &isl_mpp[i].config);
5442 if (ret) {
5443 pr_err("%s: Config MPP %d of PM8058 failed\n",
5444 __func__, isl_mpp[i].mpp);
5445 return ret;
5446 }
5447 }
5448
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005449 return ret;
5450}
5451
5452static struct isl_platform_data isl_data __initdata = {
5453 .chgcurrent = 700,
5454 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5455 .chg_detection_config = isl_detection_setup,
5456 .max_system_voltage = 4200,
5457 .min_system_voltage = 3200,
5458 .term_current = 120,
5459 .input_current = 2048,
5460};
5461
5462static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5463 {
5464 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305465 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005466 .platform_data = &isl_data,
5467 },
5468};
5469#endif
5470
5471#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5472static int smb137b_detection_setup(void)
5473{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305474 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005475
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305476 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5477 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5478 &isl_mpp[i].config);
5479 if (ret) {
5480 pr_err("%s: Config MPP %d of PM8058 failed\n",
5481 __func__, isl_mpp[i].mpp);
5482 return ret;
5483 }
5484 }
5485
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005486 return ret;
5487}
5488
5489static struct smb137b_platform_data smb137b_data __initdata = {
5490 .chg_detection_config = smb137b_detection_setup,
5491 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5492 .batt_mah_rating = 950,
5493};
5494
5495static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5496 {
5497 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305498 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005499 .platform_data = &smb137b_data,
5500 },
5501};
5502#endif
5503
5504#ifdef CONFIG_PMIC8058
5505#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305506#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005507
5508static int pm8058_gpios_init(void)
5509{
5510 int i;
5511 int rc;
5512 struct pm8058_gpio_cfg {
5513 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305514 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005515 };
5516
5517 struct pm8058_gpio_cfg gpio_cfgs[] = {
5518 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305519 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005520 {
5521 .direction = PM_GPIO_DIR_IN,
5522 .pull = PM_GPIO_PULL_DN,
5523 .vin_sel = 2,
5524 .function = PM_GPIO_FUNC_NORMAL,
5525 .inv_int_pol = 0,
5526 },
5527 },
5528#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5529 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305530 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005531 {
5532 .direction = PM_GPIO_DIR_IN,
5533 .pull = PM_GPIO_PULL_UP_30,
5534 .vin_sel = 2,
5535 .function = PM_GPIO_FUNC_NORMAL,
5536 .inv_int_pol = 0,
5537 },
5538 },
5539#endif
5540 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305541 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005542 {
5543 .direction = PM_GPIO_DIR_IN,
5544 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305545 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005546 .function = PM_GPIO_FUNC_NORMAL,
5547 .inv_int_pol = 0,
5548 },
5549 },
5550 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305551 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005552 {
5553 .direction = PM_GPIO_DIR_IN,
5554 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305555 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005556 .function = PM_GPIO_FUNC_NORMAL,
5557 .inv_int_pol = 0,
5558 },
5559 },
5560 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305561 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005562 {
5563 .direction = PM_GPIO_DIR_IN,
5564 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305565 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005566 .function = PM_GPIO_FUNC_NORMAL,
5567 .inv_int_pol = 0,
5568 },
5569 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005570 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305571 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005572 {
5573 .direction = PM_GPIO_DIR_OUT,
5574 .output_value = 1,
5575 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5576 .pull = PM_GPIO_PULL_DN,
5577 .out_strength = PM_GPIO_STRENGTH_HIGH,
5578 .function = PM_GPIO_FUNC_NORMAL,
5579 .vin_sel = 2,
5580 .inv_int_pol = 0,
5581 }
5582 },
5583 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305584 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005585 {
5586 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305587 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005588 .function = PM_GPIO_FUNC_NORMAL,
5589 .vin_sel = 2,
5590 .inv_int_pol = 0,
5591 }
5592 },
5593 };
5594
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305595#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5596 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305597 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305598 .direction = PM_GPIO_DIR_IN,
5599 .pull = PM_GPIO_PULL_UP_1P5,
5600 .vin_sel = 2,
5601 .function = PM_GPIO_FUNC_NORMAL,
5602 };
5603#endif
5604
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005605#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305606 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305607 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305608 .direction = PM_GPIO_DIR_OUT,
5609 .pull = PM_GPIO_PULL_NO,
5610 .out_strength = PM_GPIO_STRENGTH_HIGH,
5611 .function = PM_GPIO_FUNC_NORMAL,
5612 .inv_int_pol = 0,
5613 .vin_sel = 2,
5614 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5615 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005616 };
5617#endif
5618
5619#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5620 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305621 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005622 {
5623 .direction = PM_GPIO_DIR_IN,
5624 .pull = PM_GPIO_PULL_UP_1P5,
5625 .vin_sel = 2,
5626 .function = PM_GPIO_FUNC_NORMAL,
5627 .inv_int_pol = 0,
5628 }
5629 };
5630#endif
5631
5632#if defined(CONFIG_QS_S5K4E1)
5633 {
5634 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305635 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005636 {
5637 .direction = PM_GPIO_DIR_OUT,
5638 .output_value = 0,
5639 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5640 .pull = PM_GPIO_PULL_DN,
5641 .out_strength = PM_GPIO_STRENGTH_HIGH,
5642 .function = PM_GPIO_FUNC_NORMAL,
5643 .vin_sel = 2,
5644 .inv_int_pol = 0,
5645 }
5646 };
5647#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005648#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5649 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305650 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005651 {
5652 .direction = PM_GPIO_DIR_OUT,
5653 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5654 .output_value = 1,
5655 .pull = PM_GPIO_PULL_UP_30,
5656 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305657 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005658 .out_strength = PM_GPIO_STRENGTH_HIGH,
5659 .function = PM_GPIO_FUNC_NORMAL,
5660 .inv_int_pol = 0,
5661 }
5662 };
5663#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005664#if defined(CONFIG_HAPTIC_ISA1200) || \
5665 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5666 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305667 rc = pm8xxx_gpio_config(
5668 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5669 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005670 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305671 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005672 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305673 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305674 rc = pm8xxx_gpio_config(
5675 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5676 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305677 if (rc < 0) {
5678 pr_err("%s: pmic haptics ldo gpio config failed\n",
5679 __func__);
5680 }
5681
5682 }
5683#endif
5684
5685#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5686 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5687 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5688 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305689 rc = pm8xxx_gpio_config(
5690 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5691 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305692 if (rc < 0) {
5693 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5694 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005695 }
5696 }
5697#endif
5698
5699#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5700 /* Line_in only for 8660 ffa & surf */
5701 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005702 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005703 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305704 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005705 &line_in_gpio_cfg.cfg);
5706 if (rc < 0) {
5707 pr_err("%s pmic line_in gpio config failed\n",
5708 __func__);
5709 return rc;
5710 }
5711 }
5712#endif
5713
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005714#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5715 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305716 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005717 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5718 if (rc < 0) {
5719 pr_err("%s pmic gpio config failed\n", __func__);
5720 return rc;
5721 }
5722 }
5723#endif
5724
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005725#if defined(CONFIG_QS_S5K4E1)
5726 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5727 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305728 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005729 &qs_hc37_cam_pd_gpio_cfg.cfg);
5730 if (rc < 0) {
5731 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5732 __func__);
5733 return rc;
5734 }
5735 }
5736 }
5737#endif
5738
5739 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305740 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005741 &gpio_cfgs[i].cfg);
5742 if (rc < 0) {
5743 pr_err("%s pmic gpio config failed\n",
5744 __func__);
5745 return rc;
5746 }
5747 }
5748
5749 return 0;
5750}
5751
5752static const unsigned int ffa_keymap[] = {
5753 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5754 KEY(0, 1, KEY_UP), /* NAV - UP */
5755 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5756 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5757
5758 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5759 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5760 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5761 KEY(1, 3, KEY_VOLUMEDOWN),
5762
5763 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5764
5765 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5766 KEY(4, 1, KEY_UP), /* USER_UP */
5767 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5768 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5769 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5770
5771 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5772 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5773 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5774 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5775 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5776};
5777
Zhang Chang Ken683be172011-08-10 17:45:34 -04005778static const unsigned int dragon_keymap[] = {
5779 KEY(0, 0, KEY_MENU),
5780 KEY(0, 2, KEY_1),
5781 KEY(0, 3, KEY_4),
5782 KEY(0, 4, KEY_7),
5783
5784 KEY(1, 0, KEY_UP),
5785 KEY(1, 1, KEY_LEFT),
5786 KEY(1, 2, KEY_DOWN),
5787 KEY(1, 3, KEY_5),
5788 KEY(1, 4, KEY_8),
5789
5790 KEY(2, 0, KEY_HOME),
5791 KEY(2, 1, KEY_REPLY),
5792 KEY(2, 2, KEY_2),
5793 KEY(2, 3, KEY_6),
5794 KEY(2, 4, KEY_0),
5795
5796 KEY(3, 0, KEY_VOLUMEUP),
5797 KEY(3, 1, KEY_RIGHT),
5798 KEY(3, 2, KEY_3),
5799 KEY(3, 3, KEY_9),
5800 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5801
5802 KEY(4, 0, KEY_VOLUMEDOWN),
5803 KEY(4, 1, KEY_BACK),
5804 KEY(4, 2, KEY_CAMERA),
5805 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5806};
5807
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005808static struct matrix_keymap_data ffa_keymap_data = {
5809 .keymap_size = ARRAY_SIZE(ffa_keymap),
5810 .keymap = ffa_keymap,
5811};
5812
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305813static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005814 .input_name = "ffa-keypad",
5815 .input_phys_device = "ffa-keypad/input0",
5816 .num_rows = 6,
5817 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305818 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5819 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5820 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005821 .scan_delay_ms = 32,
5822 .row_hold_ns = 91500,
5823 .wakeup = 1,
5824 .keymap_data = &ffa_keymap_data,
5825};
5826
Zhang Chang Ken683be172011-08-10 17:45:34 -04005827static struct matrix_keymap_data dragon_keymap_data = {
5828 .keymap_size = ARRAY_SIZE(dragon_keymap),
5829 .keymap = dragon_keymap,
5830};
5831
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305832static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005833 .input_name = "dragon-keypad",
5834 .input_phys_device = "dragon-keypad/input0",
5835 .num_rows = 6,
5836 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305837 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5838 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5839 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005840 .scan_delay_ms = 32,
5841 .row_hold_ns = 91500,
5842 .wakeup = 1,
5843 .keymap_data = &dragon_keymap_data,
5844};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305845
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005846static const unsigned int fluid_keymap[] = {
5847 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5848 KEY(0, 1, KEY_UP), /* NAV - UP */
5849 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5850 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5851
5852 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5853 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5854 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5855 KEY(1, 3, KEY_VOLUMEUP),
5856
5857 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5858
5859 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5860 KEY(4, 1, KEY_UP), /* USER_UP */
5861 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5862 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5863 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5864
Jilai Wang9a895102011-07-12 14:00:35 -04005865 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005866 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5867 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5868 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5869 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5870};
5871
5872static struct matrix_keymap_data fluid_keymap_data = {
5873 .keymap_size = ARRAY_SIZE(fluid_keymap),
5874 .keymap = fluid_keymap,
5875};
5876
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305877static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005878 .input_name = "fluid-keypad",
5879 .input_phys_device = "fluid-keypad/input0",
5880 .num_rows = 6,
5881 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305882 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5883 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5884 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005885 .scan_delay_ms = 32,
5886 .row_hold_ns = 91500,
5887 .wakeup = 1,
5888 .keymap_data = &fluid_keymap_data,
5889};
5890
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305891static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005892 .initial_vibrate_ms = 500,
5893 .level_mV = 3000,
5894 .max_timeout_ms = 15000,
5895};
5896
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305897static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
5898 .rtc_write_enable = false,
5899 .rtc_alarm_powerup = false,
5900};
5901
5902static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
5903 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08005904 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305905 .wakeup = 1,
5906};
5907
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005908#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
5909
5910static struct othc_accessory_info othc_accessories[] = {
5911 {
5912 .accessory = OTHC_SVIDEO_OUT,
5913 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
5914 | OTHC_ADC_DETECT,
5915 .key_code = SW_VIDEOOUT_INSERT,
5916 .enabled = false,
5917 .adc_thres = {
5918 .min_threshold = 20,
5919 .max_threshold = 40,
5920 },
5921 },
5922 {
5923 .accessory = OTHC_ANC_HEADPHONE,
5924 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
5925 OTHC_SWITCH_DETECT,
5926 .gpio = PM8058_LINE_IN_DET_GPIO,
5927 .active_low = 1,
5928 .key_code = SW_HEADPHONE_INSERT,
5929 .enabled = true,
5930 },
5931 {
5932 .accessory = OTHC_ANC_HEADSET,
5933 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
5934 .gpio = PM8058_LINE_IN_DET_GPIO,
5935 .active_low = 1,
5936 .key_code = SW_HEADPHONE_INSERT,
5937 .enabled = true,
5938 },
5939 {
5940 .accessory = OTHC_HEADPHONE,
5941 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
5942 .key_code = SW_HEADPHONE_INSERT,
5943 .enabled = true,
5944 },
5945 {
5946 .accessory = OTHC_MICROPHONE,
5947 .detect_flags = OTHC_GPIO_DETECT,
5948 .gpio = PM8058_LINE_IN_DET_GPIO,
5949 .active_low = 1,
5950 .key_code = SW_MICROPHONE_INSERT,
5951 .enabled = true,
5952 },
5953 {
5954 .accessory = OTHC_HEADSET,
5955 .detect_flags = OTHC_MICBIAS_DETECT,
5956 .key_code = SW_HEADPHONE_INSERT,
5957 .enabled = true,
5958 },
5959};
5960
5961static struct othc_switch_info switch_info[] = {
5962 {
5963 .min_adc_threshold = 0,
5964 .max_adc_threshold = 100,
5965 .key_code = KEY_PLAYPAUSE,
5966 },
5967 {
5968 .min_adc_threshold = 100,
5969 .max_adc_threshold = 200,
5970 .key_code = KEY_REWIND,
5971 },
5972 {
5973 .min_adc_threshold = 200,
5974 .max_adc_threshold = 500,
5975 .key_code = KEY_FASTFORWARD,
5976 },
5977};
5978
5979static struct othc_n_switch_config switch_config = {
5980 .voltage_settling_time_ms = 0,
5981 .num_adc_samples = 3,
5982 .adc_channel = CHANNEL_ADC_HDSET,
5983 .switch_info = switch_info,
5984 .num_keys = ARRAY_SIZE(switch_info),
5985 .default_sw_en = true,
5986 .default_sw_idx = 0,
5987};
5988
5989static struct hsed_bias_config hsed_bias_config = {
5990 /* HSED mic bias config info */
5991 .othc_headset = OTHC_HEADSET_NO,
5992 .othc_lowcurr_thresh_uA = 100,
5993 .othc_highcurr_thresh_uA = 600,
5994 .othc_hyst_prediv_us = 7800,
5995 .othc_period_clkdiv_us = 62500,
5996 .othc_hyst_clk_us = 121000,
5997 .othc_period_clk_us = 312500,
5998 .othc_wakeup = 1,
5999};
6000
6001static struct othc_hsed_config hsed_config_1 = {
6002 .hsed_bias_config = &hsed_bias_config,
6003 /*
6004 * The detection delay and switch reporting delay are
6005 * required to encounter a hardware bug (spurious switch
6006 * interrupts on slow insertion/removal of the headset).
6007 * This will introduce a delay in reporting the accessory
6008 * insertion and removal to the userspace.
6009 */
6010 .detection_delay_ms = 1500,
6011 /* Switch info */
6012 .switch_debounce_ms = 1500,
6013 .othc_support_n_switch = false,
6014 .switch_config = &switch_config,
6015 .ir_gpio = -1,
6016 /* Accessory info */
6017 .accessories_support = true,
6018 .accessories = othc_accessories,
6019 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
6020};
6021
6022static struct othc_regulator_config othc_reg = {
6023 .regulator = "8058_l5",
6024 .max_uV = 2850000,
6025 .min_uV = 2850000,
6026};
6027
6028/* MIC_BIAS0 is configured as normal MIC BIAS */
6029static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
6030 .micbias_select = OTHC_MICBIAS_0,
6031 .micbias_capability = OTHC_MICBIAS,
6032 .micbias_enable = OTHC_SIGNAL_OFF,
6033 .micbias_regulator = &othc_reg,
6034};
6035
6036/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
6037static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
6038 .micbias_select = OTHC_MICBIAS_1,
6039 .micbias_capability = OTHC_MICBIAS_HSED,
6040 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6041 .micbias_regulator = &othc_reg,
6042 .hsed_config = &hsed_config_1,
6043 .hsed_name = "8660_handset",
6044};
6045
6046/* MIC_BIAS2 is configured as normal MIC BIAS */
6047static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6048 .micbias_select = OTHC_MICBIAS_2,
6049 .micbias_capability = OTHC_MICBIAS,
6050 .micbias_enable = OTHC_SIGNAL_OFF,
6051 .micbias_regulator = &othc_reg,
6052};
6053
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006054
6055static void __init msm8x60_init_pm8058_othc(void)
6056{
6057 int i;
6058
6059 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6060 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6061 machine_is_msm8x60_fusn_ffa()) {
6062 /* 3-switch headset supported only by V2 FFA and FLUID */
6063 hsed_config_1.accessories_adc_support = true,
6064 /* ADC based accessory detection works only on V2 and FLUID */
6065 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6066 hsed_config_1.othc_support_n_switch = true;
6067 }
6068
6069 /* IR GPIO is absent on FLUID */
6070 if (machine_is_msm8x60_fluid())
6071 hsed_config_1.ir_gpio = -1;
6072
6073 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6074 if (machine_is_msm8x60_fluid()) {
6075 switch (othc_accessories[i].accessory) {
6076 case OTHC_ANC_HEADPHONE:
6077 case OTHC_ANC_HEADSET:
6078 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6079 break;
6080 case OTHC_MICROPHONE:
6081 othc_accessories[i].enabled = false;
6082 break;
6083 case OTHC_SVIDEO_OUT:
6084 othc_accessories[i].enabled = true;
6085 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6086 break;
6087 }
6088 }
6089 }
6090}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006091
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006092
6093static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6094{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306095 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006096 .direction = PM_GPIO_DIR_OUT,
6097 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6098 .output_value = 0,
6099 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306100 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006101 .out_strength = PM_GPIO_STRENGTH_HIGH,
6102 .function = PM_GPIO_FUNC_2,
6103 };
6104
6105 int rc = -EINVAL;
6106 int id, mode, max_mA;
6107
6108 id = mode = max_mA = 0;
6109 switch (ch) {
6110 case 0:
6111 case 1:
6112 case 2:
6113 if (on) {
6114 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306115 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6116 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006117 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306118 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006119 __func__, id, rc);
6120 }
6121 break;
6122
6123 case 6:
6124 id = PM_PWM_LED_FLASH;
6125 mode = PM_PWM_CONF_PWM1;
6126 max_mA = 300;
6127 break;
6128
6129 case 7:
6130 id = PM_PWM_LED_FLASH1;
6131 mode = PM_PWM_CONF_PWM1;
6132 max_mA = 300;
6133 break;
6134
6135 default:
6136 break;
6137 }
6138
6139 if (ch >= 6 && ch <= 7) {
6140 if (!on) {
6141 mode = PM_PWM_CONF_NONE;
6142 max_mA = 0;
6143 }
6144 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6145 if (rc)
6146 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6147 __func__, ch, rc);
6148 }
6149 return rc;
6150
6151}
6152
6153static struct pm8058_pwm_pdata pm8058_pwm_data = {
6154 .config = pm8058_pwm_config,
6155};
6156
6157#define PM8058_GPIO_INT 88
6158
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006159static struct pmic8058_led pmic8058_flash_leds[] = {
6160 [0] = {
6161 .name = "camera:flash0",
6162 .max_brightness = 15,
6163 .id = PMIC8058_ID_FLASH_LED_0,
6164 },
6165 [1] = {
6166 .name = "camera:flash1",
6167 .max_brightness = 15,
6168 .id = PMIC8058_ID_FLASH_LED_1,
6169 },
6170};
6171
6172static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6173 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6174 .leds = pmic8058_flash_leds,
6175};
6176
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006177static struct pmic8058_led pmic8058_dragon_leds[] = {
6178 [0] = {
6179 /* RED */
6180 .name = "led_drv0",
6181 .max_brightness = 15,
6182 .id = PMIC8058_ID_LED_0,
6183 },/* 300 mA flash led0 drv sink */
6184 [1] = {
6185 /* Yellow */
6186 .name = "led_drv1",
6187 .max_brightness = 15,
6188 .id = PMIC8058_ID_LED_1,
6189 },/* 300 mA flash led0 drv sink */
6190 [2] = {
6191 /* Green */
6192 .name = "led_drv2",
6193 .max_brightness = 15,
6194 .id = PMIC8058_ID_LED_2,
6195 },/* 300 mA flash led0 drv sink */
6196 [3] = {
6197 .name = "led_psensor",
6198 .max_brightness = 15,
6199 .id = PMIC8058_ID_LED_KB_LIGHT,
6200 },/* 300 mA flash led0 drv sink */
6201};
6202
6203static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6204 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6205 .leds = pmic8058_dragon_leds,
6206};
6207
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006208static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6209 [0] = {
6210 .name = "led:drv0",
6211 .max_brightness = 15,
6212 .id = PMIC8058_ID_FLASH_LED_0,
6213 },/* 300 mA flash led0 drv sink */
6214 [1] = {
6215 .name = "led:drv1",
6216 .max_brightness = 15,
6217 .id = PMIC8058_ID_FLASH_LED_1,
6218 },/* 300 mA flash led1 sink */
6219 [2] = {
6220 .name = "led:drv2",
6221 .max_brightness = 20,
6222 .id = PMIC8058_ID_LED_0,
6223 },/* 40 mA led0 sink */
6224 [3] = {
6225 .name = "keypad:drv",
6226 .max_brightness = 15,
6227 .id = PMIC8058_ID_LED_KB_LIGHT,
6228 },/* 300 mA keypad drv sink */
6229};
6230
6231static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6232 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6233 .leds = pmic8058_fluid_flash_leds,
6234};
6235
Terence Hampson90508a92011-08-09 10:40:08 -04006236static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306237 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006238 .max_source_current = 1800,
6239 .charger_type = CHG_TYPE_AC,
6240};
6241
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306242static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6243 .charger_data_valid = false,
6244};
6245
6246static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6247 .priority = 0,
6248};
6249
6250static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6251 .irq_base = PM8058_IRQ_BASE,
6252 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6253 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6254};
6255
6256static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6257 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6258};
6259
6260static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6261 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006262};
6263
6264static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306265 .irq_pdata = &pm8058_irq_pdata,
6266 .gpio_pdata = &pm8058_gpio_pdata,
6267 .mpp_pdata = &pm8058_mpp_pdata,
6268 .rtc_pdata = &pm8058_rtc_pdata,
6269 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6270 .othc0_pdata = &othc_config_pdata_0,
6271 .othc1_pdata = &othc_config_pdata_1,
6272 .othc2_pdata = &othc_config_pdata_2,
6273 .pwm_pdata = &pm8058_pwm_data,
6274 .misc_pdata = &pm8058_misc_pdata,
6275#ifdef CONFIG_SENSORS_MSM_ADC
6276 .xoadc_pdata = &pm8058_xoadc_pdata,
6277#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006278};
6279
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306280#ifdef CONFIG_MSM_SSBI
6281static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6282 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6283 .slave = {
6284 .name = "pm8058-core",
6285 .platform_data = &pm8058_platform_data,
6286 },
6287};
6288#endif
6289#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006290
6291#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6292 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6293#define TDISC_I2C_SLAVE_ADDR 0x67
6294#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6295#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6296
6297static const char *vregs_tdisc_name[] = {
6298 "8058_l5",
6299 "8058_s3",
6300};
6301
6302static const int vregs_tdisc_val[] = {
6303 2850000,/* uV */
6304 1800000,
6305};
6306static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6307
6308static int tdisc_shinetsu_setup(void)
6309{
6310 int rc, i;
6311
6312 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6313 if (rc) {
6314 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6315 __func__);
6316 return rc;
6317 }
6318
6319 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6320 if (rc) {
6321 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6322 __func__);
6323 goto fail_gpio_oe;
6324 }
6325
6326 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6327 if (rc) {
6328 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6329 __func__);
6330 gpio_free(GPIO_JOYSTICK_EN);
6331 goto fail_gpio_oe;
6332 }
6333
6334 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6335 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6336 if (IS_ERR(vregs_tdisc[i])) {
6337 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6338 __func__, vregs_tdisc_name[i],
6339 PTR_ERR(vregs_tdisc[i]));
6340 rc = PTR_ERR(vregs_tdisc[i]);
6341 goto vreg_get_fail;
6342 }
6343
6344 rc = regulator_set_voltage(vregs_tdisc[i],
6345 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6346 if (rc) {
6347 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6348 __func__, rc);
6349 goto vreg_set_voltage_fail;
6350 }
6351 }
6352
6353 return rc;
6354vreg_set_voltage_fail:
6355 i++;
6356vreg_get_fail:
6357 while (i)
6358 regulator_put(vregs_tdisc[--i]);
6359fail_gpio_oe:
6360 gpio_free(PMIC_GPIO_TDISC);
6361 return rc;
6362}
6363
6364static void tdisc_shinetsu_release(void)
6365{
6366 int i;
6367
6368 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6369 regulator_put(vregs_tdisc[i]);
6370
6371 gpio_free(PMIC_GPIO_TDISC);
6372 gpio_free(GPIO_JOYSTICK_EN);
6373}
6374
6375static int tdisc_shinetsu_enable(void)
6376{
6377 int i, rc = -EINVAL;
6378
6379 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6380 rc = regulator_enable(vregs_tdisc[i]);
6381 if (rc < 0) {
6382 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6383 __func__, vregs_tdisc_name[i], rc);
6384 goto vreg_fail;
6385 }
6386 }
6387
6388 /* Enable the OE (output enable) gpio */
6389 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6390 /* voltage and gpio stabilization delay */
6391 msleep(50);
6392
6393 return 0;
6394vreg_fail:
6395 while (i)
6396 regulator_disable(vregs_tdisc[--i]);
6397 return rc;
6398}
6399
6400static int tdisc_shinetsu_disable(void)
6401{
6402 int i, rc;
6403
6404 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6405 rc = regulator_disable(vregs_tdisc[i]);
6406 if (rc < 0) {
6407 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6408 __func__, vregs_tdisc_name[i], rc);
6409 goto tdisc_reg_fail;
6410 }
6411 }
6412
6413 /* Disable the OE (output enable) gpio */
6414 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6415
6416 return 0;
6417
6418tdisc_reg_fail:
6419 while (i)
6420 regulator_enable(vregs_tdisc[--i]);
6421 return rc;
6422}
6423
6424static struct tdisc_abs_values tdisc_abs = {
6425 .x_max = 32,
6426 .y_max = 32,
6427 .x_min = -32,
6428 .y_min = -32,
6429 .pressure_max = 32,
6430 .pressure_min = 0,
6431};
6432
6433static struct tdisc_platform_data tdisc_data = {
6434 .tdisc_setup = tdisc_shinetsu_setup,
6435 .tdisc_release = tdisc_shinetsu_release,
6436 .tdisc_enable = tdisc_shinetsu_enable,
6437 .tdisc_disable = tdisc_shinetsu_disable,
6438 .tdisc_wakeup = 0,
6439 .tdisc_gpio = PMIC_GPIO_TDISC,
6440 .tdisc_report_keys = true,
6441 .tdisc_report_relative = true,
6442 .tdisc_report_absolute = false,
6443 .tdisc_report_wheel = false,
6444 .tdisc_reverse_x = false,
6445 .tdisc_reverse_y = true,
6446 .tdisc_abs = &tdisc_abs,
6447};
6448
6449static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6450 {
6451 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6452 .irq = TDISC_INT,
6453 .platform_data = &tdisc_data,
6454 },
6455};
6456#endif
6457
6458#define PM_GPIO_CDC_RST_N 20
6459#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6460
6461static struct regulator *vreg_timpani_1;
6462static struct regulator *vreg_timpani_2;
6463
6464static unsigned int msm_timpani_setup_power(void)
6465{
6466 int rc;
6467
6468 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6469 if (IS_ERR(vreg_timpani_1)) {
6470 pr_err("%s: Unable to get 8058_l0\n", __func__);
6471 return -ENODEV;
6472 }
6473
6474 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6475 if (IS_ERR(vreg_timpani_2)) {
6476 pr_err("%s: Unable to get 8058_s3\n", __func__);
6477 regulator_put(vreg_timpani_1);
6478 return -ENODEV;
6479 }
6480
6481 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6482 if (rc) {
6483 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6484 goto fail;
6485 }
6486
6487 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6488 if (rc) {
6489 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6490 goto fail;
6491 }
6492
6493 rc = regulator_enable(vreg_timpani_1);
6494 if (rc) {
6495 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6496 goto fail;
6497 }
6498
6499 /* The settings for LDO0 should be set such that
6500 * it doesn't require to reset the timpani. */
6501 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6502 if (rc < 0) {
6503 pr_err("Timpani regulator optimum mode setting failed\n");
6504 goto fail;
6505 }
6506
6507 rc = regulator_enable(vreg_timpani_2);
6508 if (rc) {
6509 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6510 regulator_disable(vreg_timpani_1);
6511 goto fail;
6512 }
6513
6514 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6515 if (rc) {
6516 pr_err("%s: GPIO Request %d failed\n", __func__,
6517 GPIO_CDC_RST_N);
6518 regulator_disable(vreg_timpani_1);
6519 regulator_disable(vreg_timpani_2);
6520 goto fail;
6521 } else {
6522 gpio_direction_output(GPIO_CDC_RST_N, 1);
6523 usleep_range(1000, 1050);
6524 gpio_direction_output(GPIO_CDC_RST_N, 0);
6525 usleep_range(1000, 1050);
6526 gpio_direction_output(GPIO_CDC_RST_N, 1);
6527 gpio_free(GPIO_CDC_RST_N);
6528 }
6529 return rc;
6530
6531fail:
6532 regulator_put(vreg_timpani_1);
6533 regulator_put(vreg_timpani_2);
6534 return rc;
6535}
6536
6537static void msm_timpani_shutdown_power(void)
6538{
6539 int rc;
6540
6541 rc = regulator_disable(vreg_timpani_1);
6542 if (rc)
6543 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6544
6545 regulator_put(vreg_timpani_1);
6546
6547 rc = regulator_disable(vreg_timpani_2);
6548 if (rc)
6549 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6550
6551 regulator_put(vreg_timpani_2);
6552}
6553
6554/* Power analog function of codec */
6555static struct regulator *vreg_timpani_cdc_apwr;
6556static int msm_timpani_codec_power(int vreg_on)
6557{
6558 int rc = 0;
6559
6560 if (!vreg_timpani_cdc_apwr) {
6561
6562 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6563
6564 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6565 pr_err("%s: vreg_get failed (%ld)\n",
6566 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6567 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6568 return rc;
6569 }
6570 }
6571
6572 if (vreg_on) {
6573
6574 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6575 2200000, 2200000);
6576 if (rc) {
6577 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6578 __func__);
6579 goto vreg_fail;
6580 }
6581
6582 rc = regulator_enable(vreg_timpani_cdc_apwr);
6583 if (rc) {
6584 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6585 goto vreg_fail;
6586 }
6587 } else {
6588 rc = regulator_disable(vreg_timpani_cdc_apwr);
6589 if (rc) {
6590 pr_err("%s: vreg_disable failed %d\n",
6591 __func__, rc);
6592 goto vreg_fail;
6593 }
6594 }
6595
6596 return 0;
6597
6598vreg_fail:
6599 regulator_put(vreg_timpani_cdc_apwr);
6600 vreg_timpani_cdc_apwr = NULL;
6601 return rc;
6602}
6603
6604static struct marimba_codec_platform_data timpani_codec_pdata = {
6605 .marimba_codec_power = msm_timpani_codec_power,
6606};
6607
6608#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6609#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6610
6611static struct marimba_platform_data timpani_pdata = {
6612 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6613 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6614 .marimba_setup = msm_timpani_setup_power,
6615 .marimba_shutdown = msm_timpani_shutdown_power,
6616 .codec = &timpani_codec_pdata,
6617 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6618};
6619
6620#define TIMPANI_I2C_SLAVE_ADDR 0xD
6621
6622static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6623 {
6624 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6625 .platform_data = &timpani_pdata,
6626 },
6627};
6628
Lei Zhou338cab82011-08-19 13:38:17 -04006629#ifdef CONFIG_SND_SOC_WM8903
6630static struct wm8903_platform_data wm8903_pdata = {
6631 .gpio_cfg[2] = 0x3A8,
6632};
6633
6634#define WM8903_I2C_SLAVE_ADDR 0x34
6635static struct i2c_board_info wm8903_codec_i2c_info[] = {
6636 {
6637 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6638 .platform_data = &wm8903_pdata,
6639 },
6640};
6641#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006642#ifdef CONFIG_PMIC8901
6643
6644#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006645/*
6646 * Consumer specific regulator names:
6647 * regulator name consumer dev_name
6648 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006649static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6650 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6651};
6652static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6653 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6654};
6655
6656#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306657 _always_on) \
6658 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006659 .init_data = { \
6660 .constraints = { \
6661 .valid_modes_mask = _modes, \
6662 .valid_ops_mask = _ops, \
6663 .min_uV = _min_uV, \
6664 .max_uV = _max_uV, \
6665 .input_uV = _min_uV, \
6666 .apply_uV = _apply_uV, \
6667 .always_on = _always_on, \
6668 }, \
6669 .consumer_supplies = vreg_consumers_8901_##_id, \
6670 .num_consumer_supplies = \
6671 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6672 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306673 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006674 }
6675
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006676#define PM8901_VREG_INIT_VS(_id) \
6677 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306678 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006679
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306680static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006681 PM8901_VREG_INIT_VS(USB_OTG),
6682 PM8901_VREG_INIT_VS(HDMI_MVS),
6683};
6684
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306685static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6686 .priority = 1,
6687};
6688
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306689static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6690 .irq_base = PM8901_IRQ_BASE,
6691 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6692 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6693};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006694
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306695static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6696 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006697};
6698
6699static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306700 .irq_pdata = &pm8901_irq_pdata,
6701 .mpp_pdata = &pm8901_mpp_pdata,
6702 .regulator_pdatas = pm8901_vreg_init,
6703 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306704 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006705};
6706
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306707static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6708 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6709 .slave = {
6710 .name = "pm8901-core",
6711 .platform_data = &pm8901_platform_data,
6712 },
6713};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006714#endif /* CONFIG_PMIC8901 */
6715
6716#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6717 || defined(CONFIG_GPIO_SX150X_MODULE))
6718
6719static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006720static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006721
6722struct bahama_config_register{
6723 u8 reg;
6724 u8 value;
6725 u8 mask;
6726};
6727
6728enum version{
6729 VER_1_0,
6730 VER_2_0,
6731 VER_UNSUPPORTED = 0xFF
6732};
6733
6734static u8 read_bahama_ver(void)
6735{
6736 int rc;
6737 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6738 u8 bahama_version;
6739
6740 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6741 if (rc < 0) {
6742 printk(KERN_ERR
6743 "%s: version read failed: %d\n",
6744 __func__, rc);
6745 return VER_UNSUPPORTED;
6746 } else {
6747 printk(KERN_INFO
6748 "%s: version read got: 0x%x\n",
6749 __func__, bahama_version);
6750 }
6751
6752 switch (bahama_version) {
6753 case 0x08: /* varient of bahama v1 */
6754 case 0x10:
6755 case 0x00:
6756 return VER_1_0;
6757 case 0x09: /* variant of bahama v2 */
6758 return VER_2_0;
6759 default:
6760 return VER_UNSUPPORTED;
6761 }
6762}
6763
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006764static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006765static unsigned int msm_bahama_setup_power(void)
6766{
6767 int rc = 0;
6768 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006769
6770 if (machine_is_msm8x60_dragon())
6771 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6772
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006773 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6774
6775 if (IS_ERR(vreg_bahama)) {
6776 rc = PTR_ERR(vreg_bahama);
6777 pr_err("%s: regulator_get %s = %d\n", __func__,
6778 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006779 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006780 }
6781
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006782 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6783 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006784 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6785 msm_bahama_regulator, rc);
6786 goto unget;
6787 }
6788
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006789 rc = regulator_enable(vreg_bahama);
6790 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006791 pr_err("%s: regulator_enable %s = %d\n", __func__,
6792 msm_bahama_regulator, rc);
6793 goto unget;
6794 }
6795
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006796 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6797 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006798 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006799 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006800 goto unenable;
6801 }
6802
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006803 gpio_direction_output(msm_bahama_sys_rst, 0);
6804 usleep_range(1000, 1050);
6805 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6806 usleep_range(1000, 1050);
6807 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006808 return rc;
6809
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006810unenable:
6811 regulator_disable(vreg_bahama);
6812unget:
6813 regulator_put(vreg_bahama);
6814 return rc;
6815};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006816
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006817static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006818{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006819 if (msm_bahama_setup_power_enable) {
6820 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6821 gpio_free(msm_bahama_sys_rst);
6822 regulator_disable(vreg_bahama);
6823 regulator_put(vreg_bahama);
6824 msm_bahama_setup_power_enable = 0;
6825 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006826
6827 return 0;
6828};
6829
6830static unsigned int msm_bahama_core_config(int type)
6831{
6832 int rc = 0;
6833
6834 if (type == BAHAMA_ID) {
6835
6836 int i;
6837 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6838
6839 const struct bahama_config_register v20_init[] = {
6840 /* reg, value, mask */
6841 { 0xF4, 0x84, 0xFF }, /* AREG */
6842 { 0xF0, 0x04, 0xFF } /* DREG */
6843 };
6844
6845 if (read_bahama_ver() == VER_2_0) {
6846 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6847 u8 value = v20_init[i].value;
6848 rc = marimba_write_bit_mask(&config,
6849 v20_init[i].reg,
6850 &value,
6851 sizeof(v20_init[i].value),
6852 v20_init[i].mask);
6853 if (rc < 0) {
6854 printk(KERN_ERR
6855 "%s: reg %d write failed: %d\n",
6856 __func__, v20_init[i].reg, rc);
6857 return rc;
6858 }
6859 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6860 " mask 0x%02x\n",
6861 __func__, v20_init[i].reg,
6862 v20_init[i].value, v20_init[i].mask);
6863 }
6864 }
6865 }
6866 printk(KERN_INFO "core type: %d\n", type);
6867
6868 return rc;
6869}
6870
6871static struct regulator *fm_regulator_s3;
6872static struct msm_xo_voter *fm_clock;
6873
6874static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
6875{
6876 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306877 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006878 .direction = PM_GPIO_DIR_IN,
6879 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306880 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006881 .function = PM_GPIO_FUNC_NORMAL,
6882 .inv_int_pol = 0,
6883 };
6884
6885 if (!fm_regulator_s3) {
6886 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
6887 if (IS_ERR(fm_regulator_s3)) {
6888 rc = PTR_ERR(fm_regulator_s3);
6889 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
6890 __func__, rc);
6891 goto out;
6892 }
6893 }
6894
6895
6896 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
6897 if (rc < 0) {
6898 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
6899 __func__, rc);
6900 goto fm_fail_put;
6901 }
6902
6903 rc = regulator_enable(fm_regulator_s3);
6904 if (rc < 0) {
6905 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
6906 __func__, rc);
6907 goto fm_fail_put;
6908 }
6909
6910 /*Vote for XO clock*/
6911 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
6912
6913 if (IS_ERR(fm_clock)) {
6914 rc = PTR_ERR(fm_clock);
6915 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
6916 __func__, rc);
6917 goto fm_fail_switch;
6918 }
6919
6920 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
6921 if (rc < 0) {
6922 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
6923 __func__, rc);
6924 goto fm_fail_vote;
6925 }
6926
6927 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306928 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006929 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306930 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006931 __func__, rc);
6932 goto fm_fail_clock;
6933 }
6934 goto out;
6935
6936fm_fail_clock:
6937 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6938fm_fail_vote:
6939 msm_xo_put(fm_clock);
6940fm_fail_switch:
6941 regulator_disable(fm_regulator_s3);
6942fm_fail_put:
6943 regulator_put(fm_regulator_s3);
6944out:
6945 return rc;
6946};
6947
6948static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
6949{
6950 int rc = 0;
6951 if (fm_regulator_s3 != NULL) {
6952 rc = regulator_disable(fm_regulator_s3);
6953 if (rc < 0) {
6954 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
6955 __func__, rc);
6956 }
6957 regulator_put(fm_regulator_s3);
6958 fm_regulator_s3 = NULL;
6959 }
6960 printk(KERN_ERR "%s: Voting off for XO", __func__);
6961
6962 if (fm_clock != NULL) {
6963 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
6964 if (rc < 0) {
6965 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
6966 __func__, rc);
6967 }
6968 msm_xo_put(fm_clock);
6969 }
6970 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
6971}
6972
6973/* Slave id address for FM/CDC/QMEMBIST
6974 * Values can be programmed using Marimba slave id 0
6975 * should there be a conflict with other I2C devices
6976 * */
6977#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
6978#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
6979
6980static struct marimba_fm_platform_data marimba_fm_pdata = {
6981 .fm_setup = fm_radio_setup,
6982 .fm_shutdown = fm_radio_shutdown,
6983 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
6984 .is_fm_soc_i2s_master = false,
6985 .config_i2s_gpio = NULL,
6986};
6987
6988/*
6989Just initializing the BAHAMA related slave
6990*/
6991static struct marimba_platform_data marimba_pdata = {
6992 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
6993 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
6994 .bahama_setup = msm_bahama_setup_power,
6995 .bahama_shutdown = msm_bahama_shutdown_power,
6996 .bahama_core_config = msm_bahama_core_config,
6997 .fm = &marimba_fm_pdata,
6998 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6999};
7000
7001
7002static struct i2c_board_info msm_marimba_board_info[] = {
7003 {
7004 I2C_BOARD_INFO("marimba", 0xc),
7005 .platform_data = &marimba_pdata,
7006 }
7007};
7008#endif /* CONFIG_MAIMBA_CORE */
7009
7010#ifdef CONFIG_I2C
7011#define I2C_SURF 1
7012#define I2C_FFA (1 << 1)
7013#define I2C_RUMI (1 << 2)
7014#define I2C_SIM (1 << 3)
7015#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007016#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007017
7018struct i2c_registry {
7019 u8 machs;
7020 int bus;
7021 struct i2c_board_info *info;
7022 int len;
7023};
7024
7025static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007026#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7027 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007028 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007029 MSM_GSBI8_QUP_I2C_BUS_ID,
7030 core_expander_i2c_info,
7031 ARRAY_SIZE(core_expander_i2c_info),
7032 },
7033 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007034 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007035 MSM_GSBI8_QUP_I2C_BUS_ID,
7036 docking_expander_i2c_info,
7037 ARRAY_SIZE(docking_expander_i2c_info),
7038 },
7039 {
7040 I2C_SURF,
7041 MSM_GSBI8_QUP_I2C_BUS_ID,
7042 surf_expanders_i2c_info,
7043 ARRAY_SIZE(surf_expanders_i2c_info),
7044 },
7045 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007046 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007047 MSM_GSBI3_QUP_I2C_BUS_ID,
7048 fha_expanders_i2c_info,
7049 ARRAY_SIZE(fha_expanders_i2c_info),
7050 },
7051 {
7052 I2C_FLUID,
7053 MSM_GSBI3_QUP_I2C_BUS_ID,
7054 fluid_expanders_i2c_info,
7055 ARRAY_SIZE(fluid_expanders_i2c_info),
7056 },
7057 {
7058 I2C_FLUID,
7059 MSM_GSBI8_QUP_I2C_BUS_ID,
7060 fluid_core_expander_i2c_info,
7061 ARRAY_SIZE(fluid_core_expander_i2c_info),
7062 },
7063#endif
7064#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7065 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7066 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007067 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007068 MSM_GSBI3_QUP_I2C_BUS_ID,
7069 msm_i2c_gsbi3_tdisc_info,
7070 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7071 },
7072#endif
7073 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007074 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007075 MSM_GSBI3_QUP_I2C_BUS_ID,
7076 cy8ctmg200_board_info,
7077 ARRAY_SIZE(cy8ctmg200_board_info),
7078 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007079 {
7080 I2C_DRAGON,
7081 MSM_GSBI3_QUP_I2C_BUS_ID,
7082 cy8ctma340_dragon_board_info,
7083 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7084 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007085#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7086 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7087 {
7088 I2C_FLUID,
7089 MSM_GSBI3_QUP_I2C_BUS_ID,
7090 cyttsp_fluid_info,
7091 ARRAY_SIZE(cyttsp_fluid_info),
7092 },
7093 {
7094 I2C_FFA | I2C_SURF,
7095 MSM_GSBI3_QUP_I2C_BUS_ID,
7096 cyttsp_ffa_info,
7097 ARRAY_SIZE(cyttsp_ffa_info),
7098 },
7099#endif
7100#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007101 {
7102 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007103 MSM_GSBI4_QUP_I2C_BUS_ID,
7104 msm_camera_boardinfo,
7105 ARRAY_SIZE(msm_camera_boardinfo),
7106 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007107 {
7108 I2C_DRAGON,
7109 MSM_GSBI4_QUP_I2C_BUS_ID,
7110 msm_camera_dragon_boardinfo,
7111 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7112 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007113#endif
7114 {
7115 I2C_SURF | I2C_FFA | I2C_FLUID,
7116 MSM_GSBI7_QUP_I2C_BUS_ID,
7117 msm_i2c_gsbi7_timpani_info,
7118 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7119 },
7120#if defined(CONFIG_MARIMBA_CORE)
7121 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007122 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007123 MSM_GSBI7_QUP_I2C_BUS_ID,
7124 msm_marimba_board_info,
7125 ARRAY_SIZE(msm_marimba_board_info),
7126 },
7127#endif /* CONFIG_MARIMBA_CORE */
7128#ifdef CONFIG_ISL9519_CHARGER
7129 {
7130 I2C_SURF | I2C_FFA,
7131 MSM_GSBI8_QUP_I2C_BUS_ID,
7132 isl_charger_i2c_info,
7133 ARRAY_SIZE(isl_charger_i2c_info),
7134 },
7135#endif
7136#if defined(CONFIG_HAPTIC_ISA1200) || \
7137 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7138 {
7139 I2C_FLUID,
7140 MSM_GSBI8_QUP_I2C_BUS_ID,
7141 msm_isa1200_board_info,
7142 ARRAY_SIZE(msm_isa1200_board_info),
7143 },
7144#endif
7145#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7146 {
7147 I2C_FLUID,
7148 MSM_GSBI8_QUP_I2C_BUS_ID,
7149 smb137b_charger_i2c_info,
7150 ARRAY_SIZE(smb137b_charger_i2c_info),
7151 },
7152#endif
7153#if defined(CONFIG_BATTERY_BQ27520) || \
7154 defined(CONFIG_BATTERY_BQ27520_MODULE)
7155 {
7156 I2C_FLUID,
7157 MSM_GSBI8_QUP_I2C_BUS_ID,
7158 msm_bq27520_board_info,
7159 ARRAY_SIZE(msm_bq27520_board_info),
7160 },
7161#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007162#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7163 {
7164 I2C_DRAGON,
7165 MSM_GSBI8_QUP_I2C_BUS_ID,
7166 wm8903_codec_i2c_info,
7167 ARRAY_SIZE(wm8903_codec_i2c_info),
7168 },
7169#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007170};
7171#endif /* CONFIG_I2C */
7172
7173static void fixup_i2c_configs(void)
7174{
7175#ifdef CONFIG_I2C
7176#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7177 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7178 sx150x_data[SX150X_CORE].irq_summary =
7179 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007180 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7181 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007182 sx150x_data[SX150X_CORE].irq_summary =
7183 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7184 else if (machine_is_msm8x60_fluid())
7185 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7186 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7187#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007188#endif
7189}
7190
7191static void register_i2c_devices(void)
7192{
7193#ifdef CONFIG_I2C
7194 u8 mach_mask = 0;
7195 int i;
7196
7197 /* Build the matching 'supported_machs' bitmask */
7198 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7199 mach_mask = I2C_SURF;
7200 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7201 mach_mask = I2C_FFA;
7202 else if (machine_is_msm8x60_rumi3())
7203 mach_mask = I2C_RUMI;
7204 else if (machine_is_msm8x60_sim())
7205 mach_mask = I2C_SIM;
7206 else if (machine_is_msm8x60_fluid())
7207 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007208 else if (machine_is_msm8x60_dragon())
7209 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007210 else
7211 pr_err("unmatched machine ID in register_i2c_devices\n");
7212
7213 /* Run the array and install devices as appropriate */
7214 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7215 if (msm8x60_i2c_devices[i].machs & mach_mask)
7216 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7217 msm8x60_i2c_devices[i].info,
7218 msm8x60_i2c_devices[i].len);
7219 }
7220#endif
7221}
7222
7223static void __init msm8x60_init_uart12dm(void)
7224{
7225#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7226 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7227 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7228
7229 if (!fpga_mem)
7230 pr_err("%s(): Error getting memory\n", __func__);
7231
7232 /* Advanced mode */
7233 writew(0xFFFF, fpga_mem + 0x15C);
7234 /* FPGA_UART_SEL */
7235 writew(0, fpga_mem + 0x172);
7236 /* FPGA_GPIO_CONFIG_117 */
7237 writew(1, fpga_mem + 0xEA);
7238 /* FPGA_GPIO_CONFIG_118 */
7239 writew(1, fpga_mem + 0xEC);
7240 mb();
7241 iounmap(fpga_mem);
7242#endif
7243}
7244
7245#define MSM_GSBI9_PHYS 0x19900000
7246#define GSBI_DUAL_MODE_CODE 0x60
7247
7248static void __init msm8x60_init_buses(void)
7249{
7250#ifdef CONFIG_I2C_QUP
7251 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7252 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7253 writel_relaxed(0x6 << 4, gsbi_mem);
7254 /* Ensure protocol code is written before proceeding further */
7255 mb();
7256 iounmap(gsbi_mem);
7257
7258 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7259 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7260 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7261 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7262
7263#ifdef CONFIG_MSM_GSBI9_UART
7264 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7265 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7266 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7267 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7268 iounmap(gsbi_mem);
7269 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7270 }
7271#endif
7272 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7273 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7274#endif
7275#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7276 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7277#endif
7278#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007279 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7280#endif
7281
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307282#ifdef CONFIG_MSM_SSBI
7283 msm_device_ssbi_pmic1.dev.platform_data =
7284 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307285 msm_device_ssbi_pmic2.dev.platform_data =
7286 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307287#endif
7288
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007289 if (machine_is_msm8x60_fluid()) {
7290#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7291 (defined(CONFIG_SMB137B_CHARGER) || \
7292 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7293 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7294#endif
7295#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7296 msm_gsbi10_qup_spi_device.dev.platform_data =
7297 &msm_gsbi10_qup_spi_pdata;
7298#endif
7299 }
7300
7301#if defined(CONFIG_USB_GADGET_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
7302 /*
7303 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7304 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7305 * and ID notifications are available only on V2 surf and FFA
7306 * with a hardware workaround.
7307 */
7308 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7309 (machine_is_msm8x60_surf() ||
7310 (machine_is_msm8x60_ffa() &&
7311 pmic_id_notif_supported)))
7312 msm_otg_pdata.phy_can_powercollapse = 1;
7313 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7314#endif
7315
7316#ifdef CONFIG_USB_GADGET_MSM_72K
7317 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7318#endif
7319
7320#ifdef CONFIG_SERIAL_MSM_HS
7321 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7322 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7323#endif
7324#ifdef CONFIG_MSM_GSBI9_UART
7325 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7326 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7327 if (IS_ERR(msm_device_uart_gsbi9))
7328 pr_err("%s(): Failed to create uart gsbi9 device\n",
7329 __func__);
7330 }
7331#endif
7332
7333#ifdef CONFIG_MSM_BUS_SCALING
7334
7335 /* RPM calls are only enabled on V2 */
7336 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7337 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7338 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7339 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7340 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7341 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7342 }
7343
7344 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7345 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7346 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7347 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7348 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7349#endif
7350}
7351
7352static void __init msm8x60_map_io(void)
7353{
7354 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7355 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007356
7357 if (socinfo_init() < 0)
7358 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007359}
7360
7361/*
7362 * Most segments of the EBI2 bus are disabled by default.
7363 */
7364static void __init msm8x60_init_ebi2(void)
7365{
7366 uint32_t ebi2_cfg;
7367 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007368 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7369
7370 if (IS_ERR(mem_clk)) {
7371 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7372 "msm_ebi2", "mem_clk");
7373 return;
7374 }
7375 clk_enable(mem_clk);
7376 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007377
7378 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7379 if (ebi2_cfg_ptr != 0) {
7380 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7381
7382 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007383 machine_is_msm8x60_fluid() ||
7384 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007385 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7386 else if (machine_is_msm8x60_sim())
7387 ebi2_cfg |= (1 << 4); /* CS2 */
7388 else if (machine_is_msm8x60_rumi3())
7389 ebi2_cfg |= (1 << 5); /* CS3 */
7390
7391 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7392 iounmap(ebi2_cfg_ptr);
7393 }
7394
7395 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007396 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007397 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7398 if (ebi2_cfg_ptr != 0) {
7399 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7400 writel_relaxed(0UL, ebi2_cfg_ptr);
7401
7402 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7403 * LAN9221 Ethernet controller reads and writes.
7404 * The lowest 4 bits are the read delay, the next
7405 * 4 are the write delay. */
7406 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7407#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7408 /*
7409 * RECOVERY=5, HOLD_WR=1
7410 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7411 * WAIT_WR=1, WAIT_RD=2
7412 */
7413 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7414 /*
7415 * HOLD_RD=1
7416 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7417 */
7418 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7419#else
7420 /* EBI2 CS3 muxed address/data,
7421 * two cyc addr enable */
7422 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7423
7424#endif
7425 iounmap(ebi2_cfg_ptr);
7426 }
7427 }
7428}
7429
7430static void __init msm8x60_configure_smc91x(void)
7431{
7432 if (machine_is_msm8x60_sim()) {
7433
7434 smc91x_resources[0].start = 0x1b800300;
7435 smc91x_resources[0].end = 0x1b8003ff;
7436
7437 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7438 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7439
7440 } else if (machine_is_msm8x60_rumi3()) {
7441
7442 smc91x_resources[0].start = 0x1d000300;
7443 smc91x_resources[0].end = 0x1d0003ff;
7444
7445 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7446 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7447 }
7448}
7449
7450static void __init msm8x60_init_tlmm(void)
7451{
7452 if (machine_is_msm8x60_rumi3())
7453 msm_gpio_install_direct_irq(0, 0, 1);
7454}
7455
7456#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7457 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7458 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7459 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7460 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7461
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007462/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007463#define MAX_SDCC_CONTROLLER 5
7464
7465struct msm_sdcc_gpio {
7466 /* maximum 10 GPIOs per SDCC controller */
7467 s16 no;
7468 /* name of this GPIO */
7469 const char *name;
7470 bool always_on;
7471 bool is_enabled;
7472};
7473
7474#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7475static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7476 {159, "sdc1_dat_0"},
7477 {160, "sdc1_dat_1"},
7478 {161, "sdc1_dat_2"},
7479 {162, "sdc1_dat_3"},
7480#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7481 {163, "sdc1_dat_4"},
7482 {164, "sdc1_dat_5"},
7483 {165, "sdc1_dat_6"},
7484 {166, "sdc1_dat_7"},
7485#endif
7486 {167, "sdc1_clk"},
7487 {168, "sdc1_cmd"}
7488};
7489#endif
7490
7491#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7492static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7493 {143, "sdc2_dat_0"},
7494 {144, "sdc2_dat_1", 1},
7495 {145, "sdc2_dat_2"},
7496 {146, "sdc2_dat_3"},
7497#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7498 {147, "sdc2_dat_4"},
7499 {148, "sdc2_dat_5"},
7500 {149, "sdc2_dat_6"},
7501 {150, "sdc2_dat_7"},
7502#endif
7503 {151, "sdc2_cmd"},
7504 {152, "sdc2_clk", 1}
7505};
7506#endif
7507
7508#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7509static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7510 {95, "sdc5_cmd"},
7511 {96, "sdc5_dat_3"},
7512 {97, "sdc5_clk", 1},
7513 {98, "sdc5_dat_2"},
7514 {99, "sdc5_dat_1", 1},
7515 {100, "sdc5_dat_0"}
7516};
7517#endif
7518
7519struct msm_sdcc_pad_pull_cfg {
7520 enum msm_tlmm_pull_tgt pull;
7521 u32 pull_val;
7522};
7523
7524struct msm_sdcc_pad_drv_cfg {
7525 enum msm_tlmm_hdrive_tgt drv;
7526 u32 drv_val;
7527};
7528
7529#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7530static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7531 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7532 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7533 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7534};
7535
7536static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7537 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7538 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7539};
7540
7541static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7542 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7543 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7544 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7545};
7546
7547static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7548 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7549 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7550};
7551#endif
7552
7553#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7554static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7555 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7556 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7557 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7558};
7559
7560static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7561 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7562 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7563};
7564
7565static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7566 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7567 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7568 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7569};
7570
7571static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7572 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7573 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7574};
7575#endif
7576
7577struct msm_sdcc_pin_cfg {
7578 /*
7579 * = 1 if controller pins are using gpios
7580 * = 0 if controller has dedicated MSM pins
7581 */
7582 u8 is_gpio;
7583 u8 cfg_sts;
7584 u8 gpio_data_size;
7585 struct msm_sdcc_gpio *gpio_data;
7586 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7587 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7588 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7589 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7590 u8 pad_drv_data_size;
7591 u8 pad_pull_data_size;
7592 u8 sdio_lpm_gpio_cfg;
7593};
7594
7595
7596static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7597#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7598 [0] = {
7599 .is_gpio = 1,
7600 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7601 .gpio_data = sdc1_gpio_cfg
7602 },
7603#endif
7604#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7605 [1] = {
7606 .is_gpio = 1,
7607 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7608 .gpio_data = sdc2_gpio_cfg
7609 },
7610#endif
7611#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7612 [2] = {
7613 .is_gpio = 0,
7614 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7615 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7616 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7617 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7618 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7619 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7620 },
7621#endif
7622#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7623 [3] = {
7624 .is_gpio = 0,
7625 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7626 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7627 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7628 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7629 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7630 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7631 },
7632#endif
7633#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7634 [4] = {
7635 .is_gpio = 1,
7636 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7637 .gpio_data = sdc5_gpio_cfg
7638 }
7639#endif
7640};
7641
7642static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7643{
7644 int rc = 0;
7645 struct msm_sdcc_pin_cfg *curr;
7646 int n;
7647
7648 curr = &sdcc_pin_cfg_data[dev_id - 1];
7649 if (!curr->gpio_data)
7650 goto out;
7651
7652 for (n = 0; n < curr->gpio_data_size; n++) {
7653 if (enable) {
7654
7655 if (curr->gpio_data[n].always_on &&
7656 curr->gpio_data[n].is_enabled)
7657 continue;
7658 pr_debug("%s: enable: %s\n", __func__,
7659 curr->gpio_data[n].name);
7660 rc = gpio_request(curr->gpio_data[n].no,
7661 curr->gpio_data[n].name);
7662 if (rc) {
7663 pr_err("%s: gpio_request(%d, %s)"
7664 "failed", __func__,
7665 curr->gpio_data[n].no,
7666 curr->gpio_data[n].name);
7667 goto free_gpios;
7668 }
7669 /* set direction as output for all GPIOs */
7670 rc = gpio_direction_output(
7671 curr->gpio_data[n].no, 1);
7672 if (rc) {
7673 pr_err("%s: gpio_direction_output"
7674 "(%d, 1) failed\n", __func__,
7675 curr->gpio_data[n].no);
7676 goto free_gpios;
7677 }
7678 curr->gpio_data[n].is_enabled = 1;
7679 } else {
7680 /*
7681 * now free this GPIO which will put GPIO
7682 * in low power mode and will also put GPIO
7683 * in input mode
7684 */
7685 if (curr->gpio_data[n].always_on)
7686 continue;
7687 pr_debug("%s: disable: %s\n", __func__,
7688 curr->gpio_data[n].name);
7689 gpio_free(curr->gpio_data[n].no);
7690 curr->gpio_data[n].is_enabled = 0;
7691 }
7692 }
7693 curr->cfg_sts = enable;
7694 goto out;
7695
7696free_gpios:
7697 for (; n >= 0; n--)
7698 gpio_free(curr->gpio_data[n].no);
7699out:
7700 return rc;
7701}
7702
7703static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7704{
7705 int rc = 0;
7706 struct msm_sdcc_pin_cfg *curr;
7707 int n;
7708
7709 curr = &sdcc_pin_cfg_data[dev_id - 1];
7710 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7711 goto out;
7712
7713 if (enable) {
7714 /*
7715 * set up the normal driver strength and
7716 * pull config for pads
7717 */
7718 for (n = 0; n < curr->pad_drv_data_size; n++) {
7719 if (curr->sdio_lpm_gpio_cfg) {
7720 if (curr->pad_drv_on_data[n].drv ==
7721 TLMM_HDRV_SDC4_DATA)
7722 continue;
7723 }
7724 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7725 curr->pad_drv_on_data[n].drv_val);
7726 }
7727 for (n = 0; n < curr->pad_pull_data_size; n++) {
7728 if (curr->sdio_lpm_gpio_cfg) {
7729 if (curr->pad_pull_on_data[n].pull ==
7730 TLMM_PULL_SDC4_DATA)
7731 continue;
7732 }
7733 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7734 curr->pad_pull_on_data[n].pull_val);
7735 }
7736 } else {
7737 /* set the low power config for pads */
7738 for (n = 0; n < curr->pad_drv_data_size; n++) {
7739 if (curr->sdio_lpm_gpio_cfg) {
7740 if (curr->pad_drv_off_data[n].drv ==
7741 TLMM_HDRV_SDC4_DATA)
7742 continue;
7743 }
7744 msm_tlmm_set_hdrive(
7745 curr->pad_drv_off_data[n].drv,
7746 curr->pad_drv_off_data[n].drv_val);
7747 }
7748 for (n = 0; n < curr->pad_pull_data_size; n++) {
7749 if (curr->sdio_lpm_gpio_cfg) {
7750 if (curr->pad_pull_off_data[n].pull ==
7751 TLMM_PULL_SDC4_DATA)
7752 continue;
7753 }
7754 msm_tlmm_set_pull(
7755 curr->pad_pull_off_data[n].pull,
7756 curr->pad_pull_off_data[n].pull_val);
7757 }
7758 }
7759 curr->cfg_sts = enable;
7760out:
7761 return rc;
7762}
7763
7764struct sdcc_reg {
7765 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7766 const char *reg_name;
7767 /*
7768 * is set voltage supported for this regulator?
7769 * 0 = not supported, 1 = supported
7770 */
7771 unsigned char set_voltage_sup;
7772 /* voltage level to be set */
7773 unsigned int level;
7774 /* VDD/VCC/VCCQ voltage regulator handle */
7775 struct regulator *reg;
7776 /* is this regulator enabled? */
7777 bool enabled;
7778 /* is this regulator needs to be always on? */
7779 bool always_on;
7780 /* is operating power mode setting required for this regulator? */
7781 bool op_pwr_mode_sup;
7782 /* Load values for low power and high power mode */
7783 unsigned int lpm_uA;
7784 unsigned int hpm_uA;
7785};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007786/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007787static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7788/* only SDCC1 requires VCCQ voltage */
7789static struct sdcc_reg sdcc_vccq_reg_data[1];
7790/* all SDCC controllers may require voting for VDD PAD voltage */
7791static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7792
7793struct sdcc_reg_data {
7794 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7795 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7796 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7797 unsigned char sts; /* regulator enable/disable status */
7798};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007799/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007800static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7801
7802static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7803{
7804 int rc = 0;
7805
7806 /* Get the regulator handle */
7807 vreg->reg = regulator_get(NULL, vreg->reg_name);
7808 if (IS_ERR(vreg->reg)) {
7809 rc = PTR_ERR(vreg->reg);
7810 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7811 __func__, vreg->reg_name, rc);
7812 goto out;
7813 }
7814
7815 /* Set the voltage level if required */
7816 if (vreg->set_voltage_sup) {
7817 rc = regulator_set_voltage(vreg->reg, vreg->level,
7818 vreg->level);
7819 if (rc) {
7820 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7821 __func__, vreg->reg_name, rc);
7822 goto vreg_put;
7823 }
7824 }
7825 goto out;
7826
7827vreg_put:
7828 regulator_put(vreg->reg);
7829out:
7830 return rc;
7831}
7832
7833static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7834{
7835 regulator_put(vreg->reg);
7836}
7837
7838/* this init function should be called only once for each SDCC */
7839static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7840{
7841 int rc = 0;
7842 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7843 struct sdcc_reg_data *curr;
7844
7845 curr = &sdcc_vreg_data[dev_id - 1];
7846 curr_vdd_reg = curr->vdd_data;
7847 curr_vccq_reg = curr->vccq_data;
7848 curr_vddp_reg = curr->vddp_data;
7849
7850 if (init) {
7851 /*
7852 * get the regulator handle from voltage regulator framework
7853 * and then try to set the voltage level for the regulator
7854 */
7855 if (curr_vdd_reg) {
7856 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7857 if (rc)
7858 goto out;
7859 }
7860 if (curr_vccq_reg) {
7861 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7862 if (rc)
7863 goto vdd_reg_deinit;
7864 }
7865 if (curr_vddp_reg) {
7866 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
7867 if (rc)
7868 goto vccq_reg_deinit;
7869 }
7870 goto out;
7871 } else
7872 /* deregister with all regulators from regulator framework */
7873 goto vddp_reg_deinit;
7874
7875vddp_reg_deinit:
7876 if (curr_vddp_reg)
7877 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
7878vccq_reg_deinit:
7879 if (curr_vccq_reg)
7880 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
7881vdd_reg_deinit:
7882 if (curr_vdd_reg)
7883 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
7884out:
7885 return rc;
7886}
7887
7888static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
7889{
7890 int rc;
7891
7892 if (!vreg->enabled) {
7893 rc = regulator_enable(vreg->reg);
7894 if (rc) {
7895 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
7896 __func__, vreg->reg_name, rc);
7897 goto out;
7898 }
7899 vreg->enabled = 1;
7900 }
7901
7902 /* Put always_on regulator in HPM (high power mode) */
7903 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7904 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
7905 if (rc < 0) {
7906 pr_err("%s: reg=%s: HPM setting failed"
7907 " hpm_uA=%d, rc=%d\n",
7908 __func__, vreg->reg_name,
7909 vreg->hpm_uA, rc);
7910 goto vreg_disable;
7911 }
7912 rc = 0;
7913 }
7914 goto out;
7915
7916vreg_disable:
7917 regulator_disable(vreg->reg);
7918 vreg->enabled = 0;
7919out:
7920 return rc;
7921}
7922
7923static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
7924{
7925 int rc;
7926
7927 /* Never disable always_on regulator */
7928 if (!vreg->always_on) {
7929 rc = regulator_disable(vreg->reg);
7930 if (rc) {
7931 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
7932 __func__, vreg->reg_name, rc);
7933 goto out;
7934 }
7935 vreg->enabled = 0;
7936 }
7937
7938 /* Put always_on regulator in LPM (low power mode) */
7939 if (vreg->always_on && vreg->op_pwr_mode_sup) {
7940 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
7941 if (rc < 0) {
7942 pr_err("%s: reg=%s: LPM setting failed"
7943 " lpm_uA=%d, rc=%d\n",
7944 __func__,
7945 vreg->reg_name,
7946 vreg->lpm_uA, rc);
7947 goto out;
7948 }
7949 rc = 0;
7950 }
7951
7952out:
7953 return rc;
7954}
7955
7956static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
7957{
7958 int rc = 0;
7959 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7960 struct sdcc_reg_data *curr;
7961
7962 curr = &sdcc_vreg_data[dev_id - 1];
7963 curr_vdd_reg = curr->vdd_data;
7964 curr_vccq_reg = curr->vccq_data;
7965 curr_vddp_reg = curr->vddp_data;
7966
7967 /* check if regulators are initialized or not? */
7968 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
7969 (curr_vccq_reg && !curr_vccq_reg->reg) ||
7970 (curr_vddp_reg && !curr_vddp_reg->reg)) {
7971 /* initialize voltage regulators required for this SDCC */
7972 rc = msm_sdcc_vreg_init(dev_id, 1);
7973 if (rc) {
7974 pr_err("%s: regulator init failed = %d\n",
7975 __func__, rc);
7976 goto out;
7977 }
7978 }
7979
7980 if (curr->sts == enable)
7981 goto out;
7982
7983 if (curr_vdd_reg) {
7984 if (enable)
7985 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
7986 else
7987 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
7988 if (rc)
7989 goto out;
7990 }
7991
7992 if (curr_vccq_reg) {
7993 if (enable)
7994 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
7995 else
7996 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
7997 if (rc)
7998 goto out;
7999 }
8000
8001 if (curr_vddp_reg) {
8002 if (enable)
8003 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
8004 else
8005 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
8006 if (rc)
8007 goto out;
8008 }
8009 curr->sts = enable;
8010
8011out:
8012 return rc;
8013}
8014
8015static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
8016{
8017 u32 rc_pin_cfg = 0;
8018 u32 rc_vreg_cfg = 0;
8019 u32 rc = 0;
8020 struct platform_device *pdev;
8021 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8022
8023 pdev = container_of(dv, struct platform_device, dev);
8024
8025 /* setup gpio/pad */
8026 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8027 if (curr_pin_cfg->cfg_sts == !!vdd)
8028 goto setup_vreg;
8029
8030 if (curr_pin_cfg->is_gpio)
8031 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
8032 else
8033 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
8034
8035setup_vreg:
8036 /* setup voltage regulators */
8037 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
8038
8039 if (rc_pin_cfg || rc_vreg_cfg)
8040 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8041
8042 return rc;
8043}
8044
8045static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8046{
8047 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8048 struct platform_device *pdev;
8049
8050 pdev = container_of(dv, struct platform_device, dev);
8051 /* setup gpio/pad */
8052 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8053
8054 if (curr_pin_cfg->cfg_sts == active)
8055 return;
8056
8057 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8058 if (curr_pin_cfg->is_gpio)
8059 msm_sdcc_setup_gpio(pdev->id, active);
8060 else
8061 msm_sdcc_setup_pad(pdev->id, active);
8062 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8063}
8064
8065static int msm_sdc3_get_wpswitch(struct device *dev)
8066{
8067 struct platform_device *pdev;
8068 int status;
8069 pdev = container_of(dev, struct platform_device, dev);
8070
8071 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8072 if (status) {
8073 pr_err("%s:Failed to request GPIO %d\n",
8074 __func__, GPIO_SDC_WP);
8075 } else {
8076 status = gpio_direction_input(GPIO_SDC_WP);
8077 if (!status) {
8078 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8079 pr_info("%s: WP Status for Slot %d = %d\n",
8080 __func__, pdev->id, status);
8081 }
8082 gpio_free(GPIO_SDC_WP);
8083 }
8084 return status;
8085}
8086
8087#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8088int sdc5_register_status_notify(void (*callback)(int, void *),
8089 void *dev_id)
8090{
8091 sdc5_status_notify_cb = callback;
8092 sdc5_status_notify_cb_devid = dev_id;
8093 return 0;
8094}
8095#endif
8096
8097#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8098int sdc2_register_status_notify(void (*callback)(int, void *),
8099 void *dev_id)
8100{
8101 sdc2_status_notify_cb = callback;
8102 sdc2_status_notify_cb_devid = dev_id;
8103 return 0;
8104}
8105#endif
8106
8107/* Interrupt handler for SDC2 and SDC5 detection
8108 * This function uses dual-edge interrputs settings in order
8109 * to get SDIO detection when the GPIO is rising and SDIO removal
8110 * when the GPIO is falling */
8111static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8112{
8113 int status;
8114
8115 if (!machine_is_msm8x60_fusion() &&
8116 !machine_is_msm8x60_fusn_ffa())
8117 return IRQ_NONE;
8118
8119 status = gpio_get_value(MDM2AP_SYNC);
8120 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8121 __func__, status);
8122
8123#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8124 if (sdc2_status_notify_cb) {
8125 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8126 sdc2_status_notify_cb(status,
8127 sdc2_status_notify_cb_devid);
8128 }
8129#endif
8130
8131#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8132 if (sdc5_status_notify_cb) {
8133 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8134 sdc5_status_notify_cb(status,
8135 sdc5_status_notify_cb_devid);
8136 }
8137#endif
8138 return IRQ_HANDLED;
8139}
8140
8141static int msm8x60_multi_sdio_init(void)
8142{
8143 int ret, irq_num;
8144
8145 if (!machine_is_msm8x60_fusion() &&
8146 !machine_is_msm8x60_fusn_ffa())
8147 return 0;
8148
8149 ret = msm_gpiomux_get(MDM2AP_SYNC);
8150 if (ret) {
8151 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8152 __func__, MDM2AP_SYNC, ret);
8153 return ret;
8154 }
8155
8156 irq_num = gpio_to_irq(MDM2AP_SYNC);
8157
8158 ret = request_irq(irq_num,
8159 msm8x60_multi_sdio_slot_status_irq,
8160 IRQ_TYPE_EDGE_BOTH,
8161 "sdio_multidetection", NULL);
8162
8163 if (ret) {
8164 pr_err("%s:Failed to request irq, ret=%d\n",
8165 __func__, ret);
8166 return ret;
8167 }
8168
8169 return ret;
8170}
8171
8172#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8173#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8174static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8175{
8176 int status;
8177
8178 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8179 , "SD_HW_Detect");
8180 if (status) {
8181 pr_err("%s:Failed to request GPIO %d\n", __func__,
8182 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8183 } else {
8184 status = gpio_direction_input(
8185 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8186 if (!status)
8187 status = !(gpio_get_value_cansleep(
8188 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8189 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8190 }
8191 return (unsigned int) status;
8192}
8193#endif
8194#endif
8195
8196#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8197static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8198{
8199 struct platform_device *pdev;
8200 enum msm_mpm_pin pin;
8201 int ret = 0;
8202
8203 pdev = container_of(dev, struct platform_device, dev);
8204
8205 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8206 if (pdev->id == 4)
8207 pin = MSM_MPM_PIN_SDC4_DAT1;
8208 else
8209 return -EINVAL;
8210
8211 switch (mode) {
8212 case SDC_DAT1_DISABLE:
8213 ret = msm_mpm_enable_pin(pin, 0);
8214 break;
8215 case SDC_DAT1_ENABLE:
8216 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8217 ret = msm_mpm_enable_pin(pin, 1);
8218 break;
8219 case SDC_DAT1_ENWAKE:
8220 ret = msm_mpm_set_pin_wake(pin, 1);
8221 break;
8222 case SDC_DAT1_DISWAKE:
8223 ret = msm_mpm_set_pin_wake(pin, 0);
8224 break;
8225 default:
8226 ret = -EINVAL;
8227 break;
8228 }
8229 return ret;
8230}
8231#endif
8232#endif
8233
8234#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8235static struct mmc_platform_data msm8x60_sdc1_data = {
8236 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8237 .translate_vdd = msm_sdcc_setup_power,
8238#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8239 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8240#else
8241 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8242#endif
8243 .msmsdcc_fmin = 400000,
8244 .msmsdcc_fmid = 24000000,
8245 .msmsdcc_fmax = 48000000,
8246 .nonremovable = 1,
8247 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008248};
8249#endif
8250
8251#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8252static struct mmc_platform_data msm8x60_sdc2_data = {
8253 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8254 .translate_vdd = msm_sdcc_setup_power,
8255 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8256 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8257 .msmsdcc_fmin = 400000,
8258 .msmsdcc_fmid = 24000000,
8259 .msmsdcc_fmax = 48000000,
8260 .nonremovable = 0,
8261 .pclk_src_dfab = 1,
8262 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008263#ifdef CONFIG_MSM_SDIO_AL
8264 .is_sdio_al_client = 1,
8265#endif
8266};
8267#endif
8268
8269#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8270static struct mmc_platform_data msm8x60_sdc3_data = {
8271 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8272 .translate_vdd = msm_sdcc_setup_power,
8273 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8274 .wpswitch = msm_sdc3_get_wpswitch,
8275#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8276 .status = msm8x60_sdcc_slot_status,
8277 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8278 PMIC_GPIO_SDC3_DET - 1),
8279 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8280#endif
8281 .msmsdcc_fmin = 400000,
8282 .msmsdcc_fmid = 24000000,
8283 .msmsdcc_fmax = 48000000,
8284 .nonremovable = 0,
8285 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008286};
8287#endif
8288
8289#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8290static struct mmc_platform_data msm8x60_sdc4_data = {
8291 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8292 .translate_vdd = msm_sdcc_setup_power,
8293 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8294 .msmsdcc_fmin = 400000,
8295 .msmsdcc_fmid = 24000000,
8296 .msmsdcc_fmax = 48000000,
8297 .nonremovable = 0,
8298 .pclk_src_dfab = 1,
8299 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008300};
8301#endif
8302
8303#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8304static struct mmc_platform_data msm8x60_sdc5_data = {
8305 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8306 .translate_vdd = msm_sdcc_setup_power,
8307 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8308 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8309 .msmsdcc_fmin = 400000,
8310 .msmsdcc_fmid = 24000000,
8311 .msmsdcc_fmax = 48000000,
8312 .nonremovable = 0,
8313 .pclk_src_dfab = 1,
8314 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008315#ifdef CONFIG_MSM_SDIO_AL
8316 .is_sdio_al_client = 1,
8317#endif
8318};
8319#endif
8320
8321static void __init msm8x60_init_mmc(void)
8322{
8323#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8324 /* SDCC1 : eMMC card connected */
8325 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8326 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8327 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8328 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308329 sdcc_vreg_data[0].vdd_data->always_on = 1;
8330 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8331 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8332 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008333
8334 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8335 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8336 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8337 sdcc_vreg_data[0].vccq_data->always_on = 1;
8338
8339 msm_add_sdcc(1, &msm8x60_sdc1_data);
8340#endif
8341#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8342 /*
8343 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8344 * and no card is connected on 8660 SURF/FFA/FLUID.
8345 */
8346 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8347 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8348 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8349 sdcc_vreg_data[1].vdd_data->level = 1800000;
8350
8351 sdcc_vreg_data[1].vccq_data = NULL;
8352
8353 if (machine_is_msm8x60_fusion())
8354 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8355 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8356#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8357 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8358 msm_sdcc_setup_gpio(2, 1);
8359#endif
8360 msm_add_sdcc(2, &msm8x60_sdc2_data);
8361 }
8362#endif
8363#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8364 /* SDCC3 : External card slot connected */
8365 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8366 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8367 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8368 sdcc_vreg_data[2].vdd_data->level = 2850000;
8369 sdcc_vreg_data[2].vdd_data->always_on = 1;
8370 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8371 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8372 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8373
8374 sdcc_vreg_data[2].vccq_data = NULL;
8375
8376 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8377 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8378 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8379 sdcc_vreg_data[2].vddp_data->level = 2850000;
8380 sdcc_vreg_data[2].vddp_data->always_on = 1;
8381 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8382 /* Sleep current required is ~300 uA. But min. RPM
8383 * vote can be in terms of mA (min. 1 mA).
8384 * So let's vote for 2 mA during sleep.
8385 */
8386 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8387 /* Max. Active current required is 16 mA */
8388 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8389
8390 if (machine_is_msm8x60_fluid())
8391 msm8x60_sdc3_data.wpswitch = NULL;
8392 msm_add_sdcc(3, &msm8x60_sdc3_data);
8393#endif
8394#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8395 /* SDCC4 : WLAN WCN1314 chip is connected */
8396 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8397 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8398 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8399 sdcc_vreg_data[3].vdd_data->level = 1800000;
8400
8401 sdcc_vreg_data[3].vccq_data = NULL;
8402
8403 msm_add_sdcc(4, &msm8x60_sdc4_data);
8404#endif
8405#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8406 /*
8407 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8408 * and no card is connected on 8660 SURF/FFA/FLUID.
8409 */
8410 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8411 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8412 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8413 sdcc_vreg_data[4].vdd_data->level = 1800000;
8414
8415 sdcc_vreg_data[4].vccq_data = NULL;
8416
8417 if (machine_is_msm8x60_fusion())
8418 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8419 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8420#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8421 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8422 msm_sdcc_setup_gpio(5, 1);
8423#endif
8424 msm_add_sdcc(5, &msm8x60_sdc5_data);
8425 }
8426#endif
8427}
8428
8429#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8430static inline void display_common_power(int on) {}
8431#else
8432
8433#define _GET_REGULATOR(var, name) do { \
8434 if (var == NULL) { \
8435 var = regulator_get(NULL, name); \
8436 if (IS_ERR(var)) { \
8437 pr_err("'%s' regulator not found, rc=%ld\n", \
8438 name, PTR_ERR(var)); \
8439 var = NULL; \
8440 } \
8441 } \
8442} while (0)
8443
8444static int dsub_regulator(int on)
8445{
8446 static struct regulator *dsub_reg;
8447 static struct regulator *mpp0_reg;
8448 static int dsub_reg_enabled;
8449 int rc = 0;
8450
8451 _GET_REGULATOR(dsub_reg, "8901_l3");
8452 if (IS_ERR(dsub_reg)) {
8453 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8454 __func__, PTR_ERR(dsub_reg));
8455 return PTR_ERR(dsub_reg);
8456 }
8457
8458 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8459 if (IS_ERR(mpp0_reg)) {
8460 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8461 __func__, PTR_ERR(mpp0_reg));
8462 return PTR_ERR(mpp0_reg);
8463 }
8464
8465 if (on && !dsub_reg_enabled) {
8466 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8467 if (rc) {
8468 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8469 " err=%d", __func__, rc);
8470 goto dsub_regulator_err;
8471 }
8472 rc = regulator_enable(dsub_reg);
8473 if (rc) {
8474 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8475 " err=%d", __func__, rc);
8476 goto dsub_regulator_err;
8477 }
8478 rc = regulator_enable(mpp0_reg);
8479 if (rc) {
8480 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8481 " err=%d", __func__, rc);
8482 goto dsub_regulator_err;
8483 }
8484 dsub_reg_enabled = 1;
8485 } else if (!on && dsub_reg_enabled) {
8486 rc = regulator_disable(dsub_reg);
8487 if (rc)
8488 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8489 " err=%d", __func__, rc);
8490 rc = regulator_disable(mpp0_reg);
8491 if (rc)
8492 printk(KERN_WARNING "%s: failed to disable reg "
8493 "8901_mpp0 err=%d", __func__, rc);
8494 dsub_reg_enabled = 0;
8495 }
8496
8497 return rc;
8498
8499dsub_regulator_err:
8500 regulator_put(mpp0_reg);
8501 regulator_put(dsub_reg);
8502 return rc;
8503}
8504
8505static int display_power_on;
8506static void setup_display_power(void)
8507{
8508 if (display_power_on)
8509 if (lcdc_vga_enabled) {
8510 dsub_regulator(1);
8511 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8512 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8513 if (machine_is_msm8x60_ffa() ||
8514 machine_is_msm8x60_fusn_ffa())
8515 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8516 } else {
8517 dsub_regulator(0);
8518 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8519 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8520 if (machine_is_msm8x60_ffa() ||
8521 machine_is_msm8x60_fusn_ffa())
8522 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8523 }
8524 else {
8525 dsub_regulator(0);
8526 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8527 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8528 /* BACKLIGHT */
8529 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8530 /* LVDS */
8531 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8532 }
8533}
8534
8535#define _GET_REGULATOR(var, name) do { \
8536 if (var == NULL) { \
8537 var = regulator_get(NULL, name); \
8538 if (IS_ERR(var)) { \
8539 pr_err("'%s' regulator not found, rc=%ld\n", \
8540 name, PTR_ERR(var)); \
8541 var = NULL; \
8542 } \
8543 } \
8544} while (0)
8545
8546#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8547
8548static void display_common_power(int on)
8549{
8550 int rc;
8551 static struct regulator *display_reg;
8552
8553 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8554 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8555 if (on) {
8556 /* LVDS */
8557 _GET_REGULATOR(display_reg, "8901_l2");
8558 if (!display_reg)
8559 return;
8560 rc = regulator_set_voltage(display_reg,
8561 3300000, 3300000);
8562 if (rc)
8563 goto out;
8564 rc = regulator_enable(display_reg);
8565 if (rc)
8566 goto out;
8567 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8568 "LVDS_STDN_OUT_N");
8569 if (rc) {
8570 printk(KERN_ERR "%s: LVDS gpio %d request"
8571 "failed\n", __func__,
8572 GPIO_LVDS_SHUTDOWN_N);
8573 goto out2;
8574 }
8575
8576 /* BACKLIGHT */
8577 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8578 if (rc) {
8579 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8580 "failed\n", __func__,
8581 GPIO_BACKLIGHT_EN);
8582 goto out3;
8583 }
8584
8585 if (machine_is_msm8x60_ffa() ||
8586 machine_is_msm8x60_fusn_ffa()) {
8587 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8588 "DONGLE_PWR_EN");
8589 if (rc) {
8590 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8591 " %d request failed\n", __func__,
8592 GPIO_DONGLE_PWR_EN);
8593 goto out4;
8594 }
8595 }
8596
8597 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8598 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8599 if (machine_is_msm8x60_ffa() ||
8600 machine_is_msm8x60_fusn_ffa())
8601 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8602 mdelay(20);
8603 display_power_on = 1;
8604 setup_display_power();
8605 } else {
8606 if (display_power_on) {
8607 display_power_on = 0;
8608 setup_display_power();
8609 mdelay(20);
8610 if (machine_is_msm8x60_ffa() ||
8611 machine_is_msm8x60_fusn_ffa())
8612 gpio_free(GPIO_DONGLE_PWR_EN);
8613 goto out4;
8614 }
8615 }
8616 }
8617#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8618 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8619 else if (machine_is_msm8x60_fluid()) {
8620 static struct regulator *fluid_reg;
8621 static struct regulator *fluid_reg2;
8622
8623 if (on) {
8624 _GET_REGULATOR(fluid_reg, "8901_l2");
8625 if (!fluid_reg)
8626 return;
8627 _GET_REGULATOR(fluid_reg2, "8058_s3");
8628 if (!fluid_reg2) {
8629 regulator_put(fluid_reg);
8630 return;
8631 }
8632 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8633 if (rc) {
8634 regulator_put(fluid_reg2);
8635 regulator_put(fluid_reg);
8636 return;
8637 }
8638 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8639 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8640 regulator_enable(fluid_reg);
8641 regulator_enable(fluid_reg2);
8642 msleep(20);
8643 gpio_direction_output(GPIO_RESX_N, 0);
8644 udelay(10);
8645 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8646 display_power_on = 1;
8647 setup_display_power();
8648 } else {
8649 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8650 gpio_free(GPIO_RESX_N);
8651 msleep(20);
8652 regulator_disable(fluid_reg2);
8653 regulator_disable(fluid_reg);
8654 regulator_put(fluid_reg2);
8655 regulator_put(fluid_reg);
8656 display_power_on = 0;
8657 setup_display_power();
8658 fluid_reg = NULL;
8659 fluid_reg2 = NULL;
8660 }
8661 }
8662#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008663#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8664 else if (machine_is_msm8x60_dragon()) {
8665 static struct regulator *dragon_reg;
8666 static struct regulator *dragon_reg2;
8667
8668 if (on) {
8669 _GET_REGULATOR(dragon_reg, "8901_l2");
8670 if (!dragon_reg)
8671 return;
8672 _GET_REGULATOR(dragon_reg2, "8058_l16");
8673 if (!dragon_reg2) {
8674 regulator_put(dragon_reg);
8675 dragon_reg = NULL;
8676 return;
8677 }
8678
8679 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8680 if (rc) {
8681 pr_err("%s: gpio %d request failed with rc=%d\n",
8682 __func__, GPIO_NT35582_BL_EN, rc);
8683 regulator_put(dragon_reg);
8684 regulator_put(dragon_reg2);
8685 dragon_reg = NULL;
8686 dragon_reg2 = NULL;
8687 return;
8688 }
8689
8690 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8691 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8692 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8693 pr_err("%s: config gpio '%d' failed!\n",
8694 __func__, GPIO_NT35582_RESET);
8695 gpio_free(GPIO_NT35582_BL_EN);
8696 regulator_put(dragon_reg);
8697 regulator_put(dragon_reg2);
8698 dragon_reg = NULL;
8699 dragon_reg2 = NULL;
8700 return;
8701 }
8702
8703 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8704 if (rc) {
8705 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8706 __func__, GPIO_NT35582_RESET, rc);
8707 gpio_free(GPIO_NT35582_BL_EN);
8708 regulator_put(dragon_reg);
8709 regulator_put(dragon_reg2);
8710 dragon_reg = NULL;
8711 dragon_reg2 = NULL;
8712 return;
8713 }
8714
8715 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8716 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8717 regulator_enable(dragon_reg);
8718 regulator_enable(dragon_reg2);
8719 msleep(20);
8720
8721 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8722 msleep(20);
8723 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8724 msleep(20);
8725 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8726 msleep(50);
8727
8728 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8729
8730 display_power_on = 1;
8731 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8732 gpio_free(GPIO_NT35582_RESET);
8733 gpio_free(GPIO_NT35582_BL_EN);
8734 regulator_disable(dragon_reg2);
8735 regulator_disable(dragon_reg);
8736 regulator_put(dragon_reg2);
8737 regulator_put(dragon_reg);
8738 display_power_on = 0;
8739 dragon_reg = NULL;
8740 dragon_reg2 = NULL;
8741 }
8742 }
8743#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008744 return;
8745
8746out4:
8747 gpio_free(GPIO_BACKLIGHT_EN);
8748out3:
8749 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8750out2:
8751 regulator_disable(display_reg);
8752out:
8753 regulator_put(display_reg);
8754 display_reg = NULL;
8755}
8756#undef _GET_REGULATOR
8757#endif
8758
8759static int mipi_dsi_panel_power(int on);
8760
8761#define LCDC_NUM_GPIO 28
8762#define LCDC_GPIO_START 0
8763
8764static void lcdc_samsung_panel_power(int on)
8765{
8766 int n, ret = 0;
8767
8768 display_common_power(on);
8769
8770 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8771 if (on) {
8772 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8773 if (unlikely(ret)) {
8774 pr_err("%s not able to get gpio\n", __func__);
8775 break;
8776 }
8777 } else
8778 gpio_free(LCDC_GPIO_START + n);
8779 }
8780
8781 if (ret) {
8782 for (n--; n >= 0; n--)
8783 gpio_free(LCDC_GPIO_START + n);
8784 }
8785
8786 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8787}
8788
8789#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8790#define _GET_REGULATOR(var, name) do { \
8791 var = regulator_get(NULL, name); \
8792 if (IS_ERR(var)) { \
8793 pr_err("'%s' regulator not found, rc=%ld\n", \
8794 name, IS_ERR(var)); \
8795 var = NULL; \
8796 return -ENODEV; \
8797 } \
8798} while (0)
8799
8800static int hdmi_enable_5v(int on)
8801{
8802 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8803 static struct regulator *reg_8901_mpp0; /* External 5V */
8804 static int prev_on;
8805 int rc;
8806
8807 if (on == prev_on)
8808 return 0;
8809
8810 if (!reg_8901_hdmi_mvs)
8811 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8812 if (!reg_8901_mpp0)
8813 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8814
8815 if (on) {
8816 rc = regulator_enable(reg_8901_mpp0);
8817 if (rc) {
8818 pr_err("'%s' regulator enable failed, rc=%d\n",
8819 "reg_8901_mpp0", rc);
8820 return rc;
8821 }
8822 rc = regulator_enable(reg_8901_hdmi_mvs);
8823 if (rc) {
8824 pr_err("'%s' regulator enable failed, rc=%d\n",
8825 "8901_hdmi_mvs", rc);
8826 return rc;
8827 }
8828 pr_info("%s(on): success\n", __func__);
8829 } else {
8830 rc = regulator_disable(reg_8901_hdmi_mvs);
8831 if (rc)
8832 pr_warning("'%s' regulator disable failed, rc=%d\n",
8833 "8901_hdmi_mvs", rc);
8834 rc = regulator_disable(reg_8901_mpp0);
8835 if (rc)
8836 pr_warning("'%s' regulator disable failed, rc=%d\n",
8837 "reg_8901_mpp0", rc);
8838 pr_info("%s(off): success\n", __func__);
8839 }
8840
8841 prev_on = on;
8842
8843 return 0;
8844}
8845
8846static int hdmi_core_power(int on, int show)
8847{
8848 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8849 static int prev_on;
8850 int rc;
8851
8852 if (on == prev_on)
8853 return 0;
8854
8855 if (!reg_8058_l16)
8856 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8857
8858 if (on) {
8859 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8860 if (!rc)
8861 rc = regulator_enable(reg_8058_l16);
8862 if (rc) {
8863 pr_err("'%s' regulator enable failed, rc=%d\n",
8864 "8058_l16", rc);
8865 return rc;
8866 }
8867 rc = gpio_request(170, "HDMI_DDC_CLK");
8868 if (rc) {
8869 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8870 "HDMI_DDC_CLK", 170, rc);
8871 goto error1;
8872 }
8873 rc = gpio_request(171, "HDMI_DDC_DATA");
8874 if (rc) {
8875 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8876 "HDMI_DDC_DATA", 171, rc);
8877 goto error2;
8878 }
8879 rc = gpio_request(172, "HDMI_HPD");
8880 if (rc) {
8881 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8882 "HDMI_HPD", 172, rc);
8883 goto error3;
8884 }
8885 pr_info("%s(on): success\n", __func__);
8886 } else {
8887 gpio_free(170);
8888 gpio_free(171);
8889 gpio_free(172);
8890 rc = regulator_disable(reg_8058_l16);
8891 if (rc)
8892 pr_warning("'%s' regulator disable failed, rc=%d\n",
8893 "8058_l16", rc);
8894 pr_info("%s(off): success\n", __func__);
8895 }
8896
8897 prev_on = on;
8898
8899 return 0;
8900
8901error3:
8902 gpio_free(171);
8903error2:
8904 gpio_free(170);
8905error1:
8906 regulator_disable(reg_8058_l16);
8907 return rc;
8908}
8909
8910static int hdmi_cec_power(int on)
8911{
8912 static struct regulator *reg_8901_l3; /* HDMI_CEC */
8913 static int prev_on;
8914 int rc;
8915
8916 if (on == prev_on)
8917 return 0;
8918
8919 if (!reg_8901_l3)
8920 _GET_REGULATOR(reg_8901_l3, "8901_l3");
8921
8922 if (on) {
8923 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
8924 if (!rc)
8925 rc = regulator_enable(reg_8901_l3);
8926 if (rc) {
8927 pr_err("'%s' regulator enable failed, rc=%d\n",
8928 "8901_l3", rc);
8929 return rc;
8930 }
8931 rc = gpio_request(169, "HDMI_CEC_VAR");
8932 if (rc) {
8933 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
8934 "HDMI_CEC_VAR", 169, rc);
8935 goto error;
8936 }
8937 pr_info("%s(on): success\n", __func__);
8938 } else {
8939 gpio_free(169);
8940 rc = regulator_disable(reg_8901_l3);
8941 if (rc)
8942 pr_warning("'%s' regulator disable failed, rc=%d\n",
8943 "8901_l3", rc);
8944 pr_info("%s(off): success\n", __func__);
8945 }
8946
8947 prev_on = on;
8948
8949 return 0;
8950error:
8951 regulator_disable(reg_8901_l3);
8952 return rc;
8953}
8954
8955#undef _GET_REGULATOR
8956
8957#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
8958
8959static int lcdc_panel_power(int on)
8960{
8961 int flag_on = !!on;
8962 static int lcdc_power_save_on;
8963
8964 if (lcdc_power_save_on == flag_on)
8965 return 0;
8966
8967 lcdc_power_save_on = flag_on;
8968
8969 lcdc_samsung_panel_power(on);
8970
8971 return 0;
8972}
8973
8974#ifdef CONFIG_MSM_BUS_SCALING
Nagamalleswararao Ganji5fabbd62011-11-06 23:10:43 -08008975
8976static struct msm_bus_vectors rotator_init_vectors[] = {
8977 {
8978 .src = MSM_BUS_MASTER_ROTATOR,
8979 .dst = MSM_BUS_SLAVE_SMI,
8980 .ab = 0,
8981 .ib = 0,
8982 },
8983 {
8984 .src = MSM_BUS_MASTER_ROTATOR,
8985 .dst = MSM_BUS_SLAVE_EBI_CH0,
8986 .ab = 0,
8987 .ib = 0,
8988 },
8989};
8990
8991static struct msm_bus_vectors rotator_ui_vectors[] = {
8992 {
8993 .src = MSM_BUS_MASTER_ROTATOR,
8994 .dst = MSM_BUS_SLAVE_SMI,
8995 .ab = 0,
8996 .ib = 0,
8997 },
8998 {
8999 .src = MSM_BUS_MASTER_ROTATOR,
9000 .dst = MSM_BUS_SLAVE_EBI_CH0,
9001 .ab = (1024 * 600 * 4 * 2 * 60),
9002 .ib = (1024 * 600 * 4 * 2 * 60 * 1.5),
9003 },
9004};
9005
9006static struct msm_bus_vectors rotator_vga_vectors[] = {
9007 {
9008 .src = MSM_BUS_MASTER_ROTATOR,
9009 .dst = MSM_BUS_SLAVE_SMI,
9010 .ab = (640 * 480 * 2 * 2 * 30),
9011 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9012 },
9013 {
9014 .src = MSM_BUS_MASTER_ROTATOR,
9015 .dst = MSM_BUS_SLAVE_EBI_CH0,
9016 .ab = (640 * 480 * 2 * 2 * 30),
9017 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9018 },
9019};
9020
9021static struct msm_bus_vectors rotator_720p_vectors[] = {
9022 {
9023 .src = MSM_BUS_MASTER_ROTATOR,
9024 .dst = MSM_BUS_SLAVE_SMI,
9025 .ab = (1280 * 736 * 2 * 2 * 30),
9026 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9027 },
9028 {
9029 .src = MSM_BUS_MASTER_ROTATOR,
9030 .dst = MSM_BUS_SLAVE_EBI_CH0,
9031 .ab = (1280 * 736 * 2 * 2 * 30),
9032 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9033 },
9034};
9035
9036static struct msm_bus_vectors rotator_1080p_vectors[] = {
9037 {
9038 .src = MSM_BUS_MASTER_ROTATOR,
9039 .dst = MSM_BUS_SLAVE_SMI,
9040 .ab = (1920 * 1088 * 2 * 2 * 30),
9041 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9042 },
9043 {
9044 .src = MSM_BUS_MASTER_ROTATOR,
9045 .dst = MSM_BUS_SLAVE_EBI_CH0,
9046 .ab = (1920 * 1088 * 2 * 2 * 30),
9047 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9048 },
9049};
9050
9051static struct msm_bus_paths rotator_bus_scale_usecases[] = {
9052 {
9053 ARRAY_SIZE(rotator_init_vectors),
9054 rotator_init_vectors,
9055 },
9056 {
9057 ARRAY_SIZE(rotator_ui_vectors),
9058 rotator_ui_vectors,
9059 },
9060 {
9061 ARRAY_SIZE(rotator_vga_vectors),
9062 rotator_vga_vectors,
9063 },
9064 {
9065 ARRAY_SIZE(rotator_720p_vectors),
9066 rotator_720p_vectors,
9067 },
9068 {
9069 ARRAY_SIZE(rotator_1080p_vectors),
9070 rotator_1080p_vectors,
9071 },
9072};
9073
9074struct msm_bus_scale_pdata rotator_bus_scale_pdata = {
9075 rotator_bus_scale_usecases,
9076 ARRAY_SIZE(rotator_bus_scale_usecases),
9077 .name = "rotator",
9078};
9079
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009080static struct msm_bus_vectors mdp_init_vectors[] = {
9081 /* For now, 0th array entry is reserved.
9082 * Please leave 0 as is and don't use it
9083 */
9084 {
9085 .src = MSM_BUS_MASTER_MDP_PORT0,
9086 .dst = MSM_BUS_SLAVE_SMI,
9087 .ab = 0,
9088 .ib = 0,
9089 },
9090 /* Master and slaves can be from different fabrics */
9091 {
9092 .src = MSM_BUS_MASTER_MDP_PORT0,
9093 .dst = MSM_BUS_SLAVE_EBI_CH0,
9094 .ab = 0,
9095 .ib = 0,
9096 },
9097};
9098
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009099#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9100static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
9101 /* If HDMI is used as primary */
9102 {
9103 .src = MSM_BUS_MASTER_MDP_PORT0,
9104 .dst = MSM_BUS_SLAVE_SMI,
9105 .ab = 2000000000,
9106 .ib = 2000000000,
9107 },
9108 /* Master and slaves can be from different fabrics */
9109 {
9110 .src = MSM_BUS_MASTER_MDP_PORT0,
9111 .dst = MSM_BUS_SLAVE_EBI_CH0,
9112 .ab = 2000000000,
9113 .ib = 2000000000,
9114 },
9115};
9116
9117static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9118 {
9119 ARRAY_SIZE(mdp_init_vectors),
9120 mdp_init_vectors,
9121 },
9122 {
9123 ARRAY_SIZE(hdmi_as_primary_vectors),
9124 hdmi_as_primary_vectors,
9125 },
9126 {
9127 ARRAY_SIZE(hdmi_as_primary_vectors),
9128 hdmi_as_primary_vectors,
9129 },
9130 {
9131 ARRAY_SIZE(hdmi_as_primary_vectors),
9132 hdmi_as_primary_vectors,
9133 },
9134 {
9135 ARRAY_SIZE(hdmi_as_primary_vectors),
9136 hdmi_as_primary_vectors,
9137 },
9138 {
9139 ARRAY_SIZE(hdmi_as_primary_vectors),
9140 hdmi_as_primary_vectors,
9141 },
9142};
9143#else
9144#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009145static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9146 /* Default case static display/UI/2d/3d if FB SMI */
9147 {
9148 .src = MSM_BUS_MASTER_MDP_PORT0,
9149 .dst = MSM_BUS_SLAVE_SMI,
9150 .ab = 388800000,
9151 .ib = 486000000,
9152 },
9153 /* Master and slaves can be from different fabrics */
9154 {
9155 .src = MSM_BUS_MASTER_MDP_PORT0,
9156 .dst = MSM_BUS_SLAVE_EBI_CH0,
9157 .ab = 0,
9158 .ib = 0,
9159 },
9160};
9161
9162static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9163 /* Default case static display/UI/2d/3d if FB SMI */
9164 {
9165 .src = MSM_BUS_MASTER_MDP_PORT0,
9166 .dst = MSM_BUS_SLAVE_SMI,
9167 .ab = 0,
9168 .ib = 0,
9169 },
9170 /* Master and slaves can be from different fabrics */
9171 {
9172 .src = MSM_BUS_MASTER_MDP_PORT0,
9173 .dst = MSM_BUS_SLAVE_EBI_CH0,
9174 .ab = 388800000,
9175 .ib = 486000000 * 2,
9176 },
9177};
9178static struct msm_bus_vectors mdp_vga_vectors[] = {
9179 /* VGA and less video */
9180 {
9181 .src = MSM_BUS_MASTER_MDP_PORT0,
9182 .dst = MSM_BUS_SLAVE_SMI,
9183 .ab = 458092800,
9184 .ib = 572616000,
9185 },
9186 {
9187 .src = MSM_BUS_MASTER_MDP_PORT0,
9188 .dst = MSM_BUS_SLAVE_EBI_CH0,
9189 .ab = 458092800,
9190 .ib = 572616000 * 2,
9191 },
9192};
9193static struct msm_bus_vectors mdp_720p_vectors[] = {
9194 /* 720p and less video */
9195 {
9196 .src = MSM_BUS_MASTER_MDP_PORT0,
9197 .dst = MSM_BUS_SLAVE_SMI,
9198 .ab = 471744000,
9199 .ib = 589680000,
9200 },
9201 /* Master and slaves can be from different fabrics */
9202 {
9203 .src = MSM_BUS_MASTER_MDP_PORT0,
9204 .dst = MSM_BUS_SLAVE_EBI_CH0,
9205 .ab = 471744000,
9206 .ib = 589680000 * 2,
9207 },
9208};
9209
9210static struct msm_bus_vectors mdp_1080p_vectors[] = {
9211 /* 1080p and less video */
9212 {
9213 .src = MSM_BUS_MASTER_MDP_PORT0,
9214 .dst = MSM_BUS_SLAVE_SMI,
9215 .ab = 575424000,
9216 .ib = 719280000,
9217 },
9218 /* Master and slaves can be from different fabrics */
9219 {
9220 .src = MSM_BUS_MASTER_MDP_PORT0,
9221 .dst = MSM_BUS_SLAVE_EBI_CH0,
9222 .ab = 575424000,
9223 .ib = 719280000 * 2,
9224 },
9225};
9226
9227#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009228static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9229 /* Default case static display/UI/2d/3d if FB SMI */
9230 {
9231 .src = MSM_BUS_MASTER_MDP_PORT0,
9232 .dst = MSM_BUS_SLAVE_SMI,
9233 .ab = 175110000,
9234 .ib = 218887500,
9235 },
9236 /* Master and slaves can be from different fabrics */
9237 {
9238 .src = MSM_BUS_MASTER_MDP_PORT0,
9239 .dst = MSM_BUS_SLAVE_EBI_CH0,
9240 .ab = 0,
9241 .ib = 0,
9242 },
9243};
9244
9245static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9246 /* Default case static display/UI/2d/3d if FB SMI */
9247 {
9248 .src = MSM_BUS_MASTER_MDP_PORT0,
9249 .dst = MSM_BUS_SLAVE_SMI,
9250 .ab = 0,
9251 .ib = 0,
9252 },
9253 /* Master and slaves can be from different fabrics */
9254 {
9255 .src = MSM_BUS_MASTER_MDP_PORT0,
9256 .dst = MSM_BUS_SLAVE_EBI_CH0,
9257 .ab = 216000000,
9258 .ib = 270000000 * 2,
9259 },
9260};
9261static struct msm_bus_vectors mdp_vga_vectors[] = {
9262 /* VGA and less video */
9263 {
9264 .src = MSM_BUS_MASTER_MDP_PORT0,
9265 .dst = MSM_BUS_SLAVE_SMI,
9266 .ab = 216000000,
9267 .ib = 270000000,
9268 },
9269 {
9270 .src = MSM_BUS_MASTER_MDP_PORT0,
9271 .dst = MSM_BUS_SLAVE_EBI_CH0,
9272 .ab = 216000000,
9273 .ib = 270000000 * 2,
9274 },
9275};
9276
9277static struct msm_bus_vectors mdp_720p_vectors[] = {
9278 /* 720p and less video */
9279 {
9280 .src = MSM_BUS_MASTER_MDP_PORT0,
9281 .dst = MSM_BUS_SLAVE_SMI,
9282 .ab = 230400000,
9283 .ib = 288000000,
9284 },
9285 /* Master and slaves can be from different fabrics */
9286 {
9287 .src = MSM_BUS_MASTER_MDP_PORT0,
9288 .dst = MSM_BUS_SLAVE_EBI_CH0,
9289 .ab = 230400000,
9290 .ib = 288000000 * 2,
9291 },
9292};
9293
9294static struct msm_bus_vectors mdp_1080p_vectors[] = {
9295 /* 1080p and less video */
9296 {
9297 .src = MSM_BUS_MASTER_MDP_PORT0,
9298 .dst = MSM_BUS_SLAVE_SMI,
9299 .ab = 334080000,
9300 .ib = 417600000,
9301 },
9302 /* Master and slaves can be from different fabrics */
9303 {
9304 .src = MSM_BUS_MASTER_MDP_PORT0,
9305 .dst = MSM_BUS_SLAVE_EBI_CH0,
9306 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009307 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009308 },
9309};
9310
9311#endif
9312static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9313 {
9314 ARRAY_SIZE(mdp_init_vectors),
9315 mdp_init_vectors,
9316 },
9317 {
9318 ARRAY_SIZE(mdp_sd_smi_vectors),
9319 mdp_sd_smi_vectors,
9320 },
9321 {
9322 ARRAY_SIZE(mdp_sd_ebi_vectors),
9323 mdp_sd_ebi_vectors,
9324 },
9325 {
9326 ARRAY_SIZE(mdp_vga_vectors),
9327 mdp_vga_vectors,
9328 },
9329 {
9330 ARRAY_SIZE(mdp_720p_vectors),
9331 mdp_720p_vectors,
9332 },
9333 {
9334 ARRAY_SIZE(mdp_1080p_vectors),
9335 mdp_1080p_vectors,
9336 },
9337};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009338#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009339static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9340 mdp_bus_scale_usecases,
9341 ARRAY_SIZE(mdp_bus_scale_usecases),
9342 .name = "mdp",
9343};
9344
9345#endif
9346#ifdef CONFIG_MSM_BUS_SCALING
9347static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9348 /* For now, 0th array entry is reserved.
9349 * Please leave 0 as is and don't use it
9350 */
9351 {
9352 .src = MSM_BUS_MASTER_MDP_PORT0,
9353 .dst = MSM_BUS_SLAVE_SMI,
9354 .ab = 0,
9355 .ib = 0,
9356 },
9357 /* Master and slaves can be from different fabrics */
9358 {
9359 .src = MSM_BUS_MASTER_MDP_PORT0,
9360 .dst = MSM_BUS_SLAVE_EBI_CH0,
9361 .ab = 0,
9362 .ib = 0,
9363 },
9364};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009365#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9366static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9367 /* For now, 0th array entry is reserved.
9368 * Please leave 0 as is and don't use it
9369 */
9370 {
9371 .src = MSM_BUS_MASTER_MDP_PORT0,
9372 .dst = MSM_BUS_SLAVE_SMI,
9373 .ab = 2000000000,
9374 .ib = 2000000000,
9375 },
9376 /* Master and slaves can be from different fabrics */
9377 {
9378 .src = MSM_BUS_MASTER_MDP_PORT0,
9379 .dst = MSM_BUS_SLAVE_EBI_CH0,
9380 .ab = 2000000000,
9381 .ib = 2000000000,
9382 },
9383};
9384#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009385static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9386 /* For now, 0th array entry is reserved.
9387 * Please leave 0 as is and don't use it
9388 */
9389 {
9390 .src = MSM_BUS_MASTER_MDP_PORT0,
9391 .dst = MSM_BUS_SLAVE_SMI,
9392 .ab = 566092800,
9393 .ib = 707616000,
9394 },
9395 /* Master and slaves can be from different fabrics */
9396 {
9397 .src = MSM_BUS_MASTER_MDP_PORT0,
9398 .dst = MSM_BUS_SLAVE_EBI_CH0,
9399 .ab = 566092800,
9400 .ib = 707616000,
9401 },
9402};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009403#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009404static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9405 {
9406 ARRAY_SIZE(dtv_bus_init_vectors),
9407 dtv_bus_init_vectors,
9408 },
9409 {
9410 ARRAY_SIZE(dtv_bus_def_vectors),
9411 dtv_bus_def_vectors,
9412 },
9413};
9414static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9415 dtv_bus_scale_usecases,
9416 ARRAY_SIZE(dtv_bus_scale_usecases),
9417 .name = "dtv",
9418};
9419
9420static struct lcdc_platform_data dtv_pdata = {
9421 .bus_scale_table = &dtv_bus_scale_pdata,
9422};
9423#endif
9424
9425
9426static struct lcdc_platform_data lcdc_pdata = {
9427 .lcdc_power_save = lcdc_panel_power,
9428};
9429
9430
9431#define MDP_VSYNC_GPIO 28
9432
9433/*
9434 * MIPI_DSI only use 8058_LDO0 which need always on
9435 * therefore it need to be put at low power mode if
9436 * it was not used instead of turn it off.
9437 */
9438static int mipi_dsi_panel_power(int on)
9439{
9440 int flag_on = !!on;
9441 static int mipi_dsi_power_save_on;
9442 static struct regulator *ldo0;
9443 int rc = 0;
9444
9445 if (mipi_dsi_power_save_on == flag_on)
9446 return 0;
9447
9448 mipi_dsi_power_save_on = flag_on;
9449
9450 if (ldo0 == NULL) { /* init */
9451 ldo0 = regulator_get(NULL, "8058_l0");
9452 if (IS_ERR(ldo0)) {
9453 pr_debug("%s: LDO0 failed\n", __func__);
9454 rc = PTR_ERR(ldo0);
9455 return rc;
9456 }
9457
9458 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9459 if (rc)
9460 goto out;
9461
9462 rc = regulator_enable(ldo0);
9463 if (rc)
9464 goto out;
9465 }
9466
9467 if (on) {
9468 /* set ldo0 to HPM */
9469 rc = regulator_set_optimum_mode(ldo0, 100000);
9470 if (rc < 0)
9471 goto out;
9472 } else {
9473 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309474 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009475 if (rc < 0)
9476 goto out;
9477 }
9478
9479 return 0;
9480out:
9481 regulator_disable(ldo0);
9482 regulator_put(ldo0);
9483 ldo0 = NULL;
9484 return rc;
9485}
9486
9487static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9488 .vsync_gpio = MDP_VSYNC_GPIO,
9489 .dsi_power_save = mipi_dsi_panel_power,
9490};
9491
9492#ifdef CONFIG_FB_MSM_TVOUT
9493static struct regulator *reg_8058_l13;
9494
9495static int atv_dac_power(int on)
9496{
9497 int rc = 0;
9498 #define _GET_REGULATOR(var, name) do { \
9499 var = regulator_get(NULL, name); \
9500 if (IS_ERR(var)) { \
9501 pr_info("'%s' regulator not found, rc=%ld\n", \
9502 name, IS_ERR(var)); \
9503 var = NULL; \
9504 return -ENODEV; \
9505 } \
9506 } while (0)
9507
9508 if (!reg_8058_l13)
9509 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9510 #undef _GET_REGULATOR
9511
9512 if (on) {
9513 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9514 if (rc) {
9515 pr_info("%s: '%s' regulator set voltage failed,\
9516 rc=%d\n", __func__, "8058_l13", rc);
9517 return rc;
9518 }
9519
9520 rc = regulator_enable(reg_8058_l13);
9521 if (rc) {
9522 pr_err("%s: '%s' regulator enable failed,\
9523 rc=%d\n", __func__, "8058_l13", rc);
9524 return rc;
9525 }
9526 } else {
9527 rc = regulator_force_disable(reg_8058_l13);
9528 if (rc)
9529 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9530 __func__, "8058_l13", rc);
9531 }
9532 return rc;
9533
9534}
9535#endif
9536
9537#ifdef CONFIG_FB_MSM_MIPI_DSI
9538int mdp_core_clk_rate_table[] = {
9539 85330000,
9540 85330000,
9541 160000000,
9542 200000000,
9543};
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009544#elif defined(CONFIG_FB_MSM_HDMI_AS_PRIMARY)
9545int mdp_core_clk_rate_table[] = {
9546 200000000,
9547 200000000,
9548 200000000,
9549 200000000,
9550};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009551#else
9552int mdp_core_clk_rate_table[] = {
9553 59080000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009554 85330000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009555 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009556 200000000,
9557};
9558#endif
9559
9560static struct msm_panel_common_pdata mdp_pdata = {
9561 .gpio = MDP_VSYNC_GPIO,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009562#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
9563 .mdp_core_clk_rate = 200000000,
9564#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009565 .mdp_core_clk_rate = 59080000,
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009566#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009567 .mdp_core_clk_table = mdp_core_clk_rate_table,
9568 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9569#ifdef CONFIG_MSM_BUS_SCALING
9570 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9571#endif
9572 .mdp_rev = MDP_REV_41,
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009573#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
9574 .mem_hid = ION_CP_WB_HEAP_ID,
9575#else
9576 .mem_hid = MEMTYPE_EBI1,
9577#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009578};
9579
Huaibin Yanga5419422011-12-08 23:52:10 -08009580static void __init reserve_mdp_memory(void)
9581{
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009582 mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9583 mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9584#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
9585 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9586 mdp_pdata.ov0_wb_size;
9587 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9588 mdp_pdata.ov1_wb_size;
9589#endif
Huaibin Yanga5419422011-12-08 23:52:10 -08009590}
9591
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009592#ifdef CONFIG_FB_MSM_TVOUT
9593
9594#ifdef CONFIG_MSM_BUS_SCALING
9595static struct msm_bus_vectors atv_bus_init_vectors[] = {
9596 /* For now, 0th array entry is reserved.
9597 * Please leave 0 as is and don't use it
9598 */
9599 {
9600 .src = MSM_BUS_MASTER_MDP_PORT0,
9601 .dst = MSM_BUS_SLAVE_SMI,
9602 .ab = 0,
9603 .ib = 0,
9604 },
9605 /* Master and slaves can be from different fabrics */
9606 {
9607 .src = MSM_BUS_MASTER_MDP_PORT0,
9608 .dst = MSM_BUS_SLAVE_EBI_CH0,
9609 .ab = 0,
9610 .ib = 0,
9611 },
9612};
9613static struct msm_bus_vectors atv_bus_def_vectors[] = {
9614 /* For now, 0th array entry is reserved.
9615 * Please leave 0 as is and don't use it
9616 */
9617 {
9618 .src = MSM_BUS_MASTER_MDP_PORT0,
9619 .dst = MSM_BUS_SLAVE_SMI,
9620 .ab = 236390400,
9621 .ib = 265939200,
9622 },
9623 /* Master and slaves can be from different fabrics */
9624 {
9625 .src = MSM_BUS_MASTER_MDP_PORT0,
9626 .dst = MSM_BUS_SLAVE_EBI_CH0,
9627 .ab = 236390400,
9628 .ib = 265939200,
9629 },
9630};
9631static struct msm_bus_paths atv_bus_scale_usecases[] = {
9632 {
9633 ARRAY_SIZE(atv_bus_init_vectors),
9634 atv_bus_init_vectors,
9635 },
9636 {
9637 ARRAY_SIZE(atv_bus_def_vectors),
9638 atv_bus_def_vectors,
9639 },
9640};
9641static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9642 atv_bus_scale_usecases,
9643 ARRAY_SIZE(atv_bus_scale_usecases),
9644 .name = "atv",
9645};
9646#endif
9647
9648static struct tvenc_platform_data atv_pdata = {
9649 .poll = 0,
9650 .pm_vid_en = atv_dac_power,
9651#ifdef CONFIG_MSM_BUS_SCALING
9652 .bus_scale_table = &atv_bus_scale_pdata,
9653#endif
9654};
9655#endif
9656
9657static void __init msm_fb_add_devices(void)
9658{
9659#ifdef CONFIG_FB_MSM_LCDC_DSUB
9660 mdp_pdata.mdp_core_clk_table = NULL;
9661 mdp_pdata.num_mdp_clk = 0;
9662 mdp_pdata.mdp_core_clk_rate = 200000000;
9663#endif
9664 if (machine_is_msm8x60_rumi3())
9665 msm_fb_register_device("mdp", NULL);
9666 else
9667 msm_fb_register_device("mdp", &mdp_pdata);
9668
9669 msm_fb_register_device("lcdc", &lcdc_pdata);
9670 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9671#ifdef CONFIG_MSM_BUS_SCALING
9672 msm_fb_register_device("dtv", &dtv_pdata);
9673#endif
9674#ifdef CONFIG_FB_MSM_TVOUT
9675 msm_fb_register_device("tvenc", &atv_pdata);
9676 msm_fb_register_device("tvout_device", NULL);
9677#endif
9678}
9679
9680#if (defined(CONFIG_MARIMBA_CORE)) && \
9681 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9682
9683static const struct {
9684 char *name;
9685 int vmin;
9686 int vmax;
9687} bt_regs_info[] = {
9688 { "8058_s3", 1800000, 1800000 },
9689 { "8058_s2", 1300000, 1300000 },
9690 { "8058_l8", 2900000, 3050000 },
9691};
9692
9693static struct {
9694 bool enabled;
9695} bt_regs_status[] = {
9696 { false },
9697 { false },
9698 { false },
9699};
9700static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9701
9702static int bahama_bt(int on)
9703{
9704 int rc;
9705 int i;
9706 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9707
9708 struct bahama_variant_register {
9709 const size_t size;
9710 const struct bahama_config_register *set;
9711 };
9712
9713 const struct bahama_config_register *p;
9714
9715 u8 version;
9716
9717 const struct bahama_config_register v10_bt_on[] = {
9718 { 0xE9, 0x00, 0xFF },
9719 { 0xF4, 0x80, 0xFF },
9720 { 0xE4, 0x00, 0xFF },
9721 { 0xE5, 0x00, 0x0F },
9722#ifdef CONFIG_WLAN
9723 { 0xE6, 0x38, 0x7F },
9724 { 0xE7, 0x06, 0xFF },
9725#endif
9726 { 0xE9, 0x21, 0xFF },
9727 { 0x01, 0x0C, 0x1F },
9728 { 0x01, 0x08, 0x1F },
9729 };
9730
9731 const struct bahama_config_register v20_bt_on_fm_off[] = {
9732 { 0x11, 0x0C, 0xFF },
9733 { 0x13, 0x01, 0xFF },
9734 { 0xF4, 0x80, 0xFF },
9735 { 0xF0, 0x00, 0xFF },
9736 { 0xE9, 0x00, 0xFF },
9737#ifdef CONFIG_WLAN
9738 { 0x81, 0x00, 0x7F },
9739 { 0x82, 0x00, 0xFF },
9740 { 0xE6, 0x38, 0x7F },
9741 { 0xE7, 0x06, 0xFF },
9742#endif
9743 { 0xE9, 0x21, 0xFF },
9744 };
9745
9746 const struct bahama_config_register v20_bt_on_fm_on[] = {
9747 { 0x11, 0x0C, 0xFF },
9748 { 0x13, 0x01, 0xFF },
9749 { 0xF4, 0x86, 0xFF },
9750 { 0xF0, 0x06, 0xFF },
9751 { 0xE9, 0x00, 0xFF },
9752#ifdef CONFIG_WLAN
9753 { 0x81, 0x00, 0x7F },
9754 { 0x82, 0x00, 0xFF },
9755 { 0xE6, 0x38, 0x7F },
9756 { 0xE7, 0x06, 0xFF },
9757#endif
9758 { 0xE9, 0x21, 0xFF },
9759 };
9760
9761 const struct bahama_config_register v10_bt_off[] = {
9762 { 0xE9, 0x00, 0xFF },
9763 };
9764
9765 const struct bahama_config_register v20_bt_off_fm_off[] = {
9766 { 0xF4, 0x84, 0xFF },
9767 { 0xF0, 0x04, 0xFF },
9768 { 0xE9, 0x00, 0xFF }
9769 };
9770
9771 const struct bahama_config_register v20_bt_off_fm_on[] = {
9772 { 0xF4, 0x86, 0xFF },
9773 { 0xF0, 0x06, 0xFF },
9774 { 0xE9, 0x00, 0xFF }
9775 };
9776 const struct bahama_variant_register bt_bahama[2][3] = {
9777 {
9778 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9779 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9780 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9781 },
9782 {
9783 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9784 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9785 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9786 }
9787 };
9788
9789 u8 offset = 0; /* index into bahama configs */
9790
9791 on = on ? 1 : 0;
9792 version = read_bahama_ver();
9793
9794 if (version == VER_UNSUPPORTED) {
9795 dev_err(&msm_bt_power_device.dev,
9796 "%s: unsupported version\n",
9797 __func__);
9798 return -EIO;
9799 }
9800
9801 if (version == VER_2_0) {
9802 if (marimba_get_fm_status(&config))
9803 offset = 0x01;
9804 }
9805
9806 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9807 if (on && (version == VER_2_0)) {
9808 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9809 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9810 && (bt_regs_status[i].enabled == true)) {
9811 if (regulator_disable(bt_regs[i])) {
9812 dev_err(&msm_bt_power_device.dev,
9813 "%s: regulator disable failed",
9814 __func__);
9815 }
9816 bt_regs_status[i].enabled = false;
9817 break;
9818 }
9819 }
9820 }
9821
9822 p = bt_bahama[on][version + offset].set;
9823
9824 dev_info(&msm_bt_power_device.dev,
9825 "%s: found version %d\n", __func__, version);
9826
9827 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9828 u8 value = (p+i)->value;
9829 rc = marimba_write_bit_mask(&config,
9830 (p+i)->reg,
9831 &value,
9832 sizeof((p+i)->value),
9833 (p+i)->mask);
9834 if (rc < 0) {
9835 dev_err(&msm_bt_power_device.dev,
9836 "%s: reg %d write failed: %d\n",
9837 __func__, (p+i)->reg, rc);
9838 return rc;
9839 }
9840 dev_dbg(&msm_bt_power_device.dev,
9841 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9842 __func__, (p+i)->reg,
9843 value, (p+i)->mask);
9844 }
9845 /* Update BT Status */
9846 if (on)
9847 marimba_set_bt_status(&config, true);
9848 else
9849 marimba_set_bt_status(&config, false);
9850
9851 return 0;
9852}
9853
9854static int bluetooth_use_regulators(int on)
9855{
9856 int i, recover = -1, rc = 0;
9857
9858 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9859 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
9860 bt_regs_info[i].name) :
9861 (regulator_put(bt_regs[i]), NULL);
9862 if (IS_ERR(bt_regs[i])) {
9863 rc = PTR_ERR(bt_regs[i]);
9864 dev_err(&msm_bt_power_device.dev,
9865 "regulator %s get failed (%d)\n",
9866 bt_regs_info[i].name, rc);
9867 recover = i - 1;
9868 bt_regs[i] = NULL;
9869 break;
9870 }
9871
9872 if (!on)
9873 continue;
9874
9875 rc = regulator_set_voltage(bt_regs[i],
9876 bt_regs_info[i].vmin,
9877 bt_regs_info[i].vmax);
9878 if (rc < 0) {
9879 dev_err(&msm_bt_power_device.dev,
9880 "regulator %s voltage set (%d)\n",
9881 bt_regs_info[i].name, rc);
9882 recover = i;
9883 break;
9884 }
9885 }
9886
9887 if (on && (recover > -1))
9888 for (i = recover; i >= 0; i--) {
9889 regulator_put(bt_regs[i]);
9890 bt_regs[i] = NULL;
9891 }
9892
9893 return rc;
9894}
9895
9896static int bluetooth_switch_regulators(int on)
9897{
9898 int i, rc = 0;
9899
9900 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9901 if (on && (bt_regs_status[i].enabled == false)) {
9902 rc = regulator_enable(bt_regs[i]);
9903 if (rc < 0) {
9904 dev_err(&msm_bt_power_device.dev,
9905 "regulator %s %s failed (%d)\n",
9906 bt_regs_info[i].name,
9907 "enable", rc);
9908 if (i > 0) {
9909 while (--i) {
9910 regulator_disable(bt_regs[i]);
9911 bt_regs_status[i].enabled
9912 = false;
9913 }
9914 break;
9915 }
9916 }
9917 bt_regs_status[i].enabled = true;
9918 } else if (!on && (bt_regs_status[i].enabled == true)) {
9919 rc = regulator_disable(bt_regs[i]);
9920 if (rc < 0) {
9921 dev_err(&msm_bt_power_device.dev,
9922 "regulator %s %s failed (%d)\n",
9923 bt_regs_info[i].name,
9924 "disable", rc);
9925 break;
9926 }
9927 bt_regs_status[i].enabled = false;
9928 }
9929 }
9930 return rc;
9931}
9932
9933static struct msm_xo_voter *bt_clock;
9934
9935static int bluetooth_power(int on)
9936{
9937 int rc = 0;
9938 int id;
9939
9940 /* In case probe function fails, cur_connv_type would be -1 */
9941 id = adie_get_detected_connectivity_type();
9942 if (id != BAHAMA_ID) {
9943 pr_err("%s: unexpected adie connectivity type: %d\n",
9944 __func__, id);
9945 return -ENODEV;
9946 }
9947
9948 if (on) {
9949
9950 rc = bluetooth_use_regulators(1);
9951 if (rc < 0)
9952 goto out;
9953
9954 rc = bluetooth_switch_regulators(1);
9955
9956 if (rc < 0)
9957 goto fail_put;
9958
9959 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
9960
9961 if (IS_ERR(bt_clock)) {
9962 pr_err("Couldn't get TCXO_D0 voter\n");
9963 goto fail_switch;
9964 }
9965
9966 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
9967
9968 if (rc < 0) {
9969 pr_err("Failed to vote for TCXO_DO ON\n");
9970 goto fail_vote;
9971 }
9972
9973 rc = bahama_bt(1);
9974
9975 if (rc < 0)
9976 goto fail_clock;
9977
9978 msleep(10);
9979
9980 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
9981
9982 if (rc < 0) {
9983 pr_err("Failed to vote for TCXO_DO pin control\n");
9984 goto fail_vote;
9985 }
9986 } else {
9987 /* check for initial RFKILL block (power off) */
9988 /* some RFKILL versions/configurations rfkill_register */
9989 /* calls here for an initial set_block */
9990 /* avoid calling i2c and regulator before unblock (on) */
9991 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
9992 dev_info(&msm_bt_power_device.dev,
9993 "%s: initialized OFF/blocked\n", __func__);
9994 goto out;
9995 }
9996
9997 bahama_bt(0);
9998
9999fail_clock:
10000 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
10001fail_vote:
10002 msm_xo_put(bt_clock);
10003fail_switch:
10004 bluetooth_switch_regulators(0);
10005fail_put:
10006 bluetooth_use_regulators(0);
10007 }
10008
10009out:
10010 if (rc < 0)
10011 on = 0;
10012 dev_info(&msm_bt_power_device.dev,
10013 "Bluetooth power switch: state %d result %d\n", on, rc);
10014
10015 return rc;
10016}
10017
10018#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
10019
10020static void __init msm8x60_cfg_smsc911x(void)
10021{
10022 smsc911x_resources[1].start =
10023 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10024 smsc911x_resources[1].end =
10025 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10026}
10027
10028#ifdef CONFIG_MSM_RPM
10029static struct msm_rpm_platform_data msm_rpm_data = {
10030 .reg_base_addrs = {
10031 [MSM_RPM_PAGE_STATUS] = MSM_RPM_BASE,
10032 [MSM_RPM_PAGE_CTRL] = MSM_RPM_BASE + 0x400,
10033 [MSM_RPM_PAGE_REQ] = MSM_RPM_BASE + 0x600,
10034 [MSM_RPM_PAGE_ACK] = MSM_RPM_BASE + 0xa00,
10035 },
10036
10037 .irq_ack = RPM_SCSS_CPU0_GP_HIGH_IRQ,
10038 .irq_err = RPM_SCSS_CPU0_GP_LOW_IRQ,
10039 .irq_vmpm = RPM_SCSS_CPU0_GP_MEDIUM_IRQ,
10040 .msm_apps_ipc_rpm_reg = MSM_GCC_BASE + 0x008,
10041 .msm_apps_ipc_rpm_val = 4,
10042};
10043#endif
10044
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010045void msm_fusion_setup_pinctrl(void)
10046{
10047 struct msm_xo_voter *a1;
10048
10049 if (socinfo_get_platform_subtype() == 0x3) {
10050 /*
10051 * Vote for the A1 clock to be in pin control mode before
10052 * the external images are loaded.
10053 */
10054 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
10055 BUG_ON(!a1);
10056 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
10057 }
10058}
10059
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010060struct msm_board_data {
10061 struct msm_gpiomux_configs *gpiomux_cfgs;
10062};
10063
10064static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
10065 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10066};
10067
10068static struct msm_board_data msm8x60_sim_board_data __initdata = {
10069 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10070};
10071
10072static struct msm_board_data msm8x60_surf_board_data __initdata = {
10073 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10074};
10075
10076static struct msm_board_data msm8x60_ffa_board_data __initdata = {
10077 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10078};
10079
10080static struct msm_board_data msm8x60_fluid_board_data __initdata = {
10081 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
10082};
10083
10084static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
10085 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10086};
10087
10088static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
10089 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10090};
10091
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010092static struct msm_board_data msm8x60_dragon_board_data __initdata = {
10093 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
10094};
10095
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010096static void __init msm8x60_init(struct msm_board_data *board_data)
10097{
10098 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010099#ifdef CONFIG_USB_EHCI_MSM_72K
10100 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
10101 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
10102 .level = PM8901_MPP_DIG_LEVEL_L5,
10103 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
10104 };
10105#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010106 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070010107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010108 /*
10109 * Initialize RPM first as other drivers and devices may need
10110 * it for their initialization.
10111 */
10112#ifdef CONFIG_MSM_RPM
10113 BUG_ON(msm_rpm_init(&msm_rpm_data));
10114#endif
10115 BUG_ON(msm_rpmrs_levels_init(msm_rpmrs_levels,
10116 ARRAY_SIZE(msm_rpmrs_levels)));
10117 if (msm_xo_init())
10118 pr_err("Failed to initialize XO votes\n");
10119
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010120 msm8x60_check_2d_hardware();
10121
10122 /* Change SPM handling of core 1 if PMM 8160 is present. */
10123 soc_platform_version = socinfo_get_platform_version();
10124 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
10125 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
10126 struct msm_spm_platform_data *spm_data;
10127
10128 spm_data = &msm_spm_data_v1[1];
10129 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10130 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10131
10132 spm_data = &msm_spm_data[1];
10133 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10134 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10135 }
10136
10137 /*
10138 * Initialize SPM before acpuclock as the latter calls into SPM
10139 * driver to set ACPU voltages.
10140 */
10141 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10142 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
10143 else
10144 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
10145
10146 /*
10147 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10148 * devices so that the RPM doesn't drop into a low power mode that an
10149 * un-reworked SURF cannot resume from.
10150 */
10151 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010152 int i;
10153
10154 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10155 if (rpm_regulator_init_data[i].id
10156 == RPM_VREG_ID_PM8901_L4
10157 || rpm_regulator_init_data[i].id
10158 == RPM_VREG_ID_PM8901_L6)
10159 rpm_regulator_init_data[i]
10160 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010161 }
10162
10163 /*
10164 * Disable regulator info printing so that regulator registration
10165 * messages do not enter the kmsg log.
10166 */
10167 regulator_suppress_info_printing();
10168
10169 /* Initialize regulators needed for clock_init. */
10170 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10171
Stephen Boydbb600ae2011-08-02 20:11:40 -070010172 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010173
10174 /* Buses need to be initialized before early-device registration
10175 * to get the platform data for fabrics.
10176 */
10177 msm8x60_init_buses();
10178 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10179 /* CPU frequency control is not supported on simulated targets. */
10180 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010181 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010182
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010183 /*
10184 * Enable EBI2 only for boards which make use of it. Leave
10185 * it disabled for all others for additional power savings.
10186 */
10187 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10188 machine_is_msm8x60_rumi3() ||
10189 machine_is_msm8x60_sim() ||
10190 machine_is_msm8x60_fluid() ||
10191 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010192 msm8x60_init_ebi2();
10193 msm8x60_init_tlmm();
10194 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10195 msm8x60_init_uart12dm();
10196 msm8x60_init_mmc();
10197
10198#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10199 msm8x60_init_pm8058_othc();
10200#endif
10201
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010202 if (machine_is_msm8x60_fluid())
10203 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10204 else if (machine_is_msm8x60_dragon())
10205 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10206 else
10207 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010208
Jilai Wang53d27a82011-07-13 14:32:58 -040010209 /* Specify reset pin for OV9726 */
10210 if (machine_is_msm8x60_dragon()) {
10211 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10212 ov9726_sensor_8660_info.mount_angle = 270;
10213 }
10214
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010215#ifdef CONFIG_BATTERY_MSM8X60
10216 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10217 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10218 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10219 platform_device_register(&msm_charger_device);
10220#endif
10221
10222 if (machine_is_msm8x60_dragon())
10223 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10224 if (!machine_is_msm8x60_fluid())
10225 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10226
10227 /* configure pmic leds */
10228 if (machine_is_msm8x60_fluid())
10229 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10230 else if (machine_is_msm8x60_dragon())
10231 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10232 else
10233 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10234
10235 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10236 machine_is_msm8x60_dragon()) {
10237 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10238 }
10239
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010240 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10241 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010242 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010243 msm8x60_cfg_smsc911x();
10244 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10245 platform_add_devices(msm_footswitch_devices,
10246 msm_num_footswitch_devices);
10247 platform_add_devices(surf_devices,
10248 ARRAY_SIZE(surf_devices));
10249
10250#ifdef CONFIG_MSM_DSPS
10251 if (machine_is_msm8x60_fluid()) {
10252 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10253 msm8x60_init_dsps();
10254 }
10255#endif
10256
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010257 pm8901_vreg_mpp0_init();
10258
10259 platform_device_register(&msm8x60_8901_mpp_vreg);
10260
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010261#ifdef CONFIG_USB_EHCI_MSM_72K
10262 /*
10263 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10264 * fluid
10265 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010266 if (machine_is_msm8x60_fluid())
10267 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10268 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010269#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010270
10271#ifdef CONFIG_SND_SOC_MSM8660_APQ
10272 if (machine_is_msm8x60_dragon())
10273 platform_add_devices(dragon_alsa_devices,
10274 ARRAY_SIZE(dragon_alsa_devices));
10275 else
10276#endif
10277 platform_add_devices(asoc_devices,
10278 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010279 } else {
10280 msm8x60_configure_smc91x();
10281 platform_add_devices(rumi_sim_devices,
10282 ARRAY_SIZE(rumi_sim_devices));
10283 }
10284#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010285 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10286 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010287 msm8x60_cfg_isp1763();
10288#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010289
10290 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10291 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10292
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010293
10294#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10295 if (machine_is_msm8x60_fluid())
10296 platform_device_register(&msm_gsbi10_qup_spi_device);
10297 else
10298 platform_device_register(&msm_gsbi1_qup_spi_device);
10299#endif
10300
10301#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10302 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10303 if (machine_is_msm8x60_fluid())
10304 cyttsp_set_params();
10305#endif
10306 if (!machine_is_msm8x60_sim())
10307 msm_fb_add_devices();
10308 fixup_i2c_configs();
10309 register_i2c_devices();
10310
Terence Hampson1c73fef2011-07-19 17:10:49 -040010311 if (machine_is_msm8x60_dragon())
10312 smsc911x_config.reset_gpio
10313 = GPIO_ETHERNET_RESET_N_DRAGON;
10314
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010315 platform_device_register(&smsc911x_device);
10316
10317#if (defined(CONFIG_SPI_QUP)) && \
10318 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010319 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10320 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010321
10322 if (machine_is_msm8x60_fluid()) {
10323#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10324 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10325 spi_register_board_info(lcdc_samsung_spi_board_info,
10326 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10327 } else
10328#endif
10329 {
10330#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10331 spi_register_board_info(lcdc_auo_spi_board_info,
10332 ARRAY_SIZE(lcdc_auo_spi_board_info));
10333#endif
10334 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010335#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10336 } else if (machine_is_msm8x60_dragon()) {
10337 spi_register_board_info(lcdc_nt35582_spi_board_info,
10338 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10339#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010340 }
10341#endif
10342
10343 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10344 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10345 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10346 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010347 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010348
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010349 pm8058_gpios_init();
10350
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010351#ifdef CONFIG_SENSORS_MSM_ADC
10352 if (machine_is_msm8x60_fluid()) {
10353 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10354 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10355 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10356 msm_adc_pdata.gpio_config = APROC_CONFIG;
10357 else
10358 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10359 }
10360 msm_adc_pdata.target_hw = MSM_8x60;
10361#endif
10362#ifdef CONFIG_MSM8X60_AUDIO
10363 msm_snddev_init();
10364#endif
10365#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10366 if (machine_is_msm8x60_fluid())
10367 platform_device_register(&fluid_leds_gpio);
10368 else
10369 platform_device_register(&gpio_leds);
10370#endif
10371
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010372 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010373
10374 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10375 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010376}
10377
10378static void __init msm8x60_rumi3_init(void)
10379{
10380 msm8x60_init(&msm8x60_rumi3_board_data);
10381}
10382
10383static void __init msm8x60_sim_init(void)
10384{
10385 msm8x60_init(&msm8x60_sim_board_data);
10386}
10387
10388static void __init msm8x60_surf_init(void)
10389{
10390 msm8x60_init(&msm8x60_surf_board_data);
10391}
10392
10393static void __init msm8x60_ffa_init(void)
10394{
10395 msm8x60_init(&msm8x60_ffa_board_data);
10396}
10397
10398static void __init msm8x60_fluid_init(void)
10399{
10400 msm8x60_init(&msm8x60_fluid_board_data);
10401}
10402
10403static void __init msm8x60_charm_surf_init(void)
10404{
10405 msm8x60_init(&msm8x60_charm_surf_board_data);
10406}
10407
10408static void __init msm8x60_charm_ffa_init(void)
10409{
10410 msm8x60_init(&msm8x60_charm_ffa_board_data);
10411}
10412
10413static void __init msm8x60_charm_init_early(void)
10414{
10415 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010416}
10417
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010418static void __init msm8x60_dragon_init(void)
10419{
10420 msm8x60_init(&msm8x60_dragon_board_data);
10421}
10422
Steve Mucklea55df6e2010-01-07 12:43:24 -080010423MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10424 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010425 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010426 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010427 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010428 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010429 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010430 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010431MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010432
10433MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10434 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010435 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010436 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010437 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010438 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010439 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010440 .init_early = msm8x60_charm_init_early,
10441MACHINE_END
10442
10443MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10444 .map_io = msm8x60_map_io,
10445 .reserve = msm8x60_reserve,
10446 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010447 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010448 .init_machine = msm8x60_surf_init,
10449 .timer = &msm_timer,
10450 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010451MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010452
10453MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10454 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010455 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010456 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010457 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010458 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010459 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010460 .init_early = msm8x60_charm_init_early,
10461MACHINE_END
10462
10463MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10464 .map_io = msm8x60_map_io,
10465 .reserve = msm8x60_reserve,
10466 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010467 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010468 .init_machine = msm8x60_fluid_init,
10469 .timer = &msm_timer,
10470 .init_early = msm8x60_charm_init_early,
10471MACHINE_END
10472
10473MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10474 .map_io = msm8x60_map_io,
10475 .reserve = msm8x60_reserve,
10476 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010477 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010478 .init_machine = msm8x60_charm_surf_init,
10479 .timer = &msm_timer,
10480 .init_early = msm8x60_charm_init_early,
10481MACHINE_END
10482
10483MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10484 .map_io = msm8x60_map_io,
10485 .reserve = msm8x60_reserve,
10486 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010487 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010488 .init_machine = msm8x60_charm_ffa_init,
10489 .timer = &msm_timer,
10490 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010491MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010492
10493MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10494 .map_io = msm8x60_map_io,
10495 .reserve = msm8x60_reserve,
10496 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010497 .handle_irq = gic_handle_irq,
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010498 .init_machine = msm8x60_dragon_init,
10499 .timer = &msm_timer,
10500 .init_early = msm8x60_charm_init_early,
10501MACHINE_END