blob: fe5ea4149e8b4ba82f5bbccaa763ffdacf462610 [file] [log] [blame]
Shawn Guo4afbbb72010-12-18 21:39:35 +08001/*
2 * Copyright 2010 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#include <linux/delay.h>
16#include <linux/platform_device.h>
17#include <linux/gpio.h>
Shawn Guo53b8ff92011-05-31 17:07:03 +080018#include <linux/leds.h>
Shawn Guo4afbbb72010-12-18 21:39:35 +080019#include <linux/irq.h>
20#include <linux/clk.h>
Dong Aisheng074c54f2011-07-20 11:41:43 +080021#include <linux/i2c.h>
Shawn Guo4afbbb72010-12-18 21:39:35 +080022
23#include <asm/mach-types.h>
24#include <asm/mach/arch.h>
25#include <asm/mach/time.h>
26
27#include <mach/common.h>
28#include <mach/iomux-mx28.h>
29
30#include "devices-mx28.h"
Shawn Guo4afbbb72010-12-18 21:39:35 +080031
Shawn Guoacc9cdc2011-03-03 22:13:38 +080032#define MX28EVK_FLEXCAN_SWITCH MXS_GPIO_NR(2, 13)
Shawn Guo4afbbb72010-12-18 21:39:35 +080033#define MX28EVK_FEC_PHY_POWER MXS_GPIO_NR(2, 15)
Shawn Guo53b8ff92011-05-31 17:07:03 +080034#define MX28EVK_GPIO_LED MXS_GPIO_NR(3, 5)
Shawn Guo0590a792011-03-08 18:51:10 +080035#define MX28EVK_BL_ENABLE MXS_GPIO_NR(3, 18)
36#define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30)
Shawn Guo4afbbb72010-12-18 21:39:35 +080037#define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13)
38
Shawn Guo5bb2c822011-02-22 16:50:24 +080039#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12)
40#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28)
41#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28)
42#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29)
43
Shawn Guo4afbbb72010-12-18 21:39:35 +080044static const iomux_cfg_t mx28evk_pads[] __initconst = {
45 /* duart */
Shawn Guodb63a492011-03-06 00:40:19 +080046 MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL,
47 MX28_PAD_PWM1__DUART_TX | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080048
Shawn Guo15808182011-02-17 14:28:52 +080049 /* auart0 */
Shawn Guodb63a492011-03-06 00:40:19 +080050 MX28_PAD_AUART0_RX__AUART0_RX | MXS_PAD_CTRL,
51 MX28_PAD_AUART0_TX__AUART0_TX | MXS_PAD_CTRL,
52 MX28_PAD_AUART0_CTS__AUART0_CTS | MXS_PAD_CTRL,
53 MX28_PAD_AUART0_RTS__AUART0_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080054 /* auart3 */
Shawn Guodb63a492011-03-06 00:40:19 +080055 MX28_PAD_AUART3_RX__AUART3_RX | MXS_PAD_CTRL,
56 MX28_PAD_AUART3_TX__AUART3_TX | MXS_PAD_CTRL,
57 MX28_PAD_AUART3_CTS__AUART3_CTS | MXS_PAD_CTRL,
58 MX28_PAD_AUART3_RTS__AUART3_RTS | MXS_PAD_CTRL,
Shawn Guo15808182011-02-17 14:28:52 +080059
Shawn Guodb63a492011-03-06 00:40:19 +080060#define MXS_PAD_FEC (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP)
Shawn Guo4afbbb72010-12-18 21:39:35 +080061 /* fec0 */
Shawn Guodb63a492011-03-06 00:40:19 +080062 MX28_PAD_ENET0_MDC__ENET0_MDC | MXS_PAD_FEC,
63 MX28_PAD_ENET0_MDIO__ENET0_MDIO | MXS_PAD_FEC,
64 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | MXS_PAD_FEC,
65 MX28_PAD_ENET0_RXD0__ENET0_RXD0 | MXS_PAD_FEC,
66 MX28_PAD_ENET0_RXD1__ENET0_RXD1 | MXS_PAD_FEC,
67 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN | MXS_PAD_FEC,
68 MX28_PAD_ENET0_TXD0__ENET0_TXD0 | MXS_PAD_FEC,
69 MX28_PAD_ENET0_TXD1__ENET0_TXD1 | MXS_PAD_FEC,
70 MX28_PAD_ENET_CLK__CLKCTRL_ENET | MXS_PAD_FEC,
Shawn Guo48f76ed2011-01-11 20:09:24 +080071 /* fec1 */
Shawn Guodb63a492011-03-06 00:40:19 +080072 MX28_PAD_ENET0_CRS__ENET1_RX_EN | MXS_PAD_FEC,
73 MX28_PAD_ENET0_RXD2__ENET1_RXD0 | MXS_PAD_FEC,
74 MX28_PAD_ENET0_RXD3__ENET1_RXD1 | MXS_PAD_FEC,
75 MX28_PAD_ENET0_COL__ENET1_TX_EN | MXS_PAD_FEC,
76 MX28_PAD_ENET0_TXD2__ENET1_TXD0 | MXS_PAD_FEC,
77 MX28_PAD_ENET0_TXD3__ENET1_TXD1 | MXS_PAD_FEC,
Shawn Guo4afbbb72010-12-18 21:39:35 +080078 /* phy power line */
Shawn Guodb63a492011-03-06 00:40:19 +080079 MX28_PAD_SSP1_DATA3__GPIO_2_15 | MXS_PAD_CTRL,
Shawn Guo4afbbb72010-12-18 21:39:35 +080080 /* phy reset line */
Shawn Guodb63a492011-03-06 00:40:19 +080081 MX28_PAD_ENET0_RX_CLK__GPIO_4_13 | MXS_PAD_CTRL,
Shawn Guoacc9cdc2011-03-03 22:13:38 +080082
83 /* flexcan0 */
84 MX28_PAD_GPMI_RDY2__CAN0_TX,
85 MX28_PAD_GPMI_RDY3__CAN0_RX,
86 /* flexcan1 */
87 MX28_PAD_GPMI_CE2N__CAN1_TX,
88 MX28_PAD_GPMI_CE3N__CAN1_RX,
89 /* transceiver power control */
90 MX28_PAD_SSP1_CMD__GPIO_2_13,
Shawn Guo0590a792011-03-08 18:51:10 +080091
92 /* mxsfb (lcdif) */
93 MX28_PAD_LCD_D00__LCD_D0 | MXS_PAD_CTRL,
94 MX28_PAD_LCD_D01__LCD_D1 | MXS_PAD_CTRL,
95 MX28_PAD_LCD_D02__LCD_D2 | MXS_PAD_CTRL,
96 MX28_PAD_LCD_D03__LCD_D3 | MXS_PAD_CTRL,
97 MX28_PAD_LCD_D04__LCD_D4 | MXS_PAD_CTRL,
98 MX28_PAD_LCD_D05__LCD_D5 | MXS_PAD_CTRL,
99 MX28_PAD_LCD_D06__LCD_D6 | MXS_PAD_CTRL,
100 MX28_PAD_LCD_D07__LCD_D7 | MXS_PAD_CTRL,
101 MX28_PAD_LCD_D08__LCD_D8 | MXS_PAD_CTRL,
102 MX28_PAD_LCD_D09__LCD_D9 | MXS_PAD_CTRL,
103 MX28_PAD_LCD_D10__LCD_D10 | MXS_PAD_CTRL,
104 MX28_PAD_LCD_D11__LCD_D11 | MXS_PAD_CTRL,
105 MX28_PAD_LCD_D12__LCD_D12 | MXS_PAD_CTRL,
106 MX28_PAD_LCD_D13__LCD_D13 | MXS_PAD_CTRL,
107 MX28_PAD_LCD_D14__LCD_D14 | MXS_PAD_CTRL,
108 MX28_PAD_LCD_D15__LCD_D15 | MXS_PAD_CTRL,
109 MX28_PAD_LCD_D16__LCD_D16 | MXS_PAD_CTRL,
110 MX28_PAD_LCD_D17__LCD_D17 | MXS_PAD_CTRL,
111 MX28_PAD_LCD_D18__LCD_D18 | MXS_PAD_CTRL,
112 MX28_PAD_LCD_D19__LCD_D19 | MXS_PAD_CTRL,
113 MX28_PAD_LCD_D20__LCD_D20 | MXS_PAD_CTRL,
114 MX28_PAD_LCD_D21__LCD_D21 | MXS_PAD_CTRL,
115 MX28_PAD_LCD_D22__LCD_D22 | MXS_PAD_CTRL,
116 MX28_PAD_LCD_D23__LCD_D23 | MXS_PAD_CTRL,
117 MX28_PAD_LCD_RD_E__LCD_VSYNC | MXS_PAD_CTRL,
118 MX28_PAD_LCD_WR_RWN__LCD_HSYNC | MXS_PAD_CTRL,
119 MX28_PAD_LCD_RS__LCD_DOTCLK | MXS_PAD_CTRL,
120 MX28_PAD_LCD_CS__LCD_ENABLE | MXS_PAD_CTRL,
121 /* LCD panel enable */
122 MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL,
123 /* backlight control */
124 MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800125 /* mmc0 */
126 MX28_PAD_SSP0_DATA0__SSP0_D0 |
127 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
128 MX28_PAD_SSP0_DATA1__SSP0_D1 |
129 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
130 MX28_PAD_SSP0_DATA2__SSP0_D2 |
131 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
132 MX28_PAD_SSP0_DATA3__SSP0_D3 |
133 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
134 MX28_PAD_SSP0_DATA4__SSP0_D4 |
135 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
136 MX28_PAD_SSP0_DATA5__SSP0_D5 |
137 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
138 MX28_PAD_SSP0_DATA6__SSP0_D6 |
139 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
140 MX28_PAD_SSP0_DATA7__SSP0_D7 |
141 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
142 MX28_PAD_SSP0_CMD__SSP0_CMD |
143 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
144 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT |
145 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
146 MX28_PAD_SSP0_SCK__SSP0_SCK |
147 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
148 /* write protect */
149 MX28_PAD_SSP1_SCK__GPIO_2_12 |
150 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
151 /* slot power enable */
152 MX28_PAD_PWM3__GPIO_3_28 |
153 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
154
155 /* mmc1 */
156 MX28_PAD_GPMI_D00__SSP1_D0 |
157 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
158 MX28_PAD_GPMI_D01__SSP1_D1 |
159 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
160 MX28_PAD_GPMI_D02__SSP1_D2 |
161 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
162 MX28_PAD_GPMI_D03__SSP1_D3 |
163 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
164 MX28_PAD_GPMI_D04__SSP1_D4 |
165 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
166 MX28_PAD_GPMI_D05__SSP1_D5 |
167 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
168 MX28_PAD_GPMI_D06__SSP1_D6 |
169 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
170 MX28_PAD_GPMI_D07__SSP1_D7 |
171 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
172 MX28_PAD_GPMI_RDY1__SSP1_CMD |
173 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
174 MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT |
175 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
176 MX28_PAD_GPMI_WRN__SSP1_SCK |
177 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
178 /* write protect */
179 MX28_PAD_GPMI_RESETN__GPIO_0_28 |
180 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
181 /* slot power enable */
182 MX28_PAD_PWM4__GPIO_3_29 |
183 (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
Shawn Guo53b8ff92011-05-31 17:07:03 +0800184
185 /* led */
186 MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL,
Dong Aishengc8ebcac2011-07-20 11:41:42 +0800187
Dong Aisheng074c54f2011-07-20 11:41:43 +0800188 /* I2C */
189 MX28_PAD_I2C0_SCL__I2C0_SCL |
190 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
191 MX28_PAD_I2C0_SDA__I2C0_SDA |
192 (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
193
Dong Aishengc8ebcac2011-07-20 11:41:42 +0800194 /* saif0 & saif1 */
195 MX28_PAD_SAIF0_MCLK__SAIF0_MCLK |
196 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
197 MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK |
198 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
199 MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK |
200 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
201 MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 |
202 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
203 MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 |
204 (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
Shawn Guo53b8ff92011-05-31 17:07:03 +0800205};
206
207/* led */
208static const struct gpio_led mx28evk_leds[] __initconst = {
209 {
210 .name = "GPIO-LED",
211 .default_trigger = "heartbeat",
212 .gpio = MX28EVK_GPIO_LED,
213 },
214};
215
216static const struct gpio_led_platform_data mx28evk_led_data __initconst = {
217 .leds = mx28evk_leds,
218 .num_leds = ARRAY_SIZE(mx28evk_leds),
Shawn Guo4afbbb72010-12-18 21:39:35 +0800219};
220
221/* fec */
222static void __init mx28evk_fec_reset(void)
223{
224 int ret;
225 struct clk *clk;
226
227 /* Enable fec phy clock */
228 clk = clk_get_sys("pll2", NULL);
229 if (!IS_ERR(clk))
230 clk_enable(clk);
231
232 /* Power up fec phy */
233 ret = gpio_request(MX28EVK_FEC_PHY_POWER, "fec-phy-power");
234 if (ret) {
235 pr_err("Failed to request gpio fec-phy-%s: %d\n", "power", ret);
236 return;
237 }
238
239 ret = gpio_direction_output(MX28EVK_FEC_PHY_POWER, 0);
240 if (ret) {
241 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "power", ret);
242 return;
243 }
244
245 /* Reset fec phy */
246 ret = gpio_request(MX28EVK_FEC_PHY_RESET, "fec-phy-reset");
247 if (ret) {
248 pr_err("Failed to request gpio fec-phy-%s: %d\n", "reset", ret);
249 return;
250 }
251
252 gpio_direction_output(MX28EVK_FEC_PHY_RESET, 0);
253 if (ret) {
254 pr_err("Failed to drive gpio fec-phy-%s: %d\n", "reset", ret);
255 return;
256 }
257
258 mdelay(1);
259 gpio_set_value(MX28EVK_FEC_PHY_RESET, 1);
260}
261
Shawn Guoa320b272011-01-14 15:25:52 +0800262static struct fec_platform_data mx28_fec_pdata[] __initdata = {
Shawn Guo48f76ed2011-01-11 20:09:24 +0800263 {
264 /* fec0 */
265 .phy = PHY_INTERFACE_MODE_RMII,
266 }, {
267 /* fec1 */
268 .phy = PHY_INTERFACE_MODE_RMII,
269 },
Shawn Guo4afbbb72010-12-18 21:39:35 +0800270};
271
Shawn Guoa320b272011-01-14 15:25:52 +0800272static int __init mx28evk_fec_get_mac(void)
273{
274 int i;
275 u32 val;
276 const u32 *ocotp = mxs_get_ocotp();
277
278 if (!ocotp)
279 goto error;
280
281 /*
282 * OCOTP only stores the last 4 octets for each mac address,
283 * so hard-code Freescale OUI (00:04:9f) here.
284 */
285 for (i = 0; i < 2; i++) {
286 val = ocotp[i * 4];
287 mx28_fec_pdata[i].mac[0] = 0x00;
288 mx28_fec_pdata[i].mac[1] = 0x04;
289 mx28_fec_pdata[i].mac[2] = 0x9f;
290 mx28_fec_pdata[i].mac[3] = (val >> 16) & 0xff;
291 mx28_fec_pdata[i].mac[4] = (val >> 8) & 0xff;
292 mx28_fec_pdata[i].mac[5] = (val >> 0) & 0xff;
293 }
294
295 return 0;
296
297error:
298 pr_err("%s: timeout when reading fec mac from OCOTP\n", __func__);
299 return -ETIMEDOUT;
300}
301
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800302/*
303 * MX28EVK_FLEXCAN_SWITCH is shared between both flexcan controllers
304 */
305static int flexcan0_en, flexcan1_en;
306
307static void mx28evk_flexcan_switch(void)
308{
309 if (flexcan0_en || flexcan1_en)
310 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 1);
311 else
312 gpio_set_value(MX28EVK_FLEXCAN_SWITCH, 0);
313}
314
315static void mx28evk_flexcan0_switch(int enable)
316{
317 flexcan0_en = enable;
318 mx28evk_flexcan_switch();
319}
320
321static void mx28evk_flexcan1_switch(int enable)
322{
323 flexcan1_en = enable;
324 mx28evk_flexcan_switch();
325}
326
327static const struct flexcan_platform_data
328 mx28evk_flexcan_pdata[] __initconst = {
329 {
330 .transceiver_switch = mx28evk_flexcan0_switch,
331 }, {
332 .transceiver_switch = mx28evk_flexcan1_switch,
333 }
334};
335
Shawn Guo0590a792011-03-08 18:51:10 +0800336/* mxsfb (lcdif) */
337static struct fb_videomode mx28evk_video_modes[] = {
338 {
339 .name = "Seiko-43WVF1G",
340 .refresh = 60,
341 .xres = 800,
342 .yres = 480,
343 .pixclock = 29851, /* picosecond (33.5 MHz) */
344 .left_margin = 89,
345 .right_margin = 164,
346 .upper_margin = 23,
347 .lower_margin = 10,
348 .hsync_len = 10,
349 .vsync_len = 10,
350 .sync = FB_SYNC_DATA_ENABLE_HIGH_ACT |
351 FB_SYNC_DOTCLK_FAILING_ACT,
352 },
353};
354
355static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = {
356 .mode_list = mx28evk_video_modes,
357 .mode_count = ARRAY_SIZE(mx28evk_video_modes),
358 .default_bpp = 32,
359 .ld_intf_width = STMLCDIF_24BIT,
360};
361
Shawn Guo5bb2c822011-02-22 16:50:24 +0800362static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
363 {
364 /* mmc0 */
365 .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT,
366 .flags = SLOTF_8_BIT_CAPABLE,
367 }, {
368 /* mmc1 */
369 .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT,
370 .flags = SLOTF_8_BIT_CAPABLE,
371 },
372};
373
Dong Aisheng074c54f2011-07-20 11:41:43 +0800374static struct i2c_board_info mxs_i2c0_board_info[] __initdata = {
375 {
376 I2C_BOARD_INFO("sgtl5000", 0x0a),
377 },
378};
379
Shawn Guo4afbbb72010-12-18 21:39:35 +0800380static void __init mx28evk_init(void)
381{
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800382 int ret;
383
Shawn Guo4afbbb72010-12-18 21:39:35 +0800384 mxs_iomux_setup_multiple_pads(mx28evk_pads, ARRAY_SIZE(mx28evk_pads));
385
386 mx28_add_duart();
Shawn Guo15808182011-02-17 14:28:52 +0800387 mx28_add_auart0();
388 mx28_add_auart3();
Shawn Guo4afbbb72010-12-18 21:39:35 +0800389
Shawn Guoa320b272011-01-14 15:25:52 +0800390 if (mx28evk_fec_get_mac())
391 pr_warn("%s: failed on fec mac setup\n", __func__);
392
Shawn Guo4afbbb72010-12-18 21:39:35 +0800393 mx28evk_fec_reset();
Shawn Guo48f76ed2011-01-11 20:09:24 +0800394 mx28_add_fec(0, &mx28_fec_pdata[0]);
395 mx28_add_fec(1, &mx28_fec_pdata[1]);
Shawn Guoacc9cdc2011-03-03 22:13:38 +0800396
397 ret = gpio_request_one(MX28EVK_FLEXCAN_SWITCH, GPIOF_DIR_OUT,
398 "flexcan-switch");
399 if (ret) {
400 pr_err("failed to request gpio flexcan-switch: %d\n", ret);
401 } else {
402 mx28_add_flexcan(0, &mx28evk_flexcan_pdata[0]);
403 mx28_add_flexcan(1, &mx28evk_flexcan_pdata[1]);
404 }
Shawn Guo0590a792011-03-08 18:51:10 +0800405
406 ret = gpio_request_one(MX28EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable");
407 if (ret)
408 pr_warn("failed to request gpio lcd-enable: %d\n", ret);
409 else
410 gpio_set_value(MX28EVK_LCD_ENABLE, 1);
411
412 ret = gpio_request_one(MX28EVK_BL_ENABLE, GPIOF_DIR_OUT, "bl-enable");
413 if (ret)
414 pr_warn("failed to request gpio bl-enable: %d\n", ret);
415 else
416 gpio_set_value(MX28EVK_BL_ENABLE, 1);
417
418 mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
Shawn Guo5bb2c822011-02-22 16:50:24 +0800419
Dong Aishengc8ebcac2011-07-20 11:41:42 +0800420 mx28_add_saif(0);
421 mx28_add_saif(1);
422
Dong Aisheng074c54f2011-07-20 11:41:43 +0800423 mx28_add_mxs_i2c(0);
424 i2c_register_board_info(0, mxs_i2c0_board_info,
425 ARRAY_SIZE(mxs_i2c0_board_info));
426
Shawn Guo5bb2c822011-02-22 16:50:24 +0800427 /* power on mmc slot by writing 0 to the gpio */
Fabio Estevamc7dae182011-03-29 16:45:09 -0300428 ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800429 "mmc0-slot-power");
430 if (ret)
431 pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret);
432 mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]);
433
Fabio Estevamc7dae182011-03-29 16:45:09 -0300434 ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_OUT_INIT_LOW,
Shawn Guo5bb2c822011-02-22 16:50:24 +0800435 "mmc1-slot-power");
436 if (ret)
437 pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
438 mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
Shawn Guo53b8ff92011-05-31 17:07:03 +0800439
440 gpio_led_register_device(0, &mx28evk_led_data);
Shawn Guo4afbbb72010-12-18 21:39:35 +0800441}
442
443static void __init mx28evk_timer_init(void)
444{
445 mx28_clocks_init();
446}
447
448static struct sys_timer mx28evk_timer = {
449 .init = mx28evk_timer_init,
450};
451
452MACHINE_START(MX28EVK, "Freescale MX28 EVK")
453 /* Maintainer: Freescale Semiconductor, Inc. */
454 .map_io = mx28_map_io,
455 .init_irq = mx28_init_irq,
456 .init_machine = mx28evk_init,
457 .timer = &mx28evk_timer,
458MACHINE_END