blob: 831a16b87ee190610c094c723c47bb1107eecd10 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* Copyright (c) 2009-2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/sched.h>
17#include <linux/time.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/spinlock.h>
21#include <linux/hrtimer.h>
22#include <linux/clk.h>
23#include <mach/hardware.h>
24#include <linux/io.h>
25#include <linux/debugfs.h>
26#include <linux/fb.h>
27#include <linux/msm_mdp.h>
28#include <linux/file.h>
29#include <linux/android_pmem.h>
30#include <linux/major.h>
31#include <asm/system.h>
32#include <asm/mach-types.h>
33#include <linux/semaphore.h>
34#include <linux/uaccess.h>
35#include <linux/mutex.h>
36#include <linux/msm_kgsl.h>
37#include "mdp.h"
38#include "msm_fb.h"
39#include "mdp4.h"
40
41#define VERSION_KEY_MASK 0xFFFFFF00
42
43struct mdp4_overlay_ctrl {
44 struct mdp4_pipe_desc ov_pipe[OVERLAY_PIPE_MAX];/* 4 */
45 struct mdp4_overlay_pipe plist[MDP4_MAX_PIPE]; /* 4 + 2 */
kuogee hsieh405dc302011-07-21 15:06:59 -070046 struct mdp4_overlay_pipe *stage[MDP4_MAX_MIXER][MDP4_MIXER_STAGE_MAX];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070047 uint32 panel_3d;
48 uint32 panel_mode;
49 uint32 mixer0_played;
50 uint32 mixer1_played;
51} mdp4_overlay_db = {
52 .ov_pipe = {
53 {
54 .share = 0, /* RGB 1 */
55 },
56 {
57 .share = 0, /* RGB 2 */
58 },
59 {
60 .share = 1, /* VG 1 */
61 },
62 {
63 .share = 1, /* VG 2 */
64 },
65 },
66 .plist = {
67 {
68 .pipe_type = OVERLAY_TYPE_RGB,
69 .pipe_num = OVERLAY_PIPE_RGB1,
70 .pipe_ndx = 1,
71 },
72 {
73 .pipe_type = OVERLAY_TYPE_RGB,
74 .pipe_num = OVERLAY_PIPE_RGB2,
75 .pipe_ndx = 2,
76 },
77 {
78 .pipe_type = OVERLAY_TYPE_RGB, /* shared */
79 .pipe_num = OVERLAY_PIPE_VG1,
80 .pipe_ndx = 3,
81 },
82 {
83 .pipe_type = OVERLAY_TYPE_RGB, /* shared */
84 .pipe_num = OVERLAY_PIPE_VG2,
85 .pipe_ndx = 4,
86 },
87 {
88 .pipe_type = OVERLAY_TYPE_VIDEO, /* shared */
89 .pipe_num = OVERLAY_PIPE_VG1,
90 .pipe_ndx = 5,
91 },
92 {
93 .pipe_type = OVERLAY_TYPE_VIDEO, /* shared */
94 .pipe_num = OVERLAY_PIPE_VG2,
95 .pipe_ndx = 6,
96 },
97 },
98};
99
100static struct mdp4_overlay_ctrl *ctrl = &mdp4_overlay_db;
kuogee hsieh9452ecb2011-08-01 18:26:23 -0700101static int new_perf_level;
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -0700102
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700103/* static array with index 0 for unset status and 1 for set status */
104static bool overlay_status[MDP4_OVERLAY_TYPE_MAX];
105
106void mdp4_overlay_status_write(enum mdp4_overlay_status type, bool val)
107{
108 overlay_status[type] = val;
109}
110
111bool mdp4_overlay_status_read(enum mdp4_overlay_status type)
112{
113 return overlay_status[type];
114}
115
116int mdp4_overlay_mixer_play(int mixer_num)
117{
118 if (mixer_num == MDP4_MIXER1)
119 return ctrl->mixer1_played;
120 else
121 return ctrl->mixer0_played;
122}
123
124void mdp4_overlay_panel_3d(int mixer_num, uint32 panel_3d)
125{
126 ctrl->panel_3d = panel_3d;
127}
128
129void mdp4_overlay_panel_mode(int mixer_num, uint32 mode)
130{
131 ctrl->panel_mode |= mode;
132}
133
134uint32 mdp4_overlay_panel_list(void)
135{
136 return ctrl->panel_mode;
137}
138
139void mdp4_overlay_dmae_cfg(struct msm_fb_data_type *mfd, int atv)
140{
141 uint32 dmae_cfg_reg;
142
143 if (atv)
144 dmae_cfg_reg = DMA_DEFLKR_EN;
145 else
146 dmae_cfg_reg = 0;
147
148 if (mfd->fb_imgType == MDP_BGR_565)
149 dmae_cfg_reg |= DMA_PACK_PATTERN_BGR;
150 else
151 dmae_cfg_reg |= DMA_PACK_PATTERN_RGB;
152
153
154 if (mfd->panel_info.bpp == 18) {
155 dmae_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */
156 DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS;
157 } else if (mfd->panel_info.bpp == 16) {
158 dmae_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */
159 DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
160 } else {
161 dmae_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 16BPP */
162 DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
163 }
164
165 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
166
167 /* dma2 config register */
168 MDP_OUTP(MDP_BASE + 0xb0000, dmae_cfg_reg);
169 if (atv) {
170 MDP_OUTP(MDP_BASE + 0xb0070, 0xeb0010);
171 MDP_OUTP(MDP_BASE + 0xb0074, 0xf00010);
172 MDP_OUTP(MDP_BASE + 0xb0078, 0xf00010);
173 MDP_OUTP(MDP_BASE + 0xb3000, 0x80);
174 MDP_OUTP(MDP_BASE + 0xb3010, 0x1800040);
175 MDP_OUTP(MDP_BASE + 0xb3014, 0x1000080);
176 MDP_OUTP(MDP_BASE + 0xb4004, 0x67686970);
177 } else {
178 MDP_OUTP(MDP_BASE + 0xb0070, 0xff0000);
179 MDP_OUTP(MDP_BASE + 0xb0074, 0xff0000);
180 MDP_OUTP(MDP_BASE + 0xb0078, 0xff0000);
181 }
182
183 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
184}
185
Manoj Raob91fa712011-06-29 09:07:55 -0700186#ifdef CONFIG_FB_MSM_HDMI_3D
187void unfill_black_screen(void) { return; }
188#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700189void unfill_black_screen(void)
190{
191 uint32 temp_src_format;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700192 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
193 /*
194 * VG2 Constant Color
195 */
196 temp_src_format = inpdw(MDP_BASE + 0x30050);
197 MDP_OUTP(MDP_BASE + 0x30050, temp_src_format&(~BIT(22)));
198 /*
199 * MDP_OVERLAY_REG_FLUSH
200 */
201 MDP_OUTP(MDP_BASE + 0x18000, BIT(3));
202 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
Manoj Raob91fa712011-06-29 09:07:55 -0700203 return;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700204}
Manoj Raob91fa712011-06-29 09:07:55 -0700205#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700206
Manoj Raob91fa712011-06-29 09:07:55 -0700207#ifdef CONFIG_FB_MSM_HDMI_3D
208void fill_black_screen(void) { return; }
209#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700210void fill_black_screen(void)
211{
212 /*Black color*/
213 uint32 color = 0x00000000;
214 uint32 temp_src_format;
215 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
216 /*
217 * VG2 Constant Color
218 */
219 MDP_OUTP(MDP_BASE + 0x31008, color);
220 /*
221 * MDP_VG2_SRC_FORMAT
222 */
223 temp_src_format = inpdw(MDP_BASE + 0x30050);
224 MDP_OUTP(MDP_BASE + 0x30050, temp_src_format | BIT(22));
225 /*
226 * MDP_OVERLAY_REG_FLUSH
227 */
228 MDP_OUTP(MDP_BASE + 0x18000, BIT(3));
229 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
Manoj Raob91fa712011-06-29 09:07:55 -0700230 return;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700231}
Manoj Raob91fa712011-06-29 09:07:55 -0700232#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700233
234void mdp4_overlay_dmae_xy(struct mdp4_overlay_pipe *pipe)
235{
236
237 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
238
239 /* dma_p source */
240 MDP_OUTP(MDP_BASE + 0xb0004,
241 (pipe->src_height << 16 | pipe->src_width));
242 MDP_OUTP(MDP_BASE + 0xb0008, pipe->srcp0_addr);
243 MDP_OUTP(MDP_BASE + 0xb000c, pipe->srcp0_ystride);
244
245 /* dma_p dest */
246 MDP_OUTP(MDP_BASE + 0xb0010, (pipe->dst_y << 16 | pipe->dst_x));
247
248 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
249}
250
251void mdp4_overlay_dmap_cfg(struct msm_fb_data_type *mfd, int lcdc)
252{
253 uint32 dma2_cfg_reg;
254
255 dma2_cfg_reg = DMA_DITHER_EN;
256#ifdef BLT_RGB565
257 /* RGB888 is 0 */
258 dma2_cfg_reg |= DMA_BUF_FORMAT_RGB565; /* blt only */
259#endif
260
261 if (mfd->fb_imgType == MDP_BGR_565)
262 dma2_cfg_reg |= DMA_PACK_PATTERN_BGR;
263 else
264 dma2_cfg_reg |= DMA_PACK_PATTERN_RGB;
265
266
267 if (mfd->panel_info.bpp == 18) {
268 dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 666 18BPP */
269 DMA_DSTC1B_6BITS | DMA_DSTC2R_6BITS;
270 } else if (mfd->panel_info.bpp == 16) {
271 dma2_cfg_reg |= DMA_DSTC0G_6BITS | /* 565 16BPP */
272 DMA_DSTC1B_5BITS | DMA_DSTC2R_5BITS;
273 } else {
274 dma2_cfg_reg |= DMA_DSTC0G_8BITS | /* 888 16BPP */
275 DMA_DSTC1B_8BITS | DMA_DSTC2R_8BITS;
276 }
277
278 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
279
280#ifndef CONFIG_FB_MSM_LCDC_CHIMEI_WXGA_PANEL
281 if (lcdc)
282 dma2_cfg_reg |= DMA_PACK_ALIGN_MSB;
283#endif
284
285 /* dma2 config register */
286 MDP_OUTP(MDP_BASE + 0x90000, dma2_cfg_reg);
287
288 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
289}
290
291/*
292 * mdp4_overlay_dmap_xy: called form baselayer only
293 */
294void mdp4_overlay_dmap_xy(struct mdp4_overlay_pipe *pipe)
295{
296 uint32 off, bpp;
297
298 if (mdp_is_in_isr == FALSE)
299 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
300
301 /* dma_p source */
302 MDP_OUTP(MDP_BASE + 0x90004,
303 (pipe->src_height << 16 | pipe->src_width));
304 if (pipe->blt_addr) {
305#ifdef BLT_RGB565
306 bpp = 2; /* overlay ouput is RGB565 */
307#else
308 bpp = 3; /* overlay ouput is RGB888 */
309#endif
310 off = 0;
311 if (pipe->dmap_cnt & 0x01)
312 off = pipe->src_height * pipe->src_width * bpp;
313 MDP_OUTP(MDP_BASE + 0x90008, pipe->blt_addr + off);
314 /* RGB888, output of overlay blending */
315 MDP_OUTP(MDP_BASE + 0x9000c, pipe->src_width * bpp);
316 } else {
317 MDP_OUTP(MDP_BASE + 0x90008, pipe->srcp0_addr);
318 MDP_OUTP(MDP_BASE + 0x9000c, pipe->srcp0_ystride);
319 }
320
321 /* dma_p dest */
322 MDP_OUTP(MDP_BASE + 0x90010, (pipe->dst_y << 16 | pipe->dst_x));
323
324 if (mdp_is_in_isr == FALSE)
325 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
326}
327
328#define MDP4_VG_PHASE_STEP_DEFAULT 0x20000000
329#define MDP4_VG_PHASE_STEP_SHIFT 29
330
331static int mdp4_leading_0(uint32 num)
332{
333 uint32 bit = 0x80000000;
334 int i;
335
336 for (i = 0; i < 32; i++) {
337 if (bit & num)
338 return i;
339 bit >>= 1;
340 }
341
342 return i;
343}
344
345static uint32 mdp4_scale_phase_step(int f_num, uint32 src, uint32 dst)
346{
347 uint32 val;
348 int n;
349
350 n = mdp4_leading_0(src);
351 if (n > f_num)
352 n = f_num;
353 val = src << n; /* maximum to reduce lose of resolution */
354 val /= dst;
355 if (n < f_num) {
356 n = f_num - n;
357 val <<= n;
358 }
359
360 return val;
361}
362
363static void mdp4_scale_setup(struct mdp4_overlay_pipe *pipe)
364{
365 int ptype;
366
367 pipe->phasex_step = MDP4_VG_PHASE_STEP_DEFAULT;
368 pipe->phasey_step = MDP4_VG_PHASE_STEP_DEFAULT;
369 ptype = mdp4_overlay_format2type(pipe->src_format);
370
371 if (pipe->dst_h && pipe->src_h != pipe->dst_h) {
372 if (pipe->dst_h > pipe->src_h * 8) /* too much */
373 return;
374 pipe->op_mode |= MDP4_OP_SCALEY_EN;
375
376 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {
377 if (pipe->dst_h <= (pipe->src_h / 4))
378 pipe->op_mode |= MDP4_OP_SCALEY_MN_PHASE;
379 else
380 pipe->op_mode |= MDP4_OP_SCALEY_FIR;
381 }
382
383 pipe->phasey_step = mdp4_scale_phase_step(29,
384 pipe->src_h, pipe->dst_h);
385 }
386
387 if (pipe->dst_w && pipe->src_w != pipe->dst_w) {
388 if (pipe->dst_w > pipe->src_w * 8) /* too much */
389 return;
390 pipe->op_mode |= MDP4_OP_SCALEX_EN;
391
392 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {
393 if (pipe->dst_w <= (pipe->src_w / 4))
394 pipe->op_mode |= MDP4_OP_SCALEX_MN_PHASE;
395 else
396 pipe->op_mode |= MDP4_OP_SCALEX_FIR;
397 }
398
399 pipe->phasex_step = mdp4_scale_phase_step(29,
400 pipe->src_w, pipe->dst_w);
401 }
402}
403
404void mdp4_overlay_rgb_setup(struct mdp4_overlay_pipe *pipe)
405{
406 char *rgb_base;
407 uint32 src_size, src_xy, dst_size, dst_xy;
408 uint32 format, pattern;
409
410 rgb_base = MDP_BASE + MDP4_RGB_BASE;
411 rgb_base += (MDP4_RGB_OFF * pipe->pipe_num);
412
413 src_size = ((pipe->src_h << 16) | pipe->src_w);
414 src_xy = ((pipe->src_y << 16) | pipe->src_x);
415 dst_size = ((pipe->dst_h << 16) | pipe->dst_w);
416 dst_xy = ((pipe->dst_y << 16) | pipe->dst_x);
417
418 format = mdp4_overlay_format(pipe);
419 pattern = mdp4_overlay_unpack_pattern(pipe);
420
421#ifdef MDP4_IGC_LUT_ENABLE
422 pipe->op_mode |= MDP4_OP_IGC_LUT_EN;
423#endif
424
425 mdp4_scale_setup(pipe);
426
427 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
428
429 outpdw(rgb_base + 0x0000, src_size); /* MDP_RGB_SRC_SIZE */
430 outpdw(rgb_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
431 outpdw(rgb_base + 0x0008, dst_size); /* MDP_RGB_DST_SIZE */
432 outpdw(rgb_base + 0x000c, dst_xy); /* MDP_RGB_DST_XY */
433
434 outpdw(rgb_base + 0x0010, pipe->srcp0_addr);
435 outpdw(rgb_base + 0x0040, pipe->srcp0_ystride);
436
437 outpdw(rgb_base + 0x0050, format);/* MDP_RGB_SRC_FORMAT */
438 outpdw(rgb_base + 0x0054, pattern);/* MDP_RGB_SRC_UNPACK_PATTERN */
439 outpdw(rgb_base + 0x0058, pipe->op_mode);/* MDP_RGB_OP_MODE */
440 outpdw(rgb_base + 0x005c, pipe->phasex_step);
441 outpdw(rgb_base + 0x0060, pipe->phasey_step);
442
443 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
444
445 mdp4_stat.pipe[pipe->pipe_num]++;
446}
447
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700448
449static void mdp4_overlay_vg_get_src_offset(struct mdp4_overlay_pipe *pipe,
450 char *vg_base, uint32 *luma_off, uint32 *chroma_off)
451{
452 uint32 src_xy;
453 *luma_off = 0;
454 *chroma_off = 0;
455
456 if (pipe->src_x) {
457 src_xy = (pipe->src_y << 16) | pipe->src_x;
458 src_xy &= 0xffff0000;
459 outpdw(vg_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
460
461 switch (pipe->src_format) {
462 case MDP_Y_CR_CB_H2V2:
463 case MDP_Y_CB_CR_H2V2:
464 *luma_off = pipe->src_x;
465 *chroma_off = pipe->src_x/2;
466 break;
467
468 case MDP_Y_CBCR_H2V2_TILE:
469 case MDP_Y_CRCB_H2V2_TILE:
470 case MDP_Y_CBCR_H2V2:
471 case MDP_Y_CRCB_H2V2:
472 case MDP_Y_CRCB_H1V1:
473 case MDP_Y_CBCR_H1V1:
474 case MDP_Y_CRCB_H2V1:
475 case MDP_Y_CBCR_H2V1:
476 *luma_off = pipe->src_x;
477 *chroma_off = pipe->src_x;
478 break;
479
480 case MDP_YCRYCB_H2V1:
481 if (pipe->src_x & 0x1)
482 pipe->src_x += 1;
483 *luma_off += pipe->src_x * 2;
484 break;
485
486 case MDP_ARGB_8888:
487 case MDP_RGBA_8888:
488 case MDP_BGRA_8888:
489 case MDP_RGBX_8888:
490 case MDP_RGB_565:
491 case MDP_BGR_565:
492 case MDP_XRGB_8888:
493 case MDP_RGB_888:
494 *luma_off = pipe->src_x * pipe->bpp;
495 break;
496
497 default:
498 pr_err("Source format %u not supported for x offset adjustment\n",
499 pipe->src_format);
500 break;
501 }
502 }
503}
504
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700505void mdp4_overlay_vg_setup(struct mdp4_overlay_pipe *pipe)
506{
507 char *vg_base;
508 uint32 frame_size, src_size, src_xy, dst_size, dst_xy;
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700509 uint32 format, pattern, luma_offset, chroma_offset;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700510 int pnum;
511
512 pnum = pipe->pipe_num - OVERLAY_PIPE_VG1; /* start from 0 */
513 vg_base = MDP_BASE + MDP4_VIDEO_BASE;
514 vg_base += (MDP4_VIDEO_OFF * pnum);
515
516 frame_size = ((pipe->src_height << 16) | pipe->src_width);
517 src_size = ((pipe->src_h << 16) | pipe->src_w);
518 src_xy = ((pipe->src_y << 16) | pipe->src_x);
519 dst_size = ((pipe->dst_h << 16) | pipe->dst_w);
520 dst_xy = ((pipe->dst_y << 16) | pipe->dst_x);
521
522 format = mdp4_overlay_format(pipe);
523 pattern = mdp4_overlay_unpack_pattern(pipe);
524
525 /* not RGB use VG pipe, pure VG pipe */
526 if (pipe->pipe_type != OVERLAY_TYPE_RGB)
527#ifdef MDP4_IGC_LUT_ENABLE
528 pipe->op_mode |= (MDP4_OP_CSC_EN | MDP4_OP_SRC_DATA_YCBCR |
529 MDP4_OP_IGC_LUT_EN);
530#else
531 pipe->op_mode |= (MDP4_OP_CSC_EN | MDP4_OP_SRC_DATA_YCBCR);
532#endif
533
534 mdp4_scale_setup(pipe);
535
536 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
537
538 outpdw(vg_base + 0x0000, src_size); /* MDP_RGB_SRC_SIZE */
539 outpdw(vg_base + 0x0004, src_xy); /* MDP_RGB_SRC_XY */
540 outpdw(vg_base + 0x0008, dst_size); /* MDP_RGB_DST_SIZE */
541 outpdw(vg_base + 0x000c, dst_xy); /* MDP_RGB_DST_XY */
542 outpdw(vg_base + 0x0048, frame_size); /* TILE frame size */
543
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700544 /*
545 * Adjust src X offset to avoid MDP from overfetching pixels
546 * present before the offset. This is required for video
547 * frames coming with unused green pixels along the left margin
548 */
549 mdp4_overlay_vg_get_src_offset(pipe, vg_base, &luma_offset,
550 &chroma_offset);
551
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700552 /* luma component plane */
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700553 outpdw(vg_base + 0x0010, pipe->srcp0_addr + luma_offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700554
555 /* chroma component plane or planar color 1 */
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700556 outpdw(vg_base + 0x0014, pipe->srcp1_addr + chroma_offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700557
558 /* planar color 2 */
Ravishangar Kalyanam01d68282011-07-18 18:45:06 -0700559 outpdw(vg_base + 0x0018, pipe->srcp2_addr + chroma_offset);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700560
561 outpdw(vg_base + 0x0040,
562 pipe->srcp1_ystride << 16 | pipe->srcp0_ystride);
563
564 outpdw(vg_base + 0x0044,
565 pipe->srcp3_ystride << 16 | pipe->srcp2_ystride);
566
567 outpdw(vg_base + 0x0050, format); /* MDP_RGB_SRC_FORMAT */
568 outpdw(vg_base + 0x0054, pattern); /* MDP_RGB_SRC_UNPACK_PATTERN */
569 outpdw(vg_base + 0x0058, pipe->op_mode);/* MDP_RGB_OP_MODE */
570 outpdw(vg_base + 0x005c, pipe->phasex_step);
571 outpdw(vg_base + 0x0060, pipe->phasey_step);
572
573 if (pipe->op_mode & MDP4_OP_DITHER_EN) {
574 outpdw(vg_base + 0x0068,
575 pipe->r_bit << 4 | pipe->b_bit << 2 | pipe->g_bit);
576 }
577
578 if (pipe->flags & MDP_SHARPENING) {
579 outpdw(vg_base + 0x8200,
580 mdp4_ss_table_value(pipe->req_data.dpp.sharp_strength,
581 0));
582 outpdw(vg_base + 0x8204,
583 mdp4_ss_table_value(pipe->req_data.dpp.sharp_strength,
584 1));
585 }
586
587 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
588
589 mdp4_stat.pipe[pipe->pipe_num]++;
590}
591
592int mdp4_overlay_format2type(uint32 format)
593{
594 switch (format) {
595 case MDP_RGB_565:
596 case MDP_RGB_888:
597 case MDP_BGR_565:
598 case MDP_XRGB_8888:
599 case MDP_ARGB_8888:
600 case MDP_RGBA_8888:
601 case MDP_BGRA_8888:
602 case MDP_RGBX_8888:
603 return OVERLAY_TYPE_RGB;
604 case MDP_YCRYCB_H2V1:
605 case MDP_Y_CRCB_H2V1:
606 case MDP_Y_CBCR_H2V1:
607 case MDP_Y_CRCB_H2V2:
608 case MDP_Y_CBCR_H2V2:
609 case MDP_Y_CBCR_H2V2_TILE:
610 case MDP_Y_CRCB_H2V2_TILE:
611 case MDP_Y_CR_CB_H2V2:
612 case MDP_Y_CB_CR_H2V2:
613 case MDP_Y_CRCB_H1V1:
614 case MDP_Y_CBCR_H1V1:
615 return OVERLAY_TYPE_VIDEO;
616 default:
617 mdp4_stat.err_format++;
618 return -ERANGE;
619 }
620
621}
622
623#define C3_ALPHA 3 /* alpha */
624#define C2_R_Cr 2 /* R/Cr */
625#define C1_B_Cb 1 /* B/Cb */
626#define C0_G_Y 0 /* G/luma */
627#define YUV_444_MAX_WIDTH 1280 /* Max width for YUV 444*/
628
629int mdp4_overlay_format2pipe(struct mdp4_overlay_pipe *pipe)
630{
631 switch (pipe->src_format) {
632 case MDP_RGB_565:
633 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
634 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
635 pipe->a_bit = 0;
636 pipe->r_bit = 1; /* R, 5 bits */
637 pipe->b_bit = 1; /* B, 5 bits */
638 pipe->g_bit = 2; /* G, 6 bits */
639 pipe->alpha_enable = 0;
640 pipe->unpack_tight = 1;
641 pipe->unpack_align_msb = 0;
642 pipe->unpack_count = 2;
643 pipe->element2 = C2_R_Cr; /* R */
644 pipe->element1 = C0_G_Y; /* G */
645 pipe->element0 = C1_B_Cb; /* B */
646 pipe->bpp = 2; /* 2 bpp */
647 break;
648 case MDP_RGB_888:
649 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
650 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
651 pipe->a_bit = 0;
652 pipe->r_bit = 3; /* R, 8 bits */
653 pipe->b_bit = 3; /* B, 8 bits */
654 pipe->g_bit = 3; /* G, 8 bits */
655 pipe->alpha_enable = 0;
656 pipe->unpack_tight = 1;
657 pipe->unpack_align_msb = 0;
658 pipe->unpack_count = 2;
659 pipe->element2 = C2_R_Cr; /* R */
660 pipe->element1 = C0_G_Y; /* G */
661 pipe->element0 = C1_B_Cb; /* B */
662 pipe->bpp = 3; /* 3 bpp */
663 break;
664 case MDP_BGR_565:
665 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
666 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
667 pipe->a_bit = 0;
668 pipe->r_bit = 1; /* R, 5 bits */
669 pipe->b_bit = 1; /* B, 5 bits */
670 pipe->g_bit = 2; /* G, 6 bits */
671 pipe->alpha_enable = 0;
672 pipe->unpack_tight = 1;
673 pipe->unpack_align_msb = 0;
674 pipe->unpack_count = 2;
675 pipe->element2 = C1_B_Cb; /* B */
676 pipe->element1 = C0_G_Y; /* G */
677 pipe->element0 = C2_R_Cr; /* R */
678 pipe->bpp = 2; /* 2 bpp */
679 break;
680 case MDP_XRGB_8888:
681 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
682 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
683 pipe->a_bit = 3; /* alpha, 4 bits */
684 pipe->r_bit = 3; /* R, 8 bits */
685 pipe->b_bit = 3; /* B, 8 bits */
686 pipe->g_bit = 3; /* G, 8 bits */
687 pipe->alpha_enable = 0;
688 pipe->unpack_tight = 1;
689 pipe->unpack_align_msb = 0;
690 pipe->unpack_count = 3;
691 pipe->element3 = C3_ALPHA; /* alpha */
692 pipe->element2 = C2_R_Cr; /* R */
693 pipe->element1 = C0_G_Y; /* G */
694 pipe->element0 = C1_B_Cb; /* B */
695 pipe->bpp = 4; /* 4 bpp */
696 break;
697 case MDP_ARGB_8888:
698 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
699 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
700 pipe->a_bit = 3; /* alpha, 4 bits */
701 pipe->r_bit = 3; /* R, 8 bits */
702 pipe->b_bit = 3; /* B, 8 bits */
703 pipe->g_bit = 3; /* G, 8 bits */
704 pipe->alpha_enable = 1;
705 pipe->unpack_tight = 1;
706 pipe->unpack_align_msb = 0;
707 pipe->unpack_count = 3;
708 pipe->element3 = C3_ALPHA; /* alpha */
709 pipe->element2 = C2_R_Cr; /* R */
710 pipe->element1 = C0_G_Y; /* G */
711 pipe->element0 = C1_B_Cb; /* B */
712 pipe->bpp = 4; /* 4 bpp */
713 break;
714 case MDP_RGBA_8888:
715 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
716 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
717 pipe->a_bit = 3; /* alpha, 4 bits */
718 pipe->r_bit = 3; /* R, 8 bits */
719 pipe->b_bit = 3; /* B, 8 bits */
720 pipe->g_bit = 3; /* G, 8 bits */
721 pipe->alpha_enable = 1;
722 pipe->unpack_tight = 1;
723 pipe->unpack_align_msb = 0;
724 pipe->unpack_count = 3;
725 pipe->element3 = C3_ALPHA; /* alpha */
726 pipe->element2 = C1_B_Cb; /* B */
727 pipe->element1 = C0_G_Y; /* G */
728 pipe->element0 = C2_R_Cr; /* R */
729 pipe->bpp = 4; /* 4 bpp */
730 break;
731 case MDP_RGBX_8888:
732 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
733 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
734 pipe->a_bit = 3;
735 pipe->r_bit = 3; /* R, 8 bits */
736 pipe->b_bit = 3; /* B, 8 bits */
737 pipe->g_bit = 3; /* G, 8 bits */
738 pipe->alpha_enable = 0;
739 pipe->unpack_tight = 1;
740 pipe->unpack_align_msb = 0;
741 pipe->unpack_count = 3;
742 pipe->element3 = C3_ALPHA; /* alpha */
743 pipe->element2 = C1_B_Cb; /* B */
744 pipe->element1 = C0_G_Y; /* G */
745 pipe->element0 = C2_R_Cr; /* R */
746 pipe->bpp = 4; /* 4 bpp */
747 break;
748 case MDP_BGRA_8888:
749 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
750 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
751 pipe->a_bit = 3; /* alpha, 4 bits */
752 pipe->r_bit = 3; /* R, 8 bits */
753 pipe->b_bit = 3; /* B, 8 bits */
754 pipe->g_bit = 3; /* G, 8 bits */
755 pipe->alpha_enable = 1;
756 pipe->unpack_tight = 1;
757 pipe->unpack_align_msb = 0;
758 pipe->unpack_count = 3;
759 pipe->element3 = C3_ALPHA; /* alpha */
760 pipe->element2 = C2_R_Cr; /* R */
761 pipe->element1 = C0_G_Y; /* G */
762 pipe->element0 = C1_B_Cb; /* B */
763 pipe->bpp = 4; /* 4 bpp */
764 break;
765 case MDP_YCRYCB_H2V1:
766 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
767 pipe->fetch_plane = OVERLAY_PLANE_INTERLEAVED;
768 pipe->a_bit = 0; /* alpha, 4 bits */
769 pipe->r_bit = 3; /* R, 8 bits */
770 pipe->b_bit = 3; /* B, 8 bits */
771 pipe->g_bit = 3; /* G, 8 bits */
772 pipe->alpha_enable = 0;
773 pipe->unpack_tight = 1;
774 pipe->unpack_align_msb = 0;
775 pipe->unpack_count = 3;
776 pipe->element3 = C0_G_Y; /* G */
777 pipe->element2 = C2_R_Cr; /* R */
778 pipe->element1 = C0_G_Y; /* G */
779 pipe->element0 = C1_B_Cb; /* B */
780 pipe->bpp = 2; /* 2 bpp */
781 pipe->chroma_sample = MDP4_CHROMA_H2V1;
782 break;
783 case MDP_Y_CRCB_H2V1:
784 case MDP_Y_CBCR_H2V1:
785 case MDP_Y_CRCB_H2V2:
786 case MDP_Y_CBCR_H2V2:
787 case MDP_Y_CRCB_H1V1:
788 case MDP_Y_CBCR_H1V1:
789 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
790 pipe->fetch_plane = OVERLAY_PLANE_PSEUDO_PLANAR;
791 pipe->a_bit = 0;
792 pipe->r_bit = 3; /* R, 8 bits */
793 pipe->b_bit = 3; /* B, 8 bits */
794 pipe->g_bit = 3; /* G, 8 bits */
795 pipe->alpha_enable = 0;
796 pipe->unpack_tight = 1;
797 pipe->unpack_align_msb = 0;
798 pipe->unpack_count = 1; /* 2 */
799 pipe->element3 = C0_G_Y; /* not used */
800 pipe->element2 = C0_G_Y; /* not used */
801 if (pipe->src_format == MDP_Y_CRCB_H2V1) {
802 pipe->element1 = C2_R_Cr; /* R */
803 pipe->element0 = C1_B_Cb; /* B */
804 pipe->chroma_sample = MDP4_CHROMA_H2V1;
805 } else if (pipe->src_format == MDP_Y_CRCB_H1V1) {
806 pipe->element1 = C2_R_Cr; /* R */
807 pipe->element0 = C1_B_Cb; /* B */
808 if (pipe->src_width > YUV_444_MAX_WIDTH)
809 pipe->chroma_sample = MDP4_CHROMA_H1V2;
810 else
811 pipe->chroma_sample = MDP4_CHROMA_RGB;
812 } else if (pipe->src_format == MDP_Y_CBCR_H2V1) {
813 pipe->element1 = C1_B_Cb; /* B */
814 pipe->element0 = C2_R_Cr; /* R */
815 pipe->chroma_sample = MDP4_CHROMA_H2V1;
816 } else if (pipe->src_format == MDP_Y_CBCR_H1V1) {
817 pipe->element1 = C1_B_Cb; /* B */
818 pipe->element0 = C2_R_Cr; /* R */
819 if (pipe->src_width > YUV_444_MAX_WIDTH)
820 pipe->chroma_sample = MDP4_CHROMA_H1V2;
821 else
822 pipe->chroma_sample = MDP4_CHROMA_RGB;
823 } else if (pipe->src_format == MDP_Y_CRCB_H2V2) {
824 pipe->element1 = C2_R_Cr; /* R */
825 pipe->element0 = C1_B_Cb; /* B */
826 pipe->chroma_sample = MDP4_CHROMA_420;
827 } else if (pipe->src_format == MDP_Y_CBCR_H2V2) {
828 pipe->element1 = C1_B_Cb; /* B */
829 pipe->element0 = C2_R_Cr; /* R */
830 pipe->chroma_sample = MDP4_CHROMA_420;
831 }
832 pipe->bpp = 2; /* 2 bpp */
833 break;
834 case MDP_Y_CBCR_H2V2_TILE:
835 case MDP_Y_CRCB_H2V2_TILE:
836 pipe->frame_format = MDP4_FRAME_FORMAT_VIDEO_SUPERTILE;
837 pipe->fetch_plane = OVERLAY_PLANE_PSEUDO_PLANAR;
838 pipe->a_bit = 0;
839 pipe->r_bit = 3; /* R, 8 bits */
840 pipe->b_bit = 3; /* B, 8 bits */
841 pipe->g_bit = 3; /* G, 8 bits */
842 pipe->alpha_enable = 0;
843 pipe->unpack_tight = 1;
844 pipe->unpack_align_msb = 0;
845 pipe->unpack_count = 1; /* 2 */
846 pipe->element3 = C0_G_Y; /* not used */
847 pipe->element2 = C0_G_Y; /* not used */
848 if (pipe->src_format == MDP_Y_CRCB_H2V2_TILE) {
849 pipe->element1 = C2_R_Cr; /* R */
850 pipe->element0 = C1_B_Cb; /* B */
851 pipe->chroma_sample = MDP4_CHROMA_420;
852 } else if (pipe->src_format == MDP_Y_CBCR_H2V2_TILE) {
853 pipe->element1 = C1_B_Cb; /* B */
854 pipe->element0 = C2_R_Cr; /* R */
855 pipe->chroma_sample = MDP4_CHROMA_420;
856 }
857 pipe->bpp = 2; /* 2 bpp */
858 break;
859 case MDP_Y_CR_CB_H2V2:
860 case MDP_Y_CB_CR_H2V2:
861 pipe->frame_format = MDP4_FRAME_FORMAT_LINEAR;
862 pipe->fetch_plane = OVERLAY_PLANE_PLANAR;
863 pipe->a_bit = 0;
864 pipe->r_bit = 3; /* R, 8 bits */
865 pipe->b_bit = 3; /* B, 8 bits */
866 pipe->g_bit = 3; /* G, 8 bits */
867 pipe->alpha_enable = 0;
Adrian Salido-Moreno33dc7b92011-08-18 16:16:12 -0700868 pipe->chroma_sample = MDP4_CHROMA_420;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700869 pipe->bpp = 2; /* 2 bpp */
870 break;
871 default:
872 /* not likely */
873 mdp4_stat.err_format++;
874 return -ERANGE;
875 }
876
877 return 0;
878}
879
880/*
881 * color_key_convert: output with 12 bits color key
882 */
883static uint32 color_key_convert(int start, int num, uint32 color)
884{
885 uint32 data;
886
887 data = (color >> start) & ((1 << num) - 1);
888
889 /* convert to 8 bits */
890 if (num == 5)
891 data = ((data << 3) | (data >> 2));
892 else if (num == 6)
893 data = ((data << 2) | (data >> 4));
894
895 /* convert 8 bits to 12 bits */
896 data = (data << 4) | (data >> 4);
897
898 return data;
899}
900
901void transp_color_key(int format, uint32 transp,
902 uint32 *c0, uint32 *c1, uint32 *c2)
903{
904 int b_start, g_start, r_start;
905 int b_num, g_num, r_num;
906
907 switch (format) {
908 case MDP_RGB_565:
909 b_start = 0;
910 g_start = 5;
911 r_start = 11;
912 r_num = 5;
913 g_num = 6;
914 b_num = 5;
915 break;
916 case MDP_RGB_888:
917 case MDP_XRGB_8888:
918 case MDP_ARGB_8888:
919 case MDP_BGRA_8888:
920 b_start = 0;
921 g_start = 8;
922 r_start = 16;
923 r_num = 8;
924 g_num = 8;
925 b_num = 8;
926 break;
927 case MDP_RGBA_8888:
928 case MDP_RGBX_8888:
929 b_start = 16;
930 g_start = 8;
931 r_start = 0;
932 r_num = 8;
933 g_num = 8;
934 b_num = 8;
935 break;
936 case MDP_BGR_565:
937 b_start = 11;
938 g_start = 5;
939 r_start = 0;
940 r_num = 5;
941 g_num = 6;
942 b_num = 5;
943 break;
944 case MDP_Y_CB_CR_H2V2:
945 case MDP_Y_CBCR_H2V2:
946 case MDP_Y_CBCR_H2V1:
947 b_start = 8;
948 g_start = 16;
949 r_start = 0;
950 r_num = 8;
951 g_num = 8;
952 b_num = 8;
953 break;
954 case MDP_Y_CR_CB_H2V2:
955 case MDP_Y_CRCB_H2V2:
956 case MDP_Y_CRCB_H2V1:
957 case MDP_Y_CRCB_H1V1:
958 case MDP_Y_CBCR_H1V1:
959 b_start = 0;
960 g_start = 16;
961 r_start = 8;
962 r_num = 8;
963 g_num = 8;
964 b_num = 8;
965 break;
966 default:
967 b_start = 0;
968 g_start = 8;
969 r_start = 16;
970 r_num = 8;
971 g_num = 8;
972 b_num = 8;
973 break;
974 }
975
976 *c0 = color_key_convert(g_start, g_num, transp);
977 *c1 = color_key_convert(b_start, b_num, transp);
978 *c2 = color_key_convert(r_start, r_num, transp);
979}
980
981uint32 mdp4_overlay_format(struct mdp4_overlay_pipe *pipe)
982{
983 uint32 format;
984
985 format = 0;
986
987 if (pipe->solid_fill)
988 format |= MDP4_FORMAT_SOLID_FILL;
989
990 if (pipe->unpack_align_msb)
991 format |= MDP4_FORMAT_UNPACK_ALIGN_MSB;
992
993 if (pipe->unpack_tight)
994 format |= MDP4_FORMAT_UNPACK_TIGHT;
995
996 if (pipe->alpha_enable)
997 format |= MDP4_FORMAT_ALPHA_ENABLE;
998
999 if (pipe->flags & MDP_SOURCE_ROTATED_90)
1000 format |= MDP4_FORMAT_90_ROTATED;
1001 format |= (pipe->unpack_count << 13);
1002 format |= ((pipe->bpp - 1) << 9);
1003 format |= (pipe->a_bit << 6);
1004 format |= (pipe->r_bit << 4);
1005 format |= (pipe->b_bit << 2);
1006 format |= pipe->g_bit;
1007
1008 format |= (pipe->frame_format << 29);
1009
1010 if (pipe->fetch_plane == OVERLAY_PLANE_PSEUDO_PLANAR ||
1011 pipe->fetch_plane == OVERLAY_PLANE_PLANAR) {
1012 /* video/graphic */
1013 format |= (pipe->fetch_plane << 19);
1014 format |= (pipe->chroma_site << 28);
1015 format |= (pipe->chroma_sample << 26);
1016 }
1017
1018 return format;
1019}
1020
1021uint32 mdp4_overlay_unpack_pattern(struct mdp4_overlay_pipe *pipe)
1022{
1023 return (pipe->element3 << 24) | (pipe->element2 << 16) |
1024 (pipe->element1 << 8) | pipe->element0;
1025}
1026
1027/*
1028 * mdp4_overlayproc_cfg: only be called from base layer
1029 */
1030void mdp4_overlayproc_cfg(struct mdp4_overlay_pipe *pipe)
1031{
1032 uint32 data, intf;
1033 char *overlay_base;
1034
1035 intf = 0;
1036 if (pipe->mixer_num == MDP4_MIXER1) {
1037 overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */
1038 intf = inpdw(MDP_BASE + 0x0038); /* MDP_DISP_INTF_SEL */
1039 intf >>= 4;
1040 intf &= 0x03;
1041 } else
1042 overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */
1043
1044 if (mdp_is_in_isr == FALSE)
1045 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1046
1047 /*
1048 * BLT only siupport at primary display
1049 */
1050 if (pipe->mixer_num == MDP4_MIXER0 && pipe->blt_addr) {
1051 int off, bpp;
1052#ifdef BLT_RGB565
1053 bpp = 2; /* overlay ouput is RGB565 */
1054#else
1055 bpp = 3; /* overlay ouput is RGB888 */
1056#endif
1057 data = pipe->src_height;
1058 data <<= 16;
1059 data |= pipe->src_width;
1060 outpdw(overlay_base + 0x0008, data); /* ROI, height + width */
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07001061 off = 0;
1062 if (pipe->ov_cnt & 0x01)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001063 off = pipe->src_height * pipe->src_width * bpp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001064
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07001065 outpdw(overlay_base + 0x000c, pipe->blt_addr + off);
1066 /* overlay ouput is RGB888 */
1067 outpdw(overlay_base + 0x0010, pipe->src_width * bpp);
1068 outpdw(overlay_base + 0x001c, pipe->blt_addr + off);
1069 /* MDDI - BLT + on demand */
1070 outpdw(overlay_base + 0x0004, 0x08);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001071#ifdef BLT_RGB565
1072 outpdw(overlay_base + 0x0014, 0x1); /* RGB565 */
1073#else
1074 outpdw(overlay_base + 0x0014, 0x0); /* RGB888 */
1075#endif
1076 } else {
1077 data = pipe->src_height;
1078 data <<= 16;
1079 data |= pipe->src_width;
1080 outpdw(overlay_base + 0x0008, data); /* ROI, height + width */
1081 outpdw(overlay_base + 0x000c, pipe->srcp0_addr);
1082 outpdw(overlay_base + 0x0010, pipe->srcp0_ystride);
1083 outpdw(overlay_base + 0x0004, 0x01); /* directout */
1084 }
1085
1086 if (pipe->mixer_num == MDP4_MIXER1) {
1087 if (intf == TV_INTF) {
1088 outpdw(overlay_base + 0x0014, 0x02); /* yuv422 */
1089 /* overlay1 CSC config */
1090 outpdw(overlay_base + 0x0200, 0x05); /* rgb->yuv */
1091 }
1092 }
1093
1094#ifdef MDP4_IGC_LUT_ENABLE
1095 outpdw(overlay_base + 0x0014, 0x4); /* GC_LUT_EN, 888 */
1096#endif
1097
1098 if (mdp_is_in_isr == FALSE)
1099 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1100}
1101
1102int mdp4_overlay_pipe_staged(int mixer)
1103{
1104 uint32 data, mask, i;
1105 int p1, p2;
1106
1107 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1108 data = inpdw(MDP_BASE + 0x10100);
1109 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1110 p1 = 0;
1111 p2 = 0;
1112 for (i = 0; i < 8; i++) {
1113 mask = data & 0x0f;
1114 if (mask) {
1115 if (mask <= 4)
1116 p1++;
1117 else
1118 p2++;
1119 }
1120 data >>= 4;
1121 }
1122
1123 if (mixer)
1124 return p2;
1125 else
1126 return p1;
1127}
1128
kuogee hsieh405dc302011-07-21 15:06:59 -07001129int mdp4_mixer_info(int mixer_num, struct mdp_mixer_info *info)
1130{
1131
1132 int ndx, cnt;
1133 struct mdp4_overlay_pipe *pipe;
1134
1135 if (mixer_num > MDP4_MIXER_MAX)
1136 return -ENODEV;
1137
1138 cnt = 0;
1139 ndx = 1; /* ndx 0 if not used */
1140
1141 for ( ; ndx < MDP4_MIXER_STAGE_MAX; ndx++) {
1142 pipe = ctrl->stage[mixer_num][ndx];
1143 if (pipe == NULL)
1144 continue;
1145 info->z_order = pipe->mixer_stage - MDP4_MIXER_STAGE0;
1146 info->ptype = pipe->pipe_type;
1147 info->pnum = pipe->pipe_num;
1148 info->pndx = pipe->pipe_ndx;
1149 info->mixer_num = pipe->mixer_num;
1150 info++;
1151 cnt++;
1152 }
1153 return cnt;
1154}
1155
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001156void mdp4_mixer_stage_up(struct mdp4_overlay_pipe *pipe)
1157{
1158 uint32 data, mask, snum, stage, mixer, pnum;
1159
1160 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1161
1162 stage = pipe->mixer_stage;
1163 mixer = pipe->mixer_num;
1164 pnum = pipe->pipe_num;
1165
1166 /* MDP_LAYERMIXER_IN_CFG, shard by both mixer 0 and 1 */
1167 data = inpdw(MDP_BASE + 0x10100);
1168
1169 if (mixer == MDP4_MIXER1)
1170 stage += 8;
1171
1172 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {/* VG1 and VG2 */
1173 pnum -= OVERLAY_PIPE_VG1; /* start from 0 */
1174 snum = 0;
1175 snum += (4 * pnum);
1176 } else {
1177 snum = 8;
1178 snum += (4 * pnum); /* RGB1 and RGB2 */
1179 }
1180
1181 mask = 0x0f;
1182 mask <<= snum;
1183 stage <<= snum;
1184 data &= ~mask; /* clear old bits */
1185
1186 data |= stage;
1187
1188 outpdw(MDP_BASE + 0x10100, data); /* MDP_LAYERMIXER_IN_CFG */
1189
1190 data = inpdw(MDP_BASE + 0x10100);
1191
1192 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1193
1194 ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = pipe; /* keep it */
1195}
1196
1197void mdp4_mixer_stage_down(struct mdp4_overlay_pipe *pipe)
1198{
1199 uint32 data, mask, snum, stage, mixer, pnum;
1200
1201 stage = pipe->mixer_stage;
1202 mixer = pipe->mixer_num;
1203 pnum = pipe->pipe_num;
1204
1205 if (pipe != ctrl->stage[mixer][stage]) /* not runing */
1206 return;
1207
1208 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1209
1210 /* MDP_LAYERMIXER_IN_CFG, shard by both mixer 0 and 1 */
1211 data = inpdw(MDP_BASE + 0x10100);
1212
1213 if (mixer == MDP4_MIXER1)
1214 stage += 8;
1215
1216 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) {/* VG1 and VG2 */
1217 pnum -= OVERLAY_PIPE_VG1; /* start from 0 */
1218 snum = 0;
1219 snum += (4 * pnum);
1220 } else {
1221 snum = 8;
1222 snum += (4 * pnum); /* RGB1 and RGB2 */
1223 }
1224
1225 mask = 0x0f;
1226 mask <<= snum;
1227 data &= ~mask; /* clear old bits */
1228
1229 outpdw(MDP_BASE + 0x10100, data); /* MDP_LAYERMIXER_IN_CFG */
1230
1231 data = inpdw(MDP_BASE + 0x10100);
1232
1233 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1234
1235 ctrl->stage[pipe->mixer_num][pipe->mixer_stage] = NULL; /* clear it */
1236}
1237
1238void mdp4_mixer_blend_setup(struct mdp4_overlay_pipe *pipe)
1239{
1240 struct mdp4_overlay_pipe *bg_pipe;
1241 unsigned char *overlay_base, *rgb_base;
1242 uint32 c0, c1, c2, blend_op, constant_color = 0, rgb_src_format;
1243 int off;
1244
1245 if (pipe->mixer_num) /* mixer number, /dev/fb0, /dev/fb1 */
1246 overlay_base = MDP_BASE + MDP4_OVERLAYPROC1_BASE;/* 0x18000 */
1247 else
1248 overlay_base = MDP_BASE + MDP4_OVERLAYPROC0_BASE;/* 0x10000 */
1249
1250 /* stage 0 to stage 2 */
1251 off = 0x20 * (pipe->mixer_stage - MDP4_MIXER_STAGE0);
1252
1253 bg_pipe = mdp4_overlay_stage_pipe(pipe->mixer_num,
1254 MDP4_MIXER_STAGE_BASE);
1255 if (bg_pipe == NULL) {
1256 pr_err("%s: Error: no bg_pipe\n", __func__);
1257 return;
1258 }
1259
1260 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1261
1262 blend_op = 0;
1263
1264 if (pipe->is_fg) {
1265 blend_op |= (MDP4_BLEND_FG_ALPHA_FG_CONST |
1266 MDP4_BLEND_BG_ALPHA_BG_CONST);
1267 outpdw(overlay_base + off + 0x108, pipe->alpha);
1268 outpdw(overlay_base + off + 0x10c, 0xff - pipe->alpha);
1269 if (pipe->alpha == 0xff) {
1270 rgb_base = MDP_BASE + MDP4_RGB_BASE;
1271 rgb_base += MDP4_RGB_OFF * bg_pipe->pipe_num;
1272 rgb_src_format = inpdw(rgb_base + 0x50);
1273 rgb_src_format |= MDP4_FORMAT_SOLID_FILL;
1274 outpdw(rgb_base + 0x50, rgb_src_format);
1275 outpdw(rgb_base + 0x1008, constant_color);
1276 }
1277 } else {
1278 if (bg_pipe->alpha_enable && pipe->alpha_enable) {
1279 /* both pipe have alpha */
1280 blend_op |= (MDP4_BLEND_FG_ALPHA_BG_PIXEL |
1281 MDP4_BLEND_FG_INV_ALPHA |
1282 MDP4_BLEND_BG_ALPHA_BG_PIXEL);
1283 } else if (bg_pipe->alpha_enable && pipe->alpha_enable == 0) {
1284 /* no alpha on both pipe */
1285 blend_op = (MDP4_BLEND_BG_ALPHA_BG_PIXEL |
1286 MDP4_BLEND_FG_ALPHA_BG_PIXEL |
1287 MDP4_BLEND_FG_INV_ALPHA);
1288 }
1289 }
1290
1291
1292 if (pipe->transp != MDP_TRANSP_NOP) {
1293 if (pipe->is_fg) {
1294 transp_color_key(pipe->src_format, pipe->transp,
1295 &c0, &c1, &c2);
1296 /* Fg blocked */
1297 blend_op |= MDP4_BLEND_FG_TRANSP_EN;
1298 /* lower limit */
1299 outpdw(overlay_base + off + 0x110,
1300 (c1 << 16 | c0));/* low */
1301 outpdw(overlay_base + off + 0x114, c2);/* low */
1302 /* upper limit */
1303 outpdw(overlay_base + off + 0x118,
1304 (c1 << 16 | c0));
1305 outpdw(overlay_base + off + 0x11c, c2);
1306 } else {
1307 transp_color_key(bg_pipe->src_format,
1308 pipe->transp, &c0, &c1, &c2);
1309 /* bg blocked */
1310 blend_op |= MDP4_BLEND_BG_TRANSP_EN;
1311 /* lower limit */
1312 outpdw(overlay_base + 0x180,
1313 (c1 << 16 | c0));/* low */
1314 outpdw(overlay_base + 0x184, c2);/* low */
1315 /* upper limit */
1316 outpdw(overlay_base + 0x188,
1317 (c1 << 16 | c0));/* high */
1318 outpdw(overlay_base + 0x18c, c2);/* high */
1319 }
1320 }
1321
1322 outpdw(overlay_base + off + 0x104, blend_op);
1323
1324 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1325}
1326
1327void mdp4_overlay_reg_flush(struct mdp4_overlay_pipe *pipe, int all)
1328{
1329 struct mdp4_overlay_pipe *bg_pipe;
1330 uint32 bits = 0;
1331
1332 if (pipe->mixer_num == MDP4_MIXER1)
1333 bits |= 0x02;
1334 else
1335 bits |= 0x01;
1336
1337 if (all) {
1338 if (pipe->pipe_num <= OVERLAY_PIPE_RGB2) {
1339 if (pipe->pipe_num == OVERLAY_PIPE_RGB2)
1340 bits |= 0x20;
1341 else
1342 bits |= 0x10;
1343 } else {
1344 if (pipe->is_fg && pipe->alpha == 0xFF) {
1345 bg_pipe = mdp4_overlay_stage_pipe(
1346 pipe->mixer_num,
1347 MDP4_MIXER_STAGE_BASE);
1348 if (bg_pipe->pipe_num <= OVERLAY_PIPE_RGB2) {
1349 if (bg_pipe->pipe_num ==
1350 OVERLAY_PIPE_RGB2)
1351 bits |= 0x20;
1352 else
1353 bits |= 0x10;
1354 }
1355 }
1356 if (pipe->pipe_num == OVERLAY_PIPE_VG2)
1357 bits |= 0x08;
1358 else
1359 bits |= 0x04;
1360 }
1361 }
1362
1363 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
1364 outpdw(MDP_BASE + 0x18000, bits); /* MDP_OVERLAY_REG_FLUSH */
1365 mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
1366}
1367
1368struct mdp4_overlay_pipe *mdp4_overlay_stage_pipe(int mixer, int stage)
1369{
1370 return ctrl->stage[mixer][stage];
1371}
1372
1373struct mdp4_overlay_pipe *mdp4_overlay_ndx2pipe(int ndx)
1374{
1375 struct mdp4_overlay_pipe *pipe;
1376
1377 if (ndx <= 0 || ndx > MDP4_MAX_PIPE)
1378 return NULL;
1379
1380 pipe = &ctrl->plist[ndx - 1]; /* ndx start from 1 */
1381
1382 if (pipe->pipe_used == 0)
1383 return NULL;
1384
1385 return pipe;
1386}
1387
1388struct mdp4_overlay_pipe *mdp4_overlay_pipe_alloc(
1389 int ptype, int mixer, int req_share)
1390{
1391 int i, j, ndx, found;
1392 struct mdp4_overlay_pipe *pipe, *opipe;
1393 struct mdp4_pipe_desc *pd;
1394
1395 found = 0;
1396 pipe = &ctrl->plist[0];
1397
1398 for (i = 0; i < MDP4_MAX_PIPE; i++) {
1399 if (pipe->pipe_type == ptype && pipe->pipe_used == 0) {
1400 pd = &ctrl->ov_pipe[pipe->pipe_num];
1401 if (pd->share) { /* pipe can be shared */
1402 if (pd->ref_cnt == 0) {
1403 /* not yet been used */
1404 found++;
1405 break;
1406 }
1407 /* pipe occupied already */
1408 if (req_share && pd->ref_cnt < MDP4_MAX_SHARE) {
1409 for (j = 0; j < MDP4_MAX_SHARE; j++) {
1410 ndx = pd->ndx_list[j];
1411 if (ndx != 0)
1412 break;
1413 }
1414 /* ndx satrt from 1 */
1415 opipe = &ctrl->plist[ndx - 1];
1416 /*
1417 * occupied pipe willing to share and
1418 * same mixer
1419 */
1420 if (opipe->pipe_share &&
1421 opipe->mixer_num == mixer) {
1422 found++;
1423 break;
1424 }
1425 }
1426 } else { /* not a shared pipe */
1427 if (req_share == 0 && pd->ref_cnt == 0) {
1428 found++;
1429 break;
1430 }
1431 }
1432 }
1433 pipe++;
1434 }
1435
1436 if (found) {
1437 init_completion(&pipe->comp);
1438 init_completion(&pipe->dmas_comp);
1439 pr_info("%s: pipe=%x ndx=%d num=%d share=%d cnt=%d\n",
1440 __func__, (int)pipe, pipe->pipe_ndx, pipe->pipe_num,
1441 pd->share, pd->ref_cnt);
1442 return pipe;
1443 }
1444
1445 pr_debug("%s: ptype=%d mixer=%d req_share=%d FAILED\n",
1446 __func__, ptype, mixer, req_share);
1447
1448 return NULL;
1449}
1450
1451
1452void mdp4_overlay_pipe_free(struct mdp4_overlay_pipe *pipe)
1453{
1454 int i;
1455 uint32 ptype, num, ndx;
1456 struct mdp4_pipe_desc *pd;
1457
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07001458 pr_info("%s: pipe=%x ndx=%d\n", __func__,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001459 (int)pipe, pipe->pipe_ndx);
1460 pd = &ctrl->ov_pipe[pipe->pipe_num];
1461 if (pd->ref_cnt) {
1462 pd->ref_cnt--;
1463 for (i = 0; i < MDP4_MAX_SHARE; i++) {
1464 if (pd->ndx_list[i] == pipe->pipe_ndx) {
1465 pd->ndx_list[i] = 0;
1466 break;
1467 }
1468 }
1469 }
1470
1471 pd->player = NULL;
1472
1473 ptype = pipe->pipe_type;
1474 num = pipe->pipe_num;
1475 ndx = pipe->pipe_ndx;
1476
1477 memset(pipe, 0, sizeof(*pipe));
1478
1479 pipe->pipe_type = ptype;
1480 pipe->pipe_num = num;
1481 pipe->pipe_ndx = ndx;
1482}
1483
1484int mdp4_overlay_req_check(uint32 id, uint32 z_order, uint32 mixer)
1485{
1486 struct mdp4_overlay_pipe *pipe;
1487
1488 pipe = ctrl->stage[mixer][z_order];
1489
1490 if (pipe == NULL)
1491 return 0;
1492
1493 if (pipe->pipe_ndx == id) /* same req, recycle */
1494 return 0;
1495
1496 if (id == MSMFB_NEW_REQUEST) { /* new request */
1497 if (pipe->pipe_num >= OVERLAY_PIPE_VG1) /* share pipe */
1498 return 0;
1499 }
1500
1501 return -EPERM;
1502}
1503
1504static int mdp4_overlay_validate_downscale(struct mdp_overlay *req,
1505 struct msm_fb_data_type *mfd, uint32 perf_level, uint32 pclk_rate)
1506{
1507 __u32 panel_clk_khz, mdp_clk_khz;
1508 __u32 num_hsync_pix_clks, mdp_clks_per_hsync, src_wh;
1509 __u32 hsync_period_ps, mdp_period_ps, total_hsync_period_ps;
1510 unsigned long fill_rate_y_dir, fill_rate_x_dir;
1511 unsigned long fillratex100, mdp_pixels_produced;
1512 unsigned long mdp_clk_hz;
1513
1514 pr_debug("%s: LCDC Mode Downscale validation with MDP Core"
1515 " Clk rate\n", __func__);
1516 pr_debug("src_w %u, src_h %u, dst_w %u, dst_h %u\n",
1517 req->src_rect.w, req->src_rect.h, req->dst_rect.w,
1518 req->dst_rect.h);
1519
1520
1521 panel_clk_khz = pclk_rate/1000;
1522 mdp_clk_hz = mdp_perf_level2clk_rate(perf_level);
1523
1524 if (!mdp_clk_hz) {
1525 pr_debug("mdp_perf_level2clk_rate returned 0,"
1526 "Downscale Validation incomplete\n");
1527 return 0;
1528 }
1529
1530 mdp_clk_khz = mdp_clk_hz/1000;
1531
1532 num_hsync_pix_clks = mfd->panel_info.lcdc.h_back_porch +
1533 mfd->panel_info.lcdc.h_front_porch +
1534 mfd->panel_info.lcdc.h_pulse_width +
1535 mfd->panel_info.xres;
1536
1537 hsync_period_ps = 1000000000/panel_clk_khz;
1538 mdp_period_ps = 1000000000/mdp_clk_khz;
1539
1540 total_hsync_period_ps = num_hsync_pix_clks * hsync_period_ps;
1541 mdp_clks_per_hsync = total_hsync_period_ps/mdp_period_ps;
1542
1543 pr_debug("hsync_period_ps %u, mdp_period_ps %u,"
1544 "total_hsync_period_ps %u\n", hsync_period_ps,
1545 mdp_period_ps, total_hsync_period_ps);
1546
1547 src_wh = req->src_rect.w * req->src_rect.h;
1548 if (src_wh % req->dst_rect.h)
1549 fill_rate_y_dir = (src_wh / req->dst_rect.h) + 1;
1550 else
1551 fill_rate_y_dir = (src_wh / req->dst_rect.h);
1552
1553 fill_rate_x_dir = (mfd->panel_info.xres - req->dst_rect.w)
1554 + req->src_rect.w;
1555
1556 if (fill_rate_y_dir >= fill_rate_x_dir)
1557 fillratex100 = 100 * fill_rate_y_dir / mfd->panel_info.xres;
1558 else
1559 fillratex100 = 100 * fill_rate_x_dir / mfd->panel_info.xres;
1560
1561 pr_debug("mdp_clks_per_hsync %u, fill_rate_y_dir %lu,"
1562 "fill_rate_x_dir %lu\n", mdp_clks_per_hsync,
1563 fill_rate_y_dir, fill_rate_x_dir);
1564
1565 mdp_pixels_produced = 100 * mdp_clks_per_hsync/fillratex100;
1566 pr_debug("fillratex100 %lu, mdp_pixels_produced %lu\n",
1567 fillratex100, mdp_pixels_produced);
1568 if (mdp_pixels_produced <= mfd->panel_info.xres) {
1569 pr_err("%s(): LCDC underflow detected during downscale\n",
1570 __func__);
1571 return -ERANGE;
1572 }
1573
1574 return 0;
1575}
1576
1577static int mdp4_overlay_req2pipe(struct mdp_overlay *req, int mixer,
1578 struct mdp4_overlay_pipe **ppipe,
1579 struct msm_fb_data_type *mfd)
1580{
1581 struct mdp4_overlay_pipe *pipe;
1582 struct mdp4_pipe_desc *pd;
1583 int ret, ptype, req_share;
1584 int j;
1585
1586 if (mfd == NULL) {
1587 pr_err("%s: mfd == NULL, -ENODEV\n", __func__);
1588 return -ENODEV;
1589 }
1590
1591 if (mixer >= MDP4_MAX_MIXER) {
1592 pr_err("%s: mixer out of range!\n", __func__);
1593 mdp4_stat.err_mixer++;
1594 return -ERANGE;
1595 }
1596
1597 if (req->z_order < 0 || req->z_order > 2) {
1598 pr_err("%s: z_order=%d out of range!\n", __func__,
1599 req->z_order);
1600 mdp4_stat.err_zorder++;
1601 return -ERANGE;
1602 }
1603
1604 if (req->src_rect.h == 0 || req->src_rect.w == 0) {
1605 pr_err("%s: src img of zero size!\n", __func__);
1606 mdp4_stat.err_size++;
1607 return -EINVAL;
1608 }
1609
1610
1611 if (req->dst_rect.h > (req->src_rect.h * 8)) { /* too much */
1612 mdp4_stat.err_scale++;
1613 pr_err("%s: scale up, too much (h)!\n", __func__);
1614 return -ERANGE;
1615 }
1616
1617 if (req->src_rect.h > (req->dst_rect.h * 8)) { /* too little */
1618 mdp4_stat.err_scale++;
1619 pr_err("%s: scale down, too little (h)!\n", __func__);
1620 return -ERANGE;
1621 }
1622
1623 if (req->dst_rect.w > (req->src_rect.w * 8)) { /* too much */
1624 mdp4_stat.err_scale++;
1625 pr_err("%s: scale up, too much (w)!\n", __func__);
1626 return -ERANGE;
1627 }
1628
1629 if (req->src_rect.w > (req->dst_rect.w * 8)) { /* too little */
1630 mdp4_stat.err_scale++;
1631 pr_err("%s: scale down, too little (w)!\n", __func__);
1632 return -ERANGE;
1633 }
1634
1635 if (mdp_hw_revision == MDP4_REVISION_V1) {
1636 /* non integer down saceling ratio smaller than 1/4
1637 * is not supportted
1638 */
1639 if (req->src_rect.h > (req->dst_rect.h * 4)) {
1640 if (req->src_rect.h % req->dst_rect.h) {
1641 mdp4_stat.err_scale++;
1642 pr_err("%s: need integer (h)!\n", __func__);
1643 return -ERANGE;
1644 }
1645 }
1646
1647 if (req->src_rect.w > (req->dst_rect.w * 4)) {
1648 if (req->src_rect.w % req->dst_rect.w) {
1649 mdp4_stat.err_scale++;
1650 pr_err("%s: need integer (w)!\n", __func__);
1651 return -ERANGE;
1652 }
1653 }
1654 }
1655
1656 if (((req->src_rect.x + req->src_rect.w) > req->src.width) ||
1657 ((req->src_rect.y + req->src_rect.h) > req->src.height)) {
1658 mdp4_stat.err_size++;
1659 pr_err("%s invalid src rectangle\n", __func__);
1660 return -ERANGE;
1661 }
1662
1663 if (ctrl->panel_3d != MDP4_3D_SIDE_BY_SIDE) {
1664 int xres;
1665 int yres;
1666
1667 xres = mfd->panel_info.xres;
1668 yres = mfd->panel_info.yres;
1669
1670 if (((req->dst_rect.x + req->dst_rect.w) > xres) ||
1671 ((req->dst_rect.y + req->dst_rect.h) > yres)) {
1672 mdp4_stat.err_size++;
1673 pr_err("%s invalid dst rectangle\n", __func__);
1674 return -ERANGE;
1675 }
1676 }
1677
1678 ptype = mdp4_overlay_format2type(req->src.format);
1679 if (ptype < 0) {
1680 pr_err("%s: mdp4_overlay_format2type!\n", __func__);
1681 return ptype;
1682 }
1683
1684 req_share = (req->flags & MDP_OV_PIPE_SHARE);
1685
1686 if (req->id == MSMFB_NEW_REQUEST) /* new request */
1687 pipe = mdp4_overlay_pipe_alloc(ptype, mixer, req_share);
1688 else
1689 pipe = mdp4_overlay_ndx2pipe(req->id);
1690
1691 if (pipe == NULL) {
1692 pr_err("%s: pipe == NULL!\n", __func__);
1693 return -ENOMEM;
1694 }
1695
1696 /* no down scale at rgb pipe */
1697 if (pipe->pipe_num <= OVERLAY_PIPE_RGB2) {
1698 if ((req->src_rect.h > req->dst_rect.h) ||
1699 (req->src_rect.w > req->dst_rect.w)) {
1700 pr_err("%s: h>h || w>w!\n", __func__);
1701 return -ERANGE;
1702 }
1703 }
1704
1705 pipe->src_format = req->src.format;
1706 ret = mdp4_overlay_format2pipe(pipe);
1707 if (ret < 0) {
1708 pr_err("%s: mdp4_overlay_format2pipe!\n", __func__);
1709 return ret;
1710 }
1711
1712 /*
1713 * base layer == 1, reserved for frame buffer
1714 * zorder 0 == stage 0 == 2
1715 * zorder 1 == stage 1 == 3
1716 * zorder 2 == stage 2 == 4
1717 */
1718 if (req->id == MSMFB_NEW_REQUEST) { /* new request */
1719 pd = &ctrl->ov_pipe[pipe->pipe_num];
1720 for (j = 0; j < MDP4_MAX_SHARE; j++) {
1721 if (pd->ndx_list[j] == 0) {
1722 pd->ndx_list[j] = pipe->pipe_ndx;
1723 break;
1724 }
1725 }
1726 pipe->pipe_share = req_share;
1727 pd->ref_cnt++;
1728 pipe->pipe_used++;
1729 pipe->mixer_num = mixer;
1730 pipe->mixer_stage = req->z_order + MDP4_MIXER_STAGE0;
1731 pr_debug("%s: zorder=%d pipe ndx=%d num=%d\n", __func__,
1732 req->z_order, pipe->pipe_ndx, pipe->pipe_num);
1733
1734 }
1735
1736 pipe->src_width = req->src.width & 0x07ff; /* source img width */
1737 pipe->src_height = req->src.height & 0x07ff; /* source img height */
1738 pipe->src_h = req->src_rect.h & 0x07ff;
1739 pipe->src_w = req->src_rect.w & 0x07ff;
1740 pipe->src_y = req->src_rect.y & 0x07ff;
1741 pipe->src_x = req->src_rect.x & 0x07ff;
1742 pipe->dst_h = req->dst_rect.h & 0x07ff;
1743 pipe->dst_w = req->dst_rect.w & 0x07ff;
1744 pipe->dst_y = req->dst_rect.y & 0x07ff;
1745 pipe->dst_x = req->dst_rect.x & 0x07ff;
1746
1747 pipe->op_mode = 0;
1748
1749 if (req->flags & MDP_FLIP_LR)
1750 pipe->op_mode |= MDP4_OP_FLIP_LR;
1751
1752 if (req->flags & MDP_FLIP_UD)
1753 pipe->op_mode |= MDP4_OP_FLIP_UD;
1754
1755 if (req->flags & MDP_DITHER)
1756 pipe->op_mode |= MDP4_OP_DITHER_EN;
1757
1758 if (req->flags & MDP_DEINTERLACE)
1759 pipe->op_mode |= MDP4_OP_DEINT_EN;
1760
1761 if (req->flags & MDP_DEINTERLACE_ODD)
1762 pipe->op_mode |= MDP4_OP_DEINT_ODD_REF;
1763
1764 pipe->is_fg = req->is_fg;/* control alpha and color key */
1765
1766 pipe->alpha = req->alpha & 0x0ff;
1767
1768 pipe->transp = req->transp_mask;
1769
1770 *ppipe = pipe;
1771
1772 return 0;
1773}
1774
1775static int get_img(struct msmfb_data *img, struct fb_info *info,
1776 unsigned long *start, unsigned long *len, struct file **pp_file)
1777{
1778 int put_needed, ret = 0, fb_num;
1779 struct file *file;
1780#ifdef CONFIG_ANDROID_PMEM
1781 unsigned long vstart;
1782#endif
1783
1784 if (img->flags & MDP_BLIT_SRC_GEM) {
1785 *pp_file = NULL;
1786 return kgsl_gem_obj_addr(img->memory_id, (int) img->priv,
1787 start, len);
1788 }
1789
1790#ifdef CONFIG_ANDROID_PMEM
1791 if (!get_pmem_file(img->memory_id, start, &vstart, len, pp_file))
1792 return 0;
1793#endif
1794 file = fget_light(img->memory_id, &put_needed);
1795 if (file == NULL)
1796 return -1;
1797
1798 if (MAJOR(file->f_dentry->d_inode->i_rdev) == FB_MAJOR) {
1799 fb_num = MINOR(file->f_dentry->d_inode->i_rdev);
1800 if (get_fb_phys_info(start, len, fb_num))
1801 ret = -1;
1802 else
1803 *pp_file = file;
1804 } else
1805 ret = -1;
1806 if (ret)
1807 fput_light(file, put_needed);
1808 return ret;
1809}
1810
kuogee hsieh4aea2742011-07-06 11:05:05 -07001811#ifdef CONFIG_FB_MSM_MIPI_DSI
1812int mdp4_overlay_3d_sbys(struct fb_info *info, struct msmfb_overlay_3d *req)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001813{
1814 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
1815 int ret = -EPERM;
1816
1817 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
1818 return -EINTR;
1819
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001820 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
kuogee hsieh4aea2742011-07-06 11:05:05 -07001821 mdp4_dsi_cmd_3d_sbys(mfd, req);
1822 ret = 0;
1823 } else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
1824 mdp4_dsi_video_3d_sbys(mfd, req);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001825 ret = 0;
1826 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001827 mutex_unlock(&mfd->dma->ov_mutex);
1828
1829 return ret;
1830}
kuogee hsieh4aea2742011-07-06 11:05:05 -07001831#else
1832int mdp4_overlay_3d_sbys(struct fb_info *info, struct msmfb_overlay_3d *req)
1833{
1834 /* do nothing */
1835 return -EPERM;
1836}
1837#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001838
1839#ifdef CONFIG_FB_MSM_OVERLAY_WRITEBACK
1840int mdp4_overlay_blt(struct fb_info *info, struct msmfb_overlay_blt *req)
1841{
1842 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
1843
1844 if (mfd == NULL)
1845 return -ENODEV;
1846
1847 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
1848 return -EINTR;
1849
1850 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
1851 mdp4_dsi_overlay_blt(mfd, req);
1852 else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO)
1853 mdp4_dsi_video_overlay_blt(mfd, req);
1854 else if (ctrl->panel_mode & MDP4_PANEL_LCDC)
1855 mdp4_lcdc_overlay_blt(mfd, req);
1856
1857 mutex_unlock(&mfd->dma->ov_mutex);
1858
1859 return 0;
1860}
1861
1862int mdp4_overlay_blt_offset(struct fb_info *info, struct msmfb_overlay_blt *req)
1863{
1864 int ret = 0;
1865
1866 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
1867
1868 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
1869 return -EINTR;
1870
1871 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD)
1872 ret = mdp4_dsi_overlay_blt_offset(mfd, req);
1873 else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO)
1874 ret = mdp4_dsi_video_overlay_blt_offset(mfd, req);
1875 else if (ctrl->panel_mode & MDP4_PANEL_LCDC)
1876 ret = mdp4_lcdc_overlay_blt_offset(mfd, req);
1877
1878 mutex_unlock(&mfd->dma->ov_mutex);
1879
1880 return ret;
1881}
1882#endif
1883
1884int mdp4_overlay_get(struct fb_info *info, struct mdp_overlay *req)
1885{
1886 struct mdp4_overlay_pipe *pipe;
1887
1888 pipe = mdp4_overlay_ndx2pipe(req->id);
1889 if (pipe == NULL)
1890 return -ENODEV;
1891
1892 *req = pipe->req_data;
1893
1894 return 0;
1895}
1896
1897#define OVERLAY_VGA_SIZE 0x04B000
1898#define OVERLAY_720P_TILE_SIZE 0x0E6000
1899#define OVERLAY_WSVGA_SIZE 0x98000 /* 1024x608, align 600 to 32bit */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001900
1901#ifdef CONFIG_MSM_BUS_SCALING
1902#define OVERLAY_BUS_SCALE_TABLE_BASE 6
1903#endif
1904
1905static int mdp4_overlay_is_rgb_type(int format)
1906{
1907 switch (format) {
1908 case MDP_RGB_565:
1909 case MDP_RGB_888:
1910 case MDP_BGR_565:
1911 case MDP_XRGB_8888:
1912 case MDP_ARGB_8888:
1913 case MDP_RGBA_8888:
1914 case MDP_BGRA_8888:
1915 case MDP_RGBX_8888:
1916 return 1;
1917 default:
1918 return 0;
1919 }
1920}
1921
1922static uint32 mdp4_overlay_get_perf_level(struct mdp_overlay *req)
1923{
1924 int is_fg;
1925
1926 if (req->is_fg && ((req->alpha & 0x0ff) == 0xff))
1927 is_fg = 1;
1928
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001929 if (mdp4_extn_disp)
1930 return OVERLAY_PERF_LEVEL1;
1931
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001932 if (req->flags & MDP_DEINTERLACE)
1933 return OVERLAY_PERF_LEVEL1;
1934
1935 if (mdp4_overlay_is_rgb_type(req->src.format) && is_fg &&
1936 ((req->src.width * req->src.height) <= OVERLAY_WSVGA_SIZE))
1937 return OVERLAY_PERF_LEVEL4;
1938 else if (mdp4_overlay_is_rgb_type(req->src.format))
1939 return OVERLAY_PERF_LEVEL1;
1940
1941 if (ctrl->ov_pipe[OVERLAY_PIPE_VG1].ref_cnt &&
1942 ctrl->ov_pipe[OVERLAY_PIPE_VG2].ref_cnt)
1943 return OVERLAY_PERF_LEVEL1;
1944
1945 if (req->src.width*req->src.height <= OVERLAY_VGA_SIZE)
1946 return OVERLAY_PERF_LEVEL3;
1947 else if (req->src.width*req->src.height <= OVERLAY_720P_TILE_SIZE)
1948 return OVERLAY_PERF_LEVEL2;
1949 else
1950 return OVERLAY_PERF_LEVEL1;
1951}
1952
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001953void mdp4_update_perf_level(u32 perf_level)
1954{
1955 new_perf_level = perf_level;
1956}
1957
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001958void mdp4_set_perf_level(void)
1959{
1960 static int old_perf_level;
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001961 int cur_perf_level;
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001962
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07001963 if (mdp4_extn_disp)
1964 cur_perf_level = OVERLAY_PERF_LEVEL1;
1965 else
1966 cur_perf_level = new_perf_level;
1967
1968 if (old_perf_level != cur_perf_level) {
1969 mdp_set_core_clk(cur_perf_level);
1970 old_perf_level = cur_perf_level;
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001971 }
1972}
1973
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001974int mdp4_overlay_set(struct fb_info *info, struct mdp_overlay *req)
1975{
1976 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
kuogee hsiehc4b8b2f2011-07-12 13:32:14 -07001977 int ret, mixer, perf_level;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001978 struct mdp4_overlay_pipe *pipe;
kuogee hsieh9452ecb2011-08-01 18:26:23 -07001979 uint32 flags;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001980
1981 if (mfd == NULL) {
1982 pr_err("%s: mfd == NULL, -ENODEV\n", __func__);
1983 return -ENODEV;
1984 }
1985
1986 if (!mfd->panel_power_on) /* suspended */
1987 return -EPERM;
1988
1989 if (req->src.format == MDP_FB_FORMAT)
1990 req->src.format = mfd->fb_imgType;
1991
1992 if (mutex_lock_interruptible(&mfd->dma->ov_mutex)) {
1993 pr_err("%s: mutex_lock_interruptible, -EINTR\n", __func__);
1994 return -EINTR;
1995 }
1996
1997 perf_level = mdp4_overlay_get_perf_level(req);
1998
1999 if ((mfd->panel_info.type == LCDC_PANEL) &&
2000 (req->src_rect.h >
2001 req->dst_rect.h || req->src_rect.w > req->dst_rect.w)) {
2002 if (mdp4_overlay_validate_downscale(req, mfd,
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07002003 perf_level, mfd->panel_info.clk_rate))
2004 mdp4_lcdc_overlay_blt_start(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002005 }
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002006
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002007 if ((mfd->panel_info.type == MIPI_VIDEO_PANEL) &&
2008 (req->src_rect.h >
2009 req->dst_rect.h || req->src_rect.w > req->dst_rect.w)) {
2010 if (mdp4_overlay_validate_downscale(req, mfd,
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002011 perf_level, (&mfd->panel_info.mipi)->dsi_pclk_rate))
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07002012 mdp4_dsi_video_blt_start(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002013 }
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002014
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002015 mixer = mfd->panel_info.pdest; /* DISPLAY_1 or DISPLAY_2 */
2016
2017 ret = mdp4_overlay_req2pipe(req, mixer, &pipe, mfd);
2018 if (ret < 0) {
2019 mutex_unlock(&mfd->dma->ov_mutex);
2020 pr_err("%s: mdp4_overlay_req2pipe, ret=%d\n", __func__, ret);
2021 return ret;
2022 }
2023
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002024 /*
2025 * writeback (blt) mode to provide work around for
2026 * dsi cmd mode interface hardware bug.
2027 */
2028 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2029 if (mixer == MDP4_MIXER0 && req->dst_rect.x != 0) {
2030 mdp4_dsi_blt_dmap_busy_wait(mfd);
2031 mdp4_dsi_overlay_blt_start(mfd);
2032 }
2033 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002034
2035 /* return id back to user */
2036 req->id = pipe->pipe_ndx; /* pipe_ndx start from 1 */
2037 pipe->req_data = *req; /* keep original req */
2038
2039 pipe->flags = req->flags;
2040
2041 if (pipe->flags & MDP_SHARPENING) {
2042 bool test = ((pipe->req_data.dpp.sharp_strength > 0) &&
2043 ((req->src_rect.w > req->dst_rect.w) &&
2044 (req->src_rect.h > req->dst_rect.h)));
2045 if (test) {
2046 pr_warn("%s: No sharpening while downscaling.\n",
2047 __func__);
2048 pipe->flags &= ~MDP_SHARPENING;
2049 }
2050 }
2051
2052 mdp4_stat.overlay_set[pipe->mixer_num]++;
2053
2054 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2055 if (mdp_hw_revision == MDP4_REVISION_V2_1 &&
2056 pipe->mixer_num == MDP4_MIXER0)
2057 mdp4_overlay_status_write(MDP4_OVERLAY_TYPE_SET, true);
2058 }
2059
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002060 if (new_perf_level != perf_level) {
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07002061 mdp4_update_perf_level(perf_level);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002062
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002063 /* change clck base on perf level */
2064 flags = pipe->flags;
2065 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
2066 if (pipe->mixer_num == MDP4_MIXER0) {
2067 if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
2068 mdp4_overlay_dsi_video_vsync_push(mfd, pipe);
2069 } else if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2070 mdp4_dsi_cmd_dma_busy_wait(mfd);
2071 mdp4_dsi_blt_dmap_busy_wait(mfd);
2072 mdp4_set_perf_level();
2073 } else if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
2074 mdp4_overlay_lcdc_vsync_push(mfd, pipe);
2075 } else if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2076 mdp4_mddi_dma_busy_wait(mfd);
2077 mdp4_set_perf_level();
2078 }
2079 } else {
2080 if (ctrl->panel_mode & MDP4_PANEL_DTV)
2081 mdp4_overlay_dtv_vsync_push(mfd, pipe);
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002082 }
Adrian Salido-Moreno5e912032011-08-29 11:15:47 -07002083 pipe->flags = flags;
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002084 }
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002085
2086 mutex_unlock(&mfd->dma->ov_mutex);
2087
2088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002089#ifdef CONFIG_MSM_BUS_SCALING
2090 if (pipe->mixer_num == MDP4_MIXER0) {
2091 mdp_bus_scale_update_request(OVERLAY_BUS_SCALE_TABLE_BASE
2092 - perf_level);
2093 }
2094#endif
2095
2096 return 0;
2097}
2098
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002099int mdp4_overlay_unset(struct fb_info *info, int ndx)
2100{
2101 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
2102 struct mdp4_overlay_pipe *pipe;
2103 uint32 flags;
2104
2105 if (mfd == NULL)
2106 return -ENODEV;
2107
2108 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
2109 return -EINTR;
2110
2111 pipe = mdp4_overlay_ndx2pipe(ndx);
2112
2113 if (pipe == NULL) {
2114 mutex_unlock(&mfd->dma->ov_mutex);
2115 return -ENODEV;
2116 }
2117
2118 if (pipe->mixer_num == MDP4_MIXER1)
2119 ctrl->mixer1_played = 0;
2120 else {
2121 /* mixer 0 */
2122 ctrl->mixer0_played = 0;
2123#ifdef CONFIG_FB_MSM_MIPI_DSI
2124 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2125 if (mfd->panel_power_on) {
2126 mdp4_dsi_blt_dmap_busy_wait(mfd);
2127 }
2128 }
2129#else
2130 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2131 if (mfd->panel_power_on)
2132 mdp4_mddi_dma_busy_wait(mfd);
2133 }
2134#endif
2135 }
2136
2137 mdp4_mixer_stage_down(pipe);
2138
2139 if (pipe->mixer_num == MDP4_MIXER0) {
2140#ifdef CONFIG_FB_MSM_MIPI_DSI
2141 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2142 if (mfd->panel_power_on)
2143 if (mdp4_dsi_overlay_blt_stop(mfd) == 0)
2144 mdp4_dsi_cmd_overlay_restore();
2145 } else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
2146 flags = pipe->flags;
2147 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
kuogee hsiehebca0c72011-07-14 13:30:33 -07002148 mdp4_overlay_reg_flush(pipe, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002149 mdp4_overlay_dsi_video_vsync_push(mfd, pipe);
2150 pipe->flags = flags;
kuogee hsieh4d3c7792011-07-25 11:02:24 -07002151 mdp4_dsi_video_blt_stop(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002152 }
2153#else
2154 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2155 if (mdp_hw_revision == MDP4_REVISION_V2_1)
2156 mdp4_overlay_status_write(
2157 MDP4_OVERLAY_TYPE_UNSET, true);
2158 if (mfd->panel_power_on)
2159 mdp4_mddi_overlay_restore();
2160 }
2161#endif
2162 else if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
2163 flags = pipe->flags;
2164 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
kuogee hsiehebca0c72011-07-14 13:30:33 -07002165 mdp4_overlay_reg_flush(pipe, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002166 mdp4_overlay_lcdc_vsync_push(mfd, pipe);
2167 pipe->flags = flags;
kuogee hsieh21ef2fe2011-08-18 17:12:42 -07002168 mdp4_lcdc_overlay_blt_stop(mfd);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002169 }
2170 }
2171#ifdef CONFIG_FB_MSM_DTV
2172 else { /* mixer1, DTV, ATV */
kuogee hsieh9452ecb2011-08-01 18:26:23 -07002173 if (ctrl->panel_mode & MDP4_PANEL_DTV) {
2174 flags = pipe->flags;
2175 pipe->flags &= ~MDP_OV_PLAY_NOWAIT;
2176 mdp4_overlay_dtv_vsync_push(mfd, pipe);
2177 pipe->flags = flags;
2178 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002179 }
2180#endif
2181
2182 mdp4_stat.overlay_unset[pipe->mixer_num]++;
2183
2184 mdp4_overlay_pipe_free(pipe);
2185
2186 if (!(ctrl->ov_pipe[OVERLAY_PIPE_VG1].ref_cnt +
2187 ctrl->ov_pipe[OVERLAY_PIPE_VG2].ref_cnt))
Nagamalleswararao Ganji074ee022011-09-02 12:06:37 -07002188 mdp4_update_perf_level(OVERLAY_PERF_LEVEL4);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002189
2190 mutex_unlock(&mfd->dma->ov_mutex);
2191
2192#ifdef CONFIG_MSM_BUS_SCALING
2193 if (pipe->mixer_num == MDP4_MIXER0)
2194 if (mfd->panel_power_on)
2195 mdp_bus_scale_update_request(2);
2196#endif
2197 return 0;
2198}
2199
2200struct tile_desc {
2201 uint32 width; /* tile's width */
2202 uint32 height; /* tile's height */
2203 uint32 row_tile_w; /* tiles per row's width */
2204 uint32 row_tile_h; /* tiles per row's height */
2205};
2206
2207void tile_samsung(struct tile_desc *tp)
2208{
2209 /*
2210 * each row of samsung tile consists of two tiles in height
2211 * and two tiles in width which means width should align to
2212 * 64 x 2 bytes and height should align to 32 x 2 bytes.
2213 * video decoder generate two tiles in width and one tile
2214 * in height which ends up height align to 32 X 1 bytes.
2215 */
2216 tp->width = 64; /* 64 bytes */
2217 tp->row_tile_w = 2; /* 2 tiles per row's width */
2218 tp->height = 32; /* 32 bytes */
2219 tp->row_tile_h = 1; /* 1 tiles per row's height */
2220}
2221
2222uint32 tile_mem_size(struct mdp4_overlay_pipe *pipe, struct tile_desc *tp)
2223{
2224 uint32 tile_w, tile_h;
2225 uint32 row_num_w, row_num_h;
2226
2227
2228 tile_w = tp->width * tp->row_tile_w;
2229 tile_h = tp->height * tp->row_tile_h;
2230
2231 row_num_w = (pipe->src_width + tile_w - 1) / tile_w;
2232 row_num_h = (pipe->src_height + tile_h - 1) / tile_h;
2233 return ((row_num_w * row_num_h * tile_w * tile_h) + 8191) & ~8191;
2234}
2235
2236int mdp4_overlay_play(struct fb_info *info, struct msmfb_overlay_data *req,
2237 struct file **pp_src_file, struct file **pp_src_plane1_file,
2238 struct file **pp_src_plane2_file)
2239{
2240 struct msm_fb_data_type *mfd = (struct msm_fb_data_type *)info->par;
2241 struct msmfb_data *img;
2242 struct mdp4_overlay_pipe *pipe;
2243 struct mdp4_pipe_desc *pd;
2244 ulong start, addr;
2245 ulong len = 0;
2246 struct file *p_src_file = 0;
2247 struct file *p_src_plane1_file = 0, *p_src_plane2_file = 0;
2248 uint32_t overlay_version = 0;
2249
2250 if (mfd == NULL)
2251 return -ENODEV;
2252
2253 if (!mfd->panel_power_on) /* suspended */
2254 return -EPERM;
2255
2256 pipe = mdp4_overlay_ndx2pipe(req->id);
2257 if (pipe == NULL) {
2258 pr_err("%s: req_id=%d Error\n", __func__, req->id);
2259 return -ENODEV;
2260 }
2261
2262 if (mutex_lock_interruptible(&mfd->dma->ov_mutex))
2263 return -EINTR;
2264
2265 pd = &ctrl->ov_pipe[pipe->pipe_num];
2266 if (pd->player && pipe != pd->player) {
2267 if (pipe->pipe_type == OVERLAY_TYPE_RGB) {
2268 mutex_unlock(&mfd->dma->ov_mutex);
2269 return 0; /* ignore it, kicked out already */
2270 }
2271 }
2272
2273 pd->player = pipe; /* keep */
2274
2275 img = &req->data;
2276 get_img(img, info, &start, &len, &p_src_file);
2277 if (len == 0) {
2278 mutex_unlock(&mfd->dma->ov_mutex);
2279 pr_err("%s: pmem Error\n", __func__);
2280 return -1;
2281 }
2282 *pp_src_file = p_src_file;
2283
2284 addr = start + img->offset;
2285 pipe->srcp0_addr = addr;
2286 pipe->srcp0_ystride = pipe->src_width * pipe->bpp;
2287
2288 if ((req->version_key & VERSION_KEY_MASK) == 0xF9E8D700)
2289 overlay_version = (req->version_key & ~VERSION_KEY_MASK);
2290
2291 if (pipe->fetch_plane == OVERLAY_PLANE_PSEUDO_PLANAR) {
2292 if (overlay_version > 0) {
2293 img = &req->plane1_data;
2294 get_img(img, info, &start, &len, &p_src_plane1_file);
2295 if (len == 0) {
2296 mutex_unlock(&mfd->dma->ov_mutex);
2297 pr_err("%s: Error to get plane1\n", __func__);
2298 return -EINVAL;
2299 }
2300 pipe->srcp1_addr = start + img->offset;
2301 *pp_src_plane1_file = p_src_plane1_file;
2302 } else if (pipe->frame_format ==
2303 MDP4_FRAME_FORMAT_VIDEO_SUPERTILE) {
2304 struct tile_desc tile;
2305
2306 tile_samsung(&tile);
2307 pipe->srcp1_addr = addr + tile_mem_size(pipe, &tile);
2308 } else {
2309 pipe->srcp1_addr = addr + (pipe->src_width *
2310 pipe->src_height);
2311 }
2312 pipe->srcp0_ystride = pipe->src_width;
2313 if ((pipe->src_format == MDP_Y_CRCB_H1V1) ||
2314 (pipe->src_format == MDP_Y_CBCR_H1V1)) {
2315 if (pipe->src_width > YUV_444_MAX_WIDTH)
2316 pipe->srcp1_ystride = pipe->src_width << 2;
2317 else
2318 pipe->srcp1_ystride = pipe->src_width << 1;
2319 } else
2320 pipe->srcp1_ystride = pipe->src_width;
2321
2322 } else if (pipe->fetch_plane == OVERLAY_PLANE_PLANAR) {
2323 if (overlay_version > 0) {
2324 img = &req->plane1_data;
2325 get_img(img, info, &start, &len, &p_src_plane1_file);
2326 if (len == 0) {
2327 mutex_unlock(&mfd->dma->ov_mutex);
2328 pr_err("%s: Error to get plane1\n", __func__);
2329 return -EINVAL;
2330 }
2331 pipe->srcp1_addr = start + img->offset;
2332 *pp_src_plane1_file = p_src_plane1_file;
2333
2334 img = &req->plane2_data;
2335 get_img(img, info, &start, &len, &p_src_plane2_file);
2336 if (len == 0) {
2337 mutex_unlock(&mfd->dma->ov_mutex);
2338 pr_err("%s: Error to get plane2\n", __func__);
2339 return -EINVAL;
2340 }
2341 pipe->srcp2_addr = start + img->offset;
2342 *pp_src_plane2_file = p_src_plane2_file;
2343 } else {
2344 addr += (pipe->src_width * pipe->src_height);
2345 pipe->srcp1_addr = addr;
2346 addr += ((pipe->src_width / 2) *
2347 (pipe->src_height / 2));
2348 pipe->srcp2_addr = addr;
2349 }
Adrian Salido-Moreno33dc7b92011-08-18 16:16:12 -07002350 /* mdp planar format expects Cb in srcp1 and Cr in p2 */
2351 if (pipe->src_format == MDP_Y_CR_CB_H2V2)
2352 swap(pipe->srcp1_addr, pipe->srcp2_addr);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002353 pipe->srcp0_ystride = pipe->src_width;
2354 pipe->srcp1_ystride = pipe->src_width / 2;
2355 pipe->srcp2_ystride = pipe->src_width / 2;
2356 }
2357
2358 if (pipe->pipe_num >= OVERLAY_PIPE_VG1)
2359 mdp4_overlay_vg_setup(pipe); /* video/graphic pipe */
2360 else {
2361 if (pipe->flags & MDP_SHARPENING) {
2362 pr_warn(
2363 "%s: Sharpening/Smoothing not supported on RGB pipe\n",
2364 __func__);
2365 pipe->flags &= ~MDP_SHARPENING;
2366 }
2367 mdp4_overlay_rgb_setup(pipe); /* rgb pipe */
2368 }
2369
2370 mdp4_mixer_blend_setup(pipe);
2371 mdp4_mixer_stage_up(pipe);
2372
2373 if (pipe->mixer_num == MDP4_MIXER1) {
2374 ctrl->mixer1_played++;
2375 /* enternal interface */
2376 if (ctrl->panel_mode & MDP4_PANEL_DTV)
2377#ifdef CONFIG_FB_MSM_DTV
2378 mdp4_overlay_dtv_ov_done_push(mfd, pipe);
2379#else
2380 mdp4_overlay_reg_flush(pipe, 1);
2381#endif
2382 else if (ctrl->panel_mode & MDP4_PANEL_ATV)
2383 mdp4_overlay_reg_flush(pipe, 1);
2384 } else {
2385 /* primary interface */
2386 ctrl->mixer0_played++;
kuogee hsieh3de11f32011-07-08 14:09:11 -07002387 if (ctrl->panel_mode & MDP4_PANEL_LCDC) {
2388 mdp4_overlay_reg_flush(pipe, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002389 mdp4_overlay_lcdc_vsync_push(mfd, pipe);
kuogee hsieh3de11f32011-07-08 14:09:11 -07002390 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002391#ifdef CONFIG_FB_MSM_MIPI_DSI
kuogee hsieh3de11f32011-07-08 14:09:11 -07002392 else if (ctrl->panel_mode & MDP4_PANEL_DSI_VIDEO) {
2393 mdp4_overlay_reg_flush(pipe, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002394 mdp4_overlay_dsi_video_vsync_push(mfd, pipe);
kuogee hsieh3de11f32011-07-08 14:09:11 -07002395 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002396#endif
2397 else {
2398 /* mddi & mipi dsi cmd mode */
2399 if (pipe->flags & MDP_OV_PLAY_NOWAIT) {
2400 mdp4_stat.overlay_play[pipe->mixer_num]++;
2401 mutex_unlock(&mfd->dma->ov_mutex);
2402 return 0;
2403 }
2404#ifdef CONFIG_FB_MSM_MIPI_DSI
2405 if (ctrl->panel_mode & MDP4_PANEL_DSI_CMD) {
2406 mdp4_dsi_cmd_dma_busy_wait(mfd);
2407 mdp4_dsi_cmd_kickoff_video(mfd, pipe);
2408 }
2409#else
2410 if (ctrl->panel_mode & MDP4_PANEL_MDDI) {
2411 mdp4_mddi_dma_busy_wait(mfd);
2412 mdp4_mddi_kickoff_video(mfd, pipe);
2413 }
2414#endif
2415 }
2416 }
2417
2418 mdp4_stat.overlay_play[pipe->mixer_num]++;
2419
2420 mutex_unlock(&mfd->dma->ov_mutex);
2421
2422 return 0;
2423}