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review.evervolv.com / android_kernel_htc_msm8960 / 098f9bd169a4efa0220743294728190d0a28fd2b / . / arch / arm / boot / dts / msmcopper.dts
blob: 6561c71f3f40e12c276ec6ff46c2ae4746a374de [file] [log] [blame]
Sathish Ambley4df614c2011-10-07 16:30:46 -0700[diff] [blame]1/dts-v1/;
2
3/include/ "skeleton.dtsi"
4
5/ {
6 model = "Qualcomm MSM Copper";
7 compatible = "qcom,msmcopper-sim", "qcom,msmcopper";
8 interrupt-parent = <&intc>;
9
10 intc: interrupt-controller@F9000000 {
11 compatible = "qcom,msm-qgic2";
12 interrupt-controller;
13 #interrupt-cells = <1>;
14 reg = <0xF9000000 0x1000>,
15 <0xF9002000 0x1000>;
16 };
Sathish Ambley3d50c762011-10-25 15:26:00 -0700[diff] [blame]17
Sathish Ambley098f9bd2011-11-09 16:32:53 -0800[diff] [blame^]18 timer {
19 compatible = "qcom,msm-qtimer";
20 interrupts = <18>;
21 };
22
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame]23 serial@F991F000 {
Sathish Ambley3d50c762011-10-25 15:26:00 -0700[diff] [blame]24 compatible = "qcom,msm-lsuart-v14";
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame]25 reg = <0xF991F000 0x1000>;
Sathish Ambley3d50c762011-10-25 15:26:00 -0700[diff] [blame]26 interrupts = <109>;
27 };
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530[diff] [blame]28
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame]29 usb@F9A55000 {
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530[diff] [blame]30 compatible = "qcom,hsusb-otg";
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame]31 reg = <0xF9A55000 0x400>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530[diff] [blame]32 interrupts = <134>;
33
34 qcom,hsusb-otg-phy-type = <2>;
35 qcom,hsusb-otg-mode = <1>;
36 qcom,hsusb-otg-otg-control = <1>;
37 };
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]38
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame]39 qcom,sdcc@F980B000 {
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]40 cell-index = <1>;
41 compatible = "qcom,msm-sdcc";
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame]42 reg = <0xF980B000 0x1000>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]43 interrupts = <123>;
44
45 qcom,sdcc-clk-rates = <400000 24000000 48000000>;
46 qcom,sdcc-sup-voltages = <3300 3300>;
47 qcom,sdcc-bus-width = <8>;
48 qcom,sdcc-nonremovable;
49 qcom,sdcc-disable_cmd23;
50 };
51
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame]52 qcom,sdcc@F984B000 {
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]53 cell-index = <3>;
54 compatible = "qcom,msm-sdcc";
Sathish Ambleyab783ab2011-11-27 22:21:48 -0800[diff] [blame]55 reg = <0xF984B000 0x1000>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]56 interrupts = <127>;
57
58 qcom,sdcc-clk-rates = <400000 24000000 48000000>;
59 qcom,sdcc-sup-voltages = <3300 3300>;
60 qcom,sdcc-bus-width = <4>;
61 qcom,sdcc-disable_cmd23;
62 };
Yan He1466daa2011-11-30 17:25:38 -0800[diff] [blame]63
64 qcom,sps@F9980000 {
65 compatible = "qcom,msm_sps";
66 reg = <0xF9984000 0x15000>,
67 <0xF9999000 0xB000>;
68 interrupts = <94>;
69
70 qcom,bam-dma-res-pipes = <6>;
71 };
72
Sathish Ambley4df614c2011-10-07 16:30:46 -0700[diff] [blame]73};