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Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/*
2 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/spinlock.h>
Suren Eda Naarayana Kulothungan88d37fb2011-10-21 11:33:06 -040015#include <linux/module.h>
Stephen Boyd387ac2e2011-09-28 10:29:43 -070016#include <asm/mach-types.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070017
18DEFINE_RAW_SPINLOCK(l2_access_lock);
19
20u32 set_get_l2_indirect_reg(u32 reg_addr, u32 val)
21{
22 unsigned long flags;
23 u32 ret_val;
Stephen Boyd387ac2e2011-09-28 10:29:43 -070024 /* CP15 registers are not emulated on RUMI3. */
25 if (machine_is_msm8960_rumi3())
26 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070027
28 raw_spin_lock_irqsave(&l2_access_lock, flags);
29
Stephen Boyd387ac2e2011-09-28 10:29:43 -070030 mb();
31 asm volatile ("mcr p15, 3, %[l2cpselr], c15, c0, 6\n\t"
32 "mcr p15, 3, %[l2cpdr], c15, c0, 7\n\t"
33 :
34 : [l2cpselr]"r" (reg_addr), [l2cpdr]"r" (val)
35 );
36 isb();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070037 /* Ensure the value took */
38 asm volatile ("mrc p15, 3, %0, c15, c0, 7" : "=r" (ret_val));
39
40 raw_spin_unlock_irqrestore(&l2_access_lock, flags);
41
42 return ret_val;
43}
Suren Eda Naarayana Kulothungan88d37fb2011-10-21 11:33:06 -040044EXPORT_SYMBOL(set_get_l2_indirect_reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070045
46void set_l2_indirect_reg(u32 reg_addr, u32 val)
47{
48 unsigned long flags;
Stephen Boyd387ac2e2011-09-28 10:29:43 -070049 /* CP15 registers are not emulated on RUMI3. */
50 if (machine_is_msm8960_rumi3())
51 return;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070052
53 raw_spin_lock_irqsave(&l2_access_lock, flags);
Stephen Boyd387ac2e2011-09-28 10:29:43 -070054 mb();
55 asm volatile ("mcr p15, 3, %[l2cpselr], c15, c0, 6\n\t"
56 "mcr p15, 3, %[l2cpdr], c15, c0, 7\n\t"
57 :
58 : [l2cpselr]"r" (reg_addr), [l2cpdr]"r" (val)
59 );
60 isb();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061 raw_spin_unlock_irqrestore(&l2_access_lock, flags);
62}
Suren Eda Naarayana Kulothungan88d37fb2011-10-21 11:33:06 -040063EXPORT_SYMBOL(set_l2_indirect_reg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070064
65u32 get_l2_indirect_reg(u32 reg_addr)
66{
67 u32 val;
68 unsigned long flags;
Stephen Boyd387ac2e2011-09-28 10:29:43 -070069 /* CP15 registers are not emulated on RUMI3. */
70 if (machine_is_msm8960_rumi3())
71 return 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070072
73 raw_spin_lock_irqsave(&l2_access_lock, flags);
Stephen Boyd387ac2e2011-09-28 10:29:43 -070074 asm volatile ("mcr p15, 3, %[l2cpselr], c15, c0, 6\n\t"
75 "mrc p15, 3, %[l2cpdr], c15, c0, 7\n\t"
76 : [l2cpdr]"=r" (val)
77 : [l2cpselr]"r" (reg_addr)
78 );
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070079 raw_spin_unlock_irqrestore(&l2_access_lock, flags);
80
81 return val;
82}
Suren Eda Naarayana Kulothungan88d37fb2011-10-21 11:33:06 -040083EXPORT_SYMBOL(get_l2_indirect_reg);