blob: 33c5a537dd8b285b67f58f4d0e9dacc3567b2565 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/* arch/arm/mach-msm/qdsp5/adsp.c
2 *
3 * Register/Interrupt access for userspace aDSP library.
4 *
5 * Copyright (C) 2008 Google, Inc.
6 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
7 * Author: Iliyan Malchev <ibm@android.com>
8 *
9 * This software is licensed under the terms of the GNU General Public
10 * License version 2, as published by the Free Software Foundation, and
11 * may be copied, distributed, and modified under those terms.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 */
19
20/* TODO:
21 * - move shareable rpc code outside of adsp.c
22 * - general solution for virt->phys patchup
23 * - queue IDs should be relative to modules
24 * - disallow access to non-associated queues
25 */
26
27#include <linux/clk.h>
28#include <linux/delay.h>
29#include <linux/interrupt.h>
30#include <linux/kernel.h>
31#include <linux/kthread.h>
32#include <linux/module.h>
33#include <linux/uaccess.h>
34#include <linux/wait.h>
35#include <linux/wakelock.h>
36#include <linux/slab.h>
37#include <mach/debug_mm.h>
38#include <linux/debugfs.h>
39
40#ifdef CONFIG_DEBUG_FS
41static struct dentry *dentry_adsp;
42static struct dentry *dentry_wdata;
43static struct dentry *dentry_rdata;
44static int wdump, rdump;
45#endif /* CONFIG_DEBUG_FS */
46static struct wake_lock adsp_wake_lock;
47static inline void prevent_suspend(void)
48{
49 wake_lock(&adsp_wake_lock);
50}
51static inline void allow_suspend(void)
52{
53 wake_unlock(&adsp_wake_lock);
54}
55
56#include <linux/io.h>
57#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/msm_adsp.h>
59#include "adsp.h"
60
61#define INT_ADSP INT_ADSP_A9_A11
62
63static struct adsp_info adsp_info;
64static struct msm_rpc_endpoint *rpc_cb_server_client;
65static struct msm_adsp_module *adsp_modules;
66static int adsp_open_count;
67
68static uint32_t rpc_adsp_rtos_atom_prog;
69static uint32_t rpc_adsp_rtos_atom_vers;
70static uint32_t rpc_adsp_rtos_atom_vers_comp;
71static uint32_t rpc_adsp_rtos_mtoa_prog;
72static uint32_t rpc_adsp_rtos_mtoa_vers;
73static uint32_t rpc_adsp_rtos_mtoa_vers_comp;
74static DEFINE_MUTEX(adsp_open_lock);
75
76/* protect interactions with the ADSP command/message queue */
77static spinlock_t adsp_cmd_lock;
78static spinlock_t adsp_write_lock;
79
80static uint32_t current_image = -1;
81
82void adsp_set_image(struct adsp_info *info, uint32_t image)
83{
84 current_image = image;
85}
86
87/*
88 * Checks whether the module_id is available in the
89 * module_entries table.If module_id is available returns `0`.
90 * If module_id is not available returns `-ENXIO`.
91 */
92static int32_t adsp_validate_module(uint32_t module_id)
93{
94 uint32_t *ptr;
95 uint32_t module_index;
96 uint32_t num_mod_entries;
97
98 ptr = adsp_info.init_info_ptr->module_entries;
99 num_mod_entries = adsp_info.init_info_ptr->module_table_size;
100
101 for (module_index = 0; module_index < num_mod_entries; module_index++)
102 if (module_id == ptr[module_index])
103 return 0;
104
105 return -ENXIO;
106}
107
108static int32_t adsp_validate_queue(uint32_t mod_id, unsigned q_idx,
109 uint32_t size)
110{
111 int32_t i;
112 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
113
114 sptr = adsp_info.init_info_ptr;
115 for (i = 0; i < sptr->mod_to_q_entries; i++)
116 if (mod_id == sptr->mod_to_q_tbl[i].module)
117 if (q_idx == sptr->mod_to_q_tbl[i].q_type) {
118 if (size <= sptr->mod_to_q_tbl[i].q_max_len)
119 return 0;
120 MM_ERR("q_idx: %d is not a valid queue \
121 for module %x\n", q_idx, mod_id);
122 return -EINVAL;
123 }
124 MM_ERR("cmd_buf size is more than allowed size\n");
125 return -EINVAL;
126}
127
128uint32_t adsp_get_module(struct adsp_info *info, uint32_t task)
129{
130 return info->task_to_module[current_image][task];
131}
132
133uint32_t adsp_get_queue_offset(struct adsp_info *info, uint32_t queue_id)
134{
135 return info->queue_offset[current_image][queue_id];
136}
137
138static int rpc_adsp_rtos_app_to_modem(uint32_t cmd, uint32_t module,
139 struct msm_adsp_module *adsp_module)
140{
141 int rc;
142 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
143 struct rpc_reply_hdr rpc_rsp;
144
145 rpc_req.gotit = cpu_to_be32(1);
146 rpc_req.cmd = cpu_to_be32(cmd);
147 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
148 rpc_req.module = cpu_to_be32(module);
149 rc = msm_rpc_call_reply(adsp_module->rpc_client,
150 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
151 &rpc_req, sizeof(rpc_req),
152 &rpc_rsp, sizeof(rpc_rsp),
153 5 * HZ);
154
155 if (rc < 0) {
156 MM_ERR("error receiving RPC reply: %d (%d)\n",
157 rc, -ERESTARTSYS);
158 return rc;
159 }
160
161 if (be32_to_cpu(rpc_rsp.reply_stat) != RPCMSG_REPLYSTAT_ACCEPTED) {
162 MM_ERR("RPC call was denied!\n");
163 return -EPERM;
164 }
165
166 if (be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat) !=
167 RPC_ACCEPTSTAT_SUCCESS) {
168 MM_ERR("RPC call was not successful (%d)\n",
169 be32_to_cpu(rpc_rsp.data.acc_hdr.accept_stat));
170 return -EINVAL;
171 }
172
173 return 0;
174}
175
176static int get_module_index(uint32_t id)
177{
178 int mod_idx;
179 for (mod_idx = 0; mod_idx < adsp_info.module_count; mod_idx++)
180 if (adsp_info.module[mod_idx].id == id)
181 return mod_idx;
182
183 return -ENXIO;
184}
185
186static struct msm_adsp_module *find_adsp_module_by_id(
187 struct adsp_info *info, uint32_t id)
188{
189 int mod_idx;
190
191 if (id > info->max_module_id) {
192 return NULL;
193 } else {
194 mod_idx = get_module_index(id);
195 if (mod_idx < 0)
196 return NULL;
197 return info->id_to_module[mod_idx];
198 }
199}
200
201static struct msm_adsp_module *find_adsp_module_by_name(
202 struct adsp_info *info, const char *name)
203{
204 unsigned n;
205 for (n = 0; n < info->module_count; n++)
206 if (!strcmp(name, adsp_modules[n].name))
207 return adsp_modules + n;
208 return NULL;
209}
210
211static int adsp_rpc_init(struct msm_adsp_module *adsp_module)
212{
213 /* remove the original connect once compatible support is complete */
214 adsp_module->rpc_client = msm_rpc_connect(
215 rpc_adsp_rtos_atom_prog,
216 rpc_adsp_rtos_atom_vers,
217 MSM_RPC_UNINTERRUPTIBLE);
218 if (IS_ERR(adsp_module->rpc_client))
219 adsp_module->rpc_client = msm_rpc_connect_compatible(
220 rpc_adsp_rtos_atom_prog,
221 rpc_adsp_rtos_atom_vers_comp,
222 MSM_RPC_UNINTERRUPTIBLE);
223
224 if (IS_ERR(adsp_module->rpc_client)) {
225 int rc = PTR_ERR(adsp_module->rpc_client);
226 adsp_module->rpc_client = 0;
227 MM_ERR("could not open rpc client: %d\n", rc);
228 return rc;
229 }
230
231 return 0;
232}
233
234/*
235 * Send RPC_ADSP_RTOS_CMD_GET_INIT_INFO cmd to ARM9 and get
236 * queue offsets and module entries (init info) as part of the event.
237 */
238static void msm_get_init_info(void)
239{
240 int rc;
241 struct rpc_adsp_rtos_app_to_modem_args_t rpc_req;
242 struct rpc_reply_hdr rpc_rsp;
243
244 adsp_info.init_info_rpc_client = msm_rpc_connect(
245 rpc_adsp_rtos_atom_prog,
246 rpc_adsp_rtos_atom_vers,
247 MSM_RPC_UNINTERRUPTIBLE);
248 if (IS_ERR(adsp_info.init_info_rpc_client)) {
249 adsp_info.init_info_rpc_client = msm_rpc_connect_compatible(
250 rpc_adsp_rtos_atom_prog,
251 rpc_adsp_rtos_atom_vers_comp,
252 MSM_RPC_UNINTERRUPTIBLE);
253 if (IS_ERR(adsp_info.init_info_rpc_client)) {
254 rc = PTR_ERR(adsp_info.init_info_rpc_client);
255 adsp_info.init_info_rpc_client = 0;
256 MM_ERR("could not open rpc client: %d\n", rc);
257 return;
258 }
259 }
260
261 rpc_req.gotit = cpu_to_be32(1);
262 rpc_req.cmd = cpu_to_be32(RPC_ADSP_RTOS_CMD_GET_INIT_INFO);
263 rpc_req.proc_id = cpu_to_be32(RPC_ADSP_RTOS_PROC_APPS);
264 rpc_req.module = 0;
265
266 rc = msm_rpc_call_reply(adsp_info.init_info_rpc_client,
267 RPC_ADSP_RTOS_APP_TO_MODEM_PROC,
268 &rpc_req, sizeof(rpc_req),
269 &rpc_rsp, sizeof(rpc_rsp),
270 5 * HZ);
271
272 if (rc < 0)
273 MM_ERR("could not send RPC request: %d\n", rc);
274}
275
276int msm_adsp_get(const char *name, struct msm_adsp_module **out,
277 struct msm_adsp_ops *ops, void *driver_data)
278{
279 struct msm_adsp_module *module;
280 int rc = 0;
281 static uint32_t init_info_cmd_sent;
282
283 if (!init_info_cmd_sent) {
284 init_waitqueue_head(&adsp_info.init_info_wait);
285 msm_get_init_info();
286 rc = wait_event_timeout(adsp_info.init_info_wait,
287 adsp_info.init_info_state == ADSP_STATE_INIT_INFO,
288 5 * HZ);
289 if (!rc) {
290 MM_ERR("INIT_INFO failed\n");
291 return -ETIMEDOUT;
292 }
293 init_info_cmd_sent++;
294 }
295
296 module = find_adsp_module_by_name(&adsp_info, name);
297 if (!module)
298 return -ENODEV;
299
300 mutex_lock(&module->lock);
301 MM_INFO("opening module %s\n", module->name);
302
303 if (module->ops) {
304 rc = -EBUSY;
305 goto done;
306 }
307
308 rc = adsp_rpc_init(module);
309 if (rc)
310 goto done;
311
312 module->ops = ops;
313 module->driver_data = driver_data;
314 *out = module;
315 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_REGISTER_APP,
316 module->id, module);
317 if (rc) {
318 module->ops = NULL;
319 module->driver_data = NULL;
320 *out = NULL;
321 MM_ERR("REGISTER_APP failed\n");
322 goto done;
323 }
324
325 MM_DBG("module %s has been registered\n", module->name);
326
327done:
328 mutex_unlock(&module->lock);
329 return rc;
330}
331EXPORT_SYMBOL(msm_adsp_get);
332
333static int msm_adsp_disable_locked(struct msm_adsp_module *module);
334
335void msm_adsp_put(struct msm_adsp_module *module)
336{
337 unsigned long flags;
338
339 mutex_lock(&module->lock);
340 if (module->ops) {
341 MM_INFO("closing module %s\n", module->name);
342
343 /* lock to ensure a dsp event cannot be delivered
344 * during or after removal of the ops and driver_data
345 */
346 spin_lock_irqsave(&adsp_cmd_lock, flags);
347 module->ops = NULL;
348 module->driver_data = NULL;
349 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
350
351 if (module->state != ADSP_STATE_DISABLED) {
352 MM_INFO("disabling module %s\n", module->name);
353 msm_adsp_disable_locked(module);
354 }
355
356 msm_rpc_close(module->rpc_client);
357 module->rpc_client = 0;
358 } else {
359 MM_INFO("module %s is already closed\n", module->name);
360 }
361 mutex_unlock(&module->lock);
362}
363EXPORT_SYMBOL(msm_adsp_put);
364
365/* this should be common code with rpc_servers.c */
366static int rpc_send_accepted_void_reply(struct msm_rpc_endpoint *client,
367 uint32_t xid, uint32_t accept_status)
368{
369 int rc = 0;
370 uint8_t reply_buf[sizeof(struct rpc_reply_hdr)];
371 struct rpc_reply_hdr *reply = (struct rpc_reply_hdr *)reply_buf;
372
373 reply->xid = cpu_to_be32(xid);
374 reply->type = cpu_to_be32(1); /* reply */
375 reply->reply_stat = cpu_to_be32(RPCMSG_REPLYSTAT_ACCEPTED);
376
377 reply->data.acc_hdr.accept_stat = cpu_to_be32(accept_status);
378 reply->data.acc_hdr.verf_flavor = 0;
379 reply->data.acc_hdr.verf_length = 0;
380
381 rc = msm_rpc_write(rpc_cb_server_client, reply_buf, sizeof(reply_buf));
382 if (rc < 0)
383 MM_ERR("could not write RPC response: %d\n", rc);
384 return rc;
385}
386
387int __msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
388 void *cmd_buf, size_t cmd_size)
389{
390 uint32_t ctrl_word;
391 uint32_t dsp_q_addr;
392 uint32_t dsp_addr;
393 uint32_t cmd_id = 0;
394 int cnt = 0;
395 int ret_status = 0;
396 unsigned long flags;
397 struct adsp_info *info;
398
399 if (!module || !cmd_buf) {
400 MM_ERR("Called with NULL parameters\n");
401 return -EINVAL;
402 }
403 info = module->info;
404 spin_lock_irqsave(&adsp_write_lock, flags);
405
406 if (module->state != ADSP_STATE_ENABLED) {
407 spin_unlock_irqrestore(&adsp_write_lock, flags);
408 MM_ERR("module %s not enabled before write\n", module->name);
409 return -ENODEV;
410 }
411 if (adsp_validate_module(module->id)) {
412 spin_unlock_irqrestore(&adsp_write_lock, flags);
413 MM_ERR("module id validation failed %s %d\n",
414 module->name, module->id);
415 return -ENXIO;
416 }
417 if (dsp_queue_addr >= QDSP_MAX_NUM_QUEUES) {
418 spin_unlock_irqrestore(&adsp_write_lock, flags);
419 MM_ERR("Invalid Queue Index: %d\n", dsp_queue_addr);
420 return -ENXIO;
421 }
422 if (adsp_validate_queue(module->id, dsp_queue_addr, cmd_size)) {
423 spin_unlock_irqrestore(&adsp_write_lock, flags);
424 return -EINVAL;
425 }
426 dsp_q_addr = adsp_get_queue_offset(info, dsp_queue_addr);
427 dsp_q_addr &= ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M;
428
429 /* Poll until the ADSP is ready to accept a command.
430 * Wait for 100us, return error if it's not responding.
431 * If this returns an error, we need to disable ALL modules and
432 * then retry.
433 */
434 while (((ctrl_word = readl(info->write_ctrl)) &
435 ADSP_RTOS_WRITE_CTRL_WORD_READY_M) !=
436 ADSP_RTOS_WRITE_CTRL_WORD_READY_V) {
437 if (cnt > 50) {
438 MM_ERR("timeout waiting for DSP write ready\n");
439 ret_status = -EIO;
440 goto fail;
441 }
442 MM_DBG("waiting for DSP write ready\n");
443 udelay(2);
444 cnt++;
445 }
446
447 /* Set the mutex bits */
448 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
449 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
450
451 /* Clear the command bits */
452 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
453
454 /* Set the queue address bits */
455 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
456 ctrl_word |= dsp_q_addr;
457
458 writel(ctrl_word, info->write_ctrl);
459
460 /* Generate an interrupt to the DSP. This notifies the DSP that
461 * we are about to send a command on this particular queue. The
462 * DSP will in response change its state.
463 */
464 writel(1, info->send_irq);
465
466 /* Poll until the adsp responds to the interrupt; this does not
467 * generate an interrupt from the adsp. This should happen within
468 * 5ms.
469 */
470 cnt = 0;
471 while ((readl(info->write_ctrl) &
472 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M) ==
473 ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V) {
474 if (cnt > 2500) {
475 MM_ERR("timeout waiting for adsp ack\n");
476 ret_status = -EIO;
477 goto fail;
478 }
479 udelay(2);
480 cnt++;
481 }
482
483 /* Read the ctrl word */
484 ctrl_word = readl(info->write_ctrl);
485
486 if ((ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_STATUS_M) !=
487 ADSP_RTOS_WRITE_CTRL_WORD_NO_ERR_V) {
488 ret_status = -EAGAIN;
489 goto fail;
490 } else {
491 /* No error */
492 /* Get the DSP buffer address */
493 dsp_addr = (ctrl_word & ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M) +
494 (uint32_t)MSM_AD5_BASE;
495
496 if (dsp_addr < (uint32_t)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
497 uint16_t *buf_ptr = (uint16_t *) cmd_buf;
498 uint16_t *dsp_addr16 = (uint16_t *)dsp_addr;
499 cmd_size /= sizeof(uint16_t);
500
501 /* Save the command ID */
502 cmd_id = (uint32_t) buf_ptr[0];
503
504 /* Copy the command to DSP memory */
505 cmd_size++;
506 while (--cmd_size)
507 *dsp_addr16++ = *buf_ptr++;
508 } else {
509 uint32_t *buf_ptr = (uint32_t *) cmd_buf;
510 uint32_t *dsp_addr32 = (uint32_t *)dsp_addr;
511 cmd_size /= sizeof(uint32_t);
512
513 /* Save the command ID */
514 cmd_id = buf_ptr[0];
515
516 cmd_size++;
517 while (--cmd_size)
518 *dsp_addr32++ = *buf_ptr++;
519 }
520
521 /* Set the mutex bits */
522 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_M);
523 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_MUTEX_NAVAIL_V;
524
525 /* Set the command bits to write done */
526 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_CMD_M);
527 ctrl_word |= ADSP_RTOS_WRITE_CTRL_WORD_CMD_WRITE_DONE_V;
528
529 /* Set the queue address bits */
530 ctrl_word &= ~(ADSP_RTOS_WRITE_CTRL_WORD_DSP_ADDR_M);
531 ctrl_word |= dsp_q_addr;
532
533 writel(ctrl_word, info->write_ctrl);
534
535 /* Generate an interrupt to the DSP. It does not respond with
536 * an interrupt, and we do not need to wait for it to
537 * acknowledge, because it will hold the mutex lock until it's
538 * ready to receive more commands again.
539 */
540 writel(1, info->send_irq);
541
542 module->num_commands++;
543 } /* Ctrl word status bits were 00, no error in the ctrl word */
544
545fail:
546 spin_unlock_irqrestore(&adsp_write_lock, flags);
547 return ret_status;
548}
549EXPORT_SYMBOL(msm_adsp_write);
550
551int msm_adsp_write(struct msm_adsp_module *module, unsigned dsp_queue_addr,
552 void *cmd_buf, size_t cmd_size)
553{
554 int rc, retries = 0;
555#ifdef CONFIG_DEBUG_FS
556 uint16_t *ptr;
557 int ii;
558
559 if (wdump > 0) {
560 ptr = cmd_buf;
561 pr_info("A->D:%x\n", module->id);
562 pr_info("adsp: %x %d\n", dsp_queue_addr, cmd_size);
563 for (ii = 0; ii < cmd_size/2; ii++)
564 pr_info("%x ", ptr[ii]);
565 pr_info("\n");
566 }
567#endif /* CONFIG_DEBUG_FS */
568 do {
569 rc = __msm_adsp_write(module, dsp_queue_addr, cmd_buf,
570 cmd_size);
571 if (rc == -EAGAIN)
572 udelay(10);
573 } while (rc == -EAGAIN && retries++ < 300);
574 if (retries > 50)
575 MM_ERR("adsp: %s command took %d attempts: rc %d\n",
576 module->name, retries, rc);
577 return rc;
578}
579
580static void *event_addr;
581static void read_event(void *buf, size_t len)
582{
583 uint32_t dptr[3];
584 struct rpc_adsp_rtos_modem_to_app_args_t *sptr;
585 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
586
587 sptr = event_addr;
588 pkt_ptr = &sptr->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
589
590 dptr[0] = be32_to_cpu(sptr->mtoa_pkt.mp_mtoa_header.event);
591 dptr[1] = be32_to_cpu(pkt_ptr->module);
592 dptr[2] = be32_to_cpu(pkt_ptr->image);
593
594 if (len > EVENT_LEN)
595 len = EVENT_LEN;
596
597 memcpy(buf, dptr, len);
598}
599
600static void handle_adsp_rtos_mtoa_app(struct rpc_request_hdr *req)
601{
602 struct rpc_adsp_rtos_modem_to_app_args_t *args =
603 (struct rpc_adsp_rtos_modem_to_app_args_t *)req;
604 uint32_t event;
605 uint32_t proc_id;
606 uint32_t module_id;
607 uint32_t image;
608 struct msm_adsp_module *module;
609 struct adsp_rtos_mp_mtoa_type *pkt_ptr;
610 struct queue_to_offset_type *qptr;
611 struct queue_to_offset_type *qtbl;
612 struct mod_to_queue_offsets *mqptr;
613 struct mod_to_queue_offsets *mqtbl;
614 uint32_t *mptr;
615 uint32_t *mtbl;
616 uint32_t q_idx;
617 uint32_t num_entries;
618 uint32_t entries_per_image;
619 struct adsp_rtos_mp_mtoa_init_info_type *iptr;
620 struct adsp_rtos_mp_mtoa_init_info_type *sptr;
621 int32_t i_no, e_idx;
622
623 event = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.event);
624 proc_id = be32_to_cpu(args->mtoa_pkt.mp_mtoa_header.proc_id);
625
626 if (event == RPC_ADSP_RTOS_INIT_INFO) {
627 MM_INFO("INIT_INFO Event\n");
628 sptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_init_packet;
629
630 iptr = adsp_info.init_info_ptr;
631 iptr->image_count = be32_to_cpu(sptr->image_count);
632 if (iptr->image_count > IMG_MAX)
633 iptr->image_count = IMG_MAX;
634 iptr->num_queue_offsets = be32_to_cpu(sptr->num_queue_offsets);
635 num_entries = iptr->num_queue_offsets;
636 if (num_entries > ENTRIES_MAX) {
637 num_entries = ENTRIES_MAX;
638 iptr->num_queue_offsets = ENTRIES_MAX;
639 }
640 qptr = &sptr->queue_offsets_tbl[0][0];
641 for (i_no = 0; i_no < iptr->image_count; i_no++) {
642 qtbl = &iptr->queue_offsets_tbl[i_no][0];
643 for (e_idx = 0; e_idx < num_entries; e_idx++) {
644 qtbl[e_idx].offset = be32_to_cpu(qptr->offset);
645 qtbl[e_idx].queue = be32_to_cpu(qptr->queue);
646 q_idx = be32_to_cpu(qptr->queue);
647 iptr->queue_offsets[i_no][q_idx] = qtbl[e_idx].offset;
648 qptr++;
649 }
650 }
651
652 num_entries = be32_to_cpu(sptr->num_task_module_entries);
653 if (num_entries > ENTRIES_MAX)
654 num_entries = ENTRIES_MAX;
655 iptr->num_task_module_entries = num_entries;
656 entries_per_image = num_entries / iptr->image_count;
657 mptr = &sptr->task_to_module_tbl[0][0];
658 for (i_no = 0; i_no < iptr->image_count; i_no++) {
659 mtbl = &iptr->task_to_module_tbl[i_no][0];
660 for (e_idx = 0; e_idx < entries_per_image; e_idx++) {
661 mtbl[e_idx] = be32_to_cpu(*mptr);
662 mptr++;
663 }
664 }
665
666 iptr->module_table_size = be32_to_cpu(sptr->module_table_size);
667#if CONFIG_ADSP_RPC_VER > 0x30001
668 if (iptr->module_table_size > MODULES_MAX)
669 iptr->module_table_size = MODULES_MAX;
670#else
671 if (iptr->module_table_size > ENTRIES_MAX)
672 iptr->module_table_size = ENTRIES_MAX;
673#endif
674 mptr = &sptr->module_entries[0];
675 for (i_no = 0; i_no < iptr->module_table_size; i_no++)
676 iptr->module_entries[i_no] = be32_to_cpu(mptr[i_no]);
677
678 mqptr = &sptr->mod_to_q_tbl[0];
679 mqtbl = &iptr->mod_to_q_tbl[0];
680 iptr->mod_to_q_entries = be32_to_cpu(sptr->mod_to_q_entries);
681 if (iptr->mod_to_q_entries > ENTRIES_MAX)
682 iptr->mod_to_q_entries = ENTRIES_MAX;
683 for (e_idx = 0; e_idx < iptr->mod_to_q_entries; e_idx++) {
684 mqtbl[e_idx].module = be32_to_cpu(mqptr->module);
685 mqtbl[e_idx].q_type = be32_to_cpu(mqptr->q_type);
686 mqtbl[e_idx].q_max_len = be32_to_cpu(mqptr->q_max_len);
687 mqptr++;
688 }
689
690 adsp_info.init_info_state = ADSP_STATE_INIT_INFO;
691 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
692 RPC_ACCEPTSTAT_SUCCESS);
693 wake_up(&adsp_info.init_info_wait);
694
695 return;
696 }
697
698 pkt_ptr = &args->mtoa_pkt.adsp_rtos_mp_mtoa_data.mp_mtoa_packet;
699 module_id = be32_to_cpu(pkt_ptr->module);
700 image = be32_to_cpu(pkt_ptr->image);
701
702 MM_DBG("rpc event=%d, proc_id=%d, module=%d, image=%d\n",
703 event, proc_id, module_id, image);
704
705 module = find_adsp_module_by_id(&adsp_info, module_id);
706 if (!module) {
707 MM_ERR("module %d is not supported!\n", module_id);
708 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
709 RPC_ACCEPTSTAT_GARBAGE_ARGS);
710 return;
711 }
712
713 mutex_lock(&module->lock);
714 switch (event) {
715 case RPC_ADSP_RTOS_MOD_READY:
716 MM_INFO("module %s: READY\n", module->name);
717 module->state = ADSP_STATE_ENABLED;
718 wake_up(&module->state_wait);
719 adsp_set_image(module->info, image);
720 break;
721 case RPC_ADSP_RTOS_MOD_DISABLE:
722 MM_INFO("module %s: DISABLED\n", module->name);
723 module->state = ADSP_STATE_DISABLED;
724 wake_up(&module->state_wait);
725 break;
726 case RPC_ADSP_RTOS_SERVICE_RESET:
727 MM_INFO("module %s: SERVICE_RESET\n", module->name);
728 module->state = ADSP_STATE_DISABLED;
729 wake_up(&module->state_wait);
730 break;
731 case RPC_ADSP_RTOS_CMD_SUCCESS:
732 MM_INFO("module %s: CMD_SUCCESS\n", module->name);
733 break;
734 case RPC_ADSP_RTOS_CMD_FAIL:
735 MM_INFO("module %s: CMD_FAIL\n", module->name);
736 break;
737 case RPC_ADSP_RTOS_DISABLE_FAIL:
738 MM_INFO("module %s: DISABLE_FAIL\n", module->name);
739 break;
740 default:
741 MM_ERR("unknown event %d\n", event);
742 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
743 RPC_ACCEPTSTAT_GARBAGE_ARGS);
744 mutex_unlock(&module->lock);
745 return;
746 }
747 rpc_send_accepted_void_reply(rpc_cb_server_client, req->xid,
748 RPC_ACCEPTSTAT_SUCCESS);
749#ifdef CONFIG_MSM_ADSP_REPORT_EVENTS
750 event_addr = (uint32_t *)req;
751 module->ops->event(module->driver_data,
752 EVENT_MSG_ID,
753 EVENT_LEN,
754 read_event);
755#endif
756 mutex_unlock(&module->lock);
757}
758
759static int handle_adsp_rtos_mtoa(struct rpc_request_hdr *req)
760{
761 switch (req->procedure) {
762 case RPC_ADSP_RTOS_MTOA_NULL_PROC:
763 rpc_send_accepted_void_reply(rpc_cb_server_client,
764 req->xid,
765 RPC_ACCEPTSTAT_SUCCESS);
766 break;
767#if CONFIG_ADSP_RPC_VER > 0x30001
768 case RPC_ADSP_RTOS_MTOA_INIT_INFO_PROC:
769 case RPC_ADSP_RTOS_MTOA_EVENT_INFO_PROC:
770#else
771 case RPC_ADSP_RTOS_MODEM_TO_APP_PROC:
772#endif
773 handle_adsp_rtos_mtoa_app(req);
774 break;
775 default:
776 MM_ERR("unknowned proc %d\n", req->procedure);
777 rpc_send_accepted_void_reply(
778 rpc_cb_server_client, req->xid,
779 RPC_ACCEPTSTAT_PROC_UNAVAIL);
780 break;
781 }
782 return 0;
783}
784
785/* this should be common code with rpc_servers.c */
786static int adsp_rpc_thread(void *data)
787{
788 void *buffer;
789 struct rpc_request_hdr *req;
790 int rc, exit = 0;
791
792 do {
793 rc = msm_rpc_read(rpc_cb_server_client, &buffer, -1, -1);
794 if (rc < 0) {
795 MM_ERR("could not read rpc: %d\n", rc);
796 break;
797 }
798 req = (struct rpc_request_hdr *)buffer;
799
800 req->type = be32_to_cpu(req->type);
801 req->xid = be32_to_cpu(req->xid);
802 req->rpc_vers = be32_to_cpu(req->rpc_vers);
803 req->prog = be32_to_cpu(req->prog);
804 req->vers = be32_to_cpu(req->vers);
805 req->procedure = be32_to_cpu(req->procedure);
806
807 if (req->type != 0)
808 goto bad_rpc;
809 if (req->rpc_vers != 2)
810 goto bad_rpc;
811 if (req->prog != rpc_adsp_rtos_mtoa_prog)
812 goto bad_rpc;
813 if (!msm_rpc_is_compatible_version(rpc_adsp_rtos_mtoa_vers,
814 req->vers))
815 goto bad_rpc;
816
817 handle_adsp_rtos_mtoa(req);
818 kfree(buffer);
819 continue;
820
821bad_rpc:
822 MM_ERR("bogus rpc from modem\n");
823 kfree(buffer);
824 } while (!exit);
825 do_exit(0);
826}
827
828static size_t read_event_size;
829static void *read_event_addr;
830
831static void read_event_16(void *buf, size_t len)
832{
833 uint16_t *dst = buf;
834 uint16_t *src = read_event_addr;
835 len /= 2;
836 if (len > read_event_size)
837 len = read_event_size;
838 while (len--)
839 *dst++ = *src++;
840}
841
842static void read_event_32(void *buf, size_t len)
843{
844 uint32_t *dst = buf;
845 uint32_t *src = read_event_addr;
846 len /= 2;
847 if (len > read_event_size)
848 len = read_event_size;
849 while (len--)
850 *dst++ = *src++;
851}
852
853static int adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(
854 struct adsp_info *info, void *dsp_addr)
855{
856 struct msm_adsp_module *module;
857 unsigned rtos_task_id;
858 unsigned msg_id;
859 unsigned msg_length;
860#ifdef CONFIG_DEBUG_FS
861 uint16_t *ptr;
862 int ii;
863#endif /* CONFIG_DEBUG_FS */
864 void (*func)(void *, size_t);
865
866 if (dsp_addr >= (void *)(MSM_AD5_BASE + QDSP_RAMC_OFFSET)) {
867 uint32_t *dsp_addr32 = dsp_addr;
868 uint32_t tmp = *dsp_addr32++;
869 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
870 msg_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M);
871 read_event_size = tmp >> 16;
872 read_event_addr = dsp_addr32;
873 msg_length = read_event_size * sizeof(uint32_t);
874 func = read_event_32;
875 } else {
876 uint16_t *dsp_addr16 = dsp_addr;
877 uint16_t tmp = *dsp_addr16++;
878 rtos_task_id = (tmp & ADSP_RTOS_READ_CTRL_WORD_TASK_ID_M) >> 8;
879 msg_id = tmp & ADSP_RTOS_READ_CTRL_WORD_MSG_ID_M;
880 read_event_size = *dsp_addr16++;
881 read_event_addr = dsp_addr16;
882 msg_length = read_event_size * sizeof(uint16_t);
883 func = read_event_16;
884 }
885
886 if (rtos_task_id > info->max_task_id) {
887 MM_ERR("bogus task id %d\n", rtos_task_id);
888 return 0;
889 }
890 module = find_adsp_module_by_id(info,
891 adsp_get_module(info, rtos_task_id));
892
893 if (!module) {
894 MM_ERR("no module for task id %d\n", rtos_task_id);
895 return 0;
896 }
897
898 module->num_events++;
899
900 if (!module->ops) {
901 MM_ERR("module %s is not open\n", module->name);
902 return 0;
903 }
904#ifdef CONFIG_DEBUG_FS
905 if (rdump > 0) {
906 ptr = read_event_addr;
907 pr_info("D->A\n");
908 pr_info("m_id = %x id = %x\n", module->id, msg_id);
909 for (ii = 0; ii < msg_length/2; ii++)
910 pr_info("%x ", ptr[ii]);
911 pr_info("\n");
912 }
913#endif /* CONFIG_DEBUG_FS */
914
915 module->ops->event(module->driver_data, msg_id, msg_length, func);
916 return 0;
917}
918
919static int adsp_get_event(struct adsp_info *info)
920{
921 uint32_t ctrl_word;
922 uint32_t ready;
923 void *dsp_addr;
924 uint32_t cmd_type;
925 int cnt;
926 unsigned long flags;
927 int rc = 0;
928
929 spin_lock_irqsave(&adsp_cmd_lock, flags);
930
931 /* Whenever the DSP has a message, it updates this control word
932 * and generates an interrupt. When we receive the interrupt, we
933 * read this register to find out what ADSP task the command is
934 * comming from.
935 *
936 * The ADSP should *always* be ready on the first call, but the
937 * irq handler calls us in a loop (to handle back-to-back command
938 * processing), so we give the DSP some time to return to the
939 * ready state. The DSP will not issue another IRQ for events
940 * pending between the first IRQ and the event queue being drained,
941 * unfortunately.
942 */
943
944 for (cnt = 0; cnt < 50; cnt++) {
945 ctrl_word = readl(info->read_ctrl);
946
947 if ((ctrl_word & ADSP_RTOS_READ_CTRL_WORD_FLAG_M) ==
948 ADSP_RTOS_READ_CTRL_WORD_FLAG_UP_CONT_V)
949 goto ready;
950
951 udelay(2);
952 }
953 MM_ERR("not ready after 100uS\n");
954 rc = -EBUSY;
955 goto done;
956
957ready:
958 /* Here we check to see if there are pending messages. If there are
959 * none, we siply return -EAGAIN to indicate that there are no more
960 * messages pending.
961 */
962 ready = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_READY_M;
963 if ((ready != ADSP_RTOS_READ_CTRL_WORD_READY_V) &&
964 (ready != ADSP_RTOS_READ_CTRL_WORD_CONT_V)) {
965 rc = -EAGAIN;
966 goto done;
967 }
968
969 /* DSP says that there are messages waiting for the host to read */
970
971 /* Get the Command Type */
972 cmd_type = ctrl_word & ADSP_RTOS_READ_CTRL_WORD_CMD_TYPE_M;
973
974 /* Get the DSP buffer address */
975 dsp_addr = (void *)((ctrl_word &
976 ADSP_RTOS_READ_CTRL_WORD_DSP_ADDR_M) +
977 (uint32_t)MSM_AD5_BASE);
978
979 /* We can only handle Task-to-Host messages */
980 if (cmd_type != ADSP_RTOS_READ_CTRL_WORD_CMD_TASK_TO_H_V) {
981 MM_ERR("unknown dsp cmd_type %d\n", cmd_type);
982 rc = -EIO;
983 goto done;
984 }
985
986 adsp_rtos_read_ctrl_word_cmd_tast_to_h_v(info, dsp_addr);
987
988 ctrl_word = readl(info->read_ctrl);
989 ctrl_word &= ~ADSP_RTOS_READ_CTRL_WORD_READY_M;
990
991 /* Write ctrl word to the DSP */
992 writel(ctrl_word, info->read_ctrl);
993
994 /* Generate an interrupt to the DSP */
995 writel(1, info->send_irq);
996
997done:
998 spin_unlock_irqrestore(&adsp_cmd_lock, flags);
999 return rc;
1000}
1001
1002static irqreturn_t adsp_irq_handler(int irq, void *data)
1003{
1004 struct adsp_info *info = &adsp_info;
1005 int cnt = 0;
1006 for (cnt = 0; cnt < 15; cnt++)
1007 if (adsp_get_event(info) < 0)
1008 break;
1009 if (cnt > info->event_backlog_max)
1010 info->event_backlog_max = cnt;
1011 info->events_received += cnt;
1012 if (cnt == 15)
1013 MM_ERR("too many (%d) events for single irq!\n", cnt);
1014 return IRQ_HANDLED;
1015}
1016
1017int adsp_set_clkrate(struct msm_adsp_module *module, unsigned long clk_rate)
1018{
1019 if (module->clk && clk_rate)
Matt Wagantallf13bee62011-11-08 15:36:32 -08001020 return clk_set_rate(module->clk, clk_rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001021
1022 return -EINVAL;
1023}
1024
1025int msm_adsp_enable(struct msm_adsp_module *module)
1026{
1027 int rc = 0;
1028
1029 MM_INFO("enable '%s'state[%d] id[%d]\n",
1030 module->name, module->state, module->id);
1031
1032 mutex_lock(&module->lock);
1033 switch (module->state) {
1034 case ADSP_STATE_DISABLED:
1035 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_ENABLE,
1036 module->id, module);
1037 if (rc)
1038 break;
1039 module->state = ADSP_STATE_ENABLING;
1040 mutex_unlock(&module->lock);
1041 rc = wait_event_timeout(module->state_wait,
1042 module->state != ADSP_STATE_ENABLING,
1043 1 * HZ);
1044 mutex_lock(&module->lock);
1045 if (module->state == ADSP_STATE_ENABLED) {
1046 rc = 0;
1047 } else {
1048 MM_ERR("module '%s' enable timed out\n", module->name);
1049 rc = -ETIMEDOUT;
1050 }
1051 if (module->open_count++ == 0 && module->clk)
1052 clk_enable(module->clk);
1053
1054 mutex_lock(&adsp_open_lock);
1055 if (adsp_open_count++ == 0) {
1056 enable_irq(INT_ADSP);
1057 prevent_suspend();
1058 }
1059 mutex_unlock(&adsp_open_lock);
1060 break;
1061 case ADSP_STATE_ENABLING:
1062 MM_DBG("module '%s' enable in progress\n", module->name);
1063 break;
1064 case ADSP_STATE_ENABLED:
1065 MM_DBG("module '%s' already enabled\n", module->name);
1066 break;
1067 case ADSP_STATE_DISABLING:
1068 MM_ERR("module '%s' disable in progress\n", module->name);
1069 rc = -EBUSY;
1070 break;
1071 }
1072 mutex_unlock(&module->lock);
1073 return rc;
1074}
1075EXPORT_SYMBOL(msm_adsp_enable);
1076
1077int msm_adsp_disable_event_rsp(struct msm_adsp_module *module)
1078{
1079 int rc = 0;
1080
1081 mutex_lock(&module->lock);
1082
1083 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE_EVENT_RSP,
1084 module->id, module);
1085 mutex_unlock(&module->lock);
1086
1087 return rc;
1088}
1089EXPORT_SYMBOL(msm_adsp_disable_event_rsp);
1090
1091static int msm_adsp_disable_locked(struct msm_adsp_module *module)
1092{
1093 int rc = 0;
1094
1095 switch (module->state) {
1096 case ADSP_STATE_DISABLED:
1097 MM_DBG("module '%s' already disabled\n", module->name);
1098 break;
1099 case ADSP_STATE_ENABLING:
1100 case ADSP_STATE_ENABLED:
1101 rc = rpc_adsp_rtos_app_to_modem(RPC_ADSP_RTOS_CMD_DISABLE,
1102 module->id, module);
1103 module->state = ADSP_STATE_DISABLED;
1104 if (--module->open_count == 0 && module->clk)
1105 clk_disable(module->clk);
1106 mutex_lock(&adsp_open_lock);
1107 if (--adsp_open_count == 0) {
1108 disable_irq(INT_ADSP);
1109 allow_suspend();
1110 MM_DBG("disable interrupt\n");
1111 }
1112 mutex_unlock(&adsp_open_lock);
1113 }
1114 return rc;
1115}
1116
1117int msm_adsp_disable(struct msm_adsp_module *module)
1118{
1119 int rc;
1120 MM_INFO("disable '%s'\n", module->name);
1121 mutex_lock(&module->lock);
1122 rc = msm_adsp_disable_locked(module);
1123 mutex_unlock(&module->lock);
1124 return rc;
1125}
1126EXPORT_SYMBOL(msm_adsp_disable);
1127
1128static int msm_adsp_probe(struct platform_device *pdev)
1129{
1130 unsigned count;
1131 int rc, i;
1132
1133 if (pdev->id != (rpc_adsp_rtos_atom_vers & RPC_VERSION_MAJOR_MASK))
1134 return -EINVAL;
1135
1136 wake_lock_init(&adsp_wake_lock, WAKE_LOCK_SUSPEND, "adsp");
1137 adsp_info.init_info_ptr = kzalloc(
1138 (sizeof(struct adsp_rtos_mp_mtoa_init_info_type)), GFP_KERNEL);
1139 if (!adsp_info.init_info_ptr)
1140 return -ENOMEM;
1141
1142 rc = adsp_init_info(&adsp_info);
1143 if (rc)
1144 return rc;
1145 adsp_info.send_irq += (uint32_t) MSM_AD5_BASE;
1146 adsp_info.read_ctrl += (uint32_t) MSM_AD5_BASE;
1147 adsp_info.write_ctrl += (uint32_t) MSM_AD5_BASE;
1148 count = adsp_info.module_count;
1149
1150 adsp_modules = kzalloc(
1151 (sizeof(struct msm_adsp_module) + sizeof(void *)) *
1152 count, GFP_KERNEL);
1153 if (!adsp_modules)
1154 return -ENOMEM;
1155
1156 adsp_info.id_to_module = (void *) (adsp_modules + count);
1157
1158 spin_lock_init(&adsp_cmd_lock);
1159 spin_lock_init(&adsp_write_lock);
1160
1161 rc = request_irq(INT_ADSP, adsp_irq_handler, IRQF_TRIGGER_RISING,
1162 "adsp", 0);
1163 if (rc < 0)
1164 goto fail_request_irq;
1165 disable_irq(INT_ADSP);
1166
1167 rpc_cb_server_client = msm_rpc_open();
1168 if (IS_ERR(rpc_cb_server_client)) {
1169 rpc_cb_server_client = NULL;
1170 rc = PTR_ERR(rpc_cb_server_client);
1171 MM_ERR("could not create rpc server (%d)\n", rc);
1172 goto fail_rpc_open;
1173 }
1174
1175 rc = msm_rpc_register_server(rpc_cb_server_client,
1176 rpc_adsp_rtos_mtoa_prog,
1177 rpc_adsp_rtos_mtoa_vers);
1178 if (rc) {
1179 MM_ERR("could not register callback server (%d)\n", rc);
1180 goto fail_rpc_register;
1181 }
1182
1183 /* start the kernel thread to process the callbacks */
1184 kthread_run(adsp_rpc_thread, NULL, "kadspd");
1185
1186 for (i = 0; i < count; i++) {
1187 struct msm_adsp_module *mod = adsp_modules + i;
1188 mutex_init(&mod->lock);
1189 init_waitqueue_head(&mod->state_wait);
1190 mod->info = &adsp_info;
1191 mod->name = adsp_info.module[i].name;
1192 mod->id = adsp_info.module[i].id;
1193 if (adsp_info.module[i].clk_name)
1194 mod->clk = clk_get(NULL, adsp_info.module[i].clk_name);
1195 else
1196 mod->clk = NULL;
1197 if (mod->clk && adsp_info.module[i].clk_rate)
Matt Wagantallf13bee62011-11-08 15:36:32 -08001198 clk_set_rate(mod->clk, adsp_info.module[i].clk_rate);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001199 mod->verify_cmd = adsp_info.module[i].verify_cmd;
1200 mod->patch_event = adsp_info.module[i].patch_event;
1201 INIT_HLIST_HEAD(&mod->pmem_regions);
1202 mod->pdev.name = adsp_info.module[i].pdev_name;
1203 mod->pdev.id = -1;
1204 adsp_info.id_to_module[i] = mod;
1205 platform_device_register(&mod->pdev);
1206 }
1207
1208 msm_adsp_publish_cdevs(adsp_modules, count);
1209 rmtask_init();
1210
1211 return 0;
1212
1213fail_rpc_register:
1214 msm_rpc_close(rpc_cb_server_client);
1215 rpc_cb_server_client = NULL;
1216fail_rpc_open:
1217 enable_irq(INT_ADSP);
1218 free_irq(INT_ADSP, 0);
1219fail_request_irq:
1220 kfree(adsp_modules);
1221 kfree(adsp_info.init_info_ptr);
1222 return rc;
1223}
1224#ifdef CONFIG_DEBUG_FS
1225static int get_parameters(char *buf, long int *param1, int num_of_par)
1226{
1227 char *token;
1228 int base, cnt;
1229
1230 token = strsep(&buf, " ");
1231
1232 for (cnt = 0; cnt < num_of_par; cnt++) {
1233 if (token != NULL) {
1234 if ((token[1] == 'x') || (token[1] == 'X'))
1235 base = 16;
1236 else
1237 base = 10;
1238
1239 if (strict_strtoul(token, base, &param1[cnt]) != 0)
1240 return -EINVAL;
1241
1242 token = strsep(&buf, " ");
1243 }
1244 else
1245 return -EINVAL;
1246 }
1247 return 0;
1248}
1249
1250
1251static ssize_t adsp_debug_open(struct inode *inode, struct file *file)
1252{
1253 file->private_data = inode->i_private;
1254 pr_debug("adsp debugfs opened\n");
1255 return 0;
1256}
1257static ssize_t adsp_debug_write(struct file *file, const char __user *buf,
1258 size_t cnt, loff_t *ppos)
1259{
1260 char *access_str = file->private_data;
1261 char lbuf[32];
1262 int rc;
1263 long int param[5];
1264
1265 if (cnt > sizeof(lbuf) - 1)
1266 return -EINVAL;
1267 rc = copy_from_user(lbuf, buf, cnt);
1268 if (rc) {
1269 pr_info("Unable to copy data from user space\n");
1270 return -EFAULT;
1271 }
1272 lbuf[cnt] = '\0';
1273
1274 if (!strcmp(access_str, "write_log")) {
1275 if (get_parameters(lbuf, param, 1) == 0) {
1276 switch (param[0]) {
1277 case 1:
1278 if (wdump <= 0)
1279 wdump = 1;
1280 pr_debug("write cmd to DSP(A->D) dump \
1281 started:%d\n", wdump);
1282 break;
1283 case 0:
1284 if (wdump > 0)
1285 wdump = 0;
1286 pr_debug("Stop write cmd to \
1287 DSP(A->D):%d\n", wdump);
1288 break;
1289 default:
1290 rc = -EINVAL;
1291 break;
1292 }
1293 } else
1294 rc = -EINVAL;
1295 } else if (!strcmp(access_str, "read_log")) {
1296 if (get_parameters(lbuf, param, 1) == 0) {
1297 switch (param[0]) {
1298 case 1:
1299 if (rdump <= 0)
1300 rdump = 1;
1301 pr_debug("write cmd from DSP(D->A) dump \
1302 started:%d\n", wdump);
1303 break;
1304 case 0:
1305 if (rdump > 0)
1306 rdump = 0;
1307 pr_debug("Stop write cmd from \
1308 DSP(D->A):%d\n", wdump);
1309 break;
1310 default:
1311 rc = -EINVAL;
1312 break;
1313 }
1314 } else
1315 rc = -EINVAL;
1316 } else {
1317 rc = -EINVAL;
1318 }
1319 if (rc == 0)
1320 rc = cnt;
1321 else {
1322 pr_err("%s: rc = %d\n", __func__, rc);
1323 pr_info("\nWrong command: Use =>\n");
1324 pr_info("-------------------------\n");
1325 pr_info("To Start A->D:: echo \"1\">/sys/kernel/debug/ \
1326 adsp_cmd/write_log\n");
1327 pr_info("To Start D->A:: echo \"1\">/sys/kernel/debug/ \
1328 adsp_cmd/read_log\n");
1329 pr_info("To Stop A->D:: echo \"0\">/sys/kernel/debug/ \
1330 adsp_cmd/write_log\n");
1331 pr_info("To Stop D->A:: echo \"0\">/sys/kernel/debug/ \
1332 adsp_cmd/read_log\n");
1333 pr_info("------------------------\n");
1334 }
1335
1336 return rc;
1337}
1338#endif
1339
1340static struct platform_driver msm_adsp_driver = {
1341 .probe = msm_adsp_probe,
1342 .driver = {
1343 .owner = THIS_MODULE,
1344 },
1345};
1346
1347static char msm_adsp_driver_name[] = "rs00000000";
1348
1349#ifdef CONFIG_DEBUG_FS
1350static const struct file_operations adsp_debug_fops = {
1351 .write = adsp_debug_write,
1352 .open = adsp_debug_open,
1353};
1354#endif
1355
1356static int __init adsp_init(void)
1357{
1358 int rc;
1359
1360#ifdef CONFIG_DEBUG_FS
1361 dentry_adsp = debugfs_create_dir("adsp_cmd", 0);
1362 if (!IS_ERR(dentry_adsp)) {
1363 dentry_wdata = debugfs_create_file("write_log", \
1364 S_IFREG | S_IRUGO, dentry_adsp,
1365 (void *) "write_log" , &adsp_debug_fops);
1366 dentry_rdata = debugfs_create_file("read_log", \
1367 S_IFREG | S_IRUGO, dentry_adsp,
1368 (void *) "read_log", &adsp_debug_fops);
1369 }
1370 rdump = 0;
1371 wdump = 0;
1372#endif /* CONFIG_DEBUG_FS */
1373
1374 rpc_adsp_rtos_atom_prog = 0x3000000a;
1375 rpc_adsp_rtos_atom_vers = 0x10001;
1376 rpc_adsp_rtos_atom_vers_comp = 0x00010001;
1377 rpc_adsp_rtos_mtoa_prog = 0x3000000b;
1378#if CONFIG_ADSP_RPC_VER > 0x30001
1379 rpc_adsp_rtos_mtoa_vers = 0x30002;
1380 rpc_adsp_rtos_mtoa_vers_comp = 0x00030002;
1381#else
1382 rpc_adsp_rtos_mtoa_vers = 0x30001;
1383 rpc_adsp_rtos_mtoa_vers_comp = 0x00030001;
1384#endif
1385
1386 snprintf(msm_adsp_driver_name, sizeof(msm_adsp_driver_name),
1387 "rs%08x",
1388 rpc_adsp_rtos_atom_prog);
1389 msm_adsp_driver.driver.name = msm_adsp_driver_name;
1390 rc = platform_driver_register(&msm_adsp_driver);
1391 MM_INFO("%s -- %d\n", msm_adsp_driver_name, rc);
1392 return rc;
1393}
1394
1395device_initcall(adsp_init);