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Joerg Roedel395624f2007-10-24 12:49:47 +02001#ifndef _ASM_X8664_IOMMU_H
2#define _ASM_X8664_IOMMU_H 1
3
Pavel Machek0abbc782008-05-20 16:27:17 +02004#include <asm/e820.h>
5
Joerg Roedel395624f2007-10-24 12:49:47 +02006extern void pci_iommu_shutdown(void);
7extern void no_iommu_init(void);
8extern int force_iommu, no_iommu;
9extern int iommu_detected;
Pavel Machekaa134f12008-04-08 10:49:03 +020010extern int agp_amd64_init(void);
Joerg Roedel966396d2007-10-24 12:49:48 +020011#ifdef CONFIG_GART_IOMMU
Joerg Roedel395624f2007-10-24 12:49:47 +020012extern void gart_iommu_init(void);
13extern void gart_iommu_shutdown(void);
14extern void __init gart_parse_options(char *);
Yinghai Luaaf23042008-01-30 13:33:09 +010015extern void early_gart_iommu_check(void);
Joerg Roedel0440d4c2007-10-24 12:49:50 +020016extern void gart_iommu_hole_init(void);
Joerg Roedel395624f2007-10-24 12:49:47 +020017extern int fallback_aper_order;
18extern int fallback_aper_force;
Joerg Roedel0440d4c2007-10-24 12:49:50 +020019extern int gart_iommu_aperture;
20extern int gart_iommu_aperture_allowed;
21extern int gart_iommu_aperture_disabled;
Joerg Roedel395624f2007-10-24 12:49:47 +020022extern int fix_aperture;
23#else
Joerg Roedel0440d4c2007-10-24 12:49:50 +020024#define gart_iommu_aperture 0
25#define gart_iommu_aperture_allowed 0
Joerg Roedel395624f2007-10-24 12:49:47 +020026
Yinghai Luaaf23042008-01-30 13:33:09 +010027static inline void early_gart_iommu_check(void)
28{
29}
30
Joerg Roedel395624f2007-10-24 12:49:47 +020031static inline void gart_iommu_shutdown(void)
32{
33}
34
35#endif
36
Pavel Machekaa134f12008-04-08 10:49:03 +020037/* PTE bits. */
38#define GPTE_VALID 1
39#define GPTE_COHERENT 2
40
41/* Aperture control register bits. */
42#define GARTEN (1<<0)
43#define DISGARTCPU (1<<4)
44#define DISGARTIO (1<<5)
45
46/* GART cache control register bits. */
47#define INVGART (1<<0)
48#define GARTPTEERR (1<<1)
49
50/* K8 On-cpu GART registers */
51#define AMD64_GARTAPERTURECTL 0x90
52#define AMD64_GARTAPERTUREBASE 0x94
53#define AMD64_GARTTABLEBASE 0x98
54#define AMD64_GARTCACHECTL 0x9c
55#define AMD64_GARTEN (1<<0)
56
Pavel Machek3bb6fbf2008-04-15 12:43:57 +020057static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
58{
59 u32 tmp, ctl;
60
61 /* address of the mappings table */
62 addr >>= 12;
63 tmp = (u32) addr<<4;
64 tmp &= ~0xf;
65 pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
66
67 /* Enable GART translation for this hammer. */
68 pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
69 ctl |= GARTEN;
70 ctl &= ~(DISGARTCPU | DISGARTIO);
71 pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
72}
73
Pavel Machek0abbc782008-05-20 16:27:17 +020074static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
75{
76 if (!aper_base)
77 return 0;
78
79 if (aper_base + aper_size > 0x100000000ULL) {
80 printk(KERN_ERR "Aperture beyond 4GB. Ignoring.\n");
81 return 0;
82 }
83 if (e820_any_mapped(aper_base, aper_base + aper_size, E820_RAM)) {
84 printk(KERN_ERR "Aperture pointing to e820 RAM. Ignoring.\n");
85 return 0;
86 }
87 if (aper_size < min_size) {
88 printk(KERN_ERR "Aperture too small (%d MB) than (%d MB)\n",
89 aper_size>>20, min_size>>20);
90 return 0;
91 }
92
93 return 1;
94}
95
Joerg Roedel395624f2007-10-24 12:49:47 +020096#endif