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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * arch/s390/kernel/time.c
3 * Time of day based timer functions.
4 *
5 * S390 version
6 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
7 * Author(s): Hartmut Penner (hp@de.ibm.com),
8 * Martin Schwidefsky (schwidefsky@de.ibm.com),
9 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
10 *
11 * Derived from "arch/i386/kernel/time.c"
12 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
13 */
14
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/errno.h>
16#include <linux/module.h>
17#include <linux/sched.h>
18#include <linux/kernel.h>
19#include <linux/param.h>
20#include <linux/string.h>
21#include <linux/mm.h>
22#include <linux/interrupt.h>
23#include <linux/time.h>
Ralf Baechle3367b992007-05-08 00:27:52 -070024#include <linux/sysdev.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070025#include <linux/delay.h>
26#include <linux/init.h>
27#include <linux/smp.h>
28#include <linux/types.h>
29#include <linux/profile.h>
30#include <linux/timex.h>
31#include <linux/notifier.h>
Martin Schwidefskydc64bef2006-10-06 16:38:48 +020032#include <linux/clocksource.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070033
34#include <asm/uaccess.h>
35#include <asm/delay.h>
36#include <asm/s390_ext.h>
37#include <asm/div64.h>
38#include <asm/irq.h>
Heiko Carstens5a489b92006-10-06 16:38:35 +020039#include <asm/irq_regs.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070040#include <asm/timer.h>
Martin Schwidefskyd54853e2007-02-05 21:18:19 +010041#include <asm/etr.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070042
43/* change this if you have some constant time drift */
44#define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
45#define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
46
Martin Schwidefskyd54853e2007-02-05 21:18:19 +010047/* The value of the TOD clock for 1.1.1970. */
48#define TOD_UNIX_EPOCH 0x7d91048bca000000ULL
49
Linus Torvalds1da177e2005-04-16 15:20:36 -070050/*
51 * Create a small time difference between the timer interrupts
52 * on the different cpus to avoid lock contention.
53 */
54#define CPU_DEVIATION (smp_processor_id() << 12)
55
56#define TICK_SIZE tick
57
Linus Torvalds1da177e2005-04-16 15:20:36 -070058static ext_int_info_t ext_int_info_cc;
Martin Schwidefskyd54853e2007-02-05 21:18:19 +010059static ext_int_info_t ext_int_etr_cc;
Linus Torvalds1da177e2005-04-16 15:20:36 -070060static u64 init_timer_cc;
61static u64 jiffies_timer_cc;
62static u64 xtime_cc;
63
Linus Torvalds1da177e2005-04-16 15:20:36 -070064/*
65 * Scheduler clock - returns current time in nanosec units.
66 */
67unsigned long long sched_clock(void)
68{
Jan Glauber9dbafa52006-02-01 03:06:32 -080069 return ((get_clock() - jiffies_timer_cc) * 125) >> 9;
Linus Torvalds1da177e2005-04-16 15:20:36 -070070}
71
Jan Glauber32f65f22006-02-01 03:06:33 -080072/*
73 * Monotonic_clock - returns # of nanoseconds passed since time_init()
74 */
75unsigned long long monotonic_clock(void)
76{
77 return sched_clock();
78}
79EXPORT_SYMBOL(monotonic_clock);
80
Linus Torvalds1da177e2005-04-16 15:20:36 -070081void tod_to_timeval(__u64 todval, struct timespec *xtime)
82{
83 unsigned long long sec;
84
85 sec = todval >> 12;
86 do_div(sec, 1000000);
87 xtime->tv_sec = sec;
88 todval -= (sec * 1000000) << 12;
89 xtime->tv_nsec = ((todval * 1000) >> 12);
90}
91
Linus Torvalds1da177e2005-04-16 15:20:36 -070092#ifdef CONFIG_PROFILING
Heiko Carstens5a489b92006-10-06 16:38:35 +020093#define s390_do_profile() profile_tick(CPU_PROFILING)
Linus Torvalds1da177e2005-04-16 15:20:36 -070094#else
Heiko Carstens5a489b92006-10-06 16:38:35 +020095#define s390_do_profile() do { ; } while(0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070096#endif /* CONFIG_PROFILING */
97
Linus Torvalds1da177e2005-04-16 15:20:36 -070098/*
Martin Schwidefskyd54853e2007-02-05 21:18:19 +010099 * Advance the per cpu tick counter up to the time given with the
100 * "time" argument. The per cpu update consists of accounting
101 * the virtual cpu time, calling update_process_times and calling
102 * the profiling hook. If xtime is before time it is advanced as well.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700103 */
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100104void account_ticks(u64 time)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700105{
Atsushi Nemoto3171a032006-09-29 02:00:32 -0700106 __u32 ticks;
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100107 __u64 tmp;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700108
109 /* Calculate how many ticks have passed. */
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100110 if (time < S390_lowcore.jiffy_timer)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 return;
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100112 tmp = time - S390_lowcore.jiffy_timer;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700113 if (tmp >= 2*CLK_TICKS_PER_JIFFY) { /* more than two ticks ? */
114 ticks = __div(tmp, CLK_TICKS_PER_JIFFY) + 1;
115 S390_lowcore.jiffy_timer +=
116 CLK_TICKS_PER_JIFFY * (__u64) ticks;
117 } else if (tmp >= CLK_TICKS_PER_JIFFY) {
118 ticks = 2;
119 S390_lowcore.jiffy_timer += 2*CLK_TICKS_PER_JIFFY;
120 } else {
121 ticks = 1;
122 S390_lowcore.jiffy_timer += CLK_TICKS_PER_JIFFY;
123 }
124
Linus Torvalds1da177e2005-04-16 15:20:36 -0700125#ifdef CONFIG_SMP
126 /*
127 * Do not rely on the boot cpu to do the calls to do_timer.
128 * Spread it over all cpus instead.
129 */
130 write_seqlock(&xtime_lock);
131 if (S390_lowcore.jiffy_timer > xtime_cc) {
Atsushi Nemoto3171a032006-09-29 02:00:32 -0700132 __u32 xticks;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700133 tmp = S390_lowcore.jiffy_timer - xtime_cc;
134 if (tmp >= 2*CLK_TICKS_PER_JIFFY) {
135 xticks = __div(tmp, CLK_TICKS_PER_JIFFY);
136 xtime_cc += (__u64) xticks * CLK_TICKS_PER_JIFFY;
137 } else {
138 xticks = 1;
139 xtime_cc += CLK_TICKS_PER_JIFFY;
140 }
Atsushi Nemoto3171a032006-09-29 02:00:32 -0700141 do_timer(xticks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700142 }
143 write_sequnlock(&xtime_lock);
144#else
Atsushi Nemoto3171a032006-09-29 02:00:32 -0700145 do_timer(ticks);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146#endif
147
Linus Torvalds1da177e2005-04-16 15:20:36 -0700148 while (ticks--)
Heiko Carstens5a489b92006-10-06 16:38:35 +0200149 update_process_times(user_mode(get_irq_regs()));
Linus Torvalds1da177e2005-04-16 15:20:36 -0700150
Heiko Carstens5a489b92006-10-06 16:38:35 +0200151 s390_do_profile();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152}
153
154#ifdef CONFIG_NO_IDLE_HZ
155
156#ifdef CONFIG_NO_IDLE_HZ_INIT
157int sysctl_hz_timer = 0;
158#else
159int sysctl_hz_timer = 1;
160#endif
161
162/*
163 * Stop the HZ tick on the current CPU.
164 * Only cpu_idle may call this function.
165 */
Heiko Carstens4d284ca2007-02-05 21:18:53 +0100166static void stop_hz_timer(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700167{
Martin Schwidefsky1b44e982005-11-07 00:59:02 -0800168 unsigned long flags;
169 unsigned long seq, next;
Martin Schwidefsky4b7e0702005-05-01 08:58:57 -0700170 __u64 timer, todval;
Heiko Carstens5afdbd62006-05-15 09:43:59 -0700171 int cpu = smp_processor_id();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700172
173 if (sysctl_hz_timer != 0)
174 return;
175
Heiko Carstens5afdbd62006-05-15 09:43:59 -0700176 cpu_set(cpu, nohz_cpu_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700177
178 /*
179 * Leave the clock comparator set up for the next timer
180 * tick if either rcu or a softirq is pending.
181 */
Heiko Carstens5afdbd62006-05-15 09:43:59 -0700182 if (rcu_needs_cpu(cpu) || local_softirq_pending()) {
183 cpu_clear(cpu, nohz_cpu_mask);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700184 return;
185 }
186
187 /*
188 * This cpu is going really idle. Set up the clock comparator
189 * for the next event.
190 */
Martin Schwidefsky1b44e982005-11-07 00:59:02 -0800191 next = next_timer_interrupt();
192 do {
193 seq = read_seqbegin_irqsave(&xtime_lock, flags);
Martin Schwidefsky705af302006-05-23 09:22:42 +0200194 timer = ((__u64) next) - ((__u64) jiffies) + jiffies_64;
Martin Schwidefsky1b44e982005-11-07 00:59:02 -0800195 } while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
Martin Schwidefsky4b7e0702005-05-01 08:58:57 -0700196 todval = -1ULL;
197 /* Be careful about overflows. */
198 if (timer < (-1ULL / CLK_TICKS_PER_JIFFY)) {
199 timer = jiffies_timer_cc + timer * CLK_TICKS_PER_JIFFY;
200 if (timer >= jiffies_timer_cc)
201 todval = timer;
202 }
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100203 set_clock_comparator(todval);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700204}
205
206/*
207 * Start the HZ tick on the current CPU.
208 * Only cpu_idle may call this function.
209 */
Heiko Carstens4d284ca2007-02-05 21:18:53 +0100210static void start_hz_timer(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700211{
Heiko Carstens5a489b92006-10-06 16:38:35 +0200212 BUG_ON(!in_interrupt());
213
Linus Torvalds1da177e2005-04-16 15:20:36 -0700214 if (!cpu_isset(smp_processor_id(), nohz_cpu_mask))
215 return;
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100216 account_ticks(get_clock());
217 set_clock_comparator(S390_lowcore.jiffy_timer + CPU_DEVIATION);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700218 cpu_clear(smp_processor_id(), nohz_cpu_mask);
219}
220
221static int nohz_idle_notify(struct notifier_block *self,
222 unsigned long action, void *hcpu)
223{
224 switch (action) {
Heiko Carstensdce55472007-07-10 11:24:21 +0200225 case S390_CPU_IDLE:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700226 stop_hz_timer();
227 break;
Heiko Carstensdce55472007-07-10 11:24:21 +0200228 case S390_CPU_NOT_IDLE:
Linus Torvalds1da177e2005-04-16 15:20:36 -0700229 start_hz_timer();
230 break;
231 }
232 return NOTIFY_OK;
233}
234
235static struct notifier_block nohz_idle_nb = {
236 .notifier_call = nohz_idle_notify,
237};
238
Heiko Carstens2b67fc42007-02-05 21:16:47 +0100239static void __init nohz_init(void)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700240{
241 if (register_idle_notifier(&nohz_idle_nb))
242 panic("Couldn't register idle notifier");
243}
244
245#endif
246
247/*
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100248 * Set up per cpu jiffy timer and set the clock comparator.
249 */
250static void setup_jiffy_timer(void)
251{
252 /* Set up clock comparator to next jiffy. */
253 S390_lowcore.jiffy_timer =
254 jiffies_timer_cc + (jiffies_64 + 1) * CLK_TICKS_PER_JIFFY;
255 set_clock_comparator(S390_lowcore.jiffy_timer + CPU_DEVIATION);
256}
257
258/*
259 * Set up lowcore and control register of the current cpu to
260 * enable TOD clock and clock comparator interrupts.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700261 */
262void init_cpu_timer(void)
263{
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100264 setup_jiffy_timer();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700265
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100266 /* Enable clock comparator timer interrupt. */
267 __ctl_set_bit(0,11);
268
269 /* Always allow ETR external interrupts, even without an ETR. */
270 __ctl_set_bit(0, 4);
271}
272
273static void clock_comparator_interrupt(__u16 code)
274{
275 /* set clock comparator for next tick */
276 set_clock_comparator(S390_lowcore.jiffy_timer + CPU_DEVIATION);
277}
278
279static void etr_reset(void);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100280static void etr_ext_handler(__u16);
281
282/*
283 * Get the TOD clock running.
284 */
285static u64 __init reset_tod_clock(void)
286{
287 u64 time;
288
289 etr_reset();
290 if (store_clock(&time) == 0)
291 return time;
292 /* TOD clock not running. Set the clock to Unix Epoch. */
293 if (set_clock(TOD_UNIX_EPOCH) != 0 || store_clock(&time) != 0)
294 panic("TOD clock not operational.");
295
296 return TOD_UNIX_EPOCH;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700297}
298
Martin Schwidefskydc64bef2006-10-06 16:38:48 +0200299static cycle_t read_tod_clock(void)
300{
301 return get_clock();
302}
303
304static struct clocksource clocksource_tod = {
305 .name = "tod",
Christian Borntraegerd2cb0e62007-11-05 11:10:14 +0100306 .rating = 400,
Martin Schwidefskydc64bef2006-10-06 16:38:48 +0200307 .read = read_tod_clock,
308 .mask = -1ULL,
309 .mult = 1000,
310 .shift = 12,
Thomas Gleixnercc02d802007-02-16 01:27:39 -0800311 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
Martin Schwidefskydc64bef2006-10-06 16:38:48 +0200312};
313
314
Linus Torvalds1da177e2005-04-16 15:20:36 -0700315/*
316 * Initialize the TOD clock and the CPU timer of
317 * the boot cpu.
318 */
319void __init time_init(void)
320{
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100321 init_timer_cc = reset_tod_clock();
322 xtime_cc = init_timer_cc + CLK_TICKS_PER_JIFFY;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700323 jiffies_timer_cc = init_timer_cc - jiffies_64 * CLK_TICKS_PER_JIFFY;
324
325 /* set xtime */
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100326 tod_to_timeval(init_timer_cc - TOD_UNIX_EPOCH, &xtime);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700327 set_normalized_timespec(&wall_to_monotonic,
328 -xtime.tv_sec, -xtime.tv_nsec);
329
330 /* request the clock comparator external interrupt */
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100331 if (register_early_external_interrupt(0x1004,
332 clock_comparator_interrupt,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700333 &ext_int_info_cc) != 0)
334 panic("Couldn't request external interrupt 0x1004");
335
Martin Schwidefskydc64bef2006-10-06 16:38:48 +0200336 if (clocksource_register(&clocksource_tod) != 0)
337 panic("Could not register TOD clock source");
338
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100339 /* request the etr external interrupt */
340 if (register_early_external_interrupt(0x1406, etr_ext_handler,
341 &ext_int_etr_cc) != 0)
342 panic("Couldn't request external interrupt 0x1406");
343
344 /* Enable TOD clock interrupts on the boot cpu. */
345 init_cpu_timer();
Linus Torvalds1da177e2005-04-16 15:20:36 -0700346
347#ifdef CONFIG_NO_IDLE_HZ
348 nohz_init();
349#endif
350
351#ifdef CONFIG_VIRT_TIMER
352 vtime_init();
353#endif
354}
355
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100356/*
357 * External Time Reference (ETR) code.
358 */
359static int etr_port0_online;
360static int etr_port1_online;
361
362static int __init early_parse_etr(char *p)
363{
364 if (strncmp(p, "off", 3) == 0)
365 etr_port0_online = etr_port1_online = 0;
366 else if (strncmp(p, "port0", 5) == 0)
367 etr_port0_online = 1;
368 else if (strncmp(p, "port1", 5) == 0)
369 etr_port1_online = 1;
370 else if (strncmp(p, "on", 2) == 0)
371 etr_port0_online = etr_port1_online = 1;
372 return 0;
373}
374early_param("etr", early_parse_etr);
375
376enum etr_event {
377 ETR_EVENT_PORT0_CHANGE,
378 ETR_EVENT_PORT1_CHANGE,
379 ETR_EVENT_PORT_ALERT,
380 ETR_EVENT_SYNC_CHECK,
381 ETR_EVENT_SWITCH_LOCAL,
382 ETR_EVENT_UPDATE,
383};
384
385enum etr_flags {
386 ETR_FLAG_ENOSYS,
387 ETR_FLAG_EACCES,
388 ETR_FLAG_STEAI,
389};
390
391/*
392 * Valid bit combinations of the eacr register are (x = don't care):
393 * e0 e1 dp p0 p1 ea es sl
394 * 0 0 x 0 0 0 0 0 initial, disabled state
395 * 0 0 x 0 1 1 0 0 port 1 online
396 * 0 0 x 1 0 1 0 0 port 0 online
397 * 0 0 x 1 1 1 0 0 both ports online
398 * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
399 * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
400 * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
401 * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
402 * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
403 * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
404 * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
405 * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
406 * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
407 * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
408 * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
409 * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
410 * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
411 * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
412 * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
413 * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
414 */
415static struct etr_eacr etr_eacr;
416static u64 etr_tolec; /* time of last eacr update */
417static unsigned long etr_flags;
418static struct etr_aib etr_port0;
419static int etr_port0_uptodate;
420static struct etr_aib etr_port1;
421static int etr_port1_uptodate;
422static unsigned long etr_events;
423static struct timer_list etr_timer;
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100424static DEFINE_PER_CPU(atomic_t, etr_sync_word);
425
426static void etr_timeout(unsigned long dummy);
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200427static void etr_work_fn(struct work_struct *work);
428static DECLARE_WORK(etr_work, etr_work_fn);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100429
430/*
431 * The etr get_clock function. It will write the current clock value
432 * to the clock pointer and return 0 if the clock is in sync with the
433 * external time source. If the clock mode is local it will return
434 * -ENOSYS and -EAGAIN if the clock is not in sync with the external
435 * reference. This function is what ETR is all about..
436 */
437int get_sync_clock(unsigned long long *clock)
438{
439 atomic_t *sw_ptr;
440 unsigned int sw0, sw1;
441
442 sw_ptr = &get_cpu_var(etr_sync_word);
443 sw0 = atomic_read(sw_ptr);
444 *clock = get_clock();
445 sw1 = atomic_read(sw_ptr);
446 put_cpu_var(etr_sync_sync);
447 if (sw0 == sw1 && (sw0 & 0x80000000U))
448 /* Success: time is in sync. */
449 return 0;
450 if (test_bit(ETR_FLAG_ENOSYS, &etr_flags))
451 return -ENOSYS;
452 if (test_bit(ETR_FLAG_EACCES, &etr_flags))
453 return -EACCES;
454 return -EAGAIN;
455}
456EXPORT_SYMBOL(get_sync_clock);
457
458/*
459 * Make get_sync_clock return -EAGAIN.
460 */
461static void etr_disable_sync_clock(void *dummy)
462{
463 atomic_t *sw_ptr = &__get_cpu_var(etr_sync_word);
464 /*
465 * Clear the in-sync bit 2^31. All get_sync_clock calls will
466 * fail until the sync bit is turned back on. In addition
467 * increase the "sequence" counter to avoid the race of an
468 * etr event and the complete recovery against get_sync_clock.
469 */
470 atomic_clear_mask(0x80000000, sw_ptr);
471 atomic_inc(sw_ptr);
472}
473
474/*
475 * Make get_sync_clock return 0 again.
476 * Needs to be called from a context disabled for preemption.
477 */
478static void etr_enable_sync_clock(void)
479{
480 atomic_t *sw_ptr = &__get_cpu_var(etr_sync_word);
481 atomic_set_mask(0x80000000, sw_ptr);
482}
483
484/*
485 * Reset ETR attachment.
486 */
487static void etr_reset(void)
488{
489 etr_eacr = (struct etr_eacr) {
490 .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
491 .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
492 .es = 0, .sl = 0 };
493 if (etr_setr(&etr_eacr) == 0)
494 etr_tolec = get_clock();
495 else {
496 set_bit(ETR_FLAG_ENOSYS, &etr_flags);
497 if (etr_port0_online || etr_port1_online) {
498 printk(KERN_WARNING "Running on non ETR capable "
499 "machine, only local mode available.\n");
500 etr_port0_online = etr_port1_online = 0;
501 }
502 }
503}
504
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200505static int __init etr_init(void)
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100506{
507 struct etr_aib aib;
508
509 if (test_bit(ETR_FLAG_ENOSYS, &etr_flags))
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200510 return 0;
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100511 /* Check if this machine has the steai instruction. */
512 if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
513 set_bit(ETR_FLAG_STEAI, &etr_flags);
514 setup_timer(&etr_timer, etr_timeout, 0UL);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100515 if (!etr_port0_online && !etr_port1_online)
516 set_bit(ETR_FLAG_EACCES, &etr_flags);
517 if (etr_port0_online) {
518 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200519 schedule_work(&etr_work);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100520 }
521 if (etr_port1_online) {
522 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200523 schedule_work(&etr_work);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100524 }
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200525 return 0;
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100526}
527
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200528arch_initcall(etr_init);
529
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100530/*
531 * Two sorts of ETR machine checks. The architecture reads:
532 * "When a machine-check niterruption occurs and if a switch-to-local or
533 * ETR-sync-check interrupt request is pending but disabled, this pending
534 * disabled interruption request is indicated and is cleared".
535 * Which means that we can get etr_switch_to_local events from the machine
536 * check handler although the interruption condition is disabled. Lovely..
537 */
538
539/*
540 * Switch to local machine check. This is called when the last usable
541 * ETR port goes inactive. After switch to local the clock is not in sync.
542 */
543void etr_switch_to_local(void)
544{
545 if (!etr_eacr.sl)
546 return;
547 etr_disable_sync_clock(NULL);
548 set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200549 schedule_work(&etr_work);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100550}
551
552/*
553 * ETR sync check machine check. This is called when the ETR OTE and the
554 * local clock OTE are farther apart than the ETR sync check tolerance.
555 * After a ETR sync check the clock is not in sync. The machine check
556 * is broadcasted to all cpus at the same time.
557 */
558void etr_sync_check(void)
559{
560 if (!etr_eacr.es)
561 return;
562 etr_disable_sync_clock(NULL);
563 set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200564 schedule_work(&etr_work);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100565}
566
567/*
568 * ETR external interrupt. There are two causes:
569 * 1) port state change, check the usability of the port
570 * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
571 * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
572 * or ETR-data word 4 (edf4) has changed.
573 */
574static void etr_ext_handler(__u16 code)
575{
576 struct etr_interruption_parameter *intparm =
577 (struct etr_interruption_parameter *) &S390_lowcore.ext_params;
578
579 if (intparm->pc0)
580 /* ETR port 0 state change. */
581 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
582 if (intparm->pc1)
583 /* ETR port 1 state change. */
584 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
585 if (intparm->eai)
586 /*
587 * ETR port alert on either port 0, 1 or both.
588 * Both ports are not up-to-date now.
589 */
590 set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200591 schedule_work(&etr_work);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100592}
593
594static void etr_timeout(unsigned long dummy)
595{
596 set_bit(ETR_EVENT_UPDATE, &etr_events);
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200597 schedule_work(&etr_work);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100598}
599
600/*
601 * Check if the etr mode is pss.
602 */
603static inline int etr_mode_is_pps(struct etr_eacr eacr)
604{
605 return eacr.es && !eacr.sl;
606}
607
608/*
609 * Check if the etr mode is etr.
610 */
611static inline int etr_mode_is_etr(struct etr_eacr eacr)
612{
613 return eacr.es && eacr.sl;
614}
615
616/*
617 * Check if the port can be used for TOD synchronization.
618 * For PPS mode the port has to receive OTEs. For ETR mode
619 * the port has to receive OTEs, the ETR stepping bit has to
620 * be zero and the validity bits for data frame 1, 2, and 3
621 * have to be 1.
622 */
623static int etr_port_valid(struct etr_aib *aib, int port)
624{
625 unsigned int psc;
626
627 /* Check that this port is receiving OTEs. */
628 if (aib->tsp == 0)
629 return 0;
630
631 psc = port ? aib->esw.psc1 : aib->esw.psc0;
632 if (psc == etr_lpsc_pps_mode)
633 return 1;
634 if (psc == etr_lpsc_operational_step)
635 return !aib->esw.y && aib->slsw.v1 &&
636 aib->slsw.v2 && aib->slsw.v3;
637 return 0;
638}
639
640/*
641 * Check if two ports are on the same network.
642 */
643static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
644{
645 // FIXME: any other fields we have to compare?
646 return aib1->edf1.net_id == aib2->edf1.net_id;
647}
648
649/*
650 * Wrapper for etr_stei that converts physical port states
651 * to logical port states to be consistent with the output
652 * of stetr (see etr_psc vs. etr_lpsc).
653 */
654static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
655{
656 BUG_ON(etr_steai(aib, func) != 0);
657 /* Convert port state to logical port state. */
658 if (aib->esw.psc0 == 1)
659 aib->esw.psc0 = 2;
660 else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
661 aib->esw.psc0 = 1;
662 if (aib->esw.psc1 == 1)
663 aib->esw.psc1 = 2;
664 else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
665 aib->esw.psc1 = 1;
666}
667
668/*
669 * Check if the aib a2 is still connected to the same attachment as
670 * aib a1, the etv values differ by one and a2 is valid.
671 */
672static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
673{
674 int state_a1, state_a2;
675
676 /* Paranoia check: e0/e1 should better be the same. */
677 if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
678 a1->esw.eacr.e1 != a2->esw.eacr.e1)
679 return 0;
680
681 /* Still connected to the same etr ? */
682 state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
683 state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
684 if (state_a1 == etr_lpsc_operational_step) {
685 if (state_a2 != etr_lpsc_operational_step ||
686 a1->edf1.net_id != a2->edf1.net_id ||
687 a1->edf1.etr_id != a2->edf1.etr_id ||
688 a1->edf1.etr_pn != a2->edf1.etr_pn)
689 return 0;
690 } else if (state_a2 != etr_lpsc_pps_mode)
691 return 0;
692
693 /* The ETV value of a2 needs to be ETV of a1 + 1. */
694 if (a1->edf2.etv + 1 != a2->edf2.etv)
695 return 0;
696
697 if (!etr_port_valid(a2, p))
698 return 0;
699
700 return 1;
701}
702
703/*
704 * The time is "clock". xtime is what we think the time is.
705 * Adjust the value by a multiple of jiffies and add the delta to ntp.
706 * "delay" is an approximation how long the synchronization took. If
707 * the time correction is positive, then "delay" is subtracted from
708 * the time difference and only the remaining part is passed to ntp.
709 */
710static void etr_adjust_time(unsigned long long clock, unsigned long long delay)
711{
712 unsigned long long delta, ticks;
713 struct timex adjust;
714
715 /*
716 * We don't have to take the xtime lock because the cpu
717 * executing etr_adjust_time is running disabled in
718 * tasklet context and all other cpus are looping in
719 * etr_sync_cpu_start.
720 */
721 if (clock > xtime_cc) {
722 /* It is later than we thought. */
723 delta = ticks = clock - xtime_cc;
724 delta = ticks = (delta < delay) ? 0 : delta - delay;
725 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
726 init_timer_cc = init_timer_cc + delta;
727 jiffies_timer_cc = jiffies_timer_cc + delta;
728 xtime_cc = xtime_cc + delta;
729 adjust.offset = ticks * (1000000 / HZ);
730 } else {
731 /* It is earlier than we thought. */
732 delta = ticks = xtime_cc - clock;
733 delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
734 init_timer_cc = init_timer_cc - delta;
735 jiffies_timer_cc = jiffies_timer_cc - delta;
736 xtime_cc = xtime_cc - delta;
737 adjust.offset = -ticks * (1000000 / HZ);
738 }
739 if (adjust.offset != 0) {
740 printk(KERN_NOTICE "etr: time adjusted by %li micro-seconds\n",
741 adjust.offset);
742 adjust.modes = ADJ_OFFSET_SINGLESHOT;
743 do_adjtimex(&adjust);
744 }
745}
746
747static void etr_sync_cpu_start(void *dummy)
748{
749 int *in_sync = dummy;
750
751 etr_enable_sync_clock();
752 /*
753 * This looks like a busy wait loop but it isn't. etr_sync_cpus
754 * is called on all other cpus while the TOD clocks is stopped.
755 * __udelay will stop the cpu on an enabled wait psw until the
756 * TOD is running again.
757 */
Heiko Carstens6c732de2007-02-21 10:55:15 +0100758 while (*in_sync == 0) {
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100759 __udelay(1);
Heiko Carstens6c732de2007-02-21 10:55:15 +0100760 /*
761 * A different cpu changes *in_sync. Therefore use
762 * barrier() to force memory access.
763 */
764 barrier();
765 }
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100766 if (*in_sync != 1)
767 /* Didn't work. Clear per-cpu in sync bit again. */
768 etr_disable_sync_clock(NULL);
769 /*
770 * This round of TOD syncing is done. Set the clock comparator
771 * to the next tick and let the processor continue.
772 */
773 setup_jiffy_timer();
774}
775
776static void etr_sync_cpu_end(void *dummy)
777{
778}
779
780/*
781 * Sync the TOD clock using the port refered to by aibp. This port
782 * has to be enabled and the other port has to be disabled. The
783 * last eacr update has to be more than 1.6 seconds in the past.
784 */
785static int etr_sync_clock(struct etr_aib *aib, int port)
786{
787 struct etr_aib *sync_port;
788 unsigned long long clock, delay;
789 int in_sync, follows;
790 int rc;
791
792 /* Check if the current aib is adjacent to the sync port aib. */
793 sync_port = (port == 0) ? &etr_port0 : &etr_port1;
794 follows = etr_aib_follows(sync_port, aib, port);
795 memcpy(sync_port, aib, sizeof(*aib));
796 if (!follows)
797 return -EAGAIN;
798
799 /*
800 * Catch all other cpus and make them wait until we have
801 * successfully synced the clock. smp_call_function will
802 * return after all other cpus are in etr_sync_cpu_start.
803 */
804 in_sync = 0;
805 preempt_disable();
806 smp_call_function(etr_sync_cpu_start,&in_sync,0,0);
807 local_irq_disable();
808 etr_enable_sync_clock();
809
810 /* Set clock to next OTE. */
811 __ctl_set_bit(14, 21);
812 __ctl_set_bit(0, 29);
813 clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
814 if (set_clock(clock) == 0) {
815 __udelay(1); /* Wait for the clock to start. */
816 __ctl_clear_bit(0, 29);
817 __ctl_clear_bit(14, 21);
818 etr_stetr(aib);
819 /* Adjust Linux timing variables. */
820 delay = (unsigned long long)
821 (aib->edf2.etv - sync_port->edf2.etv) << 32;
822 etr_adjust_time(clock, delay);
823 setup_jiffy_timer();
824 /* Verify that the clock is properly set. */
825 if (!etr_aib_follows(sync_port, aib, port)) {
826 /* Didn't work. */
827 etr_disable_sync_clock(NULL);
828 in_sync = -EAGAIN;
829 rc = -EAGAIN;
830 } else {
831 in_sync = 1;
832 rc = 0;
833 }
834 } else {
835 /* Could not set the clock ?!? */
836 __ctl_clear_bit(0, 29);
837 __ctl_clear_bit(14, 21);
838 etr_disable_sync_clock(NULL);
839 in_sync = -EAGAIN;
840 rc = -EAGAIN;
841 }
842 local_irq_enable();
843 smp_call_function(etr_sync_cpu_end,NULL,0,0);
844 preempt_enable();
845 return rc;
846}
847
848/*
849 * Handle the immediate effects of the different events.
850 * The port change event is used for online/offline changes.
851 */
852static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
853{
854 if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
855 eacr.es = 0;
856 if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
857 eacr.es = eacr.sl = 0;
858 if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
859 etr_port0_uptodate = etr_port1_uptodate = 0;
860
861 if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
862 if (eacr.e0)
863 /*
864 * Port change of an enabled port. We have to
865 * assume that this can have caused an stepping
866 * port switch.
867 */
868 etr_tolec = get_clock();
869 eacr.p0 = etr_port0_online;
870 if (!eacr.p0)
871 eacr.e0 = 0;
872 etr_port0_uptodate = 0;
873 }
874 if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
875 if (eacr.e1)
876 /*
877 * Port change of an enabled port. We have to
878 * assume that this can have caused an stepping
879 * port switch.
880 */
881 etr_tolec = get_clock();
882 eacr.p1 = etr_port1_online;
883 if (!eacr.p1)
884 eacr.e1 = 0;
885 etr_port1_uptodate = 0;
886 }
887 clear_bit(ETR_EVENT_UPDATE, &etr_events);
888 return eacr;
889}
890
891/*
892 * Set up a timer that expires after the etr_tolec + 1.6 seconds if
893 * one of the ports needs an update.
894 */
895static void etr_set_tolec_timeout(unsigned long long now)
896{
897 unsigned long micros;
898
899 if ((!etr_eacr.p0 || etr_port0_uptodate) &&
900 (!etr_eacr.p1 || etr_port1_uptodate))
901 return;
902 micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
903 micros = (micros > 1600000) ? 0 : 1600000 - micros;
904 mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
905}
906
907/*
908 * Set up a time that expires after 1/2 second.
909 */
910static void etr_set_sync_timeout(void)
911{
912 mod_timer(&etr_timer, jiffies + HZ/2);
913}
914
915/*
916 * Update the aib information for one or both ports.
917 */
918static struct etr_eacr etr_handle_update(struct etr_aib *aib,
919 struct etr_eacr eacr)
920{
921 /* With both ports disabled the aib information is useless. */
922 if (!eacr.e0 && !eacr.e1)
923 return eacr;
924
Martin Schwidefskyecdcc022007-04-27 16:01:58 +0200925 /* Update port0 or port1 with aib stored in etr_work_fn. */
Martin Schwidefskyd54853e2007-02-05 21:18:19 +0100926 if (aib->esw.q == 0) {
927 /* Information for port 0 stored. */
928 if (eacr.p0 && !etr_port0_uptodate) {
929 etr_port0 = *aib;
930 if (etr_port0_online)
931 etr_port0_uptodate = 1;
932 }
933 } else {
934 /* Information for port 1 stored. */
935 if (eacr.p1 && !etr_port1_uptodate) {
936 etr_port1 = *aib;
937 if (etr_port0_online)
938 etr_port1_uptodate = 1;
939 }
940 }
941
942 /*
943 * Do not try to get the alternate port aib if the clock
944 * is not in sync yet.
945 */
946 if (!eacr.es)
947 return eacr;
948
949 /*
950 * If steai is available we can get the information about
951 * the other port immediately. If only stetr is available the
952 * data-port bit toggle has to be used.
953 */
954 if (test_bit(ETR_FLAG_STEAI, &etr_flags)) {
955 if (eacr.p0 && !etr_port0_uptodate) {
956 etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
957 etr_port0_uptodate = 1;
958 }
959 if (eacr.p1 && !etr_port1_uptodate) {
960 etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
961 etr_port1_uptodate = 1;
962 }
963 } else {
964 /*
965 * One port was updated above, if the other
966 * port is not uptodate toggle dp bit.
967 */
968 if ((eacr.p0 && !etr_port0_uptodate) ||
969 (eacr.p1 && !etr_port1_uptodate))
970 eacr.dp ^= 1;
971 else
972 eacr.dp = 0;
973 }
974 return eacr;
975}
976
977/*
978 * Write new etr control register if it differs from the current one.
979 * Return 1 if etr_tolec has been updated as well.
980 */
981static void etr_update_eacr(struct etr_eacr eacr)
982{
983 int dp_changed;
984
985 if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
986 /* No change, return. */
987 return;
988 /*
989 * The disable of an active port of the change of the data port
990 * bit can/will cause a change in the data port.
991 */
992 dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
993 (etr_eacr.dp ^ eacr.dp) != 0;
994 etr_eacr = eacr;
995 etr_setr(&etr_eacr);
996 if (dp_changed)
997 etr_tolec = get_clock();
998}
999
1000/*
1001 * ETR tasklet. In this function you'll find the main logic. In
1002 * particular this is the only function that calls etr_update_eacr(),
1003 * it "controls" the etr control register.
1004 */
Martin Schwidefskyecdcc022007-04-27 16:01:58 +02001005static void etr_work_fn(struct work_struct *work)
Martin Schwidefskyd54853e2007-02-05 21:18:19 +01001006{
1007 unsigned long long now;
1008 struct etr_eacr eacr;
1009 struct etr_aib aib;
1010 int sync_port;
1011
1012 /* Create working copy of etr_eacr. */
1013 eacr = etr_eacr;
1014
1015 /* Check for the different events and their immediate effects. */
1016 eacr = etr_handle_events(eacr);
1017
1018 /* Check if ETR is supposed to be active. */
1019 eacr.ea = eacr.p0 || eacr.p1;
1020 if (!eacr.ea) {
1021 /* Both ports offline. Reset everything. */
1022 eacr.dp = eacr.es = eacr.sl = 0;
1023 on_each_cpu(etr_disable_sync_clock, NULL, 0, 1);
1024 del_timer_sync(&etr_timer);
1025 etr_update_eacr(eacr);
1026 set_bit(ETR_FLAG_EACCES, &etr_flags);
1027 return;
1028 }
1029
1030 /* Store aib to get the current ETR status word. */
1031 BUG_ON(etr_stetr(&aib) != 0);
1032 etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
1033 now = get_clock();
1034
1035 /*
1036 * Update the port information if the last stepping port change
1037 * or data port change is older than 1.6 seconds.
1038 */
1039 if (now >= etr_tolec + (1600000 << 12))
1040 eacr = etr_handle_update(&aib, eacr);
1041
1042 /*
1043 * Select ports to enable. The prefered synchronization mode is PPS.
1044 * If a port can be enabled depends on a number of things:
1045 * 1) The port needs to be online and uptodate. A port is not
1046 * disabled just because it is not uptodate, but it is only
1047 * enabled if it is uptodate.
1048 * 2) The port needs to have the same mode (pps / etr).
1049 * 3) The port needs to be usable -> etr_port_valid() == 1
1050 * 4) To enable the second port the clock needs to be in sync.
1051 * 5) If both ports are useable and are ETR ports, the network id
1052 * has to be the same.
1053 * The eacr.sl bit is used to indicate etr mode vs. pps mode.
1054 */
1055 if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
1056 eacr.sl = 0;
1057 eacr.e0 = 1;
1058 if (!etr_mode_is_pps(etr_eacr))
1059 eacr.es = 0;
1060 if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
1061 eacr.e1 = 0;
1062 // FIXME: uptodate checks ?
1063 else if (etr_port0_uptodate && etr_port1_uptodate)
1064 eacr.e1 = 1;
1065 sync_port = (etr_port0_uptodate &&
1066 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1067 clear_bit(ETR_FLAG_EACCES, &etr_flags);
1068 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
1069 eacr.sl = 0;
1070 eacr.e0 = 0;
1071 eacr.e1 = 1;
1072 if (!etr_mode_is_pps(etr_eacr))
1073 eacr.es = 0;
1074 sync_port = (etr_port1_uptodate &&
1075 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1076 clear_bit(ETR_FLAG_EACCES, &etr_flags);
1077 } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
1078 eacr.sl = 1;
1079 eacr.e0 = 1;
1080 if (!etr_mode_is_etr(etr_eacr))
1081 eacr.es = 0;
1082 if (!eacr.es || !eacr.p1 ||
1083 aib.esw.psc1 != etr_lpsc_operational_alt)
1084 eacr.e1 = 0;
1085 else if (etr_port0_uptodate && etr_port1_uptodate &&
1086 etr_compare_network(&etr_port0, &etr_port1))
1087 eacr.e1 = 1;
1088 sync_port = (etr_port0_uptodate &&
1089 etr_port_valid(&etr_port0, 0)) ? 0 : -1;
1090 clear_bit(ETR_FLAG_EACCES, &etr_flags);
1091 } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
1092 eacr.sl = 1;
1093 eacr.e0 = 0;
1094 eacr.e1 = 1;
1095 if (!etr_mode_is_etr(etr_eacr))
1096 eacr.es = 0;
1097 sync_port = (etr_port1_uptodate &&
1098 etr_port_valid(&etr_port1, 1)) ? 1 : -1;
1099 clear_bit(ETR_FLAG_EACCES, &etr_flags);
1100 } else {
1101 /* Both ports not usable. */
1102 eacr.es = eacr.sl = 0;
1103 sync_port = -1;
1104 set_bit(ETR_FLAG_EACCES, &etr_flags);
1105 }
1106
1107 /*
1108 * If the clock is in sync just update the eacr and return.
1109 * If there is no valid sync port wait for a port update.
1110 */
1111 if (eacr.es || sync_port < 0) {
1112 etr_update_eacr(eacr);
1113 etr_set_tolec_timeout(now);
1114 return;
1115 }
1116
1117 /*
1118 * Prepare control register for clock syncing
1119 * (reset data port bit, set sync check control.
1120 */
1121 eacr.dp = 0;
1122 eacr.es = 1;
1123
1124 /*
1125 * Update eacr and try to synchronize the clock. If the update
1126 * of eacr caused a stepping port switch (or if we have to
1127 * assume that a stepping port switch has occured) or the
1128 * clock syncing failed, reset the sync check control bit
1129 * and set up a timer to try again after 0.5 seconds
1130 */
1131 etr_update_eacr(eacr);
1132 if (now < etr_tolec + (1600000 << 12) ||
1133 etr_sync_clock(&aib, sync_port) != 0) {
1134 /* Sync failed. Try again in 1/2 second. */
1135 eacr.es = 0;
1136 etr_update_eacr(eacr);
1137 etr_set_sync_timeout();
1138 } else
1139 etr_set_tolec_timeout(now);
1140}
1141
1142/*
1143 * Sysfs interface functions
1144 */
1145static struct sysdev_class etr_sysclass = {
Kay Sieversaf5ca3f2007-12-20 02:09:39 +01001146 .name = "etr",
Martin Schwidefskyd54853e2007-02-05 21:18:19 +01001147};
1148
1149static struct sys_device etr_port0_dev = {
1150 .id = 0,
1151 .cls = &etr_sysclass,
1152};
1153
1154static struct sys_device etr_port1_dev = {
1155 .id = 1,
1156 .cls = &etr_sysclass,
1157};
1158
1159/*
1160 * ETR class attributes
1161 */
1162static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
1163{
1164 return sprintf(buf, "%i\n", etr_port0.esw.p);
1165}
1166
1167static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
1168
1169static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
1170{
1171 char *mode_str;
1172
1173 if (etr_mode_is_pps(etr_eacr))
1174 mode_str = "pps";
1175 else if (etr_mode_is_etr(etr_eacr))
1176 mode_str = "etr";
1177 else
1178 mode_str = "local";
1179 return sprintf(buf, "%s\n", mode_str);
1180}
1181
1182static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
1183
1184/*
1185 * ETR port attributes
1186 */
1187static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
1188{
1189 if (dev == &etr_port0_dev)
1190 return etr_port0_online ? &etr_port0 : NULL;
1191 else
1192 return etr_port1_online ? &etr_port1 : NULL;
1193}
1194
1195static ssize_t etr_online_show(struct sys_device *dev, char *buf)
1196{
1197 unsigned int online;
1198
1199 online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
1200 return sprintf(buf, "%i\n", online);
1201}
1202
1203static ssize_t etr_online_store(struct sys_device *dev,
1204 const char *buf, size_t count)
1205{
1206 unsigned int value;
1207
1208 value = simple_strtoul(buf, NULL, 0);
1209 if (value != 0 && value != 1)
1210 return -EINVAL;
1211 if (test_bit(ETR_FLAG_ENOSYS, &etr_flags))
1212 return -ENOSYS;
1213 if (dev == &etr_port0_dev) {
1214 if (etr_port0_online == value)
1215 return count; /* Nothing to do. */
1216 etr_port0_online = value;
1217 set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
Martin Schwidefskyecdcc022007-04-27 16:01:58 +02001218 schedule_work(&etr_work);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +01001219 } else {
1220 if (etr_port1_online == value)
1221 return count; /* Nothing to do. */
1222 etr_port1_online = value;
1223 set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
Martin Schwidefskyecdcc022007-04-27 16:01:58 +02001224 schedule_work(&etr_work);
Martin Schwidefskyd54853e2007-02-05 21:18:19 +01001225 }
1226 return count;
1227}
1228
1229static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
1230
1231static ssize_t etr_stepping_control_show(struct sys_device *dev, char *buf)
1232{
1233 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1234 etr_eacr.e0 : etr_eacr.e1);
1235}
1236
1237static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
1238
1239static ssize_t etr_mode_code_show(struct sys_device *dev, char *buf)
1240{
1241 if (!etr_port0_online && !etr_port1_online)
1242 /* Status word is not uptodate if both ports are offline. */
1243 return -ENODATA;
1244 return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
1245 etr_port0.esw.psc0 : etr_port0.esw.psc1);
1246}
1247
1248static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
1249
1250static ssize_t etr_untuned_show(struct sys_device *dev, char *buf)
1251{
1252 struct etr_aib *aib = etr_aib_from_dev(dev);
1253
1254 if (!aib || !aib->slsw.v1)
1255 return -ENODATA;
1256 return sprintf(buf, "%i\n", aib->edf1.u);
1257}
1258
1259static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
1260
1261static ssize_t etr_network_id_show(struct sys_device *dev, char *buf)
1262{
1263 struct etr_aib *aib = etr_aib_from_dev(dev);
1264
1265 if (!aib || !aib->slsw.v1)
1266 return -ENODATA;
1267 return sprintf(buf, "%i\n", aib->edf1.net_id);
1268}
1269
1270static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
1271
1272static ssize_t etr_id_show(struct sys_device *dev, char *buf)
1273{
1274 struct etr_aib *aib = etr_aib_from_dev(dev);
1275
1276 if (!aib || !aib->slsw.v1)
1277 return -ENODATA;
1278 return sprintf(buf, "%i\n", aib->edf1.etr_id);
1279}
1280
1281static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
1282
1283static ssize_t etr_port_number_show(struct sys_device *dev, char *buf)
1284{
1285 struct etr_aib *aib = etr_aib_from_dev(dev);
1286
1287 if (!aib || !aib->slsw.v1)
1288 return -ENODATA;
1289 return sprintf(buf, "%i\n", aib->edf1.etr_pn);
1290}
1291
1292static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
1293
1294static ssize_t etr_coupled_show(struct sys_device *dev, char *buf)
1295{
1296 struct etr_aib *aib = etr_aib_from_dev(dev);
1297
1298 if (!aib || !aib->slsw.v3)
1299 return -ENODATA;
1300 return sprintf(buf, "%i\n", aib->edf3.c);
1301}
1302
1303static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
1304
1305static ssize_t etr_local_time_show(struct sys_device *dev, char *buf)
1306{
1307 struct etr_aib *aib = etr_aib_from_dev(dev);
1308
1309 if (!aib || !aib->slsw.v3)
1310 return -ENODATA;
1311 return sprintf(buf, "%i\n", aib->edf3.blto);
1312}
1313
1314static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
1315
1316static ssize_t etr_utc_offset_show(struct sys_device *dev, char *buf)
1317{
1318 struct etr_aib *aib = etr_aib_from_dev(dev);
1319
1320 if (!aib || !aib->slsw.v3)
1321 return -ENODATA;
1322 return sprintf(buf, "%i\n", aib->edf3.buo);
1323}
1324
1325static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
1326
1327static struct sysdev_attribute *etr_port_attributes[] = {
1328 &attr_online,
1329 &attr_stepping_control,
1330 &attr_state_code,
1331 &attr_untuned,
1332 &attr_network,
1333 &attr_id,
1334 &attr_port,
1335 &attr_coupled,
1336 &attr_local_time,
1337 &attr_utc_offset,
1338 NULL
1339};
1340
1341static int __init etr_register_port(struct sys_device *dev)
1342{
1343 struct sysdev_attribute **attr;
1344 int rc;
1345
1346 rc = sysdev_register(dev);
1347 if (rc)
1348 goto out;
1349 for (attr = etr_port_attributes; *attr; attr++) {
1350 rc = sysdev_create_file(dev, *attr);
1351 if (rc)
1352 goto out_unreg;
1353 }
1354 return 0;
1355out_unreg:
1356 for (; attr >= etr_port_attributes; attr--)
1357 sysdev_remove_file(dev, *attr);
1358 sysdev_unregister(dev);
1359out:
1360 return rc;
1361}
1362
1363static void __init etr_unregister_port(struct sys_device *dev)
1364{
1365 struct sysdev_attribute **attr;
1366
1367 for (attr = etr_port_attributes; *attr; attr++)
1368 sysdev_remove_file(dev, *attr);
1369 sysdev_unregister(dev);
1370}
1371
1372static int __init etr_init_sysfs(void)
1373{
1374 int rc;
1375
1376 rc = sysdev_class_register(&etr_sysclass);
1377 if (rc)
1378 goto out;
1379 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
1380 if (rc)
1381 goto out_unreg_class;
1382 rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
1383 if (rc)
1384 goto out_remove_stepping_port;
1385 rc = etr_register_port(&etr_port0_dev);
1386 if (rc)
1387 goto out_remove_stepping_mode;
1388 rc = etr_register_port(&etr_port1_dev);
1389 if (rc)
1390 goto out_remove_port0;
1391 return 0;
1392
1393out_remove_port0:
1394 etr_unregister_port(&etr_port0_dev);
1395out_remove_stepping_mode:
1396 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
1397out_remove_stepping_port:
1398 sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
1399out_unreg_class:
1400 sysdev_class_unregister(&etr_sysclass);
1401out:
1402 return rc;
1403}
1404
1405device_initcall(etr_init_sysfs);