| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * Basic EISA bus support for the SGI Indigo-2. | 
|  | 3 | * | 
|  | 4 | * (C) 2002 Pascal Dameme <netinet@freesurf.fr> | 
|  | 5 | *      and Marc Zyngier <mzyngier@freesurf.fr> | 
|  | 6 | * | 
|  | 7 | * This code is released under both the GPL version 2 and BSD | 
|  | 8 | * licenses.  Either license may be used. | 
|  | 9 | * | 
|  | 10 | * This code offers a very basic support for this EISA bus present in | 
|  | 11 | * the SGI Indigo-2. It currently only supports PIO (forget about DMA | 
|  | 12 | * for the time being). This is enough for a low-end ethernet card, | 
|  | 13 | * but forget about your favorite SCSI card... | 
|  | 14 | * | 
|  | 15 | * TODO : | 
|  | 16 | * - Fix bugs... | 
|  | 17 | * - Add ISA support | 
|  | 18 | * - Add DMA (yeah, right...). | 
|  | 19 | * - Fix more bugs. | 
|  | 20 | */ | 
|  | 21 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | #include <linux/eisa.h> | 
|  | 23 | #include <linux/types.h> | 
|  | 24 | #include <linux/init.h> | 
|  | 25 | #include <linux/irq.h> | 
|  | 26 | #include <linux/kernel_stat.h> | 
|  | 27 | #include <linux/signal.h> | 
|  | 28 | #include <linux/sched.h> | 
|  | 29 | #include <linux/interrupt.h> | 
|  | 30 | #include <linux/delay.h> | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 31 | #include <asm/io.h> | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | #include <asm/irq.h> | 
|  | 33 | #include <asm/mipsregs.h> | 
|  | 34 | #include <asm/addrspace.h> | 
|  | 35 | #include <asm/processor.h> | 
|  | 36 | #include <asm/sgi/ioc.h> | 
|  | 37 | #include <asm/sgi/mc.h> | 
|  | 38 | #include <asm/sgi/ip22.h> | 
|  | 39 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 40 | /* I2 has four EISA slots. */ | 
|  | 41 | #define IP22_EISA_MAX_SLOTS	  4 | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 42 | #define EISA_MAX_IRQ             16 | 
|  | 43 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 44 | #define EIU_MODE_REG     0x0001ffc0 | 
|  | 45 | #define EIU_STAT_REG     0x0001ffc4 | 
|  | 46 | #define EIU_PREMPT_REG   0x0001ffc8 | 
|  | 47 | #define EIU_QUIET_REG    0x0001ffcc | 
|  | 48 | #define EIU_INTRPT_ACK   0x00010004 | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 49 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 50 | static char __init *decode_eisa_sig(unsigned long addr) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 51 | { | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 52 | static char sig_str[EISA_SIG_LEN]; | 
|  | 53 | u8 sig[4]; | 
|  | 54 | u16 rev; | 
|  | 55 | int i; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 56 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 57 | for (i = 0; i < 4; i++) { | 
|  | 58 | sig[i] = inb (addr + i); | 
|  | 59 |  | 
|  | 60 | if (!i && (sig[0] & 0x80)) | 
|  | 61 | return NULL; | 
|  | 62 | } | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 |  | 
|  | 64 | sig_str[0] = ((sig[0] >> 2) & 0x1f) + ('A' - 1); | 
|  | 65 | sig_str[1] = (((sig[0] & 3) << 3) | (sig[1] >> 5)) + ('A' - 1); | 
|  | 66 | sig_str[2] = (sig[1] & 0x1f) + ('A' - 1); | 
|  | 67 | rev = (sig[2] << 8) | sig[3]; | 
|  | 68 | sprintf(sig_str + 3, "%04X", rev); | 
|  | 69 |  | 
|  | 70 | return sig_str; | 
|  | 71 | } | 
|  | 72 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 73 | static irqreturn_t ip22_eisa_intr(int irq, void *dev_id, struct pt_regs *regs) | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | { | 
|  | 75 | u8 eisa_irq; | 
|  | 76 | u8 dma1, dma2; | 
|  | 77 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 78 | eisa_irq = inb(EIU_INTRPT_ACK); | 
|  | 79 | dma1 = inb(EISA_DMA1_STATUS); | 
|  | 80 | dma2 = inb(EISA_DMA2_STATUS); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 81 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 82 | if (eisa_irq < EISA_MAX_IRQ) { | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 83 | do_IRQ(eisa_irq, regs); | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 84 | return IRQ_HANDLED; | 
|  | 85 | } | 
|  | 86 |  | 
|  | 87 | /* Oops, Bad Stuff Happened... */ | 
|  | 88 | printk(KERN_ERR "eisa_irq %d out of bound\n", eisa_irq); | 
|  | 89 |  | 
|  | 90 | outb(0x20, EISA_INT2_CTRL); | 
|  | 91 | outb(0x20, EISA_INT1_CTRL); | 
|  | 92 | return IRQ_NONE; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 93 | } | 
|  | 94 |  | 
|  | 95 | static void enable_eisa1_irq(unsigned int irq) | 
|  | 96 | { | 
|  | 97 | unsigned long flags; | 
|  | 98 | u8 mask; | 
|  | 99 |  | 
|  | 100 | local_irq_save(flags); | 
|  | 101 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 102 | mask = inb(EISA_INT1_MASK); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 103 | mask &= ~((u8) (1 << irq)); | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 104 | outb(mask, EISA_INT1_MASK); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 105 |  | 
|  | 106 | local_irq_restore(flags); | 
|  | 107 | } | 
|  | 108 |  | 
|  | 109 | static unsigned int startup_eisa1_irq(unsigned int irq) | 
|  | 110 | { | 
|  | 111 | u8 edge; | 
|  | 112 |  | 
|  | 113 | /* Only use edge interrupts for EISA */ | 
|  | 114 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 115 | edge = inb(EISA_INT1_EDGE_LEVEL); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 116 | edge &= ~((u8) (1 << irq)); | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 117 | outb(edge, EISA_INT1_EDGE_LEVEL); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 |  | 
|  | 119 | enable_eisa1_irq(irq); | 
|  | 120 | return 0; | 
|  | 121 | } | 
|  | 122 |  | 
|  | 123 | static void disable_eisa1_irq(unsigned int irq) | 
|  | 124 | { | 
|  | 125 | u8 mask; | 
|  | 126 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 127 | mask = inb(EISA_INT1_MASK); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | mask |= ((u8) (1 << irq)); | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 129 | outb(mask, EISA_INT1_MASK); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 130 | } | 
|  | 131 |  | 
|  | 132 | #define shutdown_eisa1_irq	disable_eisa1_irq | 
|  | 133 |  | 
|  | 134 | static void mask_and_ack_eisa1_irq(unsigned int irq) | 
|  | 135 | { | 
|  | 136 | disable_eisa1_irq(irq); | 
|  | 137 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 138 | outb(0x20, EISA_INT1_CTRL); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | } | 
|  | 140 |  | 
|  | 141 | static void end_eisa1_irq(unsigned int irq) | 
|  | 142 | { | 
|  | 143 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 
|  | 144 | enable_eisa1_irq(irq); | 
|  | 145 | } | 
|  | 146 |  | 
| Ralf Baechle | 94dee17 | 2006-07-02 14:41:42 +0100 | [diff] [blame] | 147 | static struct irq_chip ip22_eisa1_irq_type = { | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 148 | .typename	= "IP22 EISA", | 
|  | 149 | .startup	= startup_eisa1_irq, | 
|  | 150 | .shutdown	= shutdown_eisa1_irq, | 
|  | 151 | .enable		= enable_eisa1_irq, | 
|  | 152 | .disable	= disable_eisa1_irq, | 
|  | 153 | .ack		= mask_and_ack_eisa1_irq, | 
|  | 154 | .end		= end_eisa1_irq, | 
|  | 155 | }; | 
|  | 156 |  | 
|  | 157 | static void enable_eisa2_irq(unsigned int irq) | 
|  | 158 | { | 
|  | 159 | unsigned long flags; | 
|  | 160 | u8 mask; | 
|  | 161 |  | 
|  | 162 | local_irq_save(flags); | 
|  | 163 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 164 | mask = inb(EISA_INT2_MASK); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 165 | mask &= ~((u8) (1 << (irq - 8))); | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 166 | outb(mask, EISA_INT2_MASK); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 167 |  | 
|  | 168 | local_irq_restore(flags); | 
|  | 169 | } | 
|  | 170 |  | 
|  | 171 | static unsigned int startup_eisa2_irq(unsigned int irq) | 
|  | 172 | { | 
|  | 173 | u8 edge; | 
|  | 174 |  | 
|  | 175 | /* Only use edge interrupts for EISA */ | 
|  | 176 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 177 | edge = inb(EISA_INT2_EDGE_LEVEL); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 178 | edge &= ~((u8) (1 << (irq - 8))); | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 179 | outb(edge, EISA_INT2_EDGE_LEVEL); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 180 |  | 
|  | 181 | enable_eisa2_irq(irq); | 
|  | 182 | return 0; | 
|  | 183 | } | 
|  | 184 |  | 
|  | 185 | static void disable_eisa2_irq(unsigned int irq) | 
|  | 186 | { | 
|  | 187 | u8 mask; | 
|  | 188 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 189 | mask = inb(EISA_INT2_MASK); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 190 | mask |= ((u8) (1 << (irq - 8))); | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 191 | outb(mask, EISA_INT2_MASK); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 192 | } | 
|  | 193 |  | 
|  | 194 | #define shutdown_eisa2_irq	disable_eisa2_irq | 
|  | 195 |  | 
|  | 196 | static void mask_and_ack_eisa2_irq(unsigned int irq) | 
|  | 197 | { | 
|  | 198 | disable_eisa2_irq(irq); | 
|  | 199 |  | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 200 | outb(0x20, EISA_INT2_CTRL); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 201 | } | 
|  | 202 |  | 
|  | 203 | static void end_eisa2_irq(unsigned int irq) | 
|  | 204 | { | 
|  | 205 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | 
|  | 206 | enable_eisa2_irq(irq); | 
|  | 207 | } | 
|  | 208 |  | 
| Ralf Baechle | 94dee17 | 2006-07-02 14:41:42 +0100 | [diff] [blame] | 209 | static struct irq_chip ip22_eisa2_irq_type = { | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 210 | .typename	= "IP22 EISA", | 
|  | 211 | .startup	= startup_eisa2_irq, | 
|  | 212 | .shutdown	= shutdown_eisa2_irq, | 
|  | 213 | .enable		= enable_eisa2_irq, | 
|  | 214 | .disable	= disable_eisa2_irq, | 
|  | 215 | .ack		= mask_and_ack_eisa2_irq, | 
|  | 216 | .end		= end_eisa2_irq, | 
|  | 217 | }; | 
|  | 218 |  | 
|  | 219 | static struct irqaction eisa_action = { | 
|  | 220 | .handler	= ip22_eisa_intr, | 
|  | 221 | .name		= "EISA", | 
|  | 222 | }; | 
|  | 223 |  | 
|  | 224 | static struct irqaction cascade_action = { | 
|  | 225 | .handler	= no_action, | 
|  | 226 | .name		= "EISA cascade", | 
|  | 227 | }; | 
|  | 228 |  | 
|  | 229 | int __init ip22_eisa_init(void) | 
|  | 230 | { | 
|  | 231 | int i, c; | 
|  | 232 | char *str; | 
| Ralf Baechle | 42a3b4f | 2005-09-03 15:56:17 -0700 | [diff] [blame] | 233 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 234 | if (!(sgimc->systemid & SGIMC_SYSID_EPRESENT)) { | 
|  | 235 | printk(KERN_INFO "EISA: bus not present.\n"); | 
|  | 236 | return 1; | 
|  | 237 | } | 
|  | 238 |  | 
|  | 239 | printk(KERN_INFO "EISA: Probing bus...\n"); | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 240 | for (c = 0, i = 1; i <= IP22_EISA_MAX_SLOTS; i++) { | 
|  | 241 | if ((str = decode_eisa_sig(0x1000 * i + EISA_VENDOR_ID_OFFSET))) { | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 242 | printk(KERN_INFO "EISA: slot %d : %s detected.\n", | 
|  | 243 | i, str); | 
|  | 244 | c++; | 
|  | 245 | } | 
|  | 246 | } | 
|  | 247 | printk(KERN_INFO "EISA: Detected %d card%s.\n", c, c < 2 ? "" : "s"); | 
|  | 248 | #ifdef CONFIG_ISA | 
|  | 249 | printk(KERN_INFO "ISA support compiled in.\n"); | 
|  | 250 | #endif | 
|  | 251 |  | 
|  | 252 | /* Warning : BlackMagicAhead(tm). | 
|  | 253 | Please wave your favorite dead chicken over the busses */ | 
|  | 254 |  | 
|  | 255 | /* First say hello to the EIU */ | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 256 | outl(0x0000FFFF, EIU_PREMPT_REG); | 
|  | 257 | outl(1, EIU_QUIET_REG); | 
|  | 258 | outl(0x40f3c07F, EIU_MODE_REG); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 |  | 
|  | 260 | /* Now be nice to the EISA chipset */ | 
| Thiemo Seufer | 37c8c64 | 2005-08-31 15:55:16 +0000 | [diff] [blame] | 261 | outb(1, EISA_EXT_NMI_RESET_CTRL); | 
|  | 262 | udelay(50);	/* Wait long enough for the dust to settle */ | 
|  | 263 | outb(0, EISA_EXT_NMI_RESET_CTRL); | 
|  | 264 | outb(0x11, EISA_INT1_CTRL); | 
|  | 265 | outb(0x11, EISA_INT2_CTRL); | 
|  | 266 | outb(0, EISA_INT1_MASK); | 
|  | 267 | outb(8, EISA_INT2_MASK); | 
|  | 268 | outb(4, EISA_INT1_MASK); | 
|  | 269 | outb(2, EISA_INT2_MASK); | 
|  | 270 | outb(1, EISA_INT1_MASK); | 
|  | 271 | outb(1, EISA_INT2_MASK); | 
|  | 272 | outb(0xfb, EISA_INT1_MASK); | 
|  | 273 | outb(0xff, EISA_INT2_MASK); | 
|  | 274 | outb(0, EISA_DMA2_WRITE_SINGLE); | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 275 |  | 
|  | 276 | for (i = SGINT_EISA; i < (SGINT_EISA + EISA_MAX_IRQ); i++) { | 
|  | 277 | irq_desc[i].status = IRQ_DISABLED; | 
|  | 278 | irq_desc[i].action = 0; | 
|  | 279 | irq_desc[i].depth = 1; | 
|  | 280 | if (i < (SGINT_EISA + 8)) | 
| Ingo Molnar | d1bef4e | 2006-06-29 02:24:36 -0700 | [diff] [blame] | 281 | irq_desc[i].chip = &ip22_eisa1_irq_type; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | else | 
| Ingo Molnar | d1bef4e | 2006-06-29 02:24:36 -0700 | [diff] [blame] | 283 | irq_desc[i].chip = &ip22_eisa2_irq_type; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 284 | } | 
|  | 285 |  | 
|  | 286 | /* Cannot use request_irq because of kmalloc not being ready at such | 
|  | 287 | * an early stage. Yes, I've been bitten... */ | 
|  | 288 | setup_irq(SGI_EISA_IRQ, &eisa_action); | 
|  | 289 | setup_irq(SGINT_EISA + 2, &cascade_action); | 
|  | 290 |  | 
|  | 291 | EISA_bus = 1; | 
|  | 292 | return 0; | 
|  | 293 | } |