| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * arch/sh/drivers/pci/ops-snapgear.c | 
|  | 3 | * | 
|  | 4 | * Author:  David McCullough <davidm@snapgear.com> | 
|  | 5 | * | 
|  | 6 | * Ported to new API by Paul Mundt <lethal@linux-sh.org> | 
|  | 7 | * | 
|  | 8 | * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. | 
|  | 9 | * | 
|  | 10 | * May be copied or modified under the terms of the GNU General Public | 
|  | 11 | * License.  See linux/COPYING for more information. | 
|  | 12 | * | 
|  | 13 | * PCI initialization for the SnapGear boards | 
|  | 14 | */ | 
|  | 15 |  | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | #include <linux/kernel.h> | 
|  | 17 | #include <linux/types.h> | 
|  | 18 | #include <linux/init.h> | 
|  | 19 | #include <linux/delay.h> | 
|  | 20 | #include <linux/pci.h> | 
|  | 21 |  | 
|  | 22 | #include <asm/io.h> | 
|  | 23 | #include "pci-sh7751.h" | 
|  | 24 |  | 
|  | 25 | #define SNAPGEAR_PCI_IO		0x4000 | 
|  | 26 | #define SNAPGEAR_PCI_MEM	0xfd000000 | 
|  | 27 |  | 
|  | 28 | /* PCI: default LOCAL memory window sizes (seen from PCI bus) */ | 
|  | 29 | #define SNAPGEAR_LSR0_SIZE    (64*(1<<20)) //64MB | 
|  | 30 | #define SNAPGEAR_LSR1_SIZE    (64*(1<<20)) //64MB | 
|  | 31 |  | 
|  | 32 | static struct resource sh7751_io_resource = { | 
|  | 33 | .name		= "SH7751 IO", | 
|  | 34 | .start		= SNAPGEAR_PCI_IO, | 
|  | 35 | .end		= SNAPGEAR_PCI_IO + (64*1024) - 1, /* 64KiB I/O */ | 
|  | 36 | .flags		= IORESOURCE_IO, | 
|  | 37 | }; | 
|  | 38 |  | 
|  | 39 | static struct resource sh7751_mem_resource = { | 
|  | 40 | .name		= "SH7751 mem", | 
|  | 41 | .start		= SNAPGEAR_PCI_MEM, | 
|  | 42 | .end		= SNAPGEAR_PCI_MEM + (64*1024*1024) - 1, /* 64MiB mem */ | 
|  | 43 | .flags		= IORESOURCE_MEM, | 
|  | 44 | }; | 
|  | 45 |  | 
|  | 46 | extern struct pci_ops sh7751_pci_ops; | 
|  | 47 |  | 
|  | 48 | struct pci_channel board_pci_channels[] = { | 
|  | 49 | { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff }, | 
|  | 50 | { 0, } | 
|  | 51 | }; | 
|  | 52 |  | 
|  | 53 | static struct sh7751_pci_address_map sh7751_pci_map = { | 
|  | 54 | .window0	= { | 
|  | 55 | .base	= SH7751_CS2_BASE_ADDR, | 
|  | 56 | .size	= SNAPGEAR_LSR0_SIZE, | 
|  | 57 | }, | 
|  | 58 |  | 
|  | 59 | .window1	= { | 
|  | 60 | .base	= SH7751_CS2_BASE_ADDR, | 
|  | 61 | .size	= SNAPGEAR_LSR1_SIZE, | 
|  | 62 | }, | 
|  | 63 |  | 
|  | 64 | .flags	= SH7751_PCIC_NO_RESET, | 
|  | 65 | }; | 
|  | 66 |  | 
|  | 67 | /* | 
|  | 68 | * Initialize the SnapGear PCI interface | 
|  | 69 | * Setup hardware to be Central Funtion | 
|  | 70 | * Copy the BSR regs to the PCI interface | 
|  | 71 | * Setup PCI windows into local RAM | 
|  | 72 | */ | 
|  | 73 | int __init pcibios_init_platform(void) | 
|  | 74 | { | 
|  | 75 | return sh7751_pcic_init(&sh7751_pci_map); | 
|  | 76 | } | 
|  | 77 |  | 
|  | 78 | int __init pcibios_map_platform_irq(u8 slot, u8 pin) | 
|  | 79 | { | 
|  | 80 | int irq = -1; | 
|  | 81 |  | 
|  | 82 | switch (slot) { | 
|  | 83 | case 8:  /* the PCI bridge */ break; | 
|  | 84 | case 11: irq = 8;  break; /* USB    */ | 
|  | 85 | case 12: irq = 11; break; /* PCMCIA */ | 
|  | 86 | case 13: irq = 5;  break; /* eth0   */ | 
|  | 87 | case 14: irq = 8;  break; /* eth1   */ | 
|  | 88 | case 15: irq = 11; break; /* safenet (unused) */ | 
|  | 89 | } | 
|  | 90 |  | 
|  | 91 | printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n", | 
|  | 92 | slot, pin - 1 + 'A', irq); | 
|  | 93 |  | 
|  | 94 | return irq; | 
|  | 95 | } | 
|  | 96 |  | 
|  | 97 | void __init pcibios_fixup(void) | 
|  | 98 | { | 
|  | 99 | /* Nothing to fixup .. */ | 
|  | 100 | } | 
|  | 101 |  |