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Stephen Rothwell78b09732005-11-19 01:40:46 +11001/*
2 * Copyright (C) 2004 IBM
3 *
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
6 */
7#ifndef _ASM_DMA_MAPPING_H
8#define _ASM_DMA_MAPPING_H
Arnd Bergmann88ced032005-12-16 22:43:46 +01009#ifdef __KERNEL__
Stephen Rothwell78b09732005-11-19 01:40:46 +110010
Stephen Rothwell78b09732005-11-19 01:40:46 +110011#include <linux/types.h>
12#include <linux/cache.h>
13/* need struct page definitions */
14#include <linux/mm.h>
15#include <asm/scatterlist.h>
16#include <asm/io.h>
Stephen Rothwell78b09732005-11-19 01:40:46 +110017
18#define DMA_ERROR_CODE (~(dma_addr_t)0x0)
19
20#ifdef CONFIG_NOT_COHERENT_CACHE
21/*
22 * DMA-consistent mapping functions for PowerPCs that don't support
23 * cache snooping. These allocate/free a region of uncached mapped
24 * memory space for use with DMA devices. Alternatively, you could
25 * allocate the space "normally" and use the cache management functions
26 * to ensure it is consistent.
27 */
28extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
29extern void __dma_free_coherent(size_t size, void *vaddr);
30extern void __dma_sync(void *vaddr, size_t size, int direction);
31extern void __dma_sync_page(struct page *page, unsigned long offset,
32 size_t size, int direction);
33
34#else /* ! CONFIG_NOT_COHERENT_CACHE */
35/*
36 * Cache coherent cores.
37 */
38
39#define __dma_alloc_coherent(gfp, size, handle) NULL
40#define __dma_free_coherent(size, addr) do { } while (0)
41#define __dma_sync(addr, size, rw) do { } while (0)
42#define __dma_sync_page(pg, off, sz, rw) do { } while (0)
43
44#endif /* ! CONFIG_NOT_COHERENT_CACHE */
45
46#ifdef CONFIG_PPC64
Benjamin Herrenschmidt12d04ee2006-11-11 17:25:02 +110047/*
48 * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
49 */
50struct dma_mapping_ops {
51 void * (*alloc_coherent)(struct device *dev, size_t size,
52 dma_addr_t *dma_handle, gfp_t flag);
53 void (*free_coherent)(struct device *dev, size_t size,
54 void *vaddr, dma_addr_t dma_handle);
55 dma_addr_t (*map_single)(struct device *dev, void *ptr,
56 size_t size, enum dma_data_direction direction);
57 void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
58 size_t size, enum dma_data_direction direction);
59 int (*map_sg)(struct device *dev, struct scatterlist *sg,
60 int nents, enum dma_data_direction direction);
61 void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
62 int nents, enum dma_data_direction direction);
63 int (*dma_supported)(struct device *dev, u64 mask);
64 int (*dac_dma_supported)(struct device *dev, u64 mask);
65 int (*set_dma_mask)(struct device *dev, u64 dma_mask);
66};
Stephen Rothwell78b09732005-11-19 01:40:46 +110067
Benjamin Herrenschmidt12d04ee2006-11-11 17:25:02 +110068static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
69{
70 /* We don't handle the NULL dev case for ISA for now. We could
71 * do it via an out of line call but it is not needed for now. The
72 * only ISA DMA device we support is the floppy and we have a hack
73 * in the floppy driver directly to get a device for us.
74 */
75 if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL))
76 return NULL;
77 return dev->archdata.dma_ops;
78}
79
80static inline int dma_supported(struct device *dev, u64 mask)
81{
82 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
83
84 if (unlikely(dma_ops == NULL))
85 return 0;
86 if (dma_ops->dma_supported == NULL)
87 return 1;
88 return dma_ops->dma_supported(dev, mask);
89}
90
91static inline int dma_set_mask(struct device *dev, u64 dma_mask)
92{
93 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
94
95 if (unlikely(dma_ops == NULL))
96 return -EIO;
97 if (dma_ops->set_dma_mask != NULL)
98 return dma_ops->set_dma_mask(dev, dma_mask);
99 if (!dev->dma_mask || !dma_supported(dev, *dev->dma_mask))
100 return -EIO;
101 *dev->dma_mask = dma_mask;
102 return 0;
103}
104
105static inline void *dma_alloc_coherent(struct device *dev, size_t size,
106 dma_addr_t *dma_handle, gfp_t flag)
107{
108 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
109
110 BUG_ON(!dma_ops);
111 return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
112}
113
114static inline void dma_free_coherent(struct device *dev, size_t size,
115 void *cpu_addr, dma_addr_t dma_handle)
116{
117 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
118
119 BUG_ON(!dma_ops);
120 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
121}
122
123static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
124 size_t size,
125 enum dma_data_direction direction)
126{
127 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
128
129 BUG_ON(!dma_ops);
130 return dma_ops->map_single(dev, cpu_addr, size, direction);
131}
132
133static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
134 size_t size,
135 enum dma_data_direction direction)
136{
137 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
138
139 BUG_ON(!dma_ops);
140 dma_ops->unmap_single(dev, dma_addr, size, direction);
141}
142
143static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
144 unsigned long offset, size_t size,
145 enum dma_data_direction direction)
146{
147 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
148
149 BUG_ON(!dma_ops);
150 return dma_ops->map_single(dev, page_address(page) + offset, size,
151 direction);
152}
153
154static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
155 size_t size,
156 enum dma_data_direction direction)
157{
158 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
159
160 BUG_ON(!dma_ops);
161 dma_ops->unmap_single(dev, dma_address, size, direction);
162}
163
164static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
165 int nents, enum dma_data_direction direction)
166{
167 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
168
169 BUG_ON(!dma_ops);
170 return dma_ops->map_sg(dev, sg, nents, direction);
171}
172
173static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
174 int nhwentries,
175 enum dma_data_direction direction)
176{
177 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
178
179 BUG_ON(!dma_ops);
180 dma_ops->unmap_sg(dev, sg, nhwentries, direction);
181}
182
183
184/*
185 * Available generic sets of operations
186 */
187extern struct dma_mapping_ops dma_iommu_ops;
188extern struct dma_mapping_ops dma_direct_ops;
Stephen Rothwell78b09732005-11-19 01:40:46 +1100189
190#else /* CONFIG_PPC64 */
191
192#define dma_supported(dev, mask) (1)
193
194static inline int dma_set_mask(struct device *dev, u64 dma_mask)
195{
196 if (!dev->dma_mask || !dma_supported(dev, mask))
197 return -EIO;
198
199 *dev->dma_mask = dma_mask;
200
201 return 0;
202}
203
204static inline void *dma_alloc_coherent(struct device *dev, size_t size,
205 dma_addr_t * dma_handle,
206 gfp_t gfp)
207{
208#ifdef CONFIG_NOT_COHERENT_CACHE
209 return __dma_alloc_coherent(size, dma_handle, gfp);
210#else
211 void *ret;
212 /* ignore region specifiers */
213 gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
214
215 if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
216 gfp |= GFP_DMA;
217
218 ret = (void *)__get_free_pages(gfp, get_order(size));
219
220 if (ret != NULL) {
221 memset(ret, 0, size);
222 *dma_handle = virt_to_bus(ret);
223 }
224
225 return ret;
226#endif
227}
228
229static inline void
230dma_free_coherent(struct device *dev, size_t size, void *vaddr,
231 dma_addr_t dma_handle)
232{
233#ifdef CONFIG_NOT_COHERENT_CACHE
234 __dma_free_coherent(size, vaddr);
235#else
236 free_pages((unsigned long)vaddr, get_order(size));
237#endif
238}
239
240static inline dma_addr_t
241dma_map_single(struct device *dev, void *ptr, size_t size,
242 enum dma_data_direction direction)
243{
244 BUG_ON(direction == DMA_NONE);
245
246 __dma_sync(ptr, size, direction);
247
248 return virt_to_bus(ptr);
249}
250
251/* We do nothing. */
252#define dma_unmap_single(dev, addr, size, dir) do { } while (0)
253
254static inline dma_addr_t
255dma_map_page(struct device *dev, struct page *page,
256 unsigned long offset, size_t size,
257 enum dma_data_direction direction)
258{
259 BUG_ON(direction == DMA_NONE);
260
261 __dma_sync_page(page, offset, size, direction);
262
263 return page_to_bus(page) + offset;
264}
265
266/* We do nothing. */
267#define dma_unmap_page(dev, handle, size, dir) do { } while (0)
268
269static inline int
270dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
271 enum dma_data_direction direction)
272{
273 int i;
274
275 BUG_ON(direction == DMA_NONE);
276
277 for (i = 0; i < nents; i++, sg++) {
278 BUG_ON(!sg->page);
279 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
280 sg->dma_address = page_to_bus(sg->page) + sg->offset;
281 }
282
283 return nents;
284}
285
286/* We don't do anything here. */
287#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0)
288
289#endif /* CONFIG_PPC64 */
290
291static inline void dma_sync_single_for_cpu(struct device *dev,
292 dma_addr_t dma_handle, size_t size,
293 enum dma_data_direction direction)
294{
295 BUG_ON(direction == DMA_NONE);
296 __dma_sync(bus_to_virt(dma_handle), size, direction);
297}
298
299static inline void dma_sync_single_for_device(struct device *dev,
300 dma_addr_t dma_handle, size_t size,
301 enum dma_data_direction direction)
302{
303 BUG_ON(direction == DMA_NONE);
304 __dma_sync(bus_to_virt(dma_handle), size, direction);
305}
306
307static inline void dma_sync_sg_for_cpu(struct device *dev,
308 struct scatterlist *sg, int nents,
309 enum dma_data_direction direction)
310{
311 int i;
312
313 BUG_ON(direction == DMA_NONE);
314
315 for (i = 0; i < nents; i++, sg++)
316 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
317}
318
319static inline void dma_sync_sg_for_device(struct device *dev,
320 struct scatterlist *sg, int nents,
321 enum dma_data_direction direction)
322{
323 int i;
324
325 BUG_ON(direction == DMA_NONE);
326
327 for (i = 0; i < nents; i++, sg++)
328 __dma_sync_page(sg->page, sg->offset, sg->length, direction);
329}
330
331static inline int dma_mapping_error(dma_addr_t dma_addr)
332{
333#ifdef CONFIG_PPC64
334 return (dma_addr == DMA_ERROR_CODE);
335#else
336 return 0;
337#endif
338}
339
340#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
341#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
342#ifdef CONFIG_NOT_COHERENT_CACHE
343#define dma_is_consistent(d) (0)
344#else
345#define dma_is_consistent(d) (1)
346#endif
347
348static inline int dma_get_cache_alignment(void)
349{
350#ifdef CONFIG_PPC64
351 /* no easy way to get cache size on all processors, so return
352 * the maximum possible, to be safe */
Ravikiran G Thirumalai1fd73c62006-01-08 01:01:28 -0800353 return (1 << INTERNODE_CACHE_SHIFT);
Stephen Rothwell78b09732005-11-19 01:40:46 +1100354#else
355 /*
356 * Each processor family will define its own L1_CACHE_SHIFT,
357 * L1_CACHE_BYTES wraps to this, so this is always safe.
358 */
359 return L1_CACHE_BYTES;
360#endif
361}
362
363static inline void dma_sync_single_range_for_cpu(struct device *dev,
364 dma_addr_t dma_handle, unsigned long offset, size_t size,
365 enum dma_data_direction direction)
366{
367 /* just sync everything for now */
368 dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
369}
370
371static inline void dma_sync_single_range_for_device(struct device *dev,
372 dma_addr_t dma_handle, unsigned long offset, size_t size,
373 enum dma_data_direction direction)
374{
375 /* just sync everything for now */
376 dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
377}
378
379static inline void dma_cache_sync(void *vaddr, size_t size,
380 enum dma_data_direction direction)
381{
382 BUG_ON(direction == DMA_NONE);
383 __dma_sync(vaddr, size, (int)direction);
384}
385
Arnd Bergmann88ced032005-12-16 22:43:46 +0100386#endif /* __KERNEL__ */
Stephen Rothwell78b09732005-11-19 01:40:46 +1100387#endif /* _ASM_DMA_MAPPING_H */