| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 1 | /* | 
| Uwe Bugla | 1589a99 | 2009-03-29 07:46:58 -0300 | [diff] [blame] | 2 |  * Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 3 |  * flexcop-reg.h - register abstraction for FlexCopII, FlexCopIIb and FlexCopIII | 
| Uwe Bugla | 1589a99 | 2009-03-29 07:46:58 -0300 | [diff] [blame] | 4 |  * see flexcop.c for copyright information | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 5 |  */ | 
 | 6 | #ifndef __FLEXCOP_REG_H__ | 
 | 7 | #define __FLEXCOP_REG_H__ | 
 | 8 |  | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 9 | typedef enum { | 
 | 10 | 	FLEXCOP_UNK = 0, | 
 | 11 | 	FLEXCOP_II, | 
 | 12 | 	FLEXCOP_IIB, | 
 | 13 | 	FLEXCOP_III, | 
 | 14 | } flexcop_revision_t; | 
 | 15 |  | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 16 | typedef enum { | 
 | 17 | 	FC_UNK = 0, | 
| Uwe Bugla | 1589a99 | 2009-03-29 07:46:58 -0300 | [diff] [blame] | 18 | 	FC_CABLE, | 
 | 19 | 	FC_AIR_DVBT, | 
| Johannes Stezenbach | 55f51ef | 2005-06-23 22:02:41 -0700 | [diff] [blame] | 20 | 	FC_AIR_ATSC1, | 
 | 21 | 	FC_AIR_ATSC2, | 
| Michael Krufky | c0b11b9 | 2005-11-08 21:35:32 -0800 | [diff] [blame] | 22 | 	FC_AIR_ATSC3, | 
| Uwe Bugla | 1589a99 | 2009-03-29 07:46:58 -0300 | [diff] [blame] | 23 | 	FC_SKY_REV23, | 
 | 24 | 	FC_SKY_REV26, | 
| Patrick Boettcher | c9dd82c | 2008-03-29 21:28:07 -0300 | [diff] [blame] | 25 | 	FC_SKY_REV27, | 
 | 26 | 	FC_SKY_REV28, | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 27 | } flexcop_device_type_t; | 
 | 28 |  | 
 | 29 | typedef enum { | 
 | 30 | 	FC_USB = 0, | 
 | 31 | 	FC_PCI, | 
 | 32 | } flexcop_bus_t; | 
 | 33 |  | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 34 | /* FlexCop IBI Registers */ | 
| Patrick Boettcher | 2819639 | 2005-07-07 17:57:48 -0700 | [diff] [blame] | 35 | #if defined(__LITTLE_ENDIAN) | 
| Uwe Bugla | 1589a99 | 2009-03-29 07:46:58 -0300 | [diff] [blame] | 36 | #include "flexcop_ibi_value_le.h" | 
| Mauro Carvalho Chehab | 4302c15 | 2006-01-09 15:25:22 -0200 | [diff] [blame] | 37 | #else | 
 | 38 | #if defined(__BIG_ENDIAN) | 
| Uwe Bugla | 1589a99 | 2009-03-29 07:46:58 -0300 | [diff] [blame] | 39 | #include "flexcop_ibi_value_be.h" | 
| Patrick Boettcher | 2819639 | 2005-07-07 17:57:48 -0700 | [diff] [blame] | 40 | #else | 
| Uwe Bugla | 1589a99 | 2009-03-29 07:46:58 -0300 | [diff] [blame] | 41 | #error no endian defined | 
| Patrick Boettcher | 2819639 | 2005-07-07 17:57:48 -0700 | [diff] [blame] | 42 | #endif | 
| Mauro Carvalho Chehab | 4302c15 | 2006-01-09 15:25:22 -0200 | [diff] [blame] | 43 | #endif | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 44 |  | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 45 | #define fc_data_Tag_ID_DVB  0x3e | 
 | 46 | #define fc_data_Tag_ID_ATSC 0x3f | 
 | 47 | #define fc_data_Tag_ID_IDSB 0x8b | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 48 |  | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 49 | #define fc_key_code_default 0x1 | 
 | 50 | #define fc_key_code_even    0x2 | 
 | 51 | #define fc_key_code_odd     0x3 | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 52 |  | 
 | 53 | extern flexcop_ibi_value ibi_zero; | 
 | 54 |  | 
 | 55 | typedef enum { | 
 | 56 | 	FC_I2C_PORT_DEMOD  = 1, | 
 | 57 | 	FC_I2C_PORT_EEPROM = 2, | 
 | 58 | 	FC_I2C_PORT_TUNER  = 3, | 
 | 59 | } flexcop_i2c_port_t; | 
 | 60 |  | 
 | 61 | typedef enum { | 
 | 62 | 	FC_WRITE = 0, | 
 | 63 | 	FC_READ  = 1, | 
 | 64 | } flexcop_access_op_t; | 
 | 65 |  | 
 | 66 | typedef enum { | 
 | 67 | 	FC_SRAM_DEST_NET   = 1, | 
 | 68 | 	FC_SRAM_DEST_CAI   = 2, | 
 | 69 | 	FC_SRAM_DEST_CAO   = 4, | 
 | 70 | 	FC_SRAM_DEST_MEDIA = 8 | 
 | 71 | } flexcop_sram_dest_t; | 
 | 72 |  | 
 | 73 | typedef enum { | 
 | 74 | 	FC_SRAM_DEST_TARGET_WAN_USB = 0, | 
 | 75 | 	FC_SRAM_DEST_TARGET_DMA1    = 1, | 
 | 76 | 	FC_SRAM_DEST_TARGET_DMA2    = 2, | 
 | 77 | 	FC_SRAM_DEST_TARGET_FC3_CA  = 3 | 
 | 78 | } flexcop_sram_dest_target_t; | 
 | 79 |  | 
 | 80 | typedef enum { | 
 | 81 | 	FC_SRAM_2_32KB  = 0, /*  64KB */ | 
 | 82 | 	FC_SRAM_1_32KB  = 1, /*  32KB - default fow FCII */ | 
 | 83 | 	FC_SRAM_1_128KB = 2, /* 128KB */ | 
 | 84 | 	FC_SRAM_1_48KB  = 3, /*  48KB - default for FCIII */ | 
 | 85 | } flexcop_sram_type_t; | 
 | 86 |  | 
 | 87 | typedef enum { | 
 | 88 | 	FC_WAN_SPEED_4MBITS  = 0, | 
 | 89 | 	FC_WAN_SPEED_8MBITS  = 1, | 
 | 90 | 	FC_WAN_SPEED_12MBITS = 2, | 
 | 91 | 	FC_WAN_SPEED_16MBITS = 3, | 
 | 92 | } flexcop_wan_speed_t; | 
 | 93 |  | 
 | 94 | typedef enum { | 
 | 95 | 	FC_DMA_1 = 1, | 
 | 96 | 	FC_DMA_2 = 2, | 
 | 97 | } flexcop_dma_index_t; | 
 | 98 |  | 
 | 99 | typedef enum { | 
 | 100 | 	FC_DMA_SUBADDR_0 = 1, | 
 | 101 | 	FC_DMA_SUBADDR_1 = 2, | 
 | 102 | } flexcop_dma_addr_index_t; | 
 | 103 |  | 
 | 104 | /* names of the particular registers */ | 
 | 105 | typedef enum { | 
 | 106 | 	dma1_000            = 0x000, | 
 | 107 | 	dma1_004            = 0x004, | 
 | 108 | 	dma1_008            = 0x008, | 
 | 109 | 	dma1_00c            = 0x00c, | 
 | 110 | 	dma2_010            = 0x010, | 
 | 111 | 	dma2_014            = 0x014, | 
 | 112 | 	dma2_018            = 0x018, | 
 | 113 | 	dma2_01c            = 0x01c, | 
 | 114 |  | 
 | 115 | 	tw_sm_c_100         = 0x100, | 
 | 116 | 	tw_sm_c_104         = 0x104, | 
 | 117 | 	tw_sm_c_108         = 0x108, | 
 | 118 | 	tw_sm_c_10c         = 0x10c, | 
 | 119 | 	tw_sm_c_110         = 0x110, | 
 | 120 |  | 
 | 121 | 	lnb_switch_freq_200 = 0x200, | 
 | 122 | 	misc_204            = 0x204, | 
 | 123 | 	ctrl_208            = 0x208, | 
 | 124 | 	irq_20c             = 0x20c, | 
 | 125 | 	sw_reset_210        = 0x210, | 
 | 126 | 	misc_214            = 0x214, | 
 | 127 | 	mbox_v8_to_host_218 = 0x218, | 
 | 128 | 	mbox_host_to_v8_21c = 0x21c, | 
 | 129 |  | 
 | 130 | 	pid_filter_300      = 0x300, | 
 | 131 | 	pid_filter_304      = 0x304, | 
 | 132 | 	pid_filter_308      = 0x308, | 
 | 133 | 	pid_filter_30c      = 0x30c, | 
 | 134 | 	index_reg_310       = 0x310, | 
 | 135 | 	pid_n_reg_314       = 0x314, | 
 | 136 | 	mac_low_reg_318     = 0x318, | 
 | 137 | 	mac_high_reg_31c    = 0x31c, | 
 | 138 |  | 
 | 139 | 	data_tag_400        = 0x400, | 
 | 140 | 	card_id_408         = 0x408, | 
 | 141 | 	card_id_40c         = 0x40c, | 
 | 142 | 	mac_address_418     = 0x418, | 
 | 143 | 	mac_address_41c     = 0x41c, | 
 | 144 |  | 
 | 145 | 	ci_600              = 0x600, | 
 | 146 | 	pi_604              = 0x604, | 
 | 147 | 	pi_608              = 0x608, | 
 | 148 | 	dvb_reg_60c         = 0x60c, | 
 | 149 |  | 
 | 150 | 	sram_ctrl_reg_700   = 0x700, | 
 | 151 | 	net_buf_reg_704     = 0x704, | 
 | 152 | 	cai_buf_reg_708     = 0x708, | 
 | 153 | 	cao_buf_reg_70c     = 0x70c, | 
 | 154 | 	media_buf_reg_710   = 0x710, | 
 | 155 | 	sram_dest_reg_714   = 0x714, | 
 | 156 | 	net_buf_reg_718     = 0x718, | 
 | 157 | 	wan_ctrl_reg_71c    = 0x71c, | 
 | 158 | } flexcop_ibi_register; | 
 | 159 |  | 
| Johannes Stezenbach | bdc7800 | 2005-05-16 21:54:18 -0700 | [diff] [blame] | 160 | #define flexcop_set_ibi_value(reg,attr,val) { \ | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 161 | 	flexcop_ibi_value v = fc->read_ibi_reg(fc,reg); \ | 
 | 162 | 	v.reg.attr = val; \ | 
 | 163 | 	fc->write_ibi_reg(fc,reg,v); \ | 
| Johannes Stezenbach | bdc7800 | 2005-05-16 21:54:18 -0700 | [diff] [blame] | 164 | } | 
| Johannes Stezenbach | 2add87a | 2005-05-16 21:54:10 -0700 | [diff] [blame] | 165 |  | 
 | 166 | #endif |