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review.evervolv.com / android_kernel_htc_msm8960 / 1458e83af96ff7c529b7cc4fb976e88f2cc41840 / . / arch / arm / mach-omap2 / omap4-common.c
blob: 9ef8c29dd817091bb2b8c49ed2332ba2023dff6c [file] [log] [blame]
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]1/*
2 * OMAP4 specific common source file.
3 *
4 * Copyright (C) 2010 Texas Instruments, Inc.
5 * Author:
6 * Santosh Shilimkar <santosh.shilimkar@ti.com>
7 *
8 *
9 * This program is free software,you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/io.h>
17#include <linux/platform_device.h>
18
19#include <asm/hardware/gic.h>
20#include <asm/hardware/cache-l2x0.h>
21
22#include <mach/hardware.h>
23#include <mach/omap4-common.h>
24
25#ifdef CONFIG_CACHE_L2X0
26void __iomem *l2cache_base;
27#endif
28
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]29void __iomem *gic_dist_base_addr;
30
31
32void __init gic_init_irq(void)
33{
Russell Kingff2e27a2010-12-04 16:13:29 +0000[diff] [blame]34 void __iomem *gic_cpu_base;
35
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]36 /* Static mapping, never released */
37 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
38 BUG_ON(!gic_dist_base_addr);
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]39
40 /* Static mapping, never released */
Russell Kingff2e27a2010-12-04 16:13:29 +0000[diff] [blame]41 gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
42 BUG_ON(!gic_cpu_base);
Russell Kingb580b892010-12-04 15:55:14 +0000[diff] [blame]43
Russell Kingff2e27a2010-12-04 16:13:29 +0000[diff] [blame]44 gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]45}
46
47#ifdef CONFIG_CACHE_L2X0
Santosh Shilimkar4e803c42010-07-31 21:40:10 +0530[diff] [blame]48
49static void omap4_l2x0_disable(void)
50{
51 /* Disable PL310 L2 Cache controller */
52 omap_smc1(0x102, 0x0);
53}
54
Santosh Shilimkar4bdb1572011-02-22 10:00:44 +0100[diff] [blame]55static void omap4_l2x0_set_debug(unsigned long val)
56{
57 /* Program PL310 L2 Cache controller debug register */
58 omap_smc1(0x100, val);
59}
60
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]61static int __init omap_l2_cache_init(void)
62{
Santosh Shilimkar1773e602010-11-19 23:01:03 +0530[diff] [blame]63 u32 aux_ctrl = 0;
64
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]65 /*
66 * To avoid code running on other OMAPs in
67 * multi-omap builds
68 */
69 if (!cpu_is_omap44xx())
70 return -ENODEV;
71
72 /* Static mapping, never released */
73 l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
74 BUG_ON(!l2cache_base);
75
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]76 /*
Santosh Shilimkara777b722010-09-16 18:44:47 +0530[diff] [blame]77 * 16-way associativity, parity disabled
78 * Way size - 32KB (es1.0)
79 * Way size - 64KB (es2.0 +)
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]80 */
Santosh Shilimkar1773e602010-11-19 23:01:03 +0530[diff] [blame]81 aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
82 (0x1 << 25) |
83 (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) |
84 (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT));
85
Mans Rullgard11e02642010-11-19 23:01:04 +0530[diff] [blame]86 if (omap_rev() == OMAP4430_REV_ES1_0) {
Santosh Shilimkar1773e602010-11-19 23:01:03 +0530[diff] [blame]87 aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
Mans Rullgard11e02642010-11-19 23:01:04 +0530[diff] [blame]88 } else {
89 aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
Santosh Shilimkarb0f20ff2010-11-19 23:01:05 +0530[diff] [blame]90 (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
Mans Rullgard11e02642010-11-19 23:01:04 +0530[diff] [blame]91 (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
Santosh Shilimkarb89cd712010-11-19 23:01:06 +0530[diff] [blame]92 (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) |
93 (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT));
Mans Rullgard11e02642010-11-19 23:01:04 +0530[diff] [blame]94 }
95 if (omap_rev() != OMAP4430_REV_ES1_0)
96 omap_smc1(0x109, aux_ctrl);
97
98 /* Enable PL310 L2 Cache controller */
99 omap_smc1(0x102, 0x1);
Santosh Shilimkar1773e602010-11-19 23:01:03 +0530[diff] [blame]100
101 l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]102
Santosh Shilimkar4e803c42010-07-31 21:40:10 +0530[diff] [blame]103 /*
104 * Override default outer_cache.disable with a OMAP4
105 * specific one
106 */
107 outer_cache.disable = omap4_l2x0_disable;
Santosh Shilimkar4bdb1572011-02-22 10:00:44 +0100[diff] [blame]108 outer_cache.set_debug = omap4_l2x0_set_debug;
Santosh Shilimkar4e803c42010-07-31 21:40:10 +0530[diff] [blame]109
Santosh Shilimkarfbc9be12010-05-14 12:05:26 -0700[diff] [blame]110 return 0;
111}
112early_initcall(omap_l2_cache_init);
113#endif