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Andrew Isaacsonf137e462005-10-19 23:56:38 -07001/*
2 * Copyright (C) 2000,2001,2004 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18
19/*
20 * These are routines to set up and handle interrupts from the
21 * bcm1480 general purpose timer 0. We're using the timer as a
22 * system clock, so we set it up to run at 100 Hz. On every
23 * interrupt, we update our idea of what the time of day is,
24 * then call do_timer() in the architecture-independent kernel
25 * code to do general bookkeeping (e.g. update jiffies, run
26 * bottom halves, etc.)
27 */
Andrew Isaacsonf137e462005-10-19 23:56:38 -070028#include <linux/interrupt.h>
29#include <linux/sched.h>
30#include <linux/spinlock.h>
31#include <linux/kernel_stat.h>
32
33#include <asm/irq.h>
Andrew Isaacsonf137e462005-10-19 23:56:38 -070034#include <asm/addrspace.h>
35#include <asm/time.h>
36#include <asm/io.h>
37
38#include <asm/sibyte/bcm1480_regs.h>
39#include <asm/sibyte/sb1250_regs.h>
40#include <asm/sibyte/bcm1480_int.h>
41#include <asm/sibyte/bcm1480_scd.h>
42
43#include <asm/sibyte/sb1250.h>
44
45
46#define IMR_IP2_VAL K_BCM1480_INT_MAP_I0
47#define IMR_IP3_VAL K_BCM1480_INT_MAP_I1
48#define IMR_IP4_VAL K_BCM1480_INT_MAP_I2
49
Atsushi Nemoto16b7b2a2006-10-24 00:21:27 +090050#ifdef CONFIG_SIMULATION
51#define BCM1480_HPT_VALUE 50000
52#else
53#define BCM1480_HPT_VALUE 1000000
54#endif
55
Andrew Isaacsonf137e462005-10-19 23:56:38 -070056extern int bcm1480_steal_irq(int irq);
57
58void bcm1480_time_init(void)
59{
60 int cpu = smp_processor_id();
61 int irq = K_BCM1480_INT_TIMER_0+cpu;
62
63 /* Only have 4 general purpose timers */
64 if (cpu > 3) {
65 BUG();
66 }
67
Andrew Isaacsonf137e462005-10-19 23:56:38 -070068 bcm1480_mask_irq(cpu, irq);
69
70 /* Map the timer interrupt to ip[4] of this cpu */
71 __raw_writeq(IMR_IP4_VAL, IOADDR(A_BCM1480_IMR_REGISTER(cpu, R_BCM1480_IMR_INTERRUPT_MAP_BASE_H)
72 + (irq<<3)));
73
74 /* the general purpose timer ticks at 1 Mhz independent of the rest of the system */
75 /* Disable the timer and set up the count */
76 __raw_writeq(0, IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
77 __raw_writeq(
Atsushi Nemoto16b7b2a2006-10-24 00:21:27 +090078 BCM1480_HPT_VALUE/HZ
Andrew Isaacsonf137e462005-10-19 23:56:38 -070079 , IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_INIT)));
80
81 /* Set the timer running */
82 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
83 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
84
85 bcm1480_unmask_irq(cpu, irq);
86 bcm1480_steal_irq(irq);
87 /*
88 * This interrupt is "special" in that it doesn't use the request_irq
89 * way to hook the irq line. The timer interrupt is initialized early
90 * enough to make this a major pain, and it's also firing enough to
91 * warrant a bit of special case code. bcm1480_timer_interrupt is
92 * called directly from irq_handler.S when IP[4] is set during an
93 * interrupt
94 */
95}
96
97#include <asm/sibyte/sb1250.h>
98
Ralf Baechle937a8012006-10-07 19:44:33 +010099void bcm1480_timer_interrupt(void)
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700100{
101 int cpu = smp_processor_id();
Ralf Baechle937a8012006-10-07 19:44:33 +0100102 int irq = K_BCM1480_INT_TIMER_0 + cpu;
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700103
104 /* Reset the timer */
105 __raw_writeq(M_SCD_TIMER_ENABLE|M_SCD_TIMER_MODE_CONTINUOUS,
106 IOADDR(A_SCD_TIMER_REGISTER(cpu, R_SCD_TIMER_CFG)));
107
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700108 if (cpu == 0) {
[MIPS] James E Wilsone1701fb2006-02-27 15:04:38 -0800109 /*
110 * CPU 0 handles the global timer interrupt job
111 */
Ralf Baechle937a8012006-10-07 19:44:33 +0100112 ll_timer_interrupt(irq);
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700113 }
[MIPS] James E Wilsone1701fb2006-02-27 15:04:38 -0800114 else {
115 /*
116 * other CPUs should just do profiling and process accounting
117 */
Ralf Baechle937a8012006-10-07 19:44:33 +0100118 ll_local_timer_interrupt(irq);
[MIPS] James E Wilsone1701fb2006-02-27 15:04:38 -0800119 }
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700120}
121
Atsushi Nemoto16b7b2a2006-10-24 00:21:27 +0900122static unsigned int bcm1480_hpt_read(void)
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700123{
Atsushi Nemoto16b7b2a2006-10-24 00:21:27 +0900124 /* We assume this function is called xtime_lock held. */
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700125 unsigned long count =
126 __raw_readq(IOADDR(A_SCD_TIMER_REGISTER(0, R_SCD_TIMER_CNT)));
Atsushi Nemoto16b7b2a2006-10-24 00:21:27 +0900127 return (jiffies + 1) * (BCM1480_HPT_VALUE / HZ) - count;
128}
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700129
Atsushi Nemoto16b7b2a2006-10-24 00:21:27 +0900130void __init bcm1480_hpt_setup(void)
131{
132 mips_hpt_read = bcm1480_hpt_read;
133 mips_hpt_frequency = BCM1480_HPT_VALUE;
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700134}