| Michael Bohan | 0ba63b8 | 2012-02-06 13:42:34 -0800 | [diff] [blame] | 1 | * msm-qpnp-gpio |
| 2 | |
| 3 | msm-qpnp-gpio is a GPIO chip driver for the MSM SPMI implementation. |
| 4 | It creates a spmi_device for every spmi-dev-container block of device_nodes. |
| 5 | These device_nodes contained within specify the PMIC GPIO number associated |
| 6 | with each GPIO chip. The driver will map these to Linux GPIO numbers. |
| 7 | |
| 8 | [PMIC GPIO Device Declarations] |
| 9 | |
| 10 | -Root Node- |
| 11 | |
| 12 | Required properties : |
| 13 | - spmi-dev-container : Used to specify the following child nodes as part of the |
| 14 | same SPMI device. |
| 15 | - gpio-controller : Specify as gpio-contoller. All child nodes will belong to this |
| 16 | gpio_chip. |
| 17 | - #gpio-cells: We encode a PMIC GPIO number and a 32-bit flag field to |
| 18 | specify the gpio configuration. This must be set to '2'. |
| 19 | - #address-cells: Specify one address field. This must be set to '1'. |
| 20 | - #size-cells: Specify one size-cell. This must be set to '1'. |
| 21 | - compatible = "qcom,qpnp-gpio" : Specify driver matching for this driver. |
| 22 | |
| 23 | -Child Nodes- |
| 24 | |
| 25 | Required properties : |
| 26 | - reg : Specify the spmi offset and size for this gpio device. |
| 27 | - qcom,qpnp-gpio-num : Specify the PMIC GPIO number for this gpio device. |
| 28 | |
| 29 | Optional properties : |
| 30 | - qcom,qpnp-gpio-cfg : Specify the PMIC gpio configuration. |
| 31 | The format of this configuration is specified in a tuple of 9 entries. |
| 32 | These entries should be specified in the same order as the entries listed |
| 33 | in this following discription. |
| 34 | |
| 35 | @direction: indicates whether the gpio should be input, output, or |
| 36 | both. |
| 37 | QPNP_GPIO_DIR_OUT = 1, |
| 38 | QPNP_GPIO_DIR_IN = 2, |
| 39 | QPNP_GPIO_DIR_BOTH = 3 |
| 40 | |
| 41 | @output_type: indicates gpio should be configured as CMOS or open |
| 42 | drain. |
| 43 | QPNP_GPIO_OUT_BUF_OPEN_DRAIN = 1, |
| 44 | QPNP_GPIO_OUT_BUF_CMOS = 0 |
| 45 | |
| 46 | @output_value: The gpio output value of the gpio line - 0 or 1 |
| 47 | @pull: Indicates whether a pull up or pull down should be |
| 48 | applied. If a pullup is required the current strength |
| 49 | needs to be specified. Current values of 30uA, 1.5uA, |
| 50 | 31.5uA, 1.5uA with 30uA boost are supported. |
| 51 | QPNP_GPIO_PULL_UP_30 = 0, |
| 52 | QPNP_GPIO_PULL_UP_1P5 = 1, |
| 53 | QPNP_GPIO_PULL_UP_31P5 = 2, |
| 54 | QPNP_GPIO_PULL_UP_1P5_30 = 3, |
| 55 | QPNP_GPIO_PULL_DN = 4, |
| 56 | QPNP_GPIO_PULL_NO = 5 |
| 57 | |
| 58 | @vin_sel: specifies the voltage level when the output is set to 1. |
| 59 | For an input gpio specifies the voltage level at which |
| 60 | the input is interpreted as a logical 1. |
| 61 | QPNP_GPIO_VIN0 = 0, |
| 62 | QPNP_GPIO_VIN1 = 1, |
| 63 | QPNP_GPIO_VIN2 = 2, |
| 64 | QPNP_GPIO_VIN3 = 3, |
| 65 | QPNP_GPIO_VIN4 = 4, |
| 66 | QPNP_GPIO_VIN5 = 5, |
| 67 | QPNP_GPIO_VIN6 = 6, |
| 68 | QPNP_GPIO_VIN7 = 7 |
| 69 | |
| 70 | @out_strength: the amount of current supplied for an output gpio. |
| 71 | QPNP_GPIO_OUT_STRENGTH_HIGH = 1, |
| 72 | QPNP_GPIO_OUT_STRENGTH_MED = 2, |
| 73 | QPNP_GPIO_OUT_STRENGTH_LOW = 3 |
| 74 | |
| 75 | @source_sel: choose alternate function for the gpio. Certain gpios |
| 76 | can be paired (shorted) with each other. Some gpio pin |
| 77 | can act as alternate functions. |
| 78 | QPNP_GPIO_FUNC_NORMAL = 0, |
| 79 | QPNP_GPIO_FUNC_PAIRED = 1 |
| 80 | QPNP_GPIO_FUNC_1 = 2, |
| 81 | QPNP_GPIO_FUNC_3 = 3, |
| 82 | QPNP_GPIO_DTEST1 = 4, |
| 83 | QPNP_GPIO_DTEST2 = 5, |
| 84 | QPNP_GPIO_DTEST3 = 6, |
| 85 | QPNP_GPIO_DTEST4 = 7 |
| 86 | |
| 87 | @inv_int_pol: Invert polarity before feeding the line to the interrupt |
| 88 | module in pmic. This feature will almost be never used |
| 89 | since the pm8xxx interrupt block can detect both edges |
| 90 | and both levels. |
| 91 | @master_en: 1 = Enable features within the GPIO block based on |
| 92 | configurations. |
| 93 | 0 = Completely disable the GPIO block and let the pin |
| 94 | float with high impedance regardless of other settings. |
| 95 | |
| 96 | [PMIC GPIO clients] |
| 97 | |
| 98 | Required properties : |
| 99 | - gpios : Contains 3 fields of the form <&gpio_controller pmic_gpio_num flags> |
| 100 | |
| 101 | [Example] |
| 102 | |
| 103 | qpnp: qcom,spmi@fc4c0000 { |
| 104 | #address-cells = <1>; |
| 105 | #size-cells = <0>; |
| 106 | interrupt-controller; |
| 107 | #interrupt-cells = <3>; |
| 108 | |
| 109 | qcom,pm8941@0 { |
| 110 | spmi-slave-container; |
| 111 | reg = <0x0>; |
| 112 | #address-cells = <1>; |
| 113 | #size-cells = <1>; |
| 114 | |
| 115 | pm8941_gpios: gpios { |
| 116 | spmi-dev-container; |
| 117 | compatible = "qcom,qpnp-gpio"; |
| 118 | gpio-controller; |
| 119 | #gpio-cells = <2>; |
| 120 | #address-cells = <1>; |
| 121 | #size-cells = <1>; |
| 122 | |
| 123 | qcom,pm8941_gpio1@0xc000 { |
| 124 | reg = <0xc000 0x100>; |
| 125 | qcom,qpnp-gpio-num = <62>; |
| 126 | }; |
| 127 | |
| 128 | qcom,pm8941_gpio2@0xc100 { |
| 129 | reg = <0xc100 0x100>; |
| 130 | qcom,qpnp-gpio-num = <20>; |
| 131 | qcom,qpnp-gpio-cfg = <0x1 0x1 0x1 0x2 0x3 0x2 0x0 0x0 0x1>; |
| 132 | }; |
| 133 | }; |
| 134 | |
| 135 | qcom,testgpio@1000 { |
| 136 | compatible = "qcom,qpnp-testgpio"; |
| 137 | reg = <0x1000 0x1000>; |
| 138 | gpios = <&pm8941_gpios 62 0x0 &pm8941_gpios 20 0x1>; |
| 139 | }; |
| 140 | }; |
| 141 | }; |
| 142 | }; |