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Nagamalleswararao Ganji70fac1e2011-12-29 19:06:37 -08001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Marc Zyngier89bdafd12011-12-22 11:39:20 +053056#include <asm/hardware/gic.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080059#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#include <mach/irqs.h>
61#include <mach/msm_spi.h>
62#include <mach/msm_serial_hs.h>
63#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080064#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070065#include <mach/msm_memtypes.h>
66#include <asm/mach/mmc.h>
67#include <mach/msm_battery.h>
68#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070069#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#ifdef CONFIG_MSM_DSPS
71#include <mach/msm_dsps.h>
72#endif
73#include <mach/msm_xo.h>
74#include <mach/msm_bus_board.h>
75#include <mach/socinfo.h>
76#include <linux/i2c/isl9519.h>
77#ifdef CONFIG_USB_G_ANDROID
78#include <linux/usb/android.h>
79#include <mach/usbdiag.h>
80#endif
81#include <linux/regulator/consumer.h>
82#include <linux/regulator/machine.h>
83#include <mach/sdio_al.h>
84#include <mach/rpm.h>
85#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070086#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053087#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070089#include "devices.h"
90#include "devices-msm8x60.h"
Abhijeet Dharmapurikarefaca4f2011-12-27 16:24:07 -080091#include <mach/cpuidle.h>
Matt Wagantall7cca4642012-02-01 16:43:24 -080092#include "pm.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070093#include "mpm.h"
94#include "spm.h"
95#include "rpm_log.h"
96#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097#include "gpiomux-8x60.h"
98#include "rpm_stats.h"
99#include "peripheral-loader.h"
100#include <linux/platform_data/qcom_crypto_device.h>
101#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700102#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600103#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700104
105#include <linux/ion.h>
106#include <mach/ion.h>
107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109#define MDM2AP_SYNC 129
110
Terence Hampson1c73fef2011-07-19 17:10:49 -0400111#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112#define LCDC_SPI_GPIO_CLK 73
113#define LCDC_SPI_GPIO_CS 72
114#define LCDC_SPI_GPIO_MOSI 70
115#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
116#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
117#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
118#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
119#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400120#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700122#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
123#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
124#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
125#define HDMI_PANEL_NAME "hdmi_msm"
126#define TVOUT_PANEL_NAME "tvout_msm"
127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#define DSPS_PIL_GENERIC_NAME "dsps"
129#define DSPS_PIL_FLUID_NAME "dsps_fluid"
130
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800131#ifdef CONFIG_ION_MSM
132static struct platform_device ion_dev;
133#endif
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135enum {
136 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530137 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700138 /* CORE expander */
139 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
140 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
141 GPIO_WLAN_DEEP_SLEEP_N,
142 GPIO_LVDS_SHUTDOWN_N,
143 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
144 GPIO_MS_SYS_RESET_N,
145 GPIO_CAP_TS_RESOUT_N,
146 GPIO_CAP_GAUGE_BI_TOUT,
147 GPIO_ETHERNET_PME,
148 GPIO_EXT_GPS_LNA_EN,
149 GPIO_MSM_WAKES_BT,
150 GPIO_ETHERNET_RESET_N,
151 GPIO_HEADSET_DET_N,
152 GPIO_USB_UICC_EN,
153 GPIO_BACKLIGHT_EN,
154 GPIO_EXT_CAMIF_PWR_EN,
155 GPIO_BATT_GAUGE_INT_N,
156 GPIO_BATT_GAUGE_EN,
157 /* DOCKING expander */
158 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
159 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
160 GPIO_AUX_JTAG_DET_N,
161 GPIO_DONGLE_DET_N,
162 GPIO_SVIDEO_LOAD_DET,
163 GPIO_SVID_AMP_SHUTDOWN1_N,
164 GPIO_SVID_AMP_SHUTDOWN0_N,
165 GPIO_SDC_WP,
166 GPIO_IRDA_PWDN,
167 GPIO_IRDA_RESET_N,
168 GPIO_DONGLE_GPIO0,
169 GPIO_DONGLE_GPIO1,
170 GPIO_DONGLE_GPIO2,
171 GPIO_DONGLE_GPIO3,
172 GPIO_DONGLE_PWR_EN,
173 GPIO_EMMC_RESET_N,
174 GPIO_TP_EXP2_IO15,
175 /* SURF expander */
176 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
177 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
178 GPIO_SD_CARD_DET_2,
179 GPIO_SD_CARD_DET_4,
180 GPIO_SD_CARD_DET_5,
181 GPIO_UIM3_RST,
182 GPIO_SURF_EXPANDER_IO5,
183 GPIO_SURF_EXPANDER_IO6,
184 GPIO_ADC_I2C_EN,
185 GPIO_SURF_EXPANDER_IO8,
186 GPIO_SURF_EXPANDER_IO9,
187 GPIO_SURF_EXPANDER_IO10,
188 GPIO_SURF_EXPANDER_IO11,
189 GPIO_SURF_EXPANDER_IO12,
190 GPIO_SURF_EXPANDER_IO13,
191 GPIO_SURF_EXPANDER_IO14,
192 GPIO_SURF_EXPANDER_IO15,
193 /* LEFT KB IO expander */
194 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
195 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
196 GPIO_LEFT_LED_2,
197 GPIO_LEFT_LED_3,
198 GPIO_LEFT_LED_WLAN,
199 GPIO_JOYSTICK_EN,
200 GPIO_CAP_TS_SLEEP,
201 GPIO_LEFT_KB_IO6,
202 GPIO_LEFT_LED_5,
203 /* RIGHT KB IO expander */
204 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
205 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
206 GPIO_RIGHT_LED_2,
207 GPIO_RIGHT_LED_3,
208 GPIO_RIGHT_LED_BT,
209 GPIO_WEB_CAMIF_STANDBY,
210 GPIO_COMPASS_RST_N,
211 GPIO_WEB_CAMIF_RESET_N,
212 GPIO_RIGHT_LED_5,
213 GPIO_R_ALTIMETER_RESET_N,
214 /* FLUID S IO expander */
215 GPIO_SOUTH_EXPANDER_BASE,
216 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC1_ANCL_SEL,
218 GPIO_HS_MIC4_SEL,
219 GPIO_FML_MIC3_SEL,
220 GPIO_FMR_MIC5_SEL,
221 GPIO_TS_SLEEP,
222 GPIO_HAP_SHIFT_LVL_OE,
223 GPIO_HS_SW_DIR,
224 /* FLUID N IO expander */
225 GPIO_NORTH_EXPANDER_BASE,
226 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_5V_BOOST_EN,
228 GPIO_AUX_CAM_2P7_EN,
229 GPIO_LED_FLASH_EN,
230 GPIO_LED1_GREEN_N,
231 GPIO_LED2_RED_N,
232 GPIO_FRONT_CAM_RESET_N,
233 GPIO_EPM_LVLSFT_EN,
234 GPIO_N_ALTIMETER_RESET_N,
235 /* EPM expander */
236 GPIO_EPM_EXPANDER_BASE,
237 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_RESET_N,
239 GPIO_ADC1_PWDN_N,
240 GPIO_ADC2_PWDN_N,
241 GPIO_EPM_EXPANDER_IO4,
242 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
243 GPIO_ADC2_MUX_SPI_INT_N,
244 GPIO_EPM_EXPANDER_IO7,
245 GPIO_PWR_MON_ENABLE,
246 GPIO_EPM_SPI_ADC1_CS_N,
247 GPIO_EPM_SPI_ADC2_CS_N,
248 GPIO_EPM_EXPANDER_IO11,
249 GPIO_EPM_EXPANDER_IO12,
250 GPIO_EPM_EXPANDER_IO13,
251 GPIO_EPM_EXPANDER_IO14,
252 GPIO_EPM_EXPANDER_IO15,
253};
254
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530255struct pm8xxx_mpp_init_info {
256 unsigned mpp;
257 struct pm8xxx_mpp_config_data config;
258};
259
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530260#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530261{ \
262 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
263 .config = { \
264 .type = PM8XXX_MPP_TYPE_##_type, \
265 .level = _level, \
266 .control = PM8XXX_MPP_##_control, \
267 } \
268}
269
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530270#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
271{ \
272 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
273 .config = { \
274 .type = PM8XXX_MPP_TYPE_##_type, \
275 .level = _level, \
276 .control = PM8XXX_MPP_##_control, \
277 } \
278}
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280/*
281 * The UI_INTx_N lines are pmic gpio lines which connect i2c
282 * gpio expanders to the pm8058.
283 */
284#define UI_INT1_N 25
285#define UI_INT2_N 34
286#define UI_INT3_N 14
287/*
288FM GPIO is GPIO 18 on PMIC 8058.
289As the index starts from 0 in the PMIC driver, and hence 17
290corresponds to GPIO 18 on PMIC 8058.
291*/
292#define FM_GPIO 17
293
294#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
295static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
296static void *sdc2_status_notify_cb_devid;
297#endif
298
299#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
300static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
301static void *sdc5_status_notify_cb_devid;
302#endif
303
304static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
305 [0] = {
306 .reg_base_addr = MSM_SAW0_BASE,
307
308#ifdef CONFIG_MSM_AVS_HW
309 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
310#endif
311 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
312 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
315
316 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
319
320 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
322 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
323
324 .awake_vlevel = 0x94,
325 .retention_vlevel = 0x81,
326 .collapse_vlevel = 0x20,
327 .retention_mid_vlevel = 0x94,
328 .collapse_mid_vlevel = 0x8C,
329
330 .vctl_timeout_us = 50,
331 },
332
333 [1] = {
334 .reg_base_addr = MSM_SAW1_BASE,
335
336#ifdef CONFIG_MSM_AVS_HW
337 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
338#endif
339 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
340 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
343
344 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
347
348 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
350 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
351
352 .awake_vlevel = 0x94,
353 .retention_vlevel = 0x81,
354 .collapse_vlevel = 0x20,
355 .retention_mid_vlevel = 0x94,
356 .collapse_mid_vlevel = 0x8C,
357
358 .vctl_timeout_us = 50,
359 },
360};
361
362static struct msm_spm_platform_data msm_spm_data[] __initdata = {
363 [0] = {
364 .reg_base_addr = MSM_SAW0_BASE,
365
366#ifdef CONFIG_MSM_AVS_HW
367 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
368#endif
369 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
370 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
373
374 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
377
378 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
380 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
381
382 .awake_vlevel = 0xA0,
383 .retention_vlevel = 0x89,
384 .collapse_vlevel = 0x20,
385 .retention_mid_vlevel = 0x89,
386 .collapse_mid_vlevel = 0x89,
387
388 .vctl_timeout_us = 50,
389 },
390
391 [1] = {
392 .reg_base_addr = MSM_SAW1_BASE,
393
394#ifdef CONFIG_MSM_AVS_HW
395 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
396#endif
397 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
398 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
401
402 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
405
406 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
408 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
409
410 .awake_vlevel = 0xA0,
411 .retention_vlevel = 0x89,
412 .collapse_vlevel = 0x20,
413 .retention_mid_vlevel = 0x89,
414 .collapse_mid_vlevel = 0x89,
415
416 .vctl_timeout_us = 50,
417 },
418};
419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700420/*
421 * Consumer specific regulator names:
422 * regulator name consumer dev_name
423 */
424static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
425 REGULATOR_SUPPLY("8901_s0", NULL),
426};
427static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
428 REGULATOR_SUPPLY("8901_s1", NULL),
429};
430
431static struct regulator_init_data saw_s0_init_data = {
432 .constraints = {
433 .name = "8901_s0",
434 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700435 .min_uV = 800000,
Matt Wagantall2ecbec22012-03-13 23:18:07 -0700436 .max_uV = 1325000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700437 },
438 .consumer_supplies = vreg_consumers_8901_S0,
439 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
440};
441
442static struct regulator_init_data saw_s1_init_data = {
443 .constraints = {
444 .name = "8901_s1",
445 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700446 .min_uV = 800000,
Matt Wagantall2ecbec22012-03-13 23:18:07 -0700447 .max_uV = 1325000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700448 },
449 .consumer_supplies = vreg_consumers_8901_S1,
450 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
451};
452
453static struct platform_device msm_device_saw_s0 = {
454 .name = "saw-regulator",
455 .id = 0,
456 .dev = {
457 .platform_data = &saw_s0_init_data,
458 },
459};
460
461static struct platform_device msm_device_saw_s1 = {
462 .name = "saw-regulator",
463 .id = 1,
464 .dev = {
465 .platform_data = &saw_s1_init_data,
466 },
467};
468
469/*
470 * The smc91x configuration varies depending on platform.
471 * The resources data structure is filled in at runtime.
472 */
473static struct resource smc91x_resources[] = {
474 [0] = {
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487};
488
489static struct resource smsc911x_resources[] = {
490 [0] = {
491 .flags = IORESOURCE_MEM,
492 .start = 0x1b800000,
493 .end = 0x1b8000ff
494 },
495 [1] = {
496 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
497 },
498};
499
500static struct smsc911x_platform_config smsc911x_config = {
501 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
502 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
503 .flags = SMSC911X_USE_16BIT,
504 .has_reset_gpio = 1,
505 .reset_gpio = GPIO_ETHERNET_RESET_N
506};
507
508static struct platform_device smsc911x_device = {
509 .name = "smsc911x",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(smsc911x_resources),
512 .resource = smsc911x_resources,
513 .dev = {
514 .platform_data = &smsc911x_config
515 }
516};
517
518#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
519 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
520 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
522
523#define QCE_SIZE 0x10000
524#define QCE_0_BASE 0x18500000
525
526#define QCE_HW_KEY_SUPPORT 0
527#define QCE_SHA_HMAC_SUPPORT 0
528#define QCE_SHARE_CE_RESOURCE 2
529#define QCE_CE_SHARED 1
530
531static struct resource qcrypto_resources[] = {
532 [0] = {
533 .start = QCE_0_BASE,
534 .end = QCE_0_BASE + QCE_SIZE - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .name = "crypto_channels",
539 .start = DMOV_CE_IN_CHAN,
540 .end = DMOV_CE_OUT_CHAN,
541 .flags = IORESOURCE_DMA,
542 },
543 [2] = {
544 .name = "crypto_crci_in",
545 .start = DMOV_CE_IN_CRCI,
546 .end = DMOV_CE_IN_CRCI,
547 .flags = IORESOURCE_DMA,
548 },
549 [3] = {
550 .name = "crypto_crci_out",
551 .start = DMOV_CE_OUT_CRCI,
552 .end = DMOV_CE_OUT_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [4] = {
556 .name = "crypto_crci_hash",
557 .start = DMOV_CE_HASH_CRCI,
558 .end = DMOV_CE_HASH_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563static struct resource qcedev_resources[] = {
564 [0] = {
565 .start = QCE_0_BASE,
566 .end = QCE_0_BASE + QCE_SIZE - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .name = "crypto_channels",
571 .start = DMOV_CE_IN_CHAN,
572 .end = DMOV_CE_OUT_CHAN,
573 .flags = IORESOURCE_DMA,
574 },
575 [2] = {
576 .name = "crypto_crci_in",
577 .start = DMOV_CE_IN_CRCI,
578 .end = DMOV_CE_IN_CRCI,
579 .flags = IORESOURCE_DMA,
580 },
581 [3] = {
582 .name = "crypto_crci_out",
583 .start = DMOV_CE_OUT_CRCI,
584 .end = DMOV_CE_OUT_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [4] = {
588 .name = "crypto_crci_hash",
589 .start = DMOV_CE_HASH_CRCI,
590 .end = DMOV_CE_HASH_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593};
594
595#endif
596
597#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
598 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
599
600static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
601 .ce_shared = QCE_CE_SHARED,
602 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
603 .hw_key_support = QCE_HW_KEY_SUPPORT,
604 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800605 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700606};
607
608static struct platform_device qcrypto_device = {
609 .name = "qcrypto",
610 .id = 0,
611 .num_resources = ARRAY_SIZE(qcrypto_resources),
612 .resource = qcrypto_resources,
613 .dev = {
614 .coherent_dma_mask = DMA_BIT_MASK(32),
615 .platform_data = &qcrypto_ce_hw_suppport,
616 },
617};
618#endif
619
620#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
621 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
622
623static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
624 .ce_shared = QCE_CE_SHARED,
625 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
626 .hw_key_support = QCE_HW_KEY_SUPPORT,
627 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800628 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700629};
630
631static struct platform_device qcedev_device = {
632 .name = "qce",
633 .id = 0,
634 .num_resources = ARRAY_SIZE(qcedev_resources),
635 .resource = qcedev_resources,
636 .dev = {
637 .coherent_dma_mask = DMA_BIT_MASK(32),
638 .platform_data = &qcedev_ce_hw_suppport,
639 },
640};
641#endif
642
643#if defined(CONFIG_HAPTIC_ISA1200) || \
644 defined(CONFIG_HAPTIC_ISA1200_MODULE)
645
646static const char *vregs_isa1200_name[] = {
647 "8058_s3",
648 "8901_l4",
649};
650
651static const int vregs_isa1200_val[] = {
652 1800000,/* uV */
653 2600000,
654};
655static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
656static struct msm_xo_voter *xo_handle_a1;
657
658static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800659{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700660 int i, rc = 0;
661
662 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
663 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
664 regulator_disable(vregs_isa1200[i]);
665 if (rc < 0) {
666 pr_err("%s: vreg %s %s failed (%d)\n",
667 __func__, vregs_isa1200_name[i],
668 vreg_on ? "enable" : "disable", rc);
669 goto vreg_fail;
670 }
671 }
672
673 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
674 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
675 if (rc < 0) {
676 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
677 __func__, vreg_on ? "" : "de-", rc);
678 goto vreg_fail;
679 }
680 return 0;
681
682vreg_fail:
683 while (i--)
684 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
685 regulator_disable(vregs_isa1200[i]);
686 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800687}
688
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800690{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800692
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700693 if (enable == true) {
694 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
695 vregs_isa1200[i] = regulator_get(NULL,
696 vregs_isa1200_name[i]);
697 if (IS_ERR(vregs_isa1200[i])) {
698 pr_err("%s: regulator get of %s failed (%ld)\n",
699 __func__, vregs_isa1200_name[i],
700 PTR_ERR(vregs_isa1200[i]));
701 rc = PTR_ERR(vregs_isa1200[i]);
702 goto vreg_get_fail;
703 }
704 rc = regulator_set_voltage(vregs_isa1200[i],
705 vregs_isa1200_val[i], vregs_isa1200_val[i]);
706 if (rc) {
707 pr_err("%s: regulator_set_voltage(%s) failed\n",
708 __func__, vregs_isa1200_name[i]);
709 goto vreg_get_fail;
710 }
711 }
Steve Muckle9161d302010-02-11 11:50:40 -0800712
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700713 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
714 if (rc) {
715 pr_err("%s: unable to request gpio %d (%d)\n",
716 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
717 goto vreg_get_fail;
718 }
Steve Muckle9161d302010-02-11 11:50:40 -0800719
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700720 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
721 if (rc) {
722 pr_err("%s: Unable to set direction\n", __func__);;
723 goto free_gpio;
724 }
725
726 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
727 if (IS_ERR(xo_handle_a1)) {
728 rc = PTR_ERR(xo_handle_a1);
729 pr_err("%s: failed to get the handle for A1(%d)\n",
730 __func__, rc);
731 goto gpio_set_dir;
732 }
733 } else {
734 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
735 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
736
737 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
738 regulator_put(vregs_isa1200[i]);
739
740 msm_xo_put(xo_handle_a1);
741 }
742
743 return 0;
744gpio_set_dir:
745 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
746free_gpio:
747 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
748vreg_get_fail:
749 while (i)
750 regulator_put(vregs_isa1200[--i]);
751 return rc;
752}
753
754#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530755#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700756static struct isa1200_platform_data isa1200_1_pdata = {
757 .name = "vibrator",
758 .power_on = isa1200_power,
759 .dev_setup = isa1200_dev_setup,
760 /*gpio to enable haptic*/
761 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530762 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700763 .max_timeout = 15000,
764 .mode_ctrl = PWM_GEN_MODE,
765 .pwm_fd = {
766 .pwm_div = 256,
767 },
768 .is_erm = false,
769 .smart_en = true,
770 .ext_clk_en = true,
771 .chip_en = 1,
772};
773
774static struct i2c_board_info msm_isa1200_board_info[] = {
775 {
776 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
777 .platform_data = &isa1200_1_pdata,
778 },
779};
780#endif
781
782#if defined(CONFIG_BATTERY_BQ27520) || \
783 defined(CONFIG_BATTERY_BQ27520_MODULE)
784static struct bq27520_platform_data bq27520_pdata = {
785 .name = "fuel-gauge",
786 .vreg_name = "8058_s3",
787 .vreg_value = 1800000,
788 .soc_int = GPIO_BATT_GAUGE_INT_N,
789 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
790 .chip_en = GPIO_BATT_GAUGE_EN,
791 .enable_dlog = 0, /* if enable coulomb counter logger */
792};
793
794static struct i2c_board_info msm_bq27520_board_info[] = {
795 {
796 I2C_BOARD_INFO("bq27520", 0xaa>>1),
797 .platform_data = &bq27520_pdata,
798 },
799};
800#endif
801
802static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
803 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
804 .idle_supported = 1,
805 .suspend_supported = 1,
806 .idle_enabled = 0,
807 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700808 },
809
810 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
811 .idle_supported = 1,
812 .suspend_supported = 1,
813 .idle_enabled = 0,
814 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700815 },
816
817 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
818 .idle_supported = 1,
819 .suspend_supported = 1,
820 .idle_enabled = 1,
821 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700822 },
823
824 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
825 .idle_supported = 1,
826 .suspend_supported = 1,
827 .idle_enabled = 0,
828 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700829 },
830
831 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
832 .idle_supported = 1,
833 .suspend_supported = 1,
834 .idle_enabled = 0,
835 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700836 },
837
838 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
839 .idle_supported = 1,
840 .suspend_supported = 1,
841 .idle_enabled = 1,
842 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700843 },
844};
845
846static struct msm_cpuidle_state msm_cstates[] __initdata = {
847 {0, 0, "C0", "WFI",
848 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
849
850 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
851 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
852
853 {0, 2, "C2", "POWER_COLLAPSE",
854 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
855
856 {1, 0, "C0", "WFI",
857 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
858
859 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
860 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
861};
862
863static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
864 {
865 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
866 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
867 true,
868 1, 8000, 100000, 1,
869 },
870
871 {
872 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
873 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
874 true,
875 1500, 5000, 60100000, 3000,
876 },
877
878 {
879 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
880 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
881 false,
882 1800, 5000, 60350000, 3500,
883 },
884 {
885 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
886 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
887 false,
888 3800, 4500, 65350000, 5500,
889 },
890
891 {
892 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
893 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
894 false,
895 2800, 2500, 66850000, 4800,
896 },
897
898 {
899 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
900 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
901 false,
902 4800, 2000, 71850000, 6800,
903 },
904
905 {
906 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
907 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
908 false,
909 6800, 500, 75850000, 8800,
910 },
911
912 {
913 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
914 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
915 false,
916 7800, 0, 76350000, 9800,
917 },
918};
919
Praveen Chidambaram78499012011-11-01 17:15:17 -0600920static struct msm_rpmrs_platform_data msm_rpmrs_data __initdata = {
921 .levels = &msm_rpmrs_levels[0],
922 .num_levels = ARRAY_SIZE(msm_rpmrs_levels),
923 .vdd_mem_levels = {
924 [MSM_RPMRS_VDD_MEM_RET_LOW] = 500,
925 [MSM_RPMRS_VDD_MEM_RET_HIGH] = 750,
926 [MSM_RPMRS_VDD_MEM_ACTIVE] = 1000,
Matt Wagantall2ecbec22012-03-13 23:18:07 -0700927 [MSM_RPMRS_VDD_MEM_MAX] = 1325,
Praveen Chidambaram78499012011-11-01 17:15:17 -0600928 },
929 .vdd_dig_levels = {
930 [MSM_RPMRS_VDD_DIG_RET_LOW] = 500,
931 [MSM_RPMRS_VDD_DIG_RET_HIGH] = 750,
932 [MSM_RPMRS_VDD_DIG_ACTIVE] = 1000,
933 [MSM_RPMRS_VDD_DIG_MAX] = 1250,
934 },
935 .vdd_mask = 0xFFF,
936 .rpmrs_target_id = {
937 [MSM_RPMRS_ID_PXO_CLK] = MSM_RPM_ID_PXO_CLK,
938 [MSM_RPMRS_ID_L2_CACHE_CTL] = MSM_RPM_ID_APPS_L2_CACHE_CTL,
939 [MSM_RPMRS_ID_VDD_DIG_0] = MSM_RPM_ID_SMPS1_0,
940 [MSM_RPMRS_ID_VDD_DIG_1] = MSM_RPM_ID_SMPS1_1,
941 [MSM_RPMRS_ID_VDD_MEM_0] = MSM_RPM_ID_SMPS0_0,
942 [MSM_RPMRS_ID_VDD_MEM_1] = MSM_RPM_ID_SMPS0_1,
943 [MSM_RPMRS_ID_RPM_CTL] = MSM_RPM_ID_TRIGGER_SET_FROM,
944 },
945};
946
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600947static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
948 .mode = MSM_PM_BOOT_CONFIG_TZ,
949};
950
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700951#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
952
953#define ISP1763_INT_GPIO 117
954#define ISP1763_RST_GPIO 152
955static struct resource isp1763_resources[] = {
956 [0] = {
957 .flags = IORESOURCE_MEM,
958 .start = 0x1D000000,
959 .end = 0x1D005FFF, /* 24KB */
960 },
961 [1] = {
962 .flags = IORESOURCE_IRQ,
963 },
964};
965static void __init msm8x60_cfg_isp1763(void)
966{
967 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
968 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
969}
970
971static int isp1763_setup_gpio(int enable)
972{
973 int status = 0;
974
975 if (enable) {
976 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
977 if (status) {
978 pr_err("%s:Failed to request GPIO %d\n",
979 __func__, ISP1763_INT_GPIO);
980 return status;
981 }
982 status = gpio_direction_input(ISP1763_INT_GPIO);
983 if (status) {
984 pr_err("%s:Failed to configure GPIO %d\n",
985 __func__, ISP1763_INT_GPIO);
986 goto gpio_free_int;
987 }
988 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
989 if (status) {
990 pr_err("%s:Failed to request GPIO %d\n",
991 __func__, ISP1763_RST_GPIO);
992 goto gpio_free_int;
993 }
994 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
995 if (status) {
996 pr_err("%s:Failed to configure GPIO %d\n",
997 __func__, ISP1763_RST_GPIO);
998 goto gpio_free_rst;
999 }
1000 pr_debug("\nISP GPIO configuration done\n");
1001 return status;
1002 }
1003
1004gpio_free_rst:
1005 gpio_free(ISP1763_RST_GPIO);
1006gpio_free_int:
1007 gpio_free(ISP1763_INT_GPIO);
1008
1009 return status;
1010}
1011static struct isp1763_platform_data isp1763_pdata = {
1012 .reset_gpio = ISP1763_RST_GPIO,
1013 .setup_gpio = isp1763_setup_gpio
1014};
1015
1016static struct platform_device isp1763_device = {
1017 .name = "isp1763_usb",
1018 .num_resources = ARRAY_SIZE(isp1763_resources),
1019 .resource = isp1763_resources,
1020 .dev = {
1021 .platform_data = &isp1763_pdata
1022 }
1023};
1024#endif
1025
Lena Salman57d167e2012-03-21 19:46:38 +02001026#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301027static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001028static struct regulator *ldo6_3p3;
1029static struct regulator *ldo7_1p8;
1030static struct regulator *vdd_cx;
1031#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301032#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001033notify_vbus_state notify_vbus_state_func_ptr;
1034static int usb_phy_susp_dig_vol = 750000;
1035static int pmic_id_notif_supported;
1036
1037#ifdef CONFIG_USB_EHCI_MSM_72K
1038#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1039struct delayed_work pmic_id_det;
1040
1041static int __init usb_id_pin_rework_setup(char *support)
1042{
1043 if (strncmp(support, "true", 4) == 0)
1044 pmic_id_notif_supported = 1;
1045
1046 return 1;
1047}
1048__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1049
1050static void pmic_id_detect(struct work_struct *w)
1051{
1052 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1053 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1054
1055 if (notify_vbus_state_func_ptr)
1056 (*notify_vbus_state_func_ptr) (val);
1057}
1058
1059static irqreturn_t pmic_id_on_irq(int irq, void *data)
1060{
1061 /*
1062 * Spurious interrupts are observed on pmic gpio line
1063 * even though there is no state change on USB ID. Schedule the
1064 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001065 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001066 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001067
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001068 return IRQ_HANDLED;
1069}
1070
Anji jonnalaae745e92011-11-14 18:34:31 +05301071static int msm_hsusb_phy_id_setup_init(int init)
1072{
1073 unsigned ret;
1074
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301075 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1076 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1077 .level = PM8901_MPP_DIG_LEVEL_L5,
1078 };
1079
Anji jonnalaae745e92011-11-14 18:34:31 +05301080 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301081 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1082 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1083 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301084 if (ret < 0)
1085 pr_err("%s:MPP2 configuration failed\n", __func__);
1086 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301087 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1088 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1089 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301090 if (ret < 0)
1091 pr_err("%s:MPP2 un config failed\n", __func__);
1092 }
1093 return ret;
1094}
1095
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001096static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1097{
1098 unsigned ret = -ENODEV;
1099
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301100 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301101 .direction = PM_GPIO_DIR_IN,
1102 .pull = PM_GPIO_PULL_UP_1P5,
1103 .function = PM_GPIO_FUNC_NORMAL,
1104 .vin_sel = 2,
1105 .inv_int_pol = 0,
1106 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301107 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301108 .direction = PM_GPIO_DIR_IN,
1109 .pull = PM_GPIO_PULL_NO,
1110 .function = PM_GPIO_FUNC_NORMAL,
1111 .vin_sel = 2,
1112 .inv_int_pol = 0,
1113 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001114 if (!callback)
1115 return -EINVAL;
1116
1117 if (machine_is_msm8x60_fluid())
1118 return -ENOTSUPP;
1119
1120 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1121 pr_debug("%s: USB_ID pin is not routed to PMIC"
1122 "on V1 surf/ffa\n", __func__);
1123 return -ENOTSUPP;
1124 }
1125
Manu Gautam62158eb2011-11-24 16:20:46 +05301126 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1127 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001128 pr_debug("%s: USB_ID is not routed to PMIC"
1129 "on V2 ffa\n", __func__);
1130 return -ENOTSUPP;
1131 }
1132
1133 usb_phy_susp_dig_vol = 500000;
1134
1135 if (init) {
1136 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301137 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301138 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1139 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301140 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301141 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301142 __func__, ret);
1143 return ret;
1144 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001145 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1146 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1147 "msm_otg_id", NULL);
1148 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001149 pr_err("%s:pmic_usb_id interrupt registration failed",
1150 __func__);
1151 return ret;
1152 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301153 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001154 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301155 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001156 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301157 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1158 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301159 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301160 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301161 __func__, ret);
1162 return ret;
1163 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301164 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001165 cancel_delayed_work_sync(&pmic_id_det);
1166 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001167 }
1168 return 0;
1169}
1170#endif
1171
1172#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1173#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1174static int msm_hsusb_init_vddcx(int init)
1175{
1176 int ret = 0;
1177
1178 if (init) {
1179 vdd_cx = regulator_get(NULL, "8058_s1");
1180 if (IS_ERR(vdd_cx)) {
1181 return PTR_ERR(vdd_cx);
1182 }
1183
1184 ret = regulator_set_voltage(vdd_cx,
1185 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1186 USB_PHY_MAX_VDD_DIG_VOL);
1187 if (ret) {
1188 pr_err("%s: unable to set the voltage for regulator"
1189 "vdd_cx\n", __func__);
1190 regulator_put(vdd_cx);
1191 return ret;
1192 }
1193
1194 ret = regulator_enable(vdd_cx);
1195 if (ret) {
1196 pr_err("%s: unable to enable regulator"
1197 "vdd_cx\n", __func__);
1198 regulator_put(vdd_cx);
1199 }
1200 } else {
1201 ret = regulator_disable(vdd_cx);
1202 if (ret) {
1203 pr_err("%s: Unable to disable the regulator:"
1204 "vdd_cx\n", __func__);
1205 return ret;
1206 }
1207
1208 regulator_put(vdd_cx);
1209 }
1210
1211 return ret;
1212}
1213
1214static int msm_hsusb_config_vddcx(int high)
1215{
1216 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1217 int min_vol;
1218 int ret;
1219
1220 if (high)
1221 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1222 else
1223 min_vol = usb_phy_susp_dig_vol;
1224
1225 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1226 if (ret) {
1227 pr_err("%s: unable to set the voltage for regulator"
1228 "vdd_cx\n", __func__);
1229 return ret;
1230 }
1231
1232 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1233
1234 return ret;
1235}
1236
1237#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1238#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1239#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1240#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1241
1242#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1243#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1244#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1245#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1246static int msm_hsusb_ldo_init(int init)
1247{
1248 int rc = 0;
1249
1250 if (init) {
1251 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1252 if (IS_ERR(ldo6_3p3))
1253 return PTR_ERR(ldo6_3p3);
1254
1255 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1256 if (IS_ERR(ldo7_1p8)) {
1257 rc = PTR_ERR(ldo7_1p8);
1258 goto put_3p3;
1259 }
1260
1261 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1262 USB_PHY_3P3_VOL_MAX);
1263 if (rc) {
1264 pr_err("%s: Unable to set voltage level for"
1265 "ldo6_3p3 regulator\n", __func__);
1266 goto put_1p8;
1267 }
1268 rc = regulator_enable(ldo6_3p3);
1269 if (rc) {
1270 pr_err("%s: Unable to enable the regulator:"
1271 "ldo6_3p3\n", __func__);
1272 goto put_1p8;
1273 }
1274 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1275 USB_PHY_1P8_VOL_MAX);
1276 if (rc) {
1277 pr_err("%s: Unable to set voltage level for"
1278 "ldo7_1p8 regulator\n", __func__);
1279 goto disable_3p3;
1280 }
1281 rc = regulator_enable(ldo7_1p8);
1282 if (rc) {
1283 pr_err("%s: Unable to enable the regulator:"
1284 "ldo7_1p8\n", __func__);
1285 goto disable_3p3;
1286 }
1287
1288 return 0;
1289 }
1290
1291 regulator_disable(ldo7_1p8);
1292disable_3p3:
1293 regulator_disable(ldo6_3p3);
1294put_1p8:
1295 regulator_put(ldo7_1p8);
1296put_3p3:
1297 regulator_put(ldo6_3p3);
1298 return rc;
1299}
1300
1301static int msm_hsusb_ldo_enable(int on)
1302{
1303 int ret = 0;
1304
1305 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1306 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1307 return -ENODEV;
1308 }
1309
1310 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1311 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1312 return -ENODEV;
1313 }
1314
1315 if (on) {
1316 ret = regulator_set_optimum_mode(ldo7_1p8,
1317 USB_PHY_1P8_HPM_LOAD);
1318 if (ret < 0) {
1319 pr_err("%s: Unable to set HPM of the regulator:"
1320 "ldo7_1p8\n", __func__);
1321 return ret;
1322 }
1323 ret = regulator_set_optimum_mode(ldo6_3p3,
1324 USB_PHY_3P3_HPM_LOAD);
1325 if (ret < 0) {
1326 pr_err("%s: Unable to set HPM of the regulator:"
1327 "ldo6_3p3\n", __func__);
1328 regulator_set_optimum_mode(ldo7_1p8,
1329 USB_PHY_1P8_LPM_LOAD);
1330 return ret;
1331 }
1332 } else {
1333 ret = regulator_set_optimum_mode(ldo7_1p8,
1334 USB_PHY_1P8_LPM_LOAD);
1335 if (ret < 0)
1336 pr_err("%s: Unable to set LPM of the regulator:"
1337 "ldo7_1p8\n", __func__);
1338 ret = regulator_set_optimum_mode(ldo6_3p3,
1339 USB_PHY_3P3_LPM_LOAD);
1340 if (ret < 0)
1341 pr_err("%s: Unable to set LPM of the regulator:"
1342 "ldo6_3p3\n", __func__);
1343 }
1344
1345 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1346 return ret < 0 ? ret : 0;
1347 }
1348#endif
1349#ifdef CONFIG_USB_EHCI_MSM_72K
1350#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1351static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1352{
1353 static int vbus_is_on;
1354
1355 /* If VBUS is already on (or off), do nothing. */
1356 if (on == vbus_is_on)
1357 return;
1358 smb137b_otg_power(on);
1359 vbus_is_on = on;
1360}
1361#endif
1362static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1363{
1364 static struct regulator *votg_5v_switch;
1365 static struct regulator *ext_5v_reg;
1366 static int vbus_is_on;
1367
1368 /* If VBUS is already on (or off), do nothing. */
1369 if (on == vbus_is_on)
1370 return;
1371
1372 if (!votg_5v_switch) {
1373 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1374 if (IS_ERR(votg_5v_switch)) {
1375 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1376 return;
1377 }
1378 }
1379 if (!ext_5v_reg) {
1380 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1381 if (IS_ERR(ext_5v_reg)) {
1382 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1383 return;
1384 }
1385 }
1386 if (on) {
1387 if (regulator_enable(ext_5v_reg)) {
1388 pr_err("%s: Unable to enable the regulator:"
1389 " ext_5v_reg\n", __func__);
1390 return;
1391 }
1392 if (regulator_enable(votg_5v_switch)) {
1393 pr_err("%s: Unable to enable the regulator:"
1394 " votg_5v_switch\n", __func__);
1395 return;
1396 }
1397 } else {
1398 if (regulator_disable(votg_5v_switch))
1399 pr_err("%s: Unable to enable the regulator:"
1400 " votg_5v_switch\n", __func__);
1401 if (regulator_disable(ext_5v_reg))
1402 pr_err("%s: Unable to enable the regulator:"
1403 " ext_5v_reg\n", __func__);
1404 }
1405
1406 vbus_is_on = on;
1407}
1408
1409static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1410 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1411 .power_budget = 390,
1412};
1413#endif
1414
1415#ifdef CONFIG_BATTERY_MSM8X60
1416static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1417 int init)
1418{
1419 int ret = -ENOTSUPP;
1420
1421#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1422 if (machine_is_msm8x60_fluid()) {
1423 if (init)
1424 msm_charger_register_vbus_sn(callback);
1425 else
1426 msm_charger_unregister_vbus_sn(callback);
1427 return 0;
1428 }
1429#endif
1430 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1431 * hence, irrespective of either peripheral only mode or
1432 * OTG (host and peripheral) modes, can depend on pmic for
1433 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001434 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001435 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1436 && (machine_is_msm8x60_surf() ||
1437 pmic_id_notif_supported)) {
1438 if (init)
1439 ret = msm_charger_register_vbus_sn(callback);
1440 else {
1441 msm_charger_unregister_vbus_sn(callback);
1442 ret = 0;
1443 }
1444 } else {
1445#if !defined(CONFIG_USB_EHCI_MSM_72K)
1446 if (init)
1447 ret = msm_charger_register_vbus_sn(callback);
1448 else {
1449 msm_charger_unregister_vbus_sn(callback);
1450 ret = 0;
1451 }
1452#endif
1453 }
1454 return ret;
1455}
1456#endif
1457
Lena Salman57d167e2012-03-21 19:46:38 +02001458#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001459static struct msm_otg_platform_data msm_otg_pdata = {
1460 /* if usb link is in sps there is no need for
1461 * usb pclk as dayatona fabric clock will be
1462 * used instead
1463 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001464 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1465 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1466 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301467 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001468#ifdef CONFIG_USB_EHCI_MSM_72K
1469 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301470 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001471#endif
1472#ifdef CONFIG_USB_EHCI_MSM_72K
1473 .vbus_power = msm_hsusb_vbus_power,
1474#endif
1475#ifdef CONFIG_BATTERY_MSM8X60
1476 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1477#endif
1478 .ldo_init = msm_hsusb_ldo_init,
1479 .ldo_enable = msm_hsusb_ldo_enable,
1480 .config_vddcx = msm_hsusb_config_vddcx,
1481 .init_vddcx = msm_hsusb_init_vddcx,
1482#ifdef CONFIG_BATTERY_MSM8X60
1483 .chg_vbus_draw = msm_charger_vbus_draw,
1484#endif
1485};
1486#endif
1487
Lena Salman57d167e2012-03-21 19:46:38 +02001488#ifdef CONFIG_USB_MSM_72K
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001489static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1490 .is_phy_status_timer_on = 1,
1491};
1492#endif
1493
1494#ifdef CONFIG_USB_G_ANDROID
1495
1496#define PID_MAGIC_ID 0x71432909
1497#define SERIAL_NUM_MAGIC_ID 0x61945374
1498#define SERIAL_NUMBER_LENGTH 127
1499#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1500
1501struct magic_num_struct {
1502 uint32_t pid;
1503 uint32_t serial_num;
1504};
1505
1506struct dload_struct {
1507 uint32_t reserved1;
1508 uint32_t reserved2;
1509 uint32_t reserved3;
1510 uint16_t reserved4;
1511 uint16_t pid;
1512 char serial_number[SERIAL_NUMBER_LENGTH];
1513 uint16_t reserved5;
1514 struct magic_num_struct
1515 magic_struct;
1516};
1517
1518static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1519{
1520 struct dload_struct __iomem *dload = 0;
1521
1522 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1523 if (!dload) {
1524 pr_err("%s: cannot remap I/O memory region: %08x\n",
1525 __func__, DLOAD_USB_BASE_ADD);
1526 return -ENXIO;
1527 }
1528
1529 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1530 __func__, dload, pid, snum);
1531 /* update pid */
1532 dload->magic_struct.pid = PID_MAGIC_ID;
1533 dload->pid = pid;
1534
1535 /* update serial number */
1536 dload->magic_struct.serial_num = 0;
1537 if (!snum)
1538 return 0;
1539
1540 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1541 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1542 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1543
1544 iounmap(dload);
1545
1546 return 0;
1547}
1548
1549static struct android_usb_platform_data android_usb_pdata = {
1550 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1551};
1552
1553static struct platform_device android_usb_device = {
1554 .name = "android_usb",
1555 .id = -1,
1556 .dev = {
1557 .platform_data = &android_usb_pdata,
1558 },
1559};
1560
1561
1562#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001563
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001564#ifdef CONFIG_MSM_VPE
1565static struct resource msm_vpe_resources[] = {
1566 {
1567 .start = 0x05300000,
1568 .end = 0x05300000 + SZ_1M - 1,
1569 .flags = IORESOURCE_MEM,
1570 },
1571 {
1572 .start = INT_VPE,
1573 .end = INT_VPE,
1574 .flags = IORESOURCE_IRQ,
1575 },
1576};
1577
1578static struct platform_device msm_vpe_device = {
1579 .name = "msm_vpe",
1580 .id = 0,
1581 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1582 .resource = msm_vpe_resources,
1583};
1584#endif
1585
1586#ifdef CONFIG_MSM_CAMERA
1587#ifdef CONFIG_MSM_CAMERA_FLASH
1588#define VFE_CAMIF_TIMER1_GPIO 29
1589#define VFE_CAMIF_TIMER2_GPIO 30
1590#define VFE_CAMIF_TIMER3_GPIO_INT 31
1591#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1592static struct msm_camera_sensor_flash_src msm_flash_src = {
1593 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1594 ._fsrc.pmic_src.num_of_src = 2,
1595 ._fsrc.pmic_src.low_current = 100,
1596 ._fsrc.pmic_src.high_current = 300,
1597 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1598 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1599 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1600};
1601#ifdef CONFIG_IMX074
1602static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1603 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1604 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1605 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1606 .flash_recharge_duration = 50000,
1607 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1608};
1609#endif
1610#endif
1611
1612int msm_cam_gpio_tbl[] = {
1613 32,/*CAMIF_MCLK*/
1614 47,/*CAMIF_I2C_DATA*/
1615 48,/*CAMIF_I2C_CLK*/
1616 105,/*STANDBY*/
1617};
1618
1619enum msm_cam_stat{
1620 MSM_CAM_OFF,
1621 MSM_CAM_ON,
1622};
1623
1624static int config_gpio_table(enum msm_cam_stat stat)
1625{
1626 int rc = 0, i = 0;
1627 if (stat == MSM_CAM_ON) {
1628 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1629 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1630 if (unlikely(rc < 0)) {
1631 pr_err("%s not able to get gpio\n", __func__);
1632 for (i--; i >= 0; i--)
1633 gpio_free(msm_cam_gpio_tbl[i]);
1634 break;
1635 }
1636 }
1637 } else {
1638 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1639 gpio_free(msm_cam_gpio_tbl[i]);
1640 }
1641 return rc;
1642}
1643
1644static struct msm_camera_sensor_platform_info sensor_board_info = {
1645 .mount_angle = 0
1646};
1647
1648/*external regulator VREG_5V*/
1649static struct regulator *reg_flash_5V;
1650
1651static int config_camera_on_gpios_fluid(void)
1652{
1653 int rc = 0;
1654
1655 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1656 if (IS_ERR(reg_flash_5V)) {
1657 pr_err("'%s' regulator not found, rc=%ld\n",
1658 "8901_mpp0", IS_ERR(reg_flash_5V));
1659 return -ENODEV;
1660 }
1661
1662 rc = regulator_enable(reg_flash_5V);
1663 if (rc) {
1664 pr_err("'%s' regulator enable failed, rc=%d\n",
1665 "8901_mpp0", rc);
1666 regulator_put(reg_flash_5V);
1667 return rc;
1668 }
1669
1670#ifdef CONFIG_IMX074
1671 sensor_board_info.mount_angle = 90;
1672#endif
1673 rc = config_gpio_table(MSM_CAM_ON);
1674 if (rc < 0) {
1675 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1676 "failed\n", __func__);
1677 return rc;
1678 }
1679
1680 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1681 if (rc < 0) {
1682 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1683 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1684 regulator_disable(reg_flash_5V);
1685 regulator_put(reg_flash_5V);
1686 return rc;
1687 }
1688 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1689 msleep(20);
1690 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1691
1692
1693 /*Enable LED_FLASH_EN*/
1694 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1695 if (rc < 0) {
1696 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1697 "failed\n", __func__, GPIO_LED_FLASH_EN);
1698
1699 regulator_disable(reg_flash_5V);
1700 regulator_put(reg_flash_5V);
1701 config_gpio_table(MSM_CAM_OFF);
1702 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1703 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1704 return rc;
1705 }
1706 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1707 msleep(20);
1708 return rc;
1709}
1710
1711
1712static void config_camera_off_gpios_fluid(void)
1713{
1714 regulator_disable(reg_flash_5V);
1715 regulator_put(reg_flash_5V);
1716
1717 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1718 gpio_free(GPIO_LED_FLASH_EN);
1719
1720 config_gpio_table(MSM_CAM_OFF);
1721
1722 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1723 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1724}
1725static int config_camera_on_gpios(void)
1726{
1727 int rc = 0;
1728
1729 if (machine_is_msm8x60_fluid())
1730 return config_camera_on_gpios_fluid();
1731
1732 rc = config_gpio_table(MSM_CAM_ON);
1733 if (rc < 0) {
1734 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1735 "failed\n", __func__);
1736 return rc;
1737 }
1738
Jilai Wang971f97f2011-07-13 14:25:25 -04001739 if (!machine_is_msm8x60_dragon()) {
1740 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1741 if (rc < 0) {
1742 config_gpio_table(MSM_CAM_OFF);
1743 pr_err("%s: CAMSENSOR gpio %d request"
1744 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1745 return rc;
1746 }
1747 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1748 msleep(20);
1749 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001750 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001751
1752#ifdef CONFIG_MSM_CAMERA_FLASH
1753#ifdef CONFIG_IMX074
1754 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1755 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1756#endif
1757#endif
1758 return rc;
1759}
1760
1761static void config_camera_off_gpios(void)
1762{
1763 if (machine_is_msm8x60_fluid())
1764 return config_camera_off_gpios_fluid();
1765
1766
1767 config_gpio_table(MSM_CAM_OFF);
1768
Jilai Wang971f97f2011-07-13 14:25:25 -04001769 if (!machine_is_msm8x60_dragon()) {
1770 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1771 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1772 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001773}
1774
1775#ifdef CONFIG_QS_S5K4E1
1776
1777#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1778
1779static int config_camera_on_gpios_qs_cam_fluid(void)
1780{
1781 int rc = 0;
1782
1783 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1784 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1785 if (rc < 0) {
1786 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1787 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1788 return rc;
1789 }
1790 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1791 msleep(20);
1792 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1793 msleep(20);
1794
1795 /*
1796 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1797 * to enable 2.7V power to Camera
1798 */
1799 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1800 if (rc < 0) {
1801 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1802 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1803 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1804 gpio_free(QS_CAM_HC37_CAM_PD);
1805 return rc;
1806 }
1807 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1808 msleep(20);
1809 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1810 msleep(20);
1811
1812 rc = config_camera_on_gpios_fluid();
1813 if (rc < 0) {
1814 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1815 " failed\n", __func__);
1816 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1817 gpio_free(QS_CAM_HC37_CAM_PD);
1818 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1819 gpio_free(GPIO_AUX_CAM_2P7_EN);
1820 return rc;
1821 }
1822 return rc;
1823}
1824
1825static void config_camera_off_gpios_qs_cam_fluid(void)
1826{
1827 /*
1828 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1829 * to disable 2.7V power to Camera
1830 */
1831 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1832 gpio_free(GPIO_AUX_CAM_2P7_EN);
1833
1834 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1835 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1836 gpio_free(QS_CAM_HC37_CAM_PD);
1837
1838 config_camera_off_gpios_fluid();
1839 return;
1840}
1841
1842static int config_camera_on_gpios_qs_cam(void)
1843{
1844 int rc = 0;
1845
1846 if (machine_is_msm8x60_fluid())
1847 return config_camera_on_gpios_qs_cam_fluid();
1848
1849 rc = config_camera_on_gpios();
1850 return rc;
1851}
1852
1853static void config_camera_off_gpios_qs_cam(void)
1854{
1855 if (machine_is_msm8x60_fluid())
1856 return config_camera_off_gpios_qs_cam_fluid();
1857
1858 config_camera_off_gpios();
1859 return;
1860}
1861#endif
1862
1863static int config_camera_on_gpios_web_cam(void)
1864{
1865 int rc = 0;
1866 rc = config_gpio_table(MSM_CAM_ON);
1867 if (rc < 0) {
1868 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1869 "failed\n", __func__);
1870 return rc;
1871 }
1872
Jilai Wang53d27a82011-07-13 14:32:58 -04001873 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001874 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1875 if (rc < 0) {
1876 config_gpio_table(MSM_CAM_OFF);
1877 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1878 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1879 return rc;
1880 }
1881 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1882 }
1883 return rc;
1884}
1885
1886static void config_camera_off_gpios_web_cam(void)
1887{
1888 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001889 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001890 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1891 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1892 }
1893 return;
1894}
1895
1896#ifdef CONFIG_MSM_BUS_SCALING
1897static struct msm_bus_vectors cam_init_vectors[] = {
1898 {
1899 .src = MSM_BUS_MASTER_VFE,
1900 .dst = MSM_BUS_SLAVE_SMI,
1901 .ab = 0,
1902 .ib = 0,
1903 },
1904 {
1905 .src = MSM_BUS_MASTER_VFE,
1906 .dst = MSM_BUS_SLAVE_EBI_CH0,
1907 .ab = 0,
1908 .ib = 0,
1909 },
1910 {
1911 .src = MSM_BUS_MASTER_VPE,
1912 .dst = MSM_BUS_SLAVE_SMI,
1913 .ab = 0,
1914 .ib = 0,
1915 },
1916 {
1917 .src = MSM_BUS_MASTER_VPE,
1918 .dst = MSM_BUS_SLAVE_EBI_CH0,
1919 .ab = 0,
1920 .ib = 0,
1921 },
1922 {
1923 .src = MSM_BUS_MASTER_JPEG_ENC,
1924 .dst = MSM_BUS_SLAVE_SMI,
1925 .ab = 0,
1926 .ib = 0,
1927 },
1928 {
1929 .src = MSM_BUS_MASTER_JPEG_ENC,
1930 .dst = MSM_BUS_SLAVE_EBI_CH0,
1931 .ab = 0,
1932 .ib = 0,
1933 },
1934};
1935
1936static struct msm_bus_vectors cam_preview_vectors[] = {
1937 {
1938 .src = MSM_BUS_MASTER_VFE,
1939 .dst = MSM_BUS_SLAVE_SMI,
1940 .ab = 0,
1941 .ib = 0,
1942 },
1943 {
1944 .src = MSM_BUS_MASTER_VFE,
1945 .dst = MSM_BUS_SLAVE_EBI_CH0,
1946 .ab = 283115520,
1947 .ib = 452984832,
1948 },
1949 {
1950 .src = MSM_BUS_MASTER_VPE,
1951 .dst = MSM_BUS_SLAVE_SMI,
1952 .ab = 0,
1953 .ib = 0,
1954 },
1955 {
1956 .src = MSM_BUS_MASTER_VPE,
1957 .dst = MSM_BUS_SLAVE_EBI_CH0,
1958 .ab = 0,
1959 .ib = 0,
1960 },
1961 {
1962 .src = MSM_BUS_MASTER_JPEG_ENC,
1963 .dst = MSM_BUS_SLAVE_SMI,
1964 .ab = 0,
1965 .ib = 0,
1966 },
1967 {
1968 .src = MSM_BUS_MASTER_JPEG_ENC,
1969 .dst = MSM_BUS_SLAVE_EBI_CH0,
1970 .ab = 0,
1971 .ib = 0,
1972 },
1973};
1974
1975static struct msm_bus_vectors cam_video_vectors[] = {
1976 {
1977 .src = MSM_BUS_MASTER_VFE,
1978 .dst = MSM_BUS_SLAVE_SMI,
1979 .ab = 283115520,
1980 .ib = 452984832,
1981 },
1982 {
1983 .src = MSM_BUS_MASTER_VFE,
1984 .dst = MSM_BUS_SLAVE_EBI_CH0,
1985 .ab = 283115520,
1986 .ib = 452984832,
1987 },
1988 {
1989 .src = MSM_BUS_MASTER_VPE,
1990 .dst = MSM_BUS_SLAVE_SMI,
1991 .ab = 319610880,
1992 .ib = 511377408,
1993 },
1994 {
1995 .src = MSM_BUS_MASTER_VPE,
1996 .dst = MSM_BUS_SLAVE_EBI_CH0,
1997 .ab = 0,
1998 .ib = 0,
1999 },
2000 {
2001 .src = MSM_BUS_MASTER_JPEG_ENC,
2002 .dst = MSM_BUS_SLAVE_SMI,
2003 .ab = 0,
2004 .ib = 0,
2005 },
2006 {
2007 .src = MSM_BUS_MASTER_JPEG_ENC,
2008 .dst = MSM_BUS_SLAVE_EBI_CH0,
2009 .ab = 0,
2010 .ib = 0,
2011 },
2012};
2013
2014static struct msm_bus_vectors cam_snapshot_vectors[] = {
2015 {
2016 .src = MSM_BUS_MASTER_VFE,
2017 .dst = MSM_BUS_SLAVE_SMI,
2018 .ab = 566231040,
2019 .ib = 905969664,
2020 },
2021 {
2022 .src = MSM_BUS_MASTER_VFE,
2023 .dst = MSM_BUS_SLAVE_EBI_CH0,
2024 .ab = 69984000,
2025 .ib = 111974400,
2026 },
2027 {
2028 .src = MSM_BUS_MASTER_VPE,
2029 .dst = MSM_BUS_SLAVE_SMI,
2030 .ab = 0,
2031 .ib = 0,
2032 },
2033 {
2034 .src = MSM_BUS_MASTER_VPE,
2035 .dst = MSM_BUS_SLAVE_EBI_CH0,
2036 .ab = 0,
2037 .ib = 0,
2038 },
2039 {
2040 .src = MSM_BUS_MASTER_JPEG_ENC,
2041 .dst = MSM_BUS_SLAVE_SMI,
2042 .ab = 320864256,
2043 .ib = 513382810,
2044 },
2045 {
2046 .src = MSM_BUS_MASTER_JPEG_ENC,
2047 .dst = MSM_BUS_SLAVE_EBI_CH0,
2048 .ab = 320864256,
2049 .ib = 513382810,
2050 },
2051};
2052
2053static struct msm_bus_vectors cam_zsl_vectors[] = {
2054 {
2055 .src = MSM_BUS_MASTER_VFE,
2056 .dst = MSM_BUS_SLAVE_SMI,
2057 .ab = 566231040,
2058 .ib = 905969664,
2059 },
2060 {
2061 .src = MSM_BUS_MASTER_VFE,
2062 .dst = MSM_BUS_SLAVE_EBI_CH0,
2063 .ab = 706199040,
2064 .ib = 1129918464,
2065 },
2066 {
2067 .src = MSM_BUS_MASTER_VPE,
2068 .dst = MSM_BUS_SLAVE_SMI,
2069 .ab = 0,
2070 .ib = 0,
2071 },
2072 {
2073 .src = MSM_BUS_MASTER_VPE,
2074 .dst = MSM_BUS_SLAVE_EBI_CH0,
2075 .ab = 0,
2076 .ib = 0,
2077 },
2078 {
2079 .src = MSM_BUS_MASTER_JPEG_ENC,
2080 .dst = MSM_BUS_SLAVE_SMI,
2081 .ab = 320864256,
2082 .ib = 513382810,
2083 },
2084 {
2085 .src = MSM_BUS_MASTER_JPEG_ENC,
2086 .dst = MSM_BUS_SLAVE_EBI_CH0,
2087 .ab = 320864256,
2088 .ib = 513382810,
2089 },
2090};
2091
2092static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2093 {
2094 .src = MSM_BUS_MASTER_VFE,
2095 .dst = MSM_BUS_SLAVE_SMI,
2096 .ab = 212336640,
2097 .ib = 339738624,
2098 },
2099 {
2100 .src = MSM_BUS_MASTER_VFE,
2101 .dst = MSM_BUS_SLAVE_EBI_CH0,
2102 .ab = 25090560,
2103 .ib = 40144896,
2104 },
2105 {
2106 .src = MSM_BUS_MASTER_VPE,
2107 .dst = MSM_BUS_SLAVE_SMI,
2108 .ab = 239708160,
2109 .ib = 383533056,
2110 },
2111 {
2112 .src = MSM_BUS_MASTER_VPE,
2113 .dst = MSM_BUS_SLAVE_EBI_CH0,
2114 .ab = 79902720,
2115 .ib = 127844352,
2116 },
2117 {
2118 .src = MSM_BUS_MASTER_JPEG_ENC,
2119 .dst = MSM_BUS_SLAVE_SMI,
2120 .ab = 0,
2121 .ib = 0,
2122 },
2123 {
2124 .src = MSM_BUS_MASTER_JPEG_ENC,
2125 .dst = MSM_BUS_SLAVE_EBI_CH0,
2126 .ab = 0,
2127 .ib = 0,
2128 },
2129};
2130
2131static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2132 {
2133 .src = MSM_BUS_MASTER_VFE,
2134 .dst = MSM_BUS_SLAVE_SMI,
2135 .ab = 0,
2136 .ib = 0,
2137 },
2138 {
2139 .src = MSM_BUS_MASTER_VFE,
2140 .dst = MSM_BUS_SLAVE_EBI_CH0,
2141 .ab = 300902400,
2142 .ib = 481443840,
2143 },
2144 {
2145 .src = MSM_BUS_MASTER_VPE,
2146 .dst = MSM_BUS_SLAVE_SMI,
2147 .ab = 230307840,
2148 .ib = 368492544,
2149 },
2150 {
2151 .src = MSM_BUS_MASTER_VPE,
2152 .dst = MSM_BUS_SLAVE_EBI_CH0,
2153 .ab = 245113344,
2154 .ib = 392181351,
2155 },
2156 {
2157 .src = MSM_BUS_MASTER_JPEG_ENC,
2158 .dst = MSM_BUS_SLAVE_SMI,
2159 .ab = 106536960,
2160 .ib = 170459136,
2161 },
2162 {
2163 .src = MSM_BUS_MASTER_JPEG_ENC,
2164 .dst = MSM_BUS_SLAVE_EBI_CH0,
2165 .ab = 106536960,
2166 .ib = 170459136,
2167 },
2168};
2169
2170static struct msm_bus_paths cam_bus_client_config[] = {
2171 {
2172 ARRAY_SIZE(cam_init_vectors),
2173 cam_init_vectors,
2174 },
2175 {
2176 ARRAY_SIZE(cam_preview_vectors),
2177 cam_preview_vectors,
2178 },
2179 {
2180 ARRAY_SIZE(cam_video_vectors),
2181 cam_video_vectors,
2182 },
2183 {
2184 ARRAY_SIZE(cam_snapshot_vectors),
2185 cam_snapshot_vectors,
2186 },
2187 {
2188 ARRAY_SIZE(cam_zsl_vectors),
2189 cam_zsl_vectors,
2190 },
2191 {
2192 ARRAY_SIZE(cam_stereo_video_vectors),
2193 cam_stereo_video_vectors,
2194 },
2195 {
2196 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2197 cam_stereo_snapshot_vectors,
2198 },
2199};
2200
2201static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2202 cam_bus_client_config,
2203 ARRAY_SIZE(cam_bus_client_config),
2204 .name = "msm_camera",
2205};
2206#endif
2207
2208struct msm_camera_device_platform_data msm_camera_device_data = {
2209 .camera_gpio_on = config_camera_on_gpios,
2210 .camera_gpio_off = config_camera_off_gpios,
2211 .ioext.csiphy = 0x04800000,
2212 .ioext.csisz = 0x00000400,
2213 .ioext.csiirq = CSI_0_IRQ,
2214 .ioclk.mclk_clk_rate = 24000000,
2215 .ioclk.vfe_clk_rate = 228570000,
2216#ifdef CONFIG_MSM_BUS_SCALING
2217 .cam_bus_scale_table = &cam_bus_client_pdata,
2218#endif
2219};
2220
2221#ifdef CONFIG_QS_S5K4E1
2222struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2223 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2224 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2225 .ioext.csiphy = 0x04800000,
2226 .ioext.csisz = 0x00000400,
2227 .ioext.csiirq = CSI_0_IRQ,
2228 .ioclk.mclk_clk_rate = 24000000,
2229 .ioclk.vfe_clk_rate = 228570000,
2230#ifdef CONFIG_MSM_BUS_SCALING
2231 .cam_bus_scale_table = &cam_bus_client_pdata,
2232#endif
2233};
2234#endif
2235
2236struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2237 .camera_gpio_on = config_camera_on_gpios_web_cam,
2238 .camera_gpio_off = config_camera_off_gpios_web_cam,
2239 .ioext.csiphy = 0x04900000,
2240 .ioext.csisz = 0x00000400,
2241 .ioext.csiirq = CSI_1_IRQ,
2242 .ioclk.mclk_clk_rate = 24000000,
2243 .ioclk.vfe_clk_rate = 228570000,
2244#ifdef CONFIG_MSM_BUS_SCALING
2245 .cam_bus_scale_table = &cam_bus_client_pdata,
2246#endif
2247};
2248
2249struct resource msm_camera_resources[] = {
2250 {
2251 .start = 0x04500000,
2252 .end = 0x04500000 + SZ_1M - 1,
2253 .flags = IORESOURCE_MEM,
2254 },
2255 {
2256 .start = VFE_IRQ,
2257 .end = VFE_IRQ,
2258 .flags = IORESOURCE_IRQ,
2259 },
2260};
2261#ifdef CONFIG_MT9E013
2262static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2263 .mount_angle = 0
2264};
2265
2266static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2267 .flash_type = MSM_CAMERA_FLASH_LED,
2268 .flash_src = &msm_flash_src
2269};
2270
2271static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2272 .sensor_name = "mt9e013",
2273 .sensor_reset = 106,
2274 .sensor_pwd = 85,
2275 .vcm_pwd = 1,
2276 .vcm_enable = 0,
2277 .pdata = &msm_camera_device_data,
2278 .resource = msm_camera_resources,
2279 .num_resources = ARRAY_SIZE(msm_camera_resources),
2280 .flash_data = &flash_mt9e013,
2281 .strobe_flash_data = &strobe_flash_xenon,
2282 .sensor_platform_info = &mt9e013_sensor_8660_info,
2283 .csi_if = 1
2284};
2285struct platform_device msm_camera_sensor_mt9e013 = {
2286 .name = "msm_camera_mt9e013",
2287 .dev = {
2288 .platform_data = &msm_camera_sensor_mt9e013_data,
2289 },
2290};
2291#endif
2292
2293#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302294static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2295 .mount_angle = 180
2296};
2297
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002298static struct msm_camera_sensor_flash_data flash_imx074 = {
2299 .flash_type = MSM_CAMERA_FLASH_LED,
2300 .flash_src = &msm_flash_src
2301};
2302
2303static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2304 .sensor_name = "imx074",
2305 .sensor_reset = 106,
2306 .sensor_pwd = 85,
2307 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2308 .vcm_enable = 1,
2309 .pdata = &msm_camera_device_data,
2310 .resource = msm_camera_resources,
2311 .num_resources = ARRAY_SIZE(msm_camera_resources),
2312 .flash_data = &flash_imx074,
2313 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302314 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002315 .csi_if = 1
2316};
2317struct platform_device msm_camera_sensor_imx074 = {
2318 .name = "msm_camera_imx074",
2319 .dev = {
2320 .platform_data = &msm_camera_sensor_imx074_data,
2321 },
2322};
2323#endif
2324#ifdef CONFIG_WEBCAM_OV9726
2325
2326static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2327 .mount_angle = 0
2328};
2329
2330static struct msm_camera_sensor_flash_data flash_ov9726 = {
2331 .flash_type = MSM_CAMERA_FLASH_LED,
2332 .flash_src = &msm_flash_src
2333};
2334static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2335 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002336 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002337 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2338 .sensor_pwd = 85,
2339 .vcm_pwd = 1,
2340 .vcm_enable = 0,
2341 .pdata = &msm_camera_device_data_web_cam,
2342 .resource = msm_camera_resources,
2343 .num_resources = ARRAY_SIZE(msm_camera_resources),
2344 .flash_data = &flash_ov9726,
2345 .sensor_platform_info = &ov9726_sensor_8660_info,
2346 .csi_if = 1
2347};
2348struct platform_device msm_camera_sensor_webcam_ov9726 = {
2349 .name = "msm_camera_ov9726",
2350 .dev = {
2351 .platform_data = &msm_camera_sensor_ov9726_data,
2352 },
2353};
2354#endif
2355#ifdef CONFIG_WEBCAM_OV7692
2356static struct msm_camera_sensor_flash_data flash_ov7692 = {
2357 .flash_type = MSM_CAMERA_FLASH_LED,
2358 .flash_src = &msm_flash_src
2359};
2360static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2361 .sensor_name = "ov7692",
2362 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2363 .sensor_pwd = 85,
2364 .vcm_pwd = 1,
2365 .vcm_enable = 0,
2366 .pdata = &msm_camera_device_data_web_cam,
2367 .resource = msm_camera_resources,
2368 .num_resources = ARRAY_SIZE(msm_camera_resources),
2369 .flash_data = &flash_ov7692,
2370 .csi_if = 1
2371};
2372
2373static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2374 .name = "msm_camera_ov7692",
2375 .dev = {
2376 .platform_data = &msm_camera_sensor_ov7692_data,
2377 },
2378};
2379#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002380#ifdef CONFIG_VX6953
2381static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2382 .mount_angle = 270
2383};
2384
2385static struct msm_camera_sensor_flash_data flash_vx6953 = {
2386 .flash_type = MSM_CAMERA_FLASH_NONE,
2387 .flash_src = &msm_flash_src
2388};
2389
2390static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2391 .sensor_name = "vx6953",
2392 .sensor_reset = 63,
2393 .sensor_pwd = 63,
2394 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2395 .vcm_enable = 1,
2396 .pdata = &msm_camera_device_data,
2397 .resource = msm_camera_resources,
2398 .num_resources = ARRAY_SIZE(msm_camera_resources),
2399 .flash_data = &flash_vx6953,
2400 .sensor_platform_info = &vx6953_sensor_8660_info,
2401 .csi_if = 1
2402};
2403struct platform_device msm_camera_sensor_vx6953 = {
2404 .name = "msm_camera_vx6953",
2405 .dev = {
2406 .platform_data = &msm_camera_sensor_vx6953_data,
2407 },
2408};
2409#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002410#ifdef CONFIG_QS_S5K4E1
2411
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302412static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2413#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2414 .mount_angle = 90
2415#else
2416 .mount_angle = 0
2417#endif
2418};
2419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002420static char eeprom_data[864];
2421static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2422 .flash_type = MSM_CAMERA_FLASH_LED,
2423 .flash_src = &msm_flash_src
2424};
2425
2426static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2427 .sensor_name = "qs_s5k4e1",
2428 .sensor_reset = 106,
2429 .sensor_pwd = 85,
2430 .vcm_pwd = 1,
2431 .vcm_enable = 0,
2432 .pdata = &msm_camera_device_data_qs_cam,
2433 .resource = msm_camera_resources,
2434 .num_resources = ARRAY_SIZE(msm_camera_resources),
2435 .flash_data = &flash_qs_s5k4e1,
2436 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302437 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002438 .csi_if = 1,
2439 .eeprom_data = eeprom_data,
2440};
2441struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2442 .name = "msm_camera_qs_s5k4e1",
2443 .dev = {
2444 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2445 },
2446};
2447#endif
2448static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2449 #ifdef CONFIG_MT9E013
2450 {
2451 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2452 },
2453 #endif
2454 #ifdef CONFIG_IMX074
2455 {
2456 I2C_BOARD_INFO("imx074", 0x1A),
2457 },
2458 #endif
2459 #ifdef CONFIG_WEBCAM_OV7692
2460 {
2461 I2C_BOARD_INFO("ov7692", 0x78),
2462 },
2463 #endif
2464 #ifdef CONFIG_WEBCAM_OV9726
2465 {
2466 I2C_BOARD_INFO("ov9726", 0x10),
2467 },
2468 #endif
2469 #ifdef CONFIG_QS_S5K4E1
2470 {
2471 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2472 },
2473 #endif
2474};
Jilai Wang971f97f2011-07-13 14:25:25 -04002475
2476static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002477 #ifdef CONFIG_WEBCAM_OV9726
2478 {
2479 I2C_BOARD_INFO("ov9726", 0x10),
2480 },
2481 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002482 #ifdef CONFIG_VX6953
2483 {
2484 I2C_BOARD_INFO("vx6953", 0x20),
2485 },
2486 #endif
2487};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002488#endif
2489
2490#ifdef CONFIG_MSM_GEMINI
2491static struct resource msm_gemini_resources[] = {
2492 {
2493 .start = 0x04600000,
2494 .end = 0x04600000 + SZ_1M - 1,
2495 .flags = IORESOURCE_MEM,
2496 },
2497 {
2498 .start = INT_JPEG,
2499 .end = INT_JPEG,
2500 .flags = IORESOURCE_IRQ,
2501 },
2502};
2503
2504static struct platform_device msm_gemini_device = {
2505 .name = "msm_gemini",
2506 .resource = msm_gemini_resources,
2507 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2508};
2509#endif
2510
2511#ifdef CONFIG_I2C_QUP
2512static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2513{
2514}
2515
2516static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2517 .clk_freq = 384000,
2518 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002519 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2520};
2521
2522static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2523 .clk_freq = 100000,
2524 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002525 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2526};
2527
2528static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2529 .clk_freq = 100000,
2530 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002531 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2532};
2533
2534static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2535 .clk_freq = 100000,
2536 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002537 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2538};
2539
2540static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2541 .clk_freq = 100000,
2542 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002543 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2544};
2545
2546static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2547 .clk_freq = 100000,
2548 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002549 .use_gsbi_shared_mode = 1,
2550 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2551};
2552#endif
2553
2554#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2555static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2556 .max_clock_speed = 24000000,
2557};
2558
2559static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2560 .max_clock_speed = 24000000,
2561};
2562#endif
2563
2564#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002565/* CODEC/TSSC SSBI */
2566static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2567 .controller_type = MSM_SBI_CTRL_SSBI,
2568};
2569#endif
2570
2571#ifdef CONFIG_BATTERY_MSM
2572/* Use basic value for fake MSM battery */
2573static struct msm_psy_batt_pdata msm_psy_batt_data = {
2574 .avail_chg_sources = AC_CHG,
2575};
2576
2577static struct platform_device msm_batt_device = {
2578 .name = "msm-battery",
2579 .id = -1,
2580 .dev.platform_data = &msm_psy_batt_data,
2581};
2582#endif
2583
2584#ifdef CONFIG_FB_MSM_LCDC_DSUB
2585/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2586 prim = 1024 x 600 x 4(bpp) x 2(pages)
2587 This is the difference. */
2588#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2589#else
2590#define MSM_FB_DSUB_PMEM_ADDER (0)
2591#endif
2592
2593/* Sensors DSPS platform data */
2594#ifdef CONFIG_MSM_DSPS
2595
2596static struct dsps_gpio_info dsps_surf_gpios[] = {
2597 {
2598 .name = "compass_rst_n",
2599 .num = GPIO_COMPASS_RST_N,
2600 .on_val = 1, /* device not in reset */
2601 .off_val = 0, /* device in reset */
2602 },
2603 {
2604 .name = "gpio_r_altimeter_reset_n",
2605 .num = GPIO_R_ALTIMETER_RESET_N,
2606 .on_val = 1, /* device not in reset */
2607 .off_val = 0, /* device in reset */
2608 }
2609};
2610
2611static struct dsps_gpio_info dsps_fluid_gpios[] = {
2612 {
2613 .name = "gpio_n_altimeter_reset_n",
2614 .num = GPIO_N_ALTIMETER_RESET_N,
2615 .on_val = 1, /* device not in reset */
2616 .off_val = 0, /* device in reset */
2617 }
2618};
2619
2620static void __init msm8x60_init_dsps(void)
2621{
2622 struct msm_dsps_platform_data *pdata =
2623 msm_dsps_device.dev.platform_data;
2624 /*
2625 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2626 * to the power supply and not controled via GPIOs. Fluid uses a
2627 * different IO-Expender (north) than used on surf/ffa.
2628 */
2629 if (machine_is_msm8x60_fluid()) {
2630 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631 pdata->pil_name = DSPS_PIL_FLUID_NAME;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07002632 msm_pil_dsps.dev.platform_data = DSPS_PIL_FLUID_NAME;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002633 pdata->gpios = dsps_fluid_gpios;
2634 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2635 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002636 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07002637 msm_pil_dsps.dev.platform_data = DSPS_PIL_GENERIC_NAME;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002638 pdata->gpios = dsps_surf_gpios;
2639 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2640 }
2641
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002642 platform_device_register(&msm_dsps_device);
2643}
2644#endif /* CONFIG_MSM_DSPS */
2645
2646#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302647#define MSM_FB_PRIM_BUF_SIZE \
2648 (roundup((1024 * 600 * 4), 4096) * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002649#else
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302650#define MSM_FB_PRIM_BUF_SIZE \
2651 (roundup((1024 * 600 * 4), 4096) * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002652#endif
2653
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002654#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302655#define MSM_FB_EXT_BUF_SIZE \
2656 (roundup((1920 * 1080 * 2), 4096) * 1) /* 2 bpp x 1 page */
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002657#elif defined(CONFIG_FB_MSM_TVOUT)
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302658#define MSM_FB_EXT_BUF_SIZE \
2659 (roundup((720 * 576 * 2), 4096) * 2) /* 2 bpp x 2 pages */
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002660#else
2661#define MSM_FB_EXT_BUFT_SIZE 0
2662#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002663
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002664/* Note: must be multiple of 4096 */
2665#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002666 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002667
2668#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
2669#define MSM_HDMI_PRIM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002670
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002671#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002672unsigned char hdmi_is_primary = 1;
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002673#else
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002674unsigned char hdmi_is_primary;
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002675#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002676
Huaibin Yanga5419422011-12-08 23:52:10 -08002677#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2678#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2679#else
2680#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2681#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2682
2683#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2684#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2685#else
2686#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2687#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2688
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002689#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2690#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002691#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002692
2693#define MSM_SMI_BASE 0x38000000
2694#define MSM_SMI_SIZE 0x4000000
2695
2696#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002697#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002698
2699#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2700#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2701#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2702
Naseer Ahmed51860b02012-02-07 18:53:29 +05302703#define MSM_ION_SF_SIZE 0x4000000 /* 64MB */
Olav Hauganb5be7992011-11-18 14:29:02 -08002704#define MSM_ION_CAMERA_SIZE MSM_PMEM_ADSP_SIZE
Olav Haugan42ebe712012-01-10 16:30:58 -08002705#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
2706#define MSM_ION_MM_SIZE 0x3600000 /* (54MB) */
Olav Hauganb5be7992011-11-18 14:29:02 -08002707#define MSM_ION_MFC_SIZE SZ_8K
Mayank Choprac22ace32012-03-03 00:45:04 +05302708#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2709#define MSM_ION_WB_SIZE 0xC00000 /* 12MB */
2710#else
Olav Hauganb5be7992011-11-18 14:29:02 -08002711#define MSM_ION_WB_SIZE 0x600000 /* 6MB */
Mayank Choprac22ace32012-03-03 00:45:04 +05302712#endif
2713
Olav Haugan424ff492012-03-13 11:41:23 -07002714#define MSM_ION_QSECOM_SIZE 0x600000 /* (6MB) */
Olav Haugan3a55e322012-01-23 14:24:01 -08002715#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002716
2717#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Olav Haugan6ab47252012-02-15 14:46:49 -08002718#define MSM_ION_HEAP_NUM 9
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002719#define MSM_HDMI_PRIM_ION_SF_SIZE MSM_HDMI_PRIM_PMEM_SF_SIZE
2720static unsigned msm_ion_sf_size = MSM_ION_SF_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002721#else
Olav Hauganb5be7992011-11-18 14:29:02 -08002722#define MSM_ION_HEAP_NUM 1
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002723#endif
2724
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002725static unsigned fb_size;
2726static int __init fb_size_setup(char *p)
2727{
2728 fb_size = memparse(p, NULL);
2729 return 0;
2730}
2731early_param("fb_size", fb_size_setup);
2732
2733static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2734static int __init pmem_kernel_ebi1_size_setup(char *p)
2735{
2736 pmem_kernel_ebi1_size = memparse(p, NULL);
2737 return 0;
2738}
2739early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2740
2741#ifdef CONFIG_ANDROID_PMEM
2742static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2743static int __init pmem_sf_size_setup(char *p)
2744{
2745 pmem_sf_size = memparse(p, NULL);
2746 return 0;
2747}
2748early_param("pmem_sf_size", pmem_sf_size_setup);
2749
2750static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2751
2752static int __init pmem_adsp_size_setup(char *p)
2753{
2754 pmem_adsp_size = memparse(p, NULL);
2755 return 0;
2756}
2757early_param("pmem_adsp_size", pmem_adsp_size_setup);
2758
2759static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2760
2761static int __init pmem_audio_size_setup(char *p)
2762{
2763 pmem_audio_size = memparse(p, NULL);
2764 return 0;
2765}
2766early_param("pmem_audio_size", pmem_audio_size_setup);
2767#endif
2768
2769static struct resource msm_fb_resources[] = {
2770 {
2771 .flags = IORESOURCE_DMA,
2772 }
2773};
2774
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07002775static void set_mdp_clocks_for_wuxga(void);
2776
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002777static int msm_fb_detect_panel(const char *name)
2778{
2779 if (machine_is_msm8x60_fluid()) {
2780 uint32_t soc_platform_version = socinfo_get_platform_version();
2781 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2782#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2783 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002784 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2785 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002786 return 0;
2787#endif
2788 } else { /*P3 and up use AUO panel */
2789#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2790 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002791 strnlen(LCDC_AUO_PANEL_NAME,
2792 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002793 return 0;
2794#endif
2795 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002796#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2797 } else if machine_is_msm8x60_dragon() {
2798 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002799 strnlen(LCDC_NT35582_PANEL_NAME,
2800 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002801 return 0;
2802#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002803 } else {
2804 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002805 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2806 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002807 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002808
2809#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2810 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2811 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2812 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2813 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2814 PANEL_NAME_MAX_LEN)))
2815 return 0;
2816
2817 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2818 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2819 PANEL_NAME_MAX_LEN)))
2820 return 0;
2821
2822 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2823 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2824 PANEL_NAME_MAX_LEN)))
2825 return 0;
2826#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002827 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002828
2829 if (!strncmp(name, HDMI_PANEL_NAME,
2830 strnlen(HDMI_PANEL_NAME,
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07002831 PANEL_NAME_MAX_LEN))) {
2832 if (hdmi_is_primary)
2833 set_mdp_clocks_for_wuxga();
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002834 return 0;
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07002835 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002836
2837 if (!strncmp(name, TVOUT_PANEL_NAME,
2838 strnlen(TVOUT_PANEL_NAME,
2839 PANEL_NAME_MAX_LEN)))
2840 return 0;
2841
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002842 pr_warning("%s: not supported '%s'", __func__, name);
2843 return -ENODEV;
2844}
2845
2846static struct msm_fb_platform_data msm_fb_pdata = {
2847 .detect_client = msm_fb_detect_panel,
2848};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002849
2850static struct platform_device msm_fb_device = {
2851 .name = "msm_fb",
2852 .id = 0,
2853 .num_resources = ARRAY_SIZE(msm_fb_resources),
2854 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002855 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002856};
2857
2858#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002859#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002860static struct android_pmem_platform_data android_pmem_pdata = {
2861 .name = "pmem",
2862 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2863 .cached = 1,
2864 .memory_type = MEMTYPE_EBI1,
2865};
2866
2867static struct platform_device android_pmem_device = {
2868 .name = "android_pmem",
2869 .id = 0,
2870 .dev = {.platform_data = &android_pmem_pdata},
2871};
2872
2873static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2874 .name = "pmem_adsp",
2875 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2876 .cached = 0,
2877 .memory_type = MEMTYPE_EBI1,
2878};
2879
2880static struct platform_device android_pmem_adsp_device = {
2881 .name = "android_pmem",
2882 .id = 2,
2883 .dev = { .platform_data = &android_pmem_adsp_pdata },
2884};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002885#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002886static struct android_pmem_platform_data android_pmem_audio_pdata = {
2887 .name = "pmem_audio",
2888 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2889 .cached = 0,
2890 .memory_type = MEMTYPE_EBI1,
2891};
2892
2893static struct platform_device android_pmem_audio_device = {
2894 .name = "android_pmem",
2895 .id = 4,
2896 .dev = { .platform_data = &android_pmem_audio_pdata },
2897};
2898
Laura Abbott1e36a022011-06-22 17:08:13 -07002899#define PMEM_BUS_WIDTH(_bw) \
2900 { \
2901 .vectors = &(struct msm_bus_vectors){ \
2902 .src = MSM_BUS_MASTER_AMPSS_M0, \
2903 .dst = MSM_BUS_SLAVE_SMI, \
2904 .ib = (_bw), \
2905 .ab = 0, \
2906 }, \
2907 .num_paths = 1, \
2908 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002909
2910static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002911 [0] = PMEM_BUS_WIDTH(0), /* Off */
2912 [1] = PMEM_BUS_WIDTH(1), /* On */
2913};
2914
2915static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002916 .usecase = mem_smi_table,
2917 .num_usecases = ARRAY_SIZE(mem_smi_table),
2918 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002919};
2920
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002921int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002922{
2923 int bus_id = (int) data;
2924
2925 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002926 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002927}
2928
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002929int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002930{
2931 int bus_id = (int) data;
2932
2933 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002934 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002935}
2936
Alex Bird199980e2011-10-21 11:29:27 -07002937void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002938{
2939 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2940}
Olav Hauganee0f7802011-12-19 13:28:57 -08002941#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002942static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2943 .name = "pmem_smipool",
2944 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2945 .cached = 0,
2946 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002947 .request_region = request_smi_region,
2948 .release_region = release_smi_region,
2949 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002950 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002951};
2952static struct platform_device android_pmem_smipool_device = {
2953 .name = "android_pmem",
2954 .id = 7,
2955 .dev = { .platform_data = &android_pmem_smipool_pdata },
2956};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002957#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002958#endif
2959
2960#define GPIO_DONGLE_PWR_EN 258
2961static void setup_display_power(void);
2962static int lcdc_vga_enabled;
2963static int vga_enable_request(int enable)
2964{
2965 if (enable)
2966 lcdc_vga_enabled = 1;
2967 else
2968 lcdc_vga_enabled = 0;
2969 setup_display_power();
2970
2971 return 0;
2972}
2973
2974#define GPIO_BACKLIGHT_PWM0 0
2975#define GPIO_BACKLIGHT_PWM1 1
2976
2977static int pmic_backlight_gpio[2]
2978 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2979static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2980 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2981 .vga_switch = vga_enable_request,
2982};
2983
2984static struct platform_device lcdc_samsung_panel_device = {
2985 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2986 .id = 0,
2987 .dev = {
2988 .platform_data = &lcdc_samsung_panel_data,
2989 }
2990};
2991#if (!defined(CONFIG_SPI_QUP)) && \
2992 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2993 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2994
2995static int lcdc_spi_gpio_array_num[] = {
2996 LCDC_SPI_GPIO_CLK,
2997 LCDC_SPI_GPIO_CS,
2998 LCDC_SPI_GPIO_MOSI,
2999};
3000
3001static uint32_t lcdc_spi_gpio_config_data[] = {
3002 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
3003 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
3004 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
3005 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
3006 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
3007 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
3008};
3009
3010static void lcdc_config_spi_gpios(int enable)
3011{
3012 int n;
3013 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
3014 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
3015}
3016#endif
3017
3018#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
3019#ifdef CONFIG_SPI_QUP
3020static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
3021 {
3022 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
3023 .mode = SPI_MODE_3,
3024 .bus_num = 1,
3025 .chip_select = 0,
3026 .max_speed_hz = 10800000,
3027 }
3028};
3029#endif /* CONFIG_SPI_QUP */
3030
3031static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
3032#ifndef CONFIG_SPI_QUP
3033 .panel_config_gpio = lcdc_config_spi_gpios,
3034 .gpio_num = lcdc_spi_gpio_array_num,
3035#endif
3036};
3037
3038static struct platform_device lcdc_samsung_oled_panel_device = {
3039 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
3040 .id = 0,
3041 .dev.platform_data = &lcdc_samsung_oled_panel_data,
3042};
3043#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
3044
3045#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
3046#ifdef CONFIG_SPI_QUP
3047static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3048 {
3049 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3050 .mode = SPI_MODE_3,
3051 .bus_num = 1,
3052 .chip_select = 0,
3053 .max_speed_hz = 10800000,
3054 }
3055};
3056#endif
3057
3058static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3059#ifndef CONFIG_SPI_QUP
3060 .panel_config_gpio = lcdc_config_spi_gpios,
3061 .gpio_num = lcdc_spi_gpio_array_num,
3062#endif
3063};
3064
3065static struct platform_device lcdc_auo_wvga_panel_device = {
3066 .name = LCDC_AUO_PANEL_NAME,
3067 .id = 0,
3068 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3069};
3070#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3071
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003072#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3073
3074#define GPIO_NT35582_RESET 94
3075#define GPIO_NT35582_BL_EN_HW_PIN 24
3076#define GPIO_NT35582_BL_EN \
3077 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3078
3079static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3080
3081static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3082 .gpio_num = lcdc_nt35582_pmic_gpio,
3083};
3084
3085static struct platform_device lcdc_nt35582_panel_device = {
3086 .name = LCDC_NT35582_PANEL_NAME,
3087 .id = 0,
3088 .dev = {
3089 .platform_data = &lcdc_nt35582_panel_data,
3090 }
3091};
3092
3093static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3094 {
3095 .modalias = "lcdc_nt35582_spi",
3096 .mode = SPI_MODE_0,
3097 .bus_num = 0,
3098 .chip_select = 0,
3099 .max_speed_hz = 1100000,
3100 }
3101};
3102#endif
3103
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003104#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3105static struct resource hdmi_msm_resources[] = {
3106 {
3107 .name = "hdmi_msm_qfprom_addr",
3108 .start = 0x00700000,
3109 .end = 0x007060FF,
3110 .flags = IORESOURCE_MEM,
3111 },
3112 {
3113 .name = "hdmi_msm_hdmi_addr",
3114 .start = 0x04A00000,
3115 .end = 0x04A00FFF,
3116 .flags = IORESOURCE_MEM,
3117 },
3118 {
3119 .name = "hdmi_msm_irq",
3120 .start = HDMI_IRQ,
3121 .end = HDMI_IRQ,
3122 .flags = IORESOURCE_IRQ,
3123 },
3124};
3125
3126static int hdmi_enable_5v(int on);
3127static int hdmi_core_power(int on, int show);
3128static int hdmi_cec_power(int on);
3129
3130static struct msm_hdmi_platform_data hdmi_msm_data = {
3131 .irq = HDMI_IRQ,
3132 .enable_5v = hdmi_enable_5v,
3133 .core_power = hdmi_core_power,
3134 .cec_power = hdmi_cec_power,
3135};
3136
3137static struct platform_device hdmi_msm_device = {
3138 .name = "hdmi_msm",
3139 .id = 0,
3140 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3141 .resource = hdmi_msm_resources,
3142 .dev.platform_data = &hdmi_msm_data,
3143};
3144#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3145
3146#ifdef CONFIG_FB_MSM_MIPI_DSI
3147static struct platform_device mipi_dsi_toshiba_panel_device = {
3148 .name = "mipi_toshiba",
3149 .id = 0,
3150};
3151
3152#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3153
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003154static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003155 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003156 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003157};
3158
3159static struct platform_device mipi_dsi_novatek_panel_device = {
3160 .name = "mipi_novatek",
3161 .id = 0,
3162 .dev = {
3163 .platform_data = &novatek_pdata,
3164 }
3165};
3166#endif
3167
3168static void __init msm8x60_allocate_memory_regions(void)
3169{
3170 void *addr;
3171 unsigned long size;
3172
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08003173 if (hdmi_is_primary)
3174 size = roundup((1920 * 1088 * 4 * 2), 4096);
3175 else
3176 size = MSM_FB_SIZE;
3177
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003178 addr = alloc_bootmem_align(size, 0x1000);
3179 msm_fb_resources[0].start = __pa(addr);
3180 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3181 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3182 size, addr, __pa(addr));
3183
3184}
3185
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08003186void __init msm8x60_set_display_params(char *prim_panel, char *ext_panel)
3187{
3188 if (strnlen(prim_panel, PANEL_NAME_MAX_LEN)) {
3189 strlcpy(msm_fb_pdata.prim_panel_name, prim_panel,
3190 PANEL_NAME_MAX_LEN);
3191 pr_debug("msm_fb_pdata.prim_panel_name %s\n",
3192 msm_fb_pdata.prim_panel_name);
3193
3194 if (!strncmp((char *)msm_fb_pdata.prim_panel_name,
3195 HDMI_PANEL_NAME, strnlen(HDMI_PANEL_NAME,
3196 PANEL_NAME_MAX_LEN))) {
3197 pr_debug("HDMI is the primary display by"
3198 " boot parameter\n");
3199 hdmi_is_primary = 1;
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07003200 set_mdp_clocks_for_wuxga();
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08003201 }
3202 }
3203 if (strnlen(ext_panel, PANEL_NAME_MAX_LEN)) {
3204 strlcpy(msm_fb_pdata.ext_panel_name, ext_panel,
3205 PANEL_NAME_MAX_LEN);
3206 pr_debug("msm_fb_pdata.ext_panel_name %s\n",
3207 msm_fb_pdata.ext_panel_name);
3208 }
3209}
3210
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003211#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3212 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3213/*virtual key support */
3214static ssize_t tma300_vkeys_show(struct kobject *kobj,
3215 struct kobj_attribute *attr, char *buf)
3216{
3217 return sprintf(buf,
3218 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3219 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3220 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3221 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3222 "\n");
3223}
3224
3225static struct kobj_attribute tma300_vkeys_attr = {
3226 .attr = {
3227 .mode = S_IRUGO,
3228 },
3229 .show = &tma300_vkeys_show,
3230};
3231
3232static struct attribute *tma300_properties_attrs[] = {
3233 &tma300_vkeys_attr.attr,
3234 NULL
3235};
3236
3237static struct attribute_group tma300_properties_attr_group = {
3238 .attrs = tma300_properties_attrs,
3239};
3240
3241static struct kobject *properties_kobj;
3242
3243
3244
3245#define CYTTSP_TS_GPIO_IRQ 61
3246static int cyttsp_platform_init(struct i2c_client *client)
3247{
3248 int rc = -EINVAL;
3249 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3250
3251 if (machine_is_msm8x60_fluid()) {
3252 pm8058_l5 = regulator_get(NULL, "8058_l5");
3253 if (IS_ERR(pm8058_l5)) {
3254 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3255 __func__, PTR_ERR(pm8058_l5));
3256 rc = PTR_ERR(pm8058_l5);
3257 return rc;
3258 }
3259 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3260 if (rc) {
3261 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3262 __func__, rc);
3263 goto reg_l5_put;
3264 }
3265
3266 rc = regulator_enable(pm8058_l5);
3267 if (rc) {
3268 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3269 __func__, rc);
3270 goto reg_l5_put;
3271 }
3272 }
3273 /* vote for s3 to enable i2c communication lines */
3274 pm8058_s3 = regulator_get(NULL, "8058_s3");
3275 if (IS_ERR(pm8058_s3)) {
3276 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3277 __func__, PTR_ERR(pm8058_s3));
3278 rc = PTR_ERR(pm8058_s3);
3279 goto reg_l5_disable;
3280 }
3281
3282 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3283 if (rc) {
3284 pr_err("%s: regulator_set_voltage() = %d\n",
3285 __func__, rc);
3286 goto reg_s3_put;
3287 }
3288
3289 rc = regulator_enable(pm8058_s3);
3290 if (rc) {
3291 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3292 __func__, rc);
3293 goto reg_s3_put;
3294 }
3295
3296 /* wait for vregs to stabilize */
3297 usleep_range(10000, 10000);
3298
3299 /* check this device active by reading first byte/register */
3300 rc = i2c_smbus_read_byte_data(client, 0x01);
3301 if (rc < 0) {
3302 pr_err("%s: i2c sanity check failed\n", __func__);
3303 goto reg_s3_disable;
3304 }
3305
3306 /* virtual keys */
3307 if (machine_is_msm8x60_fluid()) {
3308 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3309 properties_kobj = kobject_create_and_add("board_properties",
3310 NULL);
3311 if (properties_kobj)
3312 rc = sysfs_create_group(properties_kobj,
3313 &tma300_properties_attr_group);
3314 if (!properties_kobj || rc)
3315 pr_err("%s: failed to create board_properties\n",
3316 __func__);
3317 }
3318 return CY_OK;
3319
3320reg_s3_disable:
3321 regulator_disable(pm8058_s3);
3322reg_s3_put:
3323 regulator_put(pm8058_s3);
3324reg_l5_disable:
3325 if (machine_is_msm8x60_fluid())
3326 regulator_disable(pm8058_l5);
3327reg_l5_put:
3328 if (machine_is_msm8x60_fluid())
3329 regulator_put(pm8058_l5);
3330 return rc;
3331}
3332
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303333/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3334static int cyttsp_platform_suspend(struct i2c_client *client)
3335{
3336 msleep(20);
3337
3338 return CY_OK;
3339}
3340
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003341static int cyttsp_platform_resume(struct i2c_client *client)
3342{
3343 /* add any special code to strobe a wakeup pin or chip reset */
3344 msleep(10);
3345
3346 return CY_OK;
3347}
3348
3349static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3350 .flags = 0x04,
3351 .gen = CY_GEN3, /* or */
3352 .use_st = CY_USE_ST,
3353 .use_mt = CY_USE_MT,
3354 .use_hndshk = CY_SEND_HNDSHK,
3355 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303356 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003357 .use_gestures = CY_USE_GESTURES,
3358 /* activate up to 4 groups
3359 * and set active distance
3360 */
3361 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3362 CY_GEST_GRP3 | CY_GEST_GRP4 |
3363 CY_ACT_DIST,
3364 /* change act_intrvl to customize the Active power state
3365 * scanning/processing refresh interval for Operating mode
3366 */
3367 .act_intrvl = CY_ACT_INTRVL_DFLT,
3368 /* change tch_tmout to customize the touch timeout for the
3369 * Active power state for Operating mode
3370 */
3371 .tch_tmout = CY_TCH_TMOUT_DFLT,
3372 /* change lp_intrvl to customize the Low Power power state
3373 * scanning/processing refresh interval for Operating mode
3374 */
3375 .lp_intrvl = CY_LP_INTRVL_DFLT,
3376 .sleep_gpio = -1,
3377 .resout_gpio = -1,
3378 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3379 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303380 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003381 .init = cyttsp_platform_init,
3382};
3383
3384static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3385 .panel_maxx = 1083,
3386 .panel_maxy = 659,
3387 .disp_minx = 30,
3388 .disp_maxx = 1053,
3389 .disp_miny = 30,
3390 .disp_maxy = 629,
3391 .correct_fw_ver = 8,
3392 .fw_fname = "cyttsp_8660_ffa.hex",
3393 .flags = 0x00,
3394 .gen = CY_GEN2, /* or */
3395 .use_st = CY_USE_ST,
3396 .use_mt = CY_USE_MT,
3397 .use_hndshk = CY_SEND_HNDSHK,
3398 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303399 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003400 .use_gestures = CY_USE_GESTURES,
3401 /* activate up to 4 groups
3402 * and set active distance
3403 */
3404 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3405 CY_GEST_GRP3 | CY_GEST_GRP4 |
3406 CY_ACT_DIST,
3407 /* change act_intrvl to customize the Active power state
3408 * scanning/processing refresh interval for Operating mode
3409 */
3410 .act_intrvl = CY_ACT_INTRVL_DFLT,
3411 /* change tch_tmout to customize the touch timeout for the
3412 * Active power state for Operating mode
3413 */
3414 .tch_tmout = CY_TCH_TMOUT_DFLT,
3415 /* change lp_intrvl to customize the Low Power power state
3416 * scanning/processing refresh interval for Operating mode
3417 */
3418 .lp_intrvl = CY_LP_INTRVL_DFLT,
3419 .sleep_gpio = -1,
3420 .resout_gpio = -1,
3421 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3422 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303423 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003424 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303425 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003426};
3427static void cyttsp_set_params(void)
3428{
3429 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3430 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3431 cyttsp_fluid_pdata.panel_maxx = 539;
3432 cyttsp_fluid_pdata.panel_maxy = 994;
3433 cyttsp_fluid_pdata.disp_minx = 30;
3434 cyttsp_fluid_pdata.disp_maxx = 509;
3435 cyttsp_fluid_pdata.disp_miny = 60;
3436 cyttsp_fluid_pdata.disp_maxy = 859;
3437 cyttsp_fluid_pdata.correct_fw_ver = 4;
3438 } else {
3439 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3440 cyttsp_fluid_pdata.panel_maxx = 550;
3441 cyttsp_fluid_pdata.panel_maxy = 1013;
3442 cyttsp_fluid_pdata.disp_minx = 35;
3443 cyttsp_fluid_pdata.disp_maxx = 515;
3444 cyttsp_fluid_pdata.disp_miny = 69;
3445 cyttsp_fluid_pdata.disp_maxy = 869;
3446 cyttsp_fluid_pdata.correct_fw_ver = 5;
3447 }
3448
3449}
3450
3451static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3452 {
3453 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3454 .platform_data = &cyttsp_fluid_pdata,
3455#ifndef CY_USE_TIMER
3456 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3457#endif /* CY_USE_TIMER */
3458 },
3459};
3460
3461static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3462 {
3463 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3464 .platform_data = &cyttsp_tmg240_pdata,
3465#ifndef CY_USE_TIMER
3466 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3467#endif /* CY_USE_TIMER */
3468 },
3469};
3470#endif
3471
3472static struct regulator *vreg_tmg200;
3473
3474#define TS_PEN_IRQ_GPIO 61
3475static int tmg200_power(int vreg_on)
3476{
3477 int rc = -EINVAL;
3478
3479 if (!vreg_tmg200) {
3480 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3481 __func__, rc);
3482 return rc;
3483 }
3484
3485 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3486 regulator_disable(vreg_tmg200);
3487 if (rc < 0)
3488 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3489 __func__, vreg_on ? "enable" : "disable", rc);
3490
3491 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003492 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003493
3494 return rc;
3495}
3496
3497static int tmg200_dev_setup(bool enable)
3498{
3499 int rc;
3500
3501 if (enable) {
3502 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3503 if (IS_ERR(vreg_tmg200)) {
3504 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3505 __func__, PTR_ERR(vreg_tmg200));
3506 rc = PTR_ERR(vreg_tmg200);
3507 return rc;
3508 }
3509
3510 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3511 if (rc) {
3512 pr_err("%s: regulator_set_voltage() = %d\n",
3513 __func__, rc);
3514 goto reg_put;
3515 }
3516 } else {
3517 /* put voltage sources */
3518 regulator_put(vreg_tmg200);
3519 }
3520 return 0;
3521reg_put:
3522 regulator_put(vreg_tmg200);
3523 return rc;
3524}
3525
3526static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3527 .ts_name = "msm_tmg200_ts",
3528 .dis_min_x = 0,
3529 .dis_max_x = 1023,
3530 .dis_min_y = 0,
3531 .dis_max_y = 599,
3532 .min_tid = 0,
3533 .max_tid = 255,
3534 .min_touch = 0,
3535 .max_touch = 255,
3536 .min_width = 0,
3537 .max_width = 255,
3538 .power_on = tmg200_power,
3539 .dev_setup = tmg200_dev_setup,
3540 .nfingers = 2,
3541 .irq_gpio = TS_PEN_IRQ_GPIO,
3542 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3543};
3544
3545static struct i2c_board_info cy8ctmg200_board_info[] = {
3546 {
3547 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3548 .platform_data = &cy8ctmg200_pdata,
3549 }
3550};
3551
Zhang Chang Ken211df572011-07-05 19:16:39 -04003552static struct regulator *vreg_tma340;
3553
3554static int tma340_power(int vreg_on)
3555{
3556 int rc = -EINVAL;
3557
3558 if (!vreg_tma340) {
3559 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3560 __func__, rc);
3561 return rc;
3562 }
3563
3564 rc = vreg_on ? regulator_enable(vreg_tma340) :
3565 regulator_disable(vreg_tma340);
3566 if (rc < 0)
3567 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3568 __func__, vreg_on ? "enable" : "disable", rc);
3569
3570 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003571 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003572
3573 return rc;
3574}
3575
3576static struct kobject *tma340_prop_kobj;
3577
3578static int tma340_dragon_dev_setup(bool enable)
3579{
3580 int rc;
3581
3582 if (enable) {
3583 vreg_tma340 = regulator_get(NULL, "8901_l2");
3584 if (IS_ERR(vreg_tma340)) {
3585 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3586 __func__, PTR_ERR(vreg_tma340));
3587 rc = PTR_ERR(vreg_tma340);
3588 return rc;
3589 }
3590
3591 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3592 if (rc) {
3593 pr_err("%s: regulator_set_voltage() = %d\n",
3594 __func__, rc);
3595 goto reg_put;
3596 }
3597 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3598 tma340_prop_kobj = kobject_create_and_add("board_properties",
3599 NULL);
3600 if (tma340_prop_kobj) {
3601 rc = sysfs_create_group(tma340_prop_kobj,
3602 &tma300_properties_attr_group);
3603 if (rc) {
3604 kobject_put(tma340_prop_kobj);
3605 pr_err("%s: failed to create board_properties\n",
3606 __func__);
3607 goto reg_put;
3608 }
3609 }
3610
3611 } else {
3612 /* put voltage sources */
3613 regulator_put(vreg_tma340);
3614 /* destroy virtual keys */
3615 if (tma340_prop_kobj) {
3616 sysfs_remove_group(tma340_prop_kobj,
3617 &tma300_properties_attr_group);
3618 kobject_put(tma340_prop_kobj);
3619 }
3620 }
3621 return 0;
3622reg_put:
3623 regulator_put(vreg_tma340);
3624 return rc;
3625}
3626
3627
3628static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3629 .ts_name = "cy8ctma340",
3630 .dis_min_x = 0,
3631 .dis_max_x = 479,
3632 .dis_min_y = 0,
3633 .dis_max_y = 799,
3634 .min_tid = 0,
3635 .max_tid = 255,
3636 .min_touch = 0,
3637 .max_touch = 255,
3638 .min_width = 0,
3639 .max_width = 255,
3640 .power_on = tma340_power,
3641 .dev_setup = tma340_dragon_dev_setup,
3642 .nfingers = 2,
3643 .irq_gpio = TS_PEN_IRQ_GPIO,
3644 .resout_gpio = -1,
3645};
3646
3647static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3648 {
3649 I2C_BOARD_INFO("cy8ctma340", 0x24),
3650 .platform_data = &cy8ctma340_dragon_pdata,
3651 }
3652};
3653
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003654#ifdef CONFIG_SERIAL_MSM_HS
3655static int configure_uart_gpios(int on)
3656{
3657 int ret = 0, i;
3658 int uart_gpios[] = {53, 54, 55, 56};
3659 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3660 if (on) {
3661 ret = msm_gpiomux_get(uart_gpios[i]);
3662 if (unlikely(ret))
3663 break;
3664 } else {
3665 ret = msm_gpiomux_put(uart_gpios[i]);
3666 if (unlikely(ret))
3667 return ret;
3668 }
3669 }
3670 if (ret)
3671 for (; i >= 0; i--)
3672 msm_gpiomux_put(uart_gpios[i]);
3673 return ret;
3674}
3675static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3676 .inject_rx_on_wakeup = 1,
3677 .rx_to_inject = 0xFD,
3678 .gpio_config = configure_uart_gpios,
3679};
3680#endif
3681
3682
3683#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3684
3685static struct gpio_led gpio_exp_leds_config[] = {
3686 {
3687 .name = "left_led1:green",
3688 .gpio = GPIO_LEFT_LED_1,
3689 .active_low = 1,
3690 .retain_state_suspended = 0,
3691 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3692 },
3693 {
3694 .name = "left_led2:red",
3695 .gpio = GPIO_LEFT_LED_2,
3696 .active_low = 1,
3697 .retain_state_suspended = 0,
3698 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3699 },
3700 {
3701 .name = "left_led3:green",
3702 .gpio = GPIO_LEFT_LED_3,
3703 .active_low = 1,
3704 .retain_state_suspended = 0,
3705 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3706 },
3707 {
3708 .name = "wlan_led:orange",
3709 .gpio = GPIO_LEFT_LED_WLAN,
3710 .active_low = 1,
3711 .retain_state_suspended = 0,
3712 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3713 },
3714 {
3715 .name = "left_led5:green",
3716 .gpio = GPIO_LEFT_LED_5,
3717 .active_low = 1,
3718 .retain_state_suspended = 0,
3719 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3720 },
3721 {
3722 .name = "right_led1:green",
3723 .gpio = GPIO_RIGHT_LED_1,
3724 .active_low = 1,
3725 .retain_state_suspended = 0,
3726 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3727 },
3728 {
3729 .name = "right_led2:red",
3730 .gpio = GPIO_RIGHT_LED_2,
3731 .active_low = 1,
3732 .retain_state_suspended = 0,
3733 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3734 },
3735 {
3736 .name = "right_led3:green",
3737 .gpio = GPIO_RIGHT_LED_3,
3738 .active_low = 1,
3739 .retain_state_suspended = 0,
3740 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3741 },
3742 {
3743 .name = "bt_led:blue",
3744 .gpio = GPIO_RIGHT_LED_BT,
3745 .active_low = 1,
3746 .retain_state_suspended = 0,
3747 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3748 },
3749 {
3750 .name = "right_led5:green",
3751 .gpio = GPIO_RIGHT_LED_5,
3752 .active_low = 1,
3753 .retain_state_suspended = 0,
3754 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3755 },
3756};
3757
3758static struct gpio_led_platform_data gpio_leds_pdata = {
3759 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3760 .leds = gpio_exp_leds_config,
3761};
3762
3763static struct platform_device gpio_leds = {
3764 .name = "leds-gpio",
3765 .id = -1,
3766 .dev = {
3767 .platform_data = &gpio_leds_pdata,
3768 },
3769};
3770
3771static struct gpio_led fluid_gpio_leds[] = {
3772 {
3773 .name = "dual_led:green",
3774 .gpio = GPIO_LED1_GREEN_N,
3775 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3776 .active_low = 1,
3777 .retain_state_suspended = 0,
3778 },
3779 {
3780 .name = "dual_led:red",
3781 .gpio = GPIO_LED2_RED_N,
3782 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3783 .active_low = 1,
3784 .retain_state_suspended = 0,
3785 },
3786};
3787
3788static struct gpio_led_platform_data gpio_led_pdata = {
3789 .leds = fluid_gpio_leds,
3790 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3791};
3792
3793static struct platform_device fluid_leds_gpio = {
3794 .name = "leds-gpio",
3795 .id = -1,
3796 .dev = {
3797 .platform_data = &gpio_led_pdata,
3798 },
3799};
3800
3801#endif
3802
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003803#ifdef CONFIG_BATTERY_MSM8X60
3804static struct msm_charger_platform_data msm_charger_data = {
3805 .safety_time = 180,
3806 .update_time = 1,
3807 .max_voltage = 4200,
3808 .min_voltage = 3200,
3809};
3810
3811static struct platform_device msm_charger_device = {
3812 .name = "msm-charger",
3813 .id = -1,
3814 .dev = {
3815 .platform_data = &msm_charger_data,
3816 }
3817};
3818#endif
3819
3820/*
3821 * Consumer specific regulator names:
3822 * regulator name consumer dev_name
3823 */
3824static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3825 REGULATOR_SUPPLY("8058_l0", NULL),
3826};
3827static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3828 REGULATOR_SUPPLY("8058_l1", NULL),
3829};
3830static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3831 REGULATOR_SUPPLY("8058_l2", NULL),
3832};
3833static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3834 REGULATOR_SUPPLY("8058_l3", NULL),
3835};
3836static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3837 REGULATOR_SUPPLY("8058_l4", NULL),
3838};
3839static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3840 REGULATOR_SUPPLY("8058_l5", NULL),
3841};
3842static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3843 REGULATOR_SUPPLY("8058_l6", NULL),
3844};
3845static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3846 REGULATOR_SUPPLY("8058_l7", NULL),
3847};
3848static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3849 REGULATOR_SUPPLY("8058_l8", NULL),
3850};
3851static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3852 REGULATOR_SUPPLY("8058_l9", NULL),
3853};
3854static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3855 REGULATOR_SUPPLY("8058_l10", NULL),
3856};
3857static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3858 REGULATOR_SUPPLY("8058_l11", NULL),
3859};
3860static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3861 REGULATOR_SUPPLY("8058_l12", NULL),
3862};
3863static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3864 REGULATOR_SUPPLY("8058_l13", NULL),
3865};
3866static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3867 REGULATOR_SUPPLY("8058_l14", NULL),
3868};
3869static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3870 REGULATOR_SUPPLY("8058_l15", NULL),
3871};
3872static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3873 REGULATOR_SUPPLY("8058_l16", NULL),
3874};
3875static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3876 REGULATOR_SUPPLY("8058_l17", NULL),
3877};
3878static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3879 REGULATOR_SUPPLY("8058_l18", NULL),
3880};
3881static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3882 REGULATOR_SUPPLY("8058_l19", NULL),
3883};
3884static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3885 REGULATOR_SUPPLY("8058_l20", NULL),
3886};
3887static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3888 REGULATOR_SUPPLY("8058_l21", NULL),
3889};
3890static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3891 REGULATOR_SUPPLY("8058_l22", NULL),
3892};
3893static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3894 REGULATOR_SUPPLY("8058_l23", NULL),
3895};
3896static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3897 REGULATOR_SUPPLY("8058_l24", NULL),
3898};
3899static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3900 REGULATOR_SUPPLY("8058_l25", NULL),
3901};
3902static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3903 REGULATOR_SUPPLY("8058_s0", NULL),
3904};
3905static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3906 REGULATOR_SUPPLY("8058_s1", NULL),
3907};
3908static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3909 REGULATOR_SUPPLY("8058_s2", NULL),
3910};
3911static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3912 REGULATOR_SUPPLY("8058_s3", NULL),
3913};
3914static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3915 REGULATOR_SUPPLY("8058_s4", NULL),
3916};
3917static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3918 REGULATOR_SUPPLY("8058_lvs0", NULL),
3919};
3920static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3921 REGULATOR_SUPPLY("8058_lvs1", NULL),
3922};
3923static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3924 REGULATOR_SUPPLY("8058_ncp", NULL),
3925};
3926
3927static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3928 REGULATOR_SUPPLY("8901_l0", NULL),
3929};
3930static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3931 REGULATOR_SUPPLY("8901_l1", NULL),
3932};
3933static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3934 REGULATOR_SUPPLY("8901_l2", NULL),
3935};
3936static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3937 REGULATOR_SUPPLY("8901_l3", NULL),
3938};
3939static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3940 REGULATOR_SUPPLY("8901_l4", NULL),
3941};
3942static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3943 REGULATOR_SUPPLY("8901_l5", NULL),
3944};
3945static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3946 REGULATOR_SUPPLY("8901_l6", NULL),
3947};
3948static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3949 REGULATOR_SUPPLY("8901_s2", NULL),
3950};
3951static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3952 REGULATOR_SUPPLY("8901_s3", NULL),
3953};
3954static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3955 REGULATOR_SUPPLY("8901_s4", NULL),
3956};
3957static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3958 REGULATOR_SUPPLY("8901_lvs0", NULL),
3959};
3960static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3961 REGULATOR_SUPPLY("8901_lvs1", NULL),
3962};
3963static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3964 REGULATOR_SUPPLY("8901_lvs2", NULL),
3965};
3966static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3967 REGULATOR_SUPPLY("8901_lvs3", NULL),
3968};
3969static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3970 REGULATOR_SUPPLY("8901_mvs0", NULL),
3971};
3972
David Collins6f032ba2011-08-31 14:08:15 -07003973/* Pin control regulators */
3974static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3975 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3976};
3977static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3978 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3979};
3980static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3981 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3982};
3983static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3984 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3985};
3986static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3987 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3988};
3989static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3990 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3991};
3992
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003993#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3994 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins15789042012-03-19 10:44:36 -07003995 _freq, _pin_fn, _force_mode, _sleep_set_force_mode, \
3996 _state, _sleep_selectable, _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003997 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003998 .init_data = { \
3999 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07004000 .valid_modes_mask = _modes, \
4001 .valid_ops_mask = _ops, \
4002 .min_uV = _min_uV, \
4003 .max_uV = _max_uV, \
4004 .input_uV = _min_uV, \
4005 .apply_uV = _apply_uV, \
4006 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004007 }, \
David Collins6f032ba2011-08-31 14:08:15 -07004008 .consumer_supplies = vreg_consumers_##_id, \
4009 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004010 ARRAY_SIZE(vreg_consumers_##_id), \
4011 }, \
David Collins6f032ba2011-08-31 14:08:15 -07004012 .id = RPM_VREG_ID_##_id, \
4013 .default_uV = _default_uV, \
4014 .peak_uA = _peak_uA, \
4015 .avg_uA = _avg_uA, \
4016 .pull_down_enable = _pull_down, \
4017 .pin_ctrl = _pin_ctrl, \
4018 .freq = RPM_VREG_FREQ_##_freq, \
4019 .pin_fn = _pin_fn, \
4020 .force_mode = _force_mode, \
David Collins15789042012-03-19 10:44:36 -07004021 .sleep_set_force_mode = _sleep_set_force_mode, \
David Collins6f032ba2011-08-31 14:08:15 -07004022 .state = _state, \
4023 .sleep_selectable = _sleep_selectable, \
4024 }
4025
4026/* Pin control initialization */
4027#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
4028 { \
4029 .init_data = { \
4030 .constraints = { \
4031 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
4032 .always_on = _always_on, \
4033 }, \
4034 .num_consumer_supplies = \
4035 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
4036 .consumer_supplies = vreg_consumers_##_id##_PC, \
4037 }, \
4038 .id = RPM_VREG_ID_##_id##_PC, \
4039 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004040 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004041 }
4042
4043/*
4044 * The default LPM/HPM state of an RPM controlled regulator can be controlled
4045 * via the peak_uA value specified in the table below. If the value is less
4046 * than the high power min threshold for the regulator, then the regulator will
4047 * be set to LPM. Otherwise, it will be set to HPM.
4048 *
4049 * This value can be further overridden by specifying an initial mode via
4050 * .init_data.constraints.initial_mode.
4051 */
4052
David Collins6f032ba2011-08-31 14:08:15 -07004053#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4054 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004055 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4056 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4057 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4058 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4059 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004060 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4061 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004062 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004063 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004064 _sleep_selectable, _always_on)
4065
David Collins6f032ba2011-08-31 14:08:15 -07004066#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4067 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004068 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4069 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4070 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4071 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4072 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004073 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4074 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004075 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004076 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4077 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004078
David Collins6f032ba2011-08-31 14:08:15 -07004079#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004080 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4081 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004082 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4083 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004084 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004085 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4086 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004087
David Collins6f032ba2011-08-31 14:08:15 -07004088#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004089 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4090 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004091 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4092 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004093 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004094 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4095 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004096
David Collins6f032ba2011-08-31 14:08:15 -07004097#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4098#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4099#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4100#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4101#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004102
David Collins6f032ba2011-08-31 14:08:15 -07004103/* RPM early regulator constraints */
4104static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4105 /* ID a_on pd ss min_uV max_uV init_ip freq */
Matt Wagantall2ecbec22012-03-13 23:18:07 -07004106 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1325000, SMPS_HMIN, 1p60),
David Collins6f032ba2011-08-31 14:08:15 -07004107 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004108};
4109
David Collins6f032ba2011-08-31 14:08:15 -07004110/* RPM regulator constraints */
4111static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4112 /* ID a_on pd ss min_uV max_uV init_ip */
4113 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4114 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4115 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4116 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4117 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4118 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4119 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4120 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4121 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4122 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4123 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4124 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4125 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4126 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4127 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4128 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4129 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4130 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4131 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4132 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4133 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4134 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4135 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4136 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4137 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4138 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004139
David Collins6f032ba2011-08-31 14:08:15 -07004140 /* ID a_on pd ss min_uV max_uV init_ip freq */
4141 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4142 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4143 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4144
4145 /* ID a_on pd ss */
4146 RPM_VS(PM8058_LVS0, 0, 1, 0),
4147 RPM_VS(PM8058_LVS1, 0, 1, 0),
4148
4149 /* ID a_on pd ss min_uV max_uV */
4150 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4151
4152 /* ID a_on pd ss min_uV max_uV init_ip */
4153 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4154 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4155 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4156 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4157 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4158 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4159 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4160
4161 /* ID a_on pd ss min_uV max_uV init_ip freq */
4162 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4163 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4164 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4165
4166 /* ID a_on pd ss */
4167 RPM_VS(PM8901_LVS0, 1, 1, 0),
4168 RPM_VS(PM8901_LVS1, 0, 1, 0),
4169 RPM_VS(PM8901_LVS2, 0, 1, 0),
4170 RPM_VS(PM8901_LVS3, 0, 1, 0),
4171 RPM_VS(PM8901_MVS0, 0, 1, 0),
4172
4173 /* ID a_on pin_func pin_ctrl */
4174 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4175 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4176 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4177 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4178 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4179 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4180};
4181
4182static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4183 .init_data = rpm_regulator_early_init_data,
4184 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4185 .version = RPM_VREG_VERSION_8660,
4186 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4187 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4188};
4189
4190static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4191 .init_data = rpm_regulator_init_data,
4192 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4193 .version = RPM_VREG_VERSION_8660,
4194};
4195
4196static struct platform_device rpm_regulator_early_device = {
4197 .name = "rpm-regulator",
4198 .id = 0,
4199 .dev = {
4200 .platform_data = &rpm_regulator_early_pdata,
4201 },
4202};
4203
4204static struct platform_device rpm_regulator_device = {
4205 .name = "rpm-regulator",
4206 .id = 1,
4207 .dev = {
4208 .platform_data = &rpm_regulator_pdata,
4209 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004210};
4211
4212static struct platform_device *early_regulators[] __initdata = {
4213 &msm_device_saw_s0,
4214 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004215 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004216};
4217
4218static struct platform_device *early_devices[] __initdata = {
4219#ifdef CONFIG_MSM_BUS_SCALING
4220 &msm_bus_apps_fabric,
4221 &msm_bus_sys_fabric,
4222 &msm_bus_mm_fabric,
4223 &msm_bus_sys_fpb,
4224 &msm_bus_cpss_fpb,
4225#endif
4226 &msm_device_dmov_adm0,
4227 &msm_device_dmov_adm1,
4228};
4229
4230#if (defined(CONFIG_MARIMBA_CORE)) && \
4231 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4232
4233static int bluetooth_power(int);
4234static struct platform_device msm_bt_power_device = {
4235 .name = "bt_power",
4236 .id = -1,
4237 .dev = {
4238 .platform_data = &bluetooth_power,
4239 },
4240};
4241#endif
4242
4243static struct platform_device msm_tsens_device = {
4244 .name = "tsens-tm",
4245 .id = -1,
4246};
4247
4248static struct platform_device *rumi_sim_devices[] __initdata = {
4249 &smc91x_device,
4250 &msm_device_uart_dm12,
4251#ifdef CONFIG_I2C_QUP
4252 &msm_gsbi3_qup_i2c_device,
4253 &msm_gsbi4_qup_i2c_device,
4254 &msm_gsbi7_qup_i2c_device,
4255 &msm_gsbi8_qup_i2c_device,
4256 &msm_gsbi9_qup_i2c_device,
4257 &msm_gsbi12_qup_i2c_device,
4258#endif
4259#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004260 &msm_device_ssbi3,
4261#endif
4262#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004263#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004264 &android_pmem_device,
4265 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004266 &android_pmem_smipool_device,
4267#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004268 &android_pmem_audio_device,
4269#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004270#ifdef CONFIG_MSM_ROTATOR
4271 &msm_rotator_device,
4272#endif
4273 &msm_fb_device,
4274 &msm_kgsl_3d0,
4275 &msm_kgsl_2d0,
4276 &msm_kgsl_2d1,
4277 &lcdc_samsung_panel_device,
4278#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4279 &hdmi_msm_device,
4280#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4281#ifdef CONFIG_MSM_CAMERA
4282#ifdef CONFIG_MT9E013
4283 &msm_camera_sensor_mt9e013,
4284#endif
4285#ifdef CONFIG_IMX074
4286 &msm_camera_sensor_imx074,
4287#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004288#ifdef CONFIG_VX6953
4289 &msm_camera_sensor_vx6953,
4290#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004291#ifdef CONFIG_WEBCAM_OV7692
4292 &msm_camera_sensor_webcam_ov7692,
4293#endif
4294#ifdef CONFIG_WEBCAM_OV9726
4295 &msm_camera_sensor_webcam_ov9726,
4296#endif
4297#ifdef CONFIG_QS_S5K4E1
4298 &msm_camera_sensor_qs_s5k4e1,
4299#endif
4300#endif
4301#ifdef CONFIG_MSM_GEMINI
4302 &msm_gemini_device,
4303#endif
4304#ifdef CONFIG_MSM_VPE
4305 &msm_vpe_device,
4306#endif
4307 &msm_device_vidc,
4308};
4309
4310#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4311enum {
4312 SX150X_CORE,
4313 SX150X_DOCKING,
4314 SX150X_SURF,
4315 SX150X_LEFT_FHA,
4316 SX150X_RIGHT_FHA,
4317 SX150X_SOUTH,
4318 SX150X_NORTH,
4319 SX150X_CORE_FLUID,
4320};
4321
4322static struct sx150x_platform_data sx150x_data[] __initdata = {
4323 [SX150X_CORE] = {
4324 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4325 .oscio_is_gpo = false,
4326 .io_pullup_ena = 0x0c08,
4327 .io_pulldn_ena = 0x4060,
4328 .io_open_drain_ena = 0x000c,
4329 .io_polarity = 0,
4330 .irq_summary = -1, /* see fixup_i2c_configs() */
4331 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4332 },
4333 [SX150X_DOCKING] = {
4334 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4335 .oscio_is_gpo = false,
4336 .io_pullup_ena = 0x5e06,
4337 .io_pulldn_ena = 0x81b8,
4338 .io_open_drain_ena = 0,
4339 .io_polarity = 0,
4340 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4341 UI_INT2_N),
4342 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4343 GPIO_DOCKING_EXPANDER_BASE -
4344 GPIO_EXPANDER_GPIO_BASE,
4345 },
4346 [SX150X_SURF] = {
4347 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4348 .oscio_is_gpo = false,
4349 .io_pullup_ena = 0,
4350 .io_pulldn_ena = 0,
4351 .io_open_drain_ena = 0,
4352 .io_polarity = 0,
4353 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4354 UI_INT1_N),
4355 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4356 GPIO_SURF_EXPANDER_BASE -
4357 GPIO_EXPANDER_GPIO_BASE,
4358 },
4359 [SX150X_LEFT_FHA] = {
4360 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4361 .oscio_is_gpo = false,
4362 .io_pullup_ena = 0,
4363 .io_pulldn_ena = 0x40,
4364 .io_open_drain_ena = 0,
4365 .io_polarity = 0,
4366 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4367 UI_INT3_N),
4368 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4369 GPIO_LEFT_KB_EXPANDER_BASE -
4370 GPIO_EXPANDER_GPIO_BASE,
4371 },
4372 [SX150X_RIGHT_FHA] = {
4373 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4374 .oscio_is_gpo = true,
4375 .io_pullup_ena = 0,
4376 .io_pulldn_ena = 0,
4377 .io_open_drain_ena = 0,
4378 .io_polarity = 0,
4379 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4380 UI_INT3_N),
4381 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4382 GPIO_RIGHT_KB_EXPANDER_BASE -
4383 GPIO_EXPANDER_GPIO_BASE,
4384 },
4385 [SX150X_SOUTH] = {
4386 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4387 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4388 GPIO_SOUTH_EXPANDER_BASE -
4389 GPIO_EXPANDER_GPIO_BASE,
4390 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4391 },
4392 [SX150X_NORTH] = {
4393 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4394 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4395 GPIO_NORTH_EXPANDER_BASE -
4396 GPIO_EXPANDER_GPIO_BASE,
4397 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4398 .oscio_is_gpo = true,
4399 .io_open_drain_ena = 0x30,
4400 },
4401 [SX150X_CORE_FLUID] = {
4402 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4403 .oscio_is_gpo = false,
4404 .io_pullup_ena = 0x0408,
4405 .io_pulldn_ena = 0x4060,
4406 .io_open_drain_ena = 0x0008,
4407 .io_polarity = 0,
4408 .irq_summary = -1, /* see fixup_i2c_configs() */
4409 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4410 },
4411};
4412
4413#ifdef CONFIG_SENSORS_MSM_ADC
4414/* Configuration of EPM expander is done when client
4415 * request an adc read
4416 */
4417static struct sx150x_platform_data sx150x_epmdata = {
4418 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4419 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4420 GPIO_EPM_EXPANDER_BASE -
4421 GPIO_EXPANDER_GPIO_BASE,
4422 .irq_summary = -1,
4423};
4424#endif
4425
4426/* sx150x_low_power_cfg
4427 *
4428 * This data and init function are used to put unused gpio-expander output
4429 * lines into their low-power states at boot. The init
4430 * function must be deferred until a later init stage because the i2c
4431 * gpio expander drivers do not probe until after they are registered
4432 * (see register_i2c_devices) and the work-queues for those registrations
4433 * are processed. Because these lines are unused, there is no risk of
4434 * competing with a device driver for the gpio.
4435 *
4436 * gpio lines whose low-power states are input are naturally in their low-
4437 * power configurations once probed, see the platform data structures above.
4438 */
4439struct sx150x_low_power_cfg {
4440 unsigned gpio;
4441 unsigned val;
4442};
4443
4444static struct sx150x_low_power_cfg
4445common_sx150x_lp_cfgs[] __initdata = {
4446 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4447 {GPIO_EXT_GPS_LNA_EN, 0},
4448 {GPIO_MSM_WAKES_BT, 0},
4449 {GPIO_USB_UICC_EN, 0},
4450 {GPIO_BATT_GAUGE_EN, 0},
4451};
4452
4453static struct sx150x_low_power_cfg
4454surf_ffa_sx150x_lp_cfgs[] __initdata = {
4455 {GPIO_MIPI_DSI_RST_N, 0},
4456 {GPIO_DONGLE_PWR_EN, 0},
4457 {GPIO_CAP_TS_SLEEP, 1},
4458 {GPIO_WEB_CAMIF_RESET_N, 0},
4459};
4460
4461static void __init
4462cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4463{
4464 unsigned n;
4465 int rc;
4466
4467 for (n = 0; n < nelems; ++n) {
4468 rc = gpio_request(cfgs[n].gpio, NULL);
4469 if (!rc) {
4470 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4471 gpio_free(cfgs[n].gpio);
4472 }
4473
4474 if (rc) {
4475 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4476 __func__, cfgs[n].gpio, rc);
4477 }
Steve Muckle9161d302010-02-11 11:50:40 -08004478 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004479}
4480
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004481static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004482{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004483 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4484 ARRAY_SIZE(common_sx150x_lp_cfgs));
4485 if (!machine_is_msm8x60_fluid())
4486 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4487 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4488 return 0;
4489}
4490module_init(cfg_sx150xs_low_power);
4491
4492#ifdef CONFIG_I2C
4493static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4494 {
4495 I2C_BOARD_INFO("sx1509q", 0x3e),
4496 .platform_data = &sx150x_data[SX150X_CORE]
4497 },
4498};
4499
4500static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4501 {
4502 I2C_BOARD_INFO("sx1509q", 0x3f),
4503 .platform_data = &sx150x_data[SX150X_DOCKING]
4504 },
4505};
4506
4507static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4508 {
4509 I2C_BOARD_INFO("sx1509q", 0x70),
4510 .platform_data = &sx150x_data[SX150X_SURF]
4511 }
4512};
4513
4514static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4515 {
4516 I2C_BOARD_INFO("sx1508q", 0x21),
4517 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4518 },
4519 {
4520 I2C_BOARD_INFO("sx1508q", 0x22),
4521 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4522 }
4523};
4524
4525static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4526 {
4527 I2C_BOARD_INFO("sx1508q", 0x23),
4528 .platform_data = &sx150x_data[SX150X_SOUTH]
4529 },
4530 {
4531 I2C_BOARD_INFO("sx1508q", 0x20),
4532 .platform_data = &sx150x_data[SX150X_NORTH]
4533 }
4534};
4535
4536static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4537 {
4538 I2C_BOARD_INFO("sx1509q", 0x3e),
4539 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4540 },
4541};
4542
4543#ifdef CONFIG_SENSORS_MSM_ADC
4544static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4545 {
4546 I2C_BOARD_INFO("sx1509q", 0x3e),
4547 .platform_data = &sx150x_epmdata
4548 },
4549};
4550#endif
4551#endif
4552#endif
4553
4554#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004555
4556static struct adc_access_fn xoadc_fn = {
4557 pm8058_xoadc_select_chan_and_start_conv,
4558 pm8058_xoadc_read_adc_code,
4559 pm8058_xoadc_get_properties,
4560 pm8058_xoadc_slot_request,
4561 pm8058_xoadc_restore_slot,
4562 pm8058_xoadc_calibrate,
4563};
4564
4565#if defined(CONFIG_I2C) && \
4566 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4567static struct regulator *vreg_adc_epm1;
4568
4569static struct i2c_client *epm_expander_i2c_register_board(void)
4570
4571{
4572 struct i2c_adapter *i2c_adap;
4573 struct i2c_client *client = NULL;
4574 i2c_adap = i2c_get_adapter(0x0);
4575
4576 if (i2c_adap == NULL)
4577 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4578
4579 if (i2c_adap != NULL)
4580 client = i2c_new_device(i2c_adap,
4581 &fluid_expanders_i2c_epm_info[0]);
4582 return client;
4583
4584}
4585
4586static unsigned int msm_adc_gpio_configure_expander_enable(void)
4587{
4588 int rc = 0;
4589 static struct i2c_client *epm_i2c_client;
4590
4591 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4592
4593 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4594
4595 if (IS_ERR(vreg_adc_epm1)) {
4596 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4597 return 0;
4598 }
4599
4600 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4601 if (rc)
4602 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4603 "regulator set voltage failed\n");
4604
4605 rc = regulator_enable(vreg_adc_epm1);
4606 if (rc) {
4607 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4608 "Error while enabling regulator for epm s3 %d\n", rc);
4609 return rc;
4610 }
4611
4612 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4613 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4614
4615 msleep(1000);
4616
4617 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4618 if (!rc) {
4619 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4620 "Configure 5v boost\n");
4621 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4622 } else {
4623 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4624 "Error for epm 5v boost en\n");
4625 goto exit_vreg_epm;
4626 }
4627
4628 msleep(500);
4629
4630 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4631 if (!rc) {
4632 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4633 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4634 "Configure epm 3.3v\n");
4635 } else {
4636 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4637 "Error for gpio 3.3ven\n");
4638 goto exit_vreg_epm;
4639 }
4640 msleep(500);
4641
4642 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4643 "Trying to request EPM LVLSFT_EN\n");
4644 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4645 if (!rc) {
4646 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4647 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4648 "Configure the lvlsft\n");
4649 } else {
4650 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4651 "Error for epm lvlsft_en\n");
4652 goto exit_vreg_epm;
4653 }
4654
4655 msleep(500);
4656
4657 if (!epm_i2c_client)
4658 epm_i2c_client = epm_expander_i2c_register_board();
4659
4660 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4661 if (!rc)
4662 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4663 if (rc) {
4664 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4665 ": GPIO PWR MON Enable issue\n");
4666 goto exit_vreg_epm;
4667 }
4668
4669 msleep(1000);
4670
4671 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4672 if (!rc) {
4673 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4674 if (rc) {
4675 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4676 ": ADC1_PWDN error direction out\n");
4677 goto exit_vreg_epm;
4678 }
4679 }
4680
4681 msleep(100);
4682
4683 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4684 if (!rc) {
4685 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4686 if (rc) {
4687 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4688 ": ADC2_PWD error direction out\n");
4689 goto exit_vreg_epm;
4690 }
4691 }
4692
4693 msleep(1000);
4694
4695 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4696 if (!rc) {
4697 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4698 if (rc) {
4699 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4700 "Gpio request problem %d\n", rc);
4701 goto exit_vreg_epm;
4702 }
4703 }
4704
4705 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4706 if (!rc) {
4707 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4708 if (rc) {
4709 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4710 ": EPM_SPI_ADC1_CS_N error\n");
4711 goto exit_vreg_epm;
4712 }
4713 }
4714
4715 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4716 if (!rc) {
4717 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4718 if (rc) {
4719 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4720 ": EPM_SPI_ADC2_Cs_N error\n");
4721 goto exit_vreg_epm;
4722 }
4723 }
4724
4725 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4726 "the power monitor reset for epm\n");
4727
4728 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4729 if (!rc) {
4730 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4731 if (rc) {
4732 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4733 ": Error in the power mon reset\n");
4734 goto exit_vreg_epm;
4735 }
4736 }
4737
4738 msleep(1000);
4739
4740 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4741
4742 msleep(500);
4743
4744 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4745
4746 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4747
4748 return rc;
4749
4750exit_vreg_epm:
4751 regulator_disable(vreg_adc_epm1);
4752
4753 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4754 " rc = %d.\n", rc);
4755 return rc;
4756};
4757
4758static unsigned int msm_adc_gpio_configure_expander_disable(void)
4759{
4760 int rc = 0;
4761
4762 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4763 gpio_free(GPIO_PWR_MON_RESET_N);
4764
4765 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4766 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4767
4768 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4769 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4770
4771 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4772 gpio_free(GPIO_PWR_MON_START);
4773
4774 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4775 gpio_free(GPIO_ADC1_PWDN_N);
4776
4777 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4778 gpio_free(GPIO_ADC2_PWDN_N);
4779
4780 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4781 gpio_free(GPIO_PWR_MON_ENABLE);
4782
4783 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4784 gpio_free(GPIO_EPM_LVLSFT_EN);
4785
4786 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4787 gpio_free(GPIO_EPM_5V_BOOST_EN);
4788
4789 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4790 gpio_free(GPIO_EPM_3_3V_EN);
4791
4792 rc = regulator_disable(vreg_adc_epm1);
4793 if (rc)
4794 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4795 "Error while enabling regulator for epm s3 %d\n", rc);
4796 regulator_put(vreg_adc_epm1);
4797
4798 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4799 return rc;
4800};
4801
4802unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4803{
4804 int rc = 0;
4805
4806 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4807 cs_enable);
4808
4809 if (cs_enable < 16) {
4810 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4811 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4812 } else {
4813 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4814 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4815 }
4816 return rc;
4817};
4818
4819unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4820{
4821 int rc = 0;
4822
4823 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4824
4825 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4826
4827 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4828
4829 return rc;
4830};
4831#endif
4832
4833static struct msm_adc_channels msm_adc_channels_data[] = {
4834 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4835 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4836 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4837 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4838 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4839 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4840 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4841 CHAN_PATH_TYPE4,
4842 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4843 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4844 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4845 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4846 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4847 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4848 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4849 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4850 CHAN_PATH_TYPE12,
4851 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4852 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4853 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4854 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4855 CHAN_PATH_TYPE_NONE,
4856 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4857 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4858 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4859 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4860 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4861 scale_xtern_chgr_cur},
4862 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4863 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4864 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4865 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4866 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4867 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4868 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4869 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4870 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4871 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4872 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4873 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4874};
4875
4876static char *msm_adc_fluid_device_names[] = {
4877 "ADS_ADC1",
4878 "ADS_ADC2",
4879};
4880
4881static struct msm_adc_platform_data msm_adc_pdata = {
4882 .channel = msm_adc_channels_data,
4883 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4884#if defined(CONFIG_I2C) && \
4885 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4886 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4887 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4888 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4889 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4890#endif
4891};
4892
4893static struct platform_device msm_adc_device = {
4894 .name = "msm_adc",
4895 .id = -1,
4896 .dev = {
4897 .platform_data = &msm_adc_pdata,
4898 },
4899};
4900
4901static void pmic8058_xoadc_mpp_config(void)
4902{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304903 int rc, i;
4904 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304905 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304906 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304907 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304908 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304909 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304910 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304911 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304912 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304913 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304914 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304915 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4916 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304917 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004918
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304919 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4920 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4921 &xoadc_mpps[i].config);
4922 if (rc) {
4923 pr_err("%s: Config MPP %d of PM8058 failed\n",
4924 __func__, xoadc_mpps[i].mpp);
4925 }
4926 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004927}
4928
4929static struct regulator *vreg_ldo18_adc;
4930
4931static int pmic8058_xoadc_vreg_config(int on)
4932{
4933 int rc;
4934
4935 if (on) {
4936 rc = regulator_enable(vreg_ldo18_adc);
4937 if (rc)
4938 pr_err("%s: Enable of regulator ldo18_adc "
4939 "failed\n", __func__);
4940 } else {
4941 rc = regulator_disable(vreg_ldo18_adc);
4942 if (rc)
4943 pr_err("%s: Disable of regulator ldo18_adc "
4944 "failed\n", __func__);
4945 }
4946
4947 return rc;
4948}
4949
4950static int pmic8058_xoadc_vreg_setup(void)
4951{
4952 int rc;
4953
4954 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4955 if (IS_ERR(vreg_ldo18_adc)) {
4956 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4957 __func__, PTR_ERR(vreg_ldo18_adc));
4958 rc = PTR_ERR(vreg_ldo18_adc);
4959 goto fail;
4960 }
4961
4962 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4963 if (rc) {
4964 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4965 goto fail;
4966 }
4967
4968 return rc;
4969fail:
4970 regulator_put(vreg_ldo18_adc);
4971 return rc;
4972}
4973
4974static void pmic8058_xoadc_vreg_shutdown(void)
4975{
4976 regulator_put(vreg_ldo18_adc);
4977}
4978
4979/* usec. For this ADC,
4980 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4981 * Each channel has different configuration, thus at the time of starting
4982 * the conversion, xoadc will return actual conversion time
4983 * */
4984static struct adc_properties pm8058_xoadc_data = {
4985 .adc_reference = 2200, /* milli-voltage for this adc */
4986 .bitresolution = 15,
4987 .bipolar = 0,
4988 .conversiontime = 54,
4989};
4990
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304991static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004992 .xoadc_prop = &pm8058_xoadc_data,
4993 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4994 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4995 .xoadc_num = XOADC_PMIC_0,
4996 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4997 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4998};
4999#endif
5000
5001#ifdef CONFIG_MSM_SDIO_AL
5002
5003static unsigned mdm2ap_status = 140;
5004
5005static int configure_mdm2ap_status(int on)
5006{
5007 int ret = 0;
5008 if (on)
5009 ret = msm_gpiomux_get(mdm2ap_status);
5010 else
5011 ret = msm_gpiomux_put(mdm2ap_status);
5012
5013 if (ret)
5014 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
5015 on);
5016
5017 return ret;
5018}
5019
5020
5021static int get_mdm2ap_status(void)
5022{
5023 return gpio_get_value(mdm2ap_status);
5024}
5025
5026static struct sdio_al_platform_data sdio_al_pdata = {
5027 .config_mdm2ap_status = configure_mdm2ap_status,
5028 .get_mdm2ap_status = get_mdm2ap_status,
5029 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03005030 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005031 .peer_sdioc_version_major = 0x0004,
5032 .peer_sdioc_boot_version_minor = 0x0001,
5033 .peer_sdioc_boot_version_major = 0x0003
5034};
5035
5036struct platform_device msm_device_sdio_al = {
5037 .name = "msm_sdio_al",
5038 .id = -1,
5039 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03005040 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005041 .platform_data = &sdio_al_pdata,
5042 },
5043};
5044
5045#endif /* CONFIG_MSM_SDIO_AL */
5046
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305047#define GPIO_VREG_ID_EXT_5V 0
5048
5049static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
5050 REGULATOR_SUPPLY("ext_5v", NULL),
5051 REGULATOR_SUPPLY("8901_mpp0", NULL),
5052};
5053
5054#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
5055 [GPIO_VREG_ID_##_id] = { \
5056 .init_data = { \
5057 .constraints = { \
5058 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5059 }, \
5060 .num_consumer_supplies = \
5061 ARRAY_SIZE(vreg_consumers_##_id), \
5062 .consumer_supplies = vreg_consumers_##_id, \
5063 }, \
5064 .regulator_name = _reg_name, \
5065 .active_low = _active_low, \
5066 .gpio_label = _gpio_label, \
5067 .gpio = _gpio, \
5068 }
5069
5070/* GPIO regulator constraints */
5071static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5072 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5073 PM8901_MPP_PM_TO_SYS(0), 0),
5074};
5075
5076/* GPIO regulator */
5077static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5078 .name = GPIO_REGULATOR_DEV_NAME,
5079 .id = PM8901_MPP_PM_TO_SYS(0),
5080 .dev = {
5081 .platform_data =
5082 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5083 },
5084};
5085
5086static void __init pm8901_vreg_mpp0_init(void)
5087{
5088 int rc;
5089
5090 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5091 .mpp = PM8901_MPP_PM_TO_SYS(0),
5092 .config = {
5093 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5094 .level = PM8901_MPP_DIG_LEVEL_VPH,
5095 },
5096 };
5097
5098 /*
5099 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5100 * implies that the regulator connected to MPP0 is enabled when
5101 * MPP0 is low.
5102 */
5103 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5104 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5105 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5106 } else {
5107 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5108 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5109 }
5110
5111 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5112 if (rc)
5113 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5114}
5115
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005116static struct platform_device *charm_devices[] __initdata = {
5117 &msm_charm_modem,
5118#ifdef CONFIG_MSM_SDIO_AL
5119 &msm_device_sdio_al,
5120#endif
5121};
5122
Lei Zhou338cab82011-08-19 13:38:17 -04005123#ifdef CONFIG_SND_SOC_MSM8660_APQ
5124static struct platform_device *dragon_alsa_devices[] __initdata = {
5125 &msm_pcm,
5126 &msm_pcm_routing,
5127 &msm_cpudai0,
5128 &msm_cpudai1,
5129 &msm_cpudai_hdmi_rx,
5130 &msm_cpudai_bt_rx,
5131 &msm_cpudai_bt_tx,
5132 &msm_cpudai_fm_rx,
5133 &msm_cpudai_fm_tx,
5134 &msm_cpu_fe,
5135 &msm_stub_codec,
5136 &msm_lpa_pcm,
5137};
5138#endif
5139
5140static struct platform_device *asoc_devices[] __initdata = {
5141 &asoc_msm_pcm,
5142 &asoc_msm_dai0,
5143 &asoc_msm_dai1,
5144};
5145
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005146static struct platform_device *surf_devices[] __initdata = {
5147 &msm_device_smd,
5148 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005149 &msm_pil_q6v3,
Stephen Boyd4eb885b2011-09-29 01:16:03 -07005150 &msm_pil_modem,
Stephen Boydd89eebe2011-09-28 23:28:11 -07005151 &msm_pil_tzapps,
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07005152 &msm_pil_dsps,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005153#ifdef CONFIG_I2C_QUP
5154 &msm_gsbi3_qup_i2c_device,
5155 &msm_gsbi4_qup_i2c_device,
5156 &msm_gsbi7_qup_i2c_device,
5157 &msm_gsbi8_qup_i2c_device,
5158 &msm_gsbi9_qup_i2c_device,
5159 &msm_gsbi12_qup_i2c_device,
5160#endif
5161#ifdef CONFIG_SERIAL_MSM_HS
5162 &msm_device_uart_dm1,
5163#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305164#ifdef CONFIG_MSM_SSBI
5165 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305166 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305167#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005168#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005169 &msm_device_ssbi3,
5170#endif
5171#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5172 &isp1763_device,
5173#endif
5174
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005175#if defined (CONFIG_MSM_8x60_VOIP)
5176 &asoc_msm_mvs,
5177 &asoc_mvs_dai0,
5178 &asoc_mvs_dai1,
5179#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005180
Lena Salman57d167e2012-03-21 19:46:38 +02005181#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005182 &msm_device_otg,
5183#endif
Lena Salman57d167e2012-03-21 19:46:38 +02005184#ifdef CONFIG_USB_MSM_72K
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005185 &msm_device_gadget_peripheral,
5186#endif
5187#ifdef CONFIG_USB_G_ANDROID
5188 &android_usb_device,
5189#endif
5190#ifdef CONFIG_BATTERY_MSM
5191 &msm_batt_device,
5192#endif
5193#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005194#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005195 &android_pmem_device,
5196 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005197 &android_pmem_smipool_device,
5198#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005199 &android_pmem_audio_device,
5200#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005201#ifdef CONFIG_MSM_ROTATOR
5202 &msm_rotator_device,
5203#endif
5204 &msm_fb_device,
5205 &msm_kgsl_3d0,
5206 &msm_kgsl_2d0,
5207 &msm_kgsl_2d1,
5208 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005209#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5210 &lcdc_nt35582_panel_device,
5211#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005212#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5213 &lcdc_samsung_oled_panel_device,
5214#endif
5215#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5216 &lcdc_auo_wvga_panel_device,
5217#endif
5218#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5219 &hdmi_msm_device,
5220#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5221#ifdef CONFIG_FB_MSM_MIPI_DSI
5222 &mipi_dsi_toshiba_panel_device,
5223 &mipi_dsi_novatek_panel_device,
5224#endif
5225#ifdef CONFIG_MSM_CAMERA
5226#ifdef CONFIG_MT9E013
5227 &msm_camera_sensor_mt9e013,
5228#endif
5229#ifdef CONFIG_IMX074
5230 &msm_camera_sensor_imx074,
5231#endif
5232#ifdef CONFIG_WEBCAM_OV7692
5233 &msm_camera_sensor_webcam_ov7692,
5234#endif
5235#ifdef CONFIG_WEBCAM_OV9726
5236 &msm_camera_sensor_webcam_ov9726,
5237#endif
5238#ifdef CONFIG_QS_S5K4E1
5239 &msm_camera_sensor_qs_s5k4e1,
5240#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005241#ifdef CONFIG_VX6953
5242 &msm_camera_sensor_vx6953,
5243#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005244#endif
5245#ifdef CONFIG_MSM_GEMINI
5246 &msm_gemini_device,
5247#endif
5248#ifdef CONFIG_MSM_VPE
5249 &msm_vpe_device,
5250#endif
5251
5252#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
Praveen Chidambaram78499012011-11-01 17:15:17 -06005253 &msm8660_rpm_log_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005254#endif
5255#if defined(CONFIG_MSM_RPM_STATS_LOG)
Praveen Chidambaram78499012011-11-01 17:15:17 -06005256 &msm8660_rpm_stat_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005257#endif
5258 &msm_device_vidc,
5259#if (defined(CONFIG_MARIMBA_CORE)) && \
5260 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5261 &msm_bt_power_device,
5262#endif
5263#ifdef CONFIG_SENSORS_MSM_ADC
5264 &msm_adc_device,
5265#endif
David Collins6f032ba2011-08-31 14:08:15 -07005266 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005267
5268#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5269 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5270 &qcrypto_device,
5271#endif
5272
5273#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5274 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5275 &qcedev_device,
5276#endif
5277
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005278
5279#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5280#ifdef CONFIG_MSM_USE_TSIF1
5281 &msm_device_tsif[1],
5282#else
5283 &msm_device_tsif[0],
5284#endif /* CONFIG_MSM_USE_TSIF1 */
5285#endif /* CONFIG_TSIF */
5286
5287#ifdef CONFIG_HW_RANDOM_MSM
5288 &msm_device_rng,
5289#endif
5290
5291 &msm_tsens_device,
Praveen Chidambaram78499012011-11-01 17:15:17 -06005292 &msm8660_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005293#ifdef CONFIG_ION_MSM
5294 &ion_dev,
5295#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005296 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005297};
5298
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005299#ifdef CONFIG_ION_MSM
Olav Haugan0703dbf2011-12-19 17:53:38 -08005300#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5301static struct ion_cp_heap_pdata cp_mm_ion_pdata = {
5302 .permission_type = IPT_TYPE_MM_CARVEOUT,
Olav Haugan42ebe712012-01-10 16:30:58 -08005303 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005304 .request_region = request_smi_region,
5305 .release_region = release_smi_region,
5306 .setup_region = setup_smi_region,
5307};
5308
5309static struct ion_cp_heap_pdata cp_mfc_ion_pdata = {
5310 .permission_type = IPT_TYPE_MFC_SHAREDMEM,
Olav Haugan42ebe712012-01-10 16:30:58 -08005311 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005312 .request_region = request_smi_region,
5313 .release_region = release_smi_region,
5314 .setup_region = setup_smi_region,
5315};
5316
5317static struct ion_cp_heap_pdata cp_wb_ion_pdata = {
5318 .permission_type = IPT_TYPE_MDP_WRITEBACK,
Olav Haugan42ebe712012-01-10 16:30:58 -08005319 .align = PAGE_SIZE,
5320};
5321
5322static struct ion_co_heap_pdata fw_co_ion_pdata = {
5323 .adjacent_mem_id = ION_CP_MM_HEAP_ID,
5324 .align = SZ_128K,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005325};
5326
5327static struct ion_co_heap_pdata co_ion_pdata = {
Olav Haugan42ebe712012-01-10 16:30:58 -08005328 .adjacent_mem_id = INVALID_HEAP_ID,
5329 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005330};
5331#endif
Olav Haugan9cdfc2f2012-02-15 09:52:57 -08005332
5333/**
5334 * These heaps are listed in the order they will be allocated. Due to
5335 * video hardware restrictions and content protection the FW heap has to
5336 * be allocated adjacent (below) the MM heap and the MFC heap has to be
5337 * allocated after the MM heap to ensure MFC heap is not more than 256MB
5338 * away from the base address of the FW heap.
5339 * However, the order of FW heap and MM heap doesn't matter since these
5340 * two heaps are taken care of by separate code to ensure they are adjacent
5341 * to each other.
5342 * Don't swap the order unless you know what you are doing!
5343 */
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005344static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005345 .nr = MSM_ION_HEAP_NUM,
5346 .heaps = {
5347 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005348 .id = ION_SYSTEM_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005349 .type = ION_HEAP_TYPE_SYSTEM,
5350 .name = ION_VMALLOC_HEAP_NAME,
5351 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005352#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5353 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005354 .id = ION_CP_MM_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005355 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005356 .name = ION_MM_HEAP_NAME,
5357 .size = MSM_ION_MM_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005358 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005359 .extra_data = (void *) &cp_mm_ion_pdata,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005360 },
Olav Hauganb5be7992011-11-18 14:29:02 -08005361 {
Olav Haugan42ebe712012-01-10 16:30:58 -08005362 .id = ION_MM_FIRMWARE_HEAP_ID,
5363 .type = ION_HEAP_TYPE_CARVEOUT,
5364 .name = ION_MM_FIRMWARE_HEAP_NAME,
5365 .size = MSM_ION_MM_FW_SIZE,
5366 .memory_type = ION_SMI_TYPE,
5367 .extra_data = (void *) &fw_co_ion_pdata,
5368 },
5369 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005370 .id = ION_CP_MFC_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005371 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005372 .name = ION_MFC_HEAP_NAME,
5373 .size = MSM_ION_MFC_SIZE,
5374 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005375 .extra_data = (void *) &cp_mfc_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005376 },
5377 {
Olav Haugan9cdfc2f2012-02-15 09:52:57 -08005378 .id = ION_SF_HEAP_ID,
5379 .type = ION_HEAP_TYPE_CARVEOUT,
5380 .name = ION_SF_HEAP_NAME,
5381 .size = MSM_ION_SF_SIZE,
5382 .memory_type = ION_EBI_TYPE,
5383 .extra_data = (void *)&co_ion_pdata,
5384 },
5385 {
5386 .id = ION_CAMERA_HEAP_ID,
5387 .type = ION_HEAP_TYPE_CARVEOUT,
5388 .name = ION_CAMERA_HEAP_NAME,
5389 .size = MSM_ION_CAMERA_SIZE,
5390 .memory_type = ION_EBI_TYPE,
5391 .extra_data = &co_ion_pdata,
5392 },
5393 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005394 .id = ION_CP_WB_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005395 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005396 .name = ION_WB_HEAP_NAME,
5397 .size = MSM_ION_WB_SIZE,
5398 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005399 .extra_data = (void *) &cp_wb_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005400 },
Olav Haugan3a55e322012-01-23 14:24:01 -08005401 {
Olav Haugan6ab47252012-02-15 14:46:49 -08005402 .id = ION_QSECOM_HEAP_ID,
5403 .type = ION_HEAP_TYPE_CARVEOUT,
5404 .name = ION_QSECOM_HEAP_NAME,
5405 .size = MSM_ION_QSECOM_SIZE,
5406 .memory_type = ION_EBI_TYPE,
5407 .extra_data = (void *) &co_ion_pdata,
5408 },
5409 {
Olav Haugan3a55e322012-01-23 14:24:01 -08005410 .id = ION_AUDIO_HEAP_ID,
5411 .type = ION_HEAP_TYPE_CARVEOUT,
5412 .name = ION_AUDIO_HEAP_NAME,
5413 .size = MSM_ION_AUDIO_SIZE,
5414 .memory_type = ION_EBI_TYPE,
5415 .extra_data = (void *)&co_ion_pdata,
5416 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005417#endif
5418 }
5419};
5420
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005421static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005422 .name = "ion-msm",
5423 .id = 1,
5424 .dev = { .platform_data = &ion_pdata },
5425};
5426#endif
5427
5428
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005429static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5430 /* Kernel SMI memory pool for video core, used for firmware */
5431 /* and encoder, decoder scratch buffers */
5432 /* Kernel SMI memory pool should always precede the user space */
5433 /* SMI memory pool, as the video core will use offset address */
5434 /* from the Firmware base */
5435 [MEMTYPE_SMI_KERNEL] = {
5436 .start = KERNEL_SMI_BASE,
5437 .limit = KERNEL_SMI_SIZE,
5438 .size = KERNEL_SMI_SIZE,
5439 .flags = MEMTYPE_FLAGS_FIXED,
5440 },
5441 /* User space SMI memory pool for video core */
5442 /* used for encoder, decoder input & output buffers */
5443 [MEMTYPE_SMI] = {
5444 .start = USER_SMI_BASE,
5445 .limit = USER_SMI_SIZE,
5446 .flags = MEMTYPE_FLAGS_FIXED,
5447 },
5448 [MEMTYPE_EBI0] = {
5449 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5450 },
5451 [MEMTYPE_EBI1] = {
5452 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5453 },
5454};
5455
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005456static void reserve_ion_memory(void)
5457{
5458#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005459 unsigned int i;
5460
5461 if (hdmi_is_primary) {
5462 msm_ion_sf_size = MSM_HDMI_PRIM_ION_SF_SIZE;
5463 for (i = 0; i < ion_pdata.nr; i++) {
5464 if (ion_pdata.heaps[i].id == ION_SF_HEAP_ID) {
5465 ion_pdata.heaps[i].size = msm_ion_sf_size;
5466 pr_debug("msm_ion_sf_size 0x%x\n",
5467 msm_ion_sf_size);
5468 break;
5469 }
5470 }
5471 }
5472
5473 msm8x60_reserve_table[MEMTYPE_EBI1].size += msm_ion_sf_size;
Olav Haugan42ebe712012-01-10 16:30:58 -08005474 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_FW_SIZE;
Olav Hauganb5be7992011-11-18 14:29:02 -08005475 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_SIZE;
5476 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MFC_SIZE;
5477 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_CAMERA_SIZE;
5478 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_WB_SIZE;
Olav Haugan3a55e322012-01-23 14:24:01 -08005479 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_AUDIO_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005480#endif
5481}
5482
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005483static void __init size_pmem_devices(void)
5484{
5485#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005486#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005487 android_pmem_adsp_pdata.size = pmem_adsp_size;
5488 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005489
5490 if (hdmi_is_primary)
5491 pmem_sf_size = MSM_HDMI_PRIM_PMEM_SF_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005492 android_pmem_pdata.size = pmem_sf_size;
5493#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005494 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5495#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005496}
5497
5498static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5499{
5500 msm8x60_reserve_table[p->memory_type].size += p->size;
5501}
5502
5503static void __init reserve_pmem_memory(void)
5504{
5505#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005506#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005507 reserve_memory_for(&android_pmem_adsp_pdata);
5508 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005509 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005510#endif
5511 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005512 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5513#endif
5514}
5515
Huaibin Yanga5419422011-12-08 23:52:10 -08005516static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005517
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005518static void __init msm8x60_calculate_reserve_sizes(void)
5519{
5520 size_pmem_devices();
5521 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005522 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005523 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005524}
5525
5526static int msm8x60_paddr_to_memtype(unsigned int paddr)
5527{
5528 if (paddr >= 0x40000000 && paddr < 0x60000000)
5529 return MEMTYPE_EBI1;
5530 if (paddr >= 0x38000000 && paddr < 0x40000000)
5531 return MEMTYPE_SMI;
5532 return MEMTYPE_NONE;
5533}
5534
5535static struct reserve_info msm8x60_reserve_info __initdata = {
5536 .memtype_reserve_table = msm8x60_reserve_table,
5537 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5538 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5539};
5540
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005541static char prim_panel_name[PANEL_NAME_MAX_LEN];
5542static char ext_panel_name[PANEL_NAME_MAX_LEN];
5543static int __init prim_display_setup(char *param)
5544{
5545 if (strnlen(param, PANEL_NAME_MAX_LEN))
5546 strlcpy(prim_panel_name, param, PANEL_NAME_MAX_LEN);
5547 return 0;
5548}
5549early_param("prim_display", prim_display_setup);
5550
5551static int __init ext_display_setup(char *param)
5552{
5553 if (strnlen(param, PANEL_NAME_MAX_LEN))
5554 strlcpy(ext_panel_name, param, PANEL_NAME_MAX_LEN);
5555 return 0;
5556}
5557early_param("ext_display", ext_display_setup);
5558
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005559static void __init msm8x60_reserve(void)
5560{
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005561 msm8x60_set_display_params(prim_panel_name, ext_panel_name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005562 reserve_info = &msm8x60_reserve_info;
5563 msm_reserve();
5564}
5565
5566#define EXT_CHG_VALID_MPP 10
5567#define EXT_CHG_VALID_MPP_2 11
5568
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305569static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305570 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305571 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305572 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305573 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5574};
5575
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005576#ifdef CONFIG_ISL9519_CHARGER
5577static int isl_detection_setup(void)
5578{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305579 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005580
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305581 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5582 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5583 &isl_mpp[i].config);
5584 if (ret) {
5585 pr_err("%s: Config MPP %d of PM8058 failed\n",
5586 __func__, isl_mpp[i].mpp);
5587 return ret;
5588 }
5589 }
5590
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005591 return ret;
5592}
5593
5594static struct isl_platform_data isl_data __initdata = {
5595 .chgcurrent = 700,
5596 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5597 .chg_detection_config = isl_detection_setup,
5598 .max_system_voltage = 4200,
5599 .min_system_voltage = 3200,
5600 .term_current = 120,
5601 .input_current = 2048,
5602};
5603
5604static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5605 {
5606 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305607 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005608 .platform_data = &isl_data,
5609 },
5610};
5611#endif
5612
5613#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5614static int smb137b_detection_setup(void)
5615{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305616 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005617
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305618 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5619 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5620 &isl_mpp[i].config);
5621 if (ret) {
5622 pr_err("%s: Config MPP %d of PM8058 failed\n",
5623 __func__, isl_mpp[i].mpp);
5624 return ret;
5625 }
5626 }
5627
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005628 return ret;
5629}
5630
5631static struct smb137b_platform_data smb137b_data __initdata = {
5632 .chg_detection_config = smb137b_detection_setup,
5633 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5634 .batt_mah_rating = 950,
5635};
5636
5637static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5638 {
5639 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305640 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005641 .platform_data = &smb137b_data,
5642 },
5643};
5644#endif
5645
5646#ifdef CONFIG_PMIC8058
5647#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305648#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005649
5650static int pm8058_gpios_init(void)
5651{
5652 int i;
5653 int rc;
5654 struct pm8058_gpio_cfg {
5655 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305656 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005657 };
5658
5659 struct pm8058_gpio_cfg gpio_cfgs[] = {
5660 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305661 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005662 {
5663 .direction = PM_GPIO_DIR_IN,
5664 .pull = PM_GPIO_PULL_DN,
5665 .vin_sel = 2,
5666 .function = PM_GPIO_FUNC_NORMAL,
5667 .inv_int_pol = 0,
5668 },
5669 },
5670#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5671 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305672 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005673 {
5674 .direction = PM_GPIO_DIR_IN,
5675 .pull = PM_GPIO_PULL_UP_30,
5676 .vin_sel = 2,
5677 .function = PM_GPIO_FUNC_NORMAL,
5678 .inv_int_pol = 0,
5679 },
5680 },
5681#endif
5682 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305683 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005684 {
5685 .direction = PM_GPIO_DIR_IN,
5686 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305687 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005688 .function = PM_GPIO_FUNC_NORMAL,
5689 .inv_int_pol = 0,
5690 },
5691 },
5692 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305693 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005694 {
5695 .direction = PM_GPIO_DIR_IN,
5696 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305697 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005698 .function = PM_GPIO_FUNC_NORMAL,
5699 .inv_int_pol = 0,
5700 },
5701 },
5702 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305703 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005704 {
5705 .direction = PM_GPIO_DIR_IN,
5706 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305707 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005708 .function = PM_GPIO_FUNC_NORMAL,
5709 .inv_int_pol = 0,
5710 },
5711 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005712 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305713 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005714 {
5715 .direction = PM_GPIO_DIR_OUT,
5716 .output_value = 1,
5717 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5718 .pull = PM_GPIO_PULL_DN,
5719 .out_strength = PM_GPIO_STRENGTH_HIGH,
5720 .function = PM_GPIO_FUNC_NORMAL,
5721 .vin_sel = 2,
5722 .inv_int_pol = 0,
5723 }
5724 },
5725 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305726 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005727 {
5728 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305729 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005730 .function = PM_GPIO_FUNC_NORMAL,
5731 .vin_sel = 2,
5732 .inv_int_pol = 0,
5733 }
5734 },
5735 };
5736
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305737#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5738 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305739 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305740 .direction = PM_GPIO_DIR_IN,
5741 .pull = PM_GPIO_PULL_UP_1P5,
5742 .vin_sel = 2,
5743 .function = PM_GPIO_FUNC_NORMAL,
5744 };
5745#endif
5746
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005747#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305748 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305749 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305750 .direction = PM_GPIO_DIR_OUT,
5751 .pull = PM_GPIO_PULL_NO,
5752 .out_strength = PM_GPIO_STRENGTH_HIGH,
5753 .function = PM_GPIO_FUNC_NORMAL,
5754 .inv_int_pol = 0,
5755 .vin_sel = 2,
5756 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5757 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005758 };
5759#endif
5760
5761#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5762 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305763 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005764 {
5765 .direction = PM_GPIO_DIR_IN,
5766 .pull = PM_GPIO_PULL_UP_1P5,
5767 .vin_sel = 2,
5768 .function = PM_GPIO_FUNC_NORMAL,
5769 .inv_int_pol = 0,
5770 }
5771 };
5772#endif
5773
5774#if defined(CONFIG_QS_S5K4E1)
5775 {
5776 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305777 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005778 {
5779 .direction = PM_GPIO_DIR_OUT,
5780 .output_value = 0,
5781 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5782 .pull = PM_GPIO_PULL_DN,
5783 .out_strength = PM_GPIO_STRENGTH_HIGH,
5784 .function = PM_GPIO_FUNC_NORMAL,
5785 .vin_sel = 2,
5786 .inv_int_pol = 0,
5787 }
5788 };
5789#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005790#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5791 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305792 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005793 {
5794 .direction = PM_GPIO_DIR_OUT,
5795 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5796 .output_value = 1,
5797 .pull = PM_GPIO_PULL_UP_30,
5798 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305799 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005800 .out_strength = PM_GPIO_STRENGTH_HIGH,
5801 .function = PM_GPIO_FUNC_NORMAL,
5802 .inv_int_pol = 0,
5803 }
5804 };
5805#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005806#if defined(CONFIG_HAPTIC_ISA1200) || \
5807 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5808 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305809 rc = pm8xxx_gpio_config(
5810 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5811 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005812 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305813 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005814 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305815 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305816 rc = pm8xxx_gpio_config(
5817 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5818 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305819 if (rc < 0) {
5820 pr_err("%s: pmic haptics ldo gpio config failed\n",
5821 __func__);
5822 }
5823
5824 }
5825#endif
5826
5827#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5828 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5829 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5830 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305831 rc = pm8xxx_gpio_config(
5832 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5833 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305834 if (rc < 0) {
5835 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5836 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005837 }
5838 }
5839#endif
5840
5841#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5842 /* Line_in only for 8660 ffa & surf */
5843 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005844 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005845 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305846 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005847 &line_in_gpio_cfg.cfg);
5848 if (rc < 0) {
5849 pr_err("%s pmic line_in gpio config failed\n",
5850 __func__);
5851 return rc;
5852 }
5853 }
5854#endif
5855
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005856#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5857 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305858 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005859 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5860 if (rc < 0) {
5861 pr_err("%s pmic gpio config failed\n", __func__);
5862 return rc;
5863 }
5864 }
5865#endif
5866
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005867#if defined(CONFIG_QS_S5K4E1)
5868 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5869 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305870 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005871 &qs_hc37_cam_pd_gpio_cfg.cfg);
5872 if (rc < 0) {
5873 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5874 __func__);
5875 return rc;
5876 }
5877 }
5878 }
5879#endif
5880
5881 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305882 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005883 &gpio_cfgs[i].cfg);
5884 if (rc < 0) {
5885 pr_err("%s pmic gpio config failed\n",
5886 __func__);
5887 return rc;
5888 }
5889 }
5890
5891 return 0;
5892}
5893
5894static const unsigned int ffa_keymap[] = {
5895 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5896 KEY(0, 1, KEY_UP), /* NAV - UP */
5897 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5898 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5899
5900 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5901 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5902 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5903 KEY(1, 3, KEY_VOLUMEDOWN),
5904
5905 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5906
5907 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5908 KEY(4, 1, KEY_UP), /* USER_UP */
5909 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5910 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5911 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5912
5913 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5914 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5915 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5916 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5917 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5918};
5919
Zhang Chang Ken683be172011-08-10 17:45:34 -04005920static const unsigned int dragon_keymap[] = {
5921 KEY(0, 0, KEY_MENU),
5922 KEY(0, 2, KEY_1),
5923 KEY(0, 3, KEY_4),
5924 KEY(0, 4, KEY_7),
5925
5926 KEY(1, 0, KEY_UP),
5927 KEY(1, 1, KEY_LEFT),
5928 KEY(1, 2, KEY_DOWN),
5929 KEY(1, 3, KEY_5),
5930 KEY(1, 4, KEY_8),
5931
5932 KEY(2, 0, KEY_HOME),
5933 KEY(2, 1, KEY_REPLY),
5934 KEY(2, 2, KEY_2),
5935 KEY(2, 3, KEY_6),
5936 KEY(2, 4, KEY_0),
5937
5938 KEY(3, 0, KEY_VOLUMEUP),
5939 KEY(3, 1, KEY_RIGHT),
5940 KEY(3, 2, KEY_3),
5941 KEY(3, 3, KEY_9),
5942 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5943
5944 KEY(4, 0, KEY_VOLUMEDOWN),
5945 KEY(4, 1, KEY_BACK),
5946 KEY(4, 2, KEY_CAMERA),
5947 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5948};
5949
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005950static struct matrix_keymap_data ffa_keymap_data = {
5951 .keymap_size = ARRAY_SIZE(ffa_keymap),
5952 .keymap = ffa_keymap,
5953};
5954
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305955static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005956 .input_name = "ffa-keypad",
5957 .input_phys_device = "ffa-keypad/input0",
5958 .num_rows = 6,
5959 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305960 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5961 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5962 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005963 .scan_delay_ms = 32,
5964 .row_hold_ns = 91500,
5965 .wakeup = 1,
5966 .keymap_data = &ffa_keymap_data,
5967};
5968
Zhang Chang Ken683be172011-08-10 17:45:34 -04005969static struct matrix_keymap_data dragon_keymap_data = {
5970 .keymap_size = ARRAY_SIZE(dragon_keymap),
5971 .keymap = dragon_keymap,
5972};
5973
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305974static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005975 .input_name = "dragon-keypad",
5976 .input_phys_device = "dragon-keypad/input0",
5977 .num_rows = 6,
5978 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305979 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5980 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5981 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005982 .scan_delay_ms = 32,
5983 .row_hold_ns = 91500,
5984 .wakeup = 1,
5985 .keymap_data = &dragon_keymap_data,
5986};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305987
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005988static const unsigned int fluid_keymap[] = {
5989 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5990 KEY(0, 1, KEY_UP), /* NAV - UP */
5991 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5992 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5993
5994 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5995 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5996 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5997 KEY(1, 3, KEY_VOLUMEUP),
5998
5999 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
6000
6001 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
6002 KEY(4, 1, KEY_UP), /* USER_UP */
6003 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
6004 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
6005 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
6006
Jilai Wang9a895102011-07-12 14:00:35 -04006007 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006008 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
6009 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
6010 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
6011 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
6012};
6013
6014static struct matrix_keymap_data fluid_keymap_data = {
6015 .keymap_size = ARRAY_SIZE(fluid_keymap),
6016 .keymap = fluid_keymap,
6017};
6018
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306019static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006020 .input_name = "fluid-keypad",
6021 .input_phys_device = "fluid-keypad/input0",
6022 .num_rows = 6,
6023 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306024 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
6025 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
6026 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006027 .scan_delay_ms = 32,
6028 .row_hold_ns = 91500,
6029 .wakeup = 1,
6030 .keymap_data = &fluid_keymap_data,
6031};
6032
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306033static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006034 .initial_vibrate_ms = 500,
6035 .level_mV = 3000,
6036 .max_timeout_ms = 15000,
6037};
6038
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306039static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
6040 .rtc_write_enable = false,
6041 .rtc_alarm_powerup = false,
6042};
6043
6044static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
6045 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08006046 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306047 .wakeup = 1,
6048};
6049
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006050#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
6051
6052static struct othc_accessory_info othc_accessories[] = {
6053 {
6054 .accessory = OTHC_SVIDEO_OUT,
6055 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
6056 | OTHC_ADC_DETECT,
6057 .key_code = SW_VIDEOOUT_INSERT,
6058 .enabled = false,
6059 .adc_thres = {
6060 .min_threshold = 20,
6061 .max_threshold = 40,
6062 },
6063 },
6064 {
6065 .accessory = OTHC_ANC_HEADPHONE,
6066 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
6067 OTHC_SWITCH_DETECT,
6068 .gpio = PM8058_LINE_IN_DET_GPIO,
6069 .active_low = 1,
6070 .key_code = SW_HEADPHONE_INSERT,
6071 .enabled = true,
6072 },
6073 {
6074 .accessory = OTHC_ANC_HEADSET,
6075 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
6076 .gpio = PM8058_LINE_IN_DET_GPIO,
6077 .active_low = 1,
6078 .key_code = SW_HEADPHONE_INSERT,
6079 .enabled = true,
6080 },
6081 {
6082 .accessory = OTHC_HEADPHONE,
6083 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
6084 .key_code = SW_HEADPHONE_INSERT,
6085 .enabled = true,
6086 },
6087 {
6088 .accessory = OTHC_MICROPHONE,
6089 .detect_flags = OTHC_GPIO_DETECT,
6090 .gpio = PM8058_LINE_IN_DET_GPIO,
6091 .active_low = 1,
6092 .key_code = SW_MICROPHONE_INSERT,
6093 .enabled = true,
6094 },
6095 {
6096 .accessory = OTHC_HEADSET,
6097 .detect_flags = OTHC_MICBIAS_DETECT,
6098 .key_code = SW_HEADPHONE_INSERT,
6099 .enabled = true,
6100 },
6101};
6102
6103static struct othc_switch_info switch_info[] = {
6104 {
6105 .min_adc_threshold = 0,
6106 .max_adc_threshold = 100,
6107 .key_code = KEY_PLAYPAUSE,
6108 },
6109 {
6110 .min_adc_threshold = 100,
6111 .max_adc_threshold = 200,
6112 .key_code = KEY_REWIND,
6113 },
6114 {
6115 .min_adc_threshold = 200,
6116 .max_adc_threshold = 500,
6117 .key_code = KEY_FASTFORWARD,
6118 },
6119};
6120
6121static struct othc_n_switch_config switch_config = {
6122 .voltage_settling_time_ms = 0,
6123 .num_adc_samples = 3,
6124 .adc_channel = CHANNEL_ADC_HDSET,
6125 .switch_info = switch_info,
6126 .num_keys = ARRAY_SIZE(switch_info),
6127 .default_sw_en = true,
6128 .default_sw_idx = 0,
6129};
6130
6131static struct hsed_bias_config hsed_bias_config = {
6132 /* HSED mic bias config info */
6133 .othc_headset = OTHC_HEADSET_NO,
6134 .othc_lowcurr_thresh_uA = 100,
6135 .othc_highcurr_thresh_uA = 600,
6136 .othc_hyst_prediv_us = 7800,
6137 .othc_period_clkdiv_us = 62500,
6138 .othc_hyst_clk_us = 121000,
6139 .othc_period_clk_us = 312500,
6140 .othc_wakeup = 1,
6141};
6142
6143static struct othc_hsed_config hsed_config_1 = {
6144 .hsed_bias_config = &hsed_bias_config,
6145 /*
6146 * The detection delay and switch reporting delay are
6147 * required to encounter a hardware bug (spurious switch
6148 * interrupts on slow insertion/removal of the headset).
6149 * This will introduce a delay in reporting the accessory
6150 * insertion and removal to the userspace.
6151 */
6152 .detection_delay_ms = 1500,
6153 /* Switch info */
6154 .switch_debounce_ms = 1500,
6155 .othc_support_n_switch = false,
6156 .switch_config = &switch_config,
6157 .ir_gpio = -1,
6158 /* Accessory info */
6159 .accessories_support = true,
6160 .accessories = othc_accessories,
6161 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
6162};
6163
6164static struct othc_regulator_config othc_reg = {
6165 .regulator = "8058_l5",
6166 .max_uV = 2850000,
6167 .min_uV = 2850000,
6168};
6169
6170/* MIC_BIAS0 is configured as normal MIC BIAS */
6171static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
6172 .micbias_select = OTHC_MICBIAS_0,
6173 .micbias_capability = OTHC_MICBIAS,
6174 .micbias_enable = OTHC_SIGNAL_OFF,
6175 .micbias_regulator = &othc_reg,
6176};
6177
6178/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
6179static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
6180 .micbias_select = OTHC_MICBIAS_1,
6181 .micbias_capability = OTHC_MICBIAS_HSED,
6182 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6183 .micbias_regulator = &othc_reg,
6184 .hsed_config = &hsed_config_1,
6185 .hsed_name = "8660_handset",
6186};
6187
6188/* MIC_BIAS2 is configured as normal MIC BIAS */
6189static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6190 .micbias_select = OTHC_MICBIAS_2,
6191 .micbias_capability = OTHC_MICBIAS,
6192 .micbias_enable = OTHC_SIGNAL_OFF,
6193 .micbias_regulator = &othc_reg,
6194};
6195
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006196
6197static void __init msm8x60_init_pm8058_othc(void)
6198{
6199 int i;
6200
6201 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6202 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6203 machine_is_msm8x60_fusn_ffa()) {
6204 /* 3-switch headset supported only by V2 FFA and FLUID */
6205 hsed_config_1.accessories_adc_support = true,
6206 /* ADC based accessory detection works only on V2 and FLUID */
6207 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6208 hsed_config_1.othc_support_n_switch = true;
6209 }
6210
6211 /* IR GPIO is absent on FLUID */
6212 if (machine_is_msm8x60_fluid())
6213 hsed_config_1.ir_gpio = -1;
6214
6215 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6216 if (machine_is_msm8x60_fluid()) {
6217 switch (othc_accessories[i].accessory) {
6218 case OTHC_ANC_HEADPHONE:
6219 case OTHC_ANC_HEADSET:
6220 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6221 break;
6222 case OTHC_MICROPHONE:
6223 othc_accessories[i].enabled = false;
6224 break;
6225 case OTHC_SVIDEO_OUT:
6226 othc_accessories[i].enabled = true;
6227 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6228 break;
6229 }
6230 }
6231 }
6232}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006233
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006234
6235static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6236{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306237 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006238 .direction = PM_GPIO_DIR_OUT,
6239 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6240 .output_value = 0,
6241 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306242 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006243 .out_strength = PM_GPIO_STRENGTH_HIGH,
6244 .function = PM_GPIO_FUNC_2,
6245 };
6246
6247 int rc = -EINVAL;
6248 int id, mode, max_mA;
6249
6250 id = mode = max_mA = 0;
6251 switch (ch) {
6252 case 0:
6253 case 1:
6254 case 2:
6255 if (on) {
6256 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306257 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6258 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006259 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306260 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006261 __func__, id, rc);
6262 }
6263 break;
6264
6265 case 6:
6266 id = PM_PWM_LED_FLASH;
6267 mode = PM_PWM_CONF_PWM1;
6268 max_mA = 300;
6269 break;
6270
6271 case 7:
6272 id = PM_PWM_LED_FLASH1;
6273 mode = PM_PWM_CONF_PWM1;
6274 max_mA = 300;
6275 break;
6276
6277 default:
6278 break;
6279 }
6280
6281 if (ch >= 6 && ch <= 7) {
6282 if (!on) {
6283 mode = PM_PWM_CONF_NONE;
6284 max_mA = 0;
6285 }
6286 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6287 if (rc)
6288 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6289 __func__, ch, rc);
6290 }
6291 return rc;
6292
6293}
6294
6295static struct pm8058_pwm_pdata pm8058_pwm_data = {
6296 .config = pm8058_pwm_config,
6297};
6298
6299#define PM8058_GPIO_INT 88
6300
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006301static struct pmic8058_led pmic8058_flash_leds[] = {
6302 [0] = {
6303 .name = "camera:flash0",
6304 .max_brightness = 15,
6305 .id = PMIC8058_ID_FLASH_LED_0,
6306 },
6307 [1] = {
6308 .name = "camera:flash1",
6309 .max_brightness = 15,
6310 .id = PMIC8058_ID_FLASH_LED_1,
6311 },
6312};
6313
6314static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6315 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6316 .leds = pmic8058_flash_leds,
6317};
6318
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006319static struct pmic8058_led pmic8058_dragon_leds[] = {
6320 [0] = {
6321 /* RED */
6322 .name = "led_drv0",
6323 .max_brightness = 15,
6324 .id = PMIC8058_ID_LED_0,
6325 },/* 300 mA flash led0 drv sink */
6326 [1] = {
6327 /* Yellow */
6328 .name = "led_drv1",
6329 .max_brightness = 15,
6330 .id = PMIC8058_ID_LED_1,
6331 },/* 300 mA flash led0 drv sink */
6332 [2] = {
6333 /* Green */
6334 .name = "led_drv2",
6335 .max_brightness = 15,
6336 .id = PMIC8058_ID_LED_2,
6337 },/* 300 mA flash led0 drv sink */
6338 [3] = {
6339 .name = "led_psensor",
6340 .max_brightness = 15,
6341 .id = PMIC8058_ID_LED_KB_LIGHT,
6342 },/* 300 mA flash led0 drv sink */
6343};
6344
6345static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6346 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6347 .leds = pmic8058_dragon_leds,
6348};
6349
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006350static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6351 [0] = {
6352 .name = "led:drv0",
6353 .max_brightness = 15,
6354 .id = PMIC8058_ID_FLASH_LED_0,
6355 },/* 300 mA flash led0 drv sink */
6356 [1] = {
6357 .name = "led:drv1",
6358 .max_brightness = 15,
6359 .id = PMIC8058_ID_FLASH_LED_1,
6360 },/* 300 mA flash led1 sink */
6361 [2] = {
6362 .name = "led:drv2",
6363 .max_brightness = 20,
6364 .id = PMIC8058_ID_LED_0,
6365 },/* 40 mA led0 sink */
6366 [3] = {
6367 .name = "keypad:drv",
6368 .max_brightness = 15,
6369 .id = PMIC8058_ID_LED_KB_LIGHT,
6370 },/* 300 mA keypad drv sink */
6371};
6372
6373static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6374 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6375 .leds = pmic8058_fluid_flash_leds,
6376};
6377
Terence Hampson90508a92011-08-09 10:40:08 -04006378static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306379 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006380 .max_source_current = 1800,
6381 .charger_type = CHG_TYPE_AC,
6382};
6383
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306384static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6385 .charger_data_valid = false,
6386};
6387
6388static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6389 .priority = 0,
6390};
6391
6392static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6393 .irq_base = PM8058_IRQ_BASE,
6394 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6395 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6396};
6397
6398static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6399 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6400};
6401
6402static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6403 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006404};
6405
6406static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306407 .irq_pdata = &pm8058_irq_pdata,
6408 .gpio_pdata = &pm8058_gpio_pdata,
6409 .mpp_pdata = &pm8058_mpp_pdata,
6410 .rtc_pdata = &pm8058_rtc_pdata,
6411 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6412 .othc0_pdata = &othc_config_pdata_0,
6413 .othc1_pdata = &othc_config_pdata_1,
6414 .othc2_pdata = &othc_config_pdata_2,
6415 .pwm_pdata = &pm8058_pwm_data,
6416 .misc_pdata = &pm8058_misc_pdata,
6417#ifdef CONFIG_SENSORS_MSM_ADC
6418 .xoadc_pdata = &pm8058_xoadc_pdata,
6419#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006420};
6421
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306422#ifdef CONFIG_MSM_SSBI
6423static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6424 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6425 .slave = {
6426 .name = "pm8058-core",
6427 .platform_data = &pm8058_platform_data,
6428 },
6429};
6430#endif
6431#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006432
6433#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6434 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6435#define TDISC_I2C_SLAVE_ADDR 0x67
6436#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6437#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6438
6439static const char *vregs_tdisc_name[] = {
6440 "8058_l5",
6441 "8058_s3",
6442};
6443
6444static const int vregs_tdisc_val[] = {
6445 2850000,/* uV */
6446 1800000,
6447};
6448static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6449
6450static int tdisc_shinetsu_setup(void)
6451{
6452 int rc, i;
6453
6454 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6455 if (rc) {
6456 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6457 __func__);
6458 return rc;
6459 }
6460
6461 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6462 if (rc) {
6463 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6464 __func__);
6465 goto fail_gpio_oe;
6466 }
6467
6468 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6469 if (rc) {
6470 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6471 __func__);
6472 gpio_free(GPIO_JOYSTICK_EN);
6473 goto fail_gpio_oe;
6474 }
6475
6476 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6477 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6478 if (IS_ERR(vregs_tdisc[i])) {
6479 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6480 __func__, vregs_tdisc_name[i],
6481 PTR_ERR(vregs_tdisc[i]));
6482 rc = PTR_ERR(vregs_tdisc[i]);
6483 goto vreg_get_fail;
6484 }
6485
6486 rc = regulator_set_voltage(vregs_tdisc[i],
6487 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6488 if (rc) {
6489 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6490 __func__, rc);
6491 goto vreg_set_voltage_fail;
6492 }
6493 }
6494
6495 return rc;
6496vreg_set_voltage_fail:
6497 i++;
6498vreg_get_fail:
6499 while (i)
6500 regulator_put(vregs_tdisc[--i]);
6501fail_gpio_oe:
6502 gpio_free(PMIC_GPIO_TDISC);
6503 return rc;
6504}
6505
6506static void tdisc_shinetsu_release(void)
6507{
6508 int i;
6509
6510 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6511 regulator_put(vregs_tdisc[i]);
6512
6513 gpio_free(PMIC_GPIO_TDISC);
6514 gpio_free(GPIO_JOYSTICK_EN);
6515}
6516
6517static int tdisc_shinetsu_enable(void)
6518{
6519 int i, rc = -EINVAL;
6520
6521 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6522 rc = regulator_enable(vregs_tdisc[i]);
6523 if (rc < 0) {
6524 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6525 __func__, vregs_tdisc_name[i], rc);
6526 goto vreg_fail;
6527 }
6528 }
6529
6530 /* Enable the OE (output enable) gpio */
6531 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6532 /* voltage and gpio stabilization delay */
6533 msleep(50);
6534
6535 return 0;
6536vreg_fail:
6537 while (i)
6538 regulator_disable(vregs_tdisc[--i]);
6539 return rc;
6540}
6541
6542static int tdisc_shinetsu_disable(void)
6543{
6544 int i, rc;
6545
6546 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6547 rc = regulator_disable(vregs_tdisc[i]);
6548 if (rc < 0) {
6549 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6550 __func__, vregs_tdisc_name[i], rc);
6551 goto tdisc_reg_fail;
6552 }
6553 }
6554
6555 /* Disable the OE (output enable) gpio */
6556 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6557
6558 return 0;
6559
6560tdisc_reg_fail:
6561 while (i)
6562 regulator_enable(vregs_tdisc[--i]);
6563 return rc;
6564}
6565
6566static struct tdisc_abs_values tdisc_abs = {
6567 .x_max = 32,
6568 .y_max = 32,
6569 .x_min = -32,
6570 .y_min = -32,
6571 .pressure_max = 32,
6572 .pressure_min = 0,
6573};
6574
6575static struct tdisc_platform_data tdisc_data = {
6576 .tdisc_setup = tdisc_shinetsu_setup,
6577 .tdisc_release = tdisc_shinetsu_release,
6578 .tdisc_enable = tdisc_shinetsu_enable,
6579 .tdisc_disable = tdisc_shinetsu_disable,
6580 .tdisc_wakeup = 0,
6581 .tdisc_gpio = PMIC_GPIO_TDISC,
6582 .tdisc_report_keys = true,
6583 .tdisc_report_relative = true,
6584 .tdisc_report_absolute = false,
6585 .tdisc_report_wheel = false,
6586 .tdisc_reverse_x = false,
6587 .tdisc_reverse_y = true,
6588 .tdisc_abs = &tdisc_abs,
6589};
6590
6591static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6592 {
6593 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6594 .irq = TDISC_INT,
6595 .platform_data = &tdisc_data,
6596 },
6597};
6598#endif
6599
6600#define PM_GPIO_CDC_RST_N 20
6601#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6602
6603static struct regulator *vreg_timpani_1;
6604static struct regulator *vreg_timpani_2;
6605
6606static unsigned int msm_timpani_setup_power(void)
6607{
6608 int rc;
6609
6610 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6611 if (IS_ERR(vreg_timpani_1)) {
6612 pr_err("%s: Unable to get 8058_l0\n", __func__);
6613 return -ENODEV;
6614 }
6615
6616 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6617 if (IS_ERR(vreg_timpani_2)) {
6618 pr_err("%s: Unable to get 8058_s3\n", __func__);
6619 regulator_put(vreg_timpani_1);
6620 return -ENODEV;
6621 }
6622
6623 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6624 if (rc) {
6625 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6626 goto fail;
6627 }
6628
6629 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6630 if (rc) {
6631 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6632 goto fail;
6633 }
6634
6635 rc = regulator_enable(vreg_timpani_1);
6636 if (rc) {
6637 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6638 goto fail;
6639 }
6640
6641 /* The settings for LDO0 should be set such that
6642 * it doesn't require to reset the timpani. */
6643 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6644 if (rc < 0) {
6645 pr_err("Timpani regulator optimum mode setting failed\n");
6646 goto fail;
6647 }
6648
6649 rc = regulator_enable(vreg_timpani_2);
6650 if (rc) {
6651 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6652 regulator_disable(vreg_timpani_1);
6653 goto fail;
6654 }
6655
6656 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6657 if (rc) {
6658 pr_err("%s: GPIO Request %d failed\n", __func__,
6659 GPIO_CDC_RST_N);
6660 regulator_disable(vreg_timpani_1);
6661 regulator_disable(vreg_timpani_2);
6662 goto fail;
6663 } else {
6664 gpio_direction_output(GPIO_CDC_RST_N, 1);
6665 usleep_range(1000, 1050);
6666 gpio_direction_output(GPIO_CDC_RST_N, 0);
6667 usleep_range(1000, 1050);
6668 gpio_direction_output(GPIO_CDC_RST_N, 1);
6669 gpio_free(GPIO_CDC_RST_N);
6670 }
6671 return rc;
6672
6673fail:
6674 regulator_put(vreg_timpani_1);
6675 regulator_put(vreg_timpani_2);
6676 return rc;
6677}
6678
6679static void msm_timpani_shutdown_power(void)
6680{
6681 int rc;
6682
6683 rc = regulator_disable(vreg_timpani_1);
6684 if (rc)
6685 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6686
6687 regulator_put(vreg_timpani_1);
6688
6689 rc = regulator_disable(vreg_timpani_2);
6690 if (rc)
6691 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6692
6693 regulator_put(vreg_timpani_2);
6694}
6695
6696/* Power analog function of codec */
6697static struct regulator *vreg_timpani_cdc_apwr;
6698static int msm_timpani_codec_power(int vreg_on)
6699{
6700 int rc = 0;
6701
6702 if (!vreg_timpani_cdc_apwr) {
6703
6704 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6705
6706 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6707 pr_err("%s: vreg_get failed (%ld)\n",
6708 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6709 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6710 return rc;
6711 }
6712 }
6713
6714 if (vreg_on) {
6715
6716 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6717 2200000, 2200000);
6718 if (rc) {
6719 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6720 __func__);
6721 goto vreg_fail;
6722 }
6723
6724 rc = regulator_enable(vreg_timpani_cdc_apwr);
6725 if (rc) {
6726 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6727 goto vreg_fail;
6728 }
6729 } else {
6730 rc = regulator_disable(vreg_timpani_cdc_apwr);
6731 if (rc) {
6732 pr_err("%s: vreg_disable failed %d\n",
6733 __func__, rc);
6734 goto vreg_fail;
6735 }
6736 }
6737
6738 return 0;
6739
6740vreg_fail:
6741 regulator_put(vreg_timpani_cdc_apwr);
6742 vreg_timpani_cdc_apwr = NULL;
6743 return rc;
6744}
6745
6746static struct marimba_codec_platform_data timpani_codec_pdata = {
6747 .marimba_codec_power = msm_timpani_codec_power,
6748};
6749
6750#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6751#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6752
6753static struct marimba_platform_data timpani_pdata = {
6754 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6755 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6756 .marimba_setup = msm_timpani_setup_power,
6757 .marimba_shutdown = msm_timpani_shutdown_power,
6758 .codec = &timpani_codec_pdata,
6759 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6760};
6761
6762#define TIMPANI_I2C_SLAVE_ADDR 0xD
6763
6764static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6765 {
6766 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6767 .platform_data = &timpani_pdata,
6768 },
6769};
6770
Lei Zhou338cab82011-08-19 13:38:17 -04006771#ifdef CONFIG_SND_SOC_WM8903
6772static struct wm8903_platform_data wm8903_pdata = {
6773 .gpio_cfg[2] = 0x3A8,
6774};
6775
6776#define WM8903_I2C_SLAVE_ADDR 0x34
6777static struct i2c_board_info wm8903_codec_i2c_info[] = {
6778 {
6779 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6780 .platform_data = &wm8903_pdata,
6781 },
6782};
6783#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006784#ifdef CONFIG_PMIC8901
6785
6786#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006787/*
6788 * Consumer specific regulator names:
6789 * regulator name consumer dev_name
6790 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006791static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6792 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6793};
6794static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6795 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6796};
6797
6798#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306799 _always_on) \
6800 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006801 .init_data = { \
6802 .constraints = { \
6803 .valid_modes_mask = _modes, \
6804 .valid_ops_mask = _ops, \
6805 .min_uV = _min_uV, \
6806 .max_uV = _max_uV, \
6807 .input_uV = _min_uV, \
6808 .apply_uV = _apply_uV, \
6809 .always_on = _always_on, \
6810 }, \
6811 .consumer_supplies = vreg_consumers_8901_##_id, \
6812 .num_consumer_supplies = \
6813 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6814 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306815 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006816 }
6817
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006818#define PM8901_VREG_INIT_VS(_id) \
6819 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306820 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006821
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306822static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006823 PM8901_VREG_INIT_VS(USB_OTG),
6824 PM8901_VREG_INIT_VS(HDMI_MVS),
6825};
6826
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306827static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6828 .priority = 1,
6829};
6830
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306831static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6832 .irq_base = PM8901_IRQ_BASE,
6833 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6834 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6835};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006836
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306837static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6838 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006839};
6840
6841static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306842 .irq_pdata = &pm8901_irq_pdata,
6843 .mpp_pdata = &pm8901_mpp_pdata,
6844 .regulator_pdatas = pm8901_vreg_init,
6845 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306846 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006847};
6848
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306849static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6850 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6851 .slave = {
6852 .name = "pm8901-core",
6853 .platform_data = &pm8901_platform_data,
6854 },
6855};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006856#endif /* CONFIG_PMIC8901 */
6857
6858#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6859 || defined(CONFIG_GPIO_SX150X_MODULE))
6860
6861static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006862static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006863
6864struct bahama_config_register{
6865 u8 reg;
6866 u8 value;
6867 u8 mask;
6868};
6869
6870enum version{
6871 VER_1_0,
6872 VER_2_0,
6873 VER_UNSUPPORTED = 0xFF
6874};
6875
6876static u8 read_bahama_ver(void)
6877{
6878 int rc;
6879 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6880 u8 bahama_version;
6881
6882 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6883 if (rc < 0) {
6884 printk(KERN_ERR
6885 "%s: version read failed: %d\n",
6886 __func__, rc);
6887 return VER_UNSUPPORTED;
6888 } else {
6889 printk(KERN_INFO
6890 "%s: version read got: 0x%x\n",
6891 __func__, bahama_version);
6892 }
6893
6894 switch (bahama_version) {
6895 case 0x08: /* varient of bahama v1 */
6896 case 0x10:
6897 case 0x00:
6898 return VER_1_0;
6899 case 0x09: /* variant of bahama v2 */
6900 return VER_2_0;
6901 default:
6902 return VER_UNSUPPORTED;
6903 }
6904}
6905
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006906static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006907static unsigned int msm_bahama_setup_power(void)
6908{
6909 int rc = 0;
6910 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006911
6912 if (machine_is_msm8x60_dragon())
6913 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6914
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006915 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6916
6917 if (IS_ERR(vreg_bahama)) {
6918 rc = PTR_ERR(vreg_bahama);
6919 pr_err("%s: regulator_get %s = %d\n", __func__,
6920 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006921 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006922 }
6923
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006924 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6925 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006926 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6927 msm_bahama_regulator, rc);
6928 goto unget;
6929 }
6930
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006931 rc = regulator_enable(vreg_bahama);
6932 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006933 pr_err("%s: regulator_enable %s = %d\n", __func__,
6934 msm_bahama_regulator, rc);
6935 goto unget;
6936 }
6937
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006938 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6939 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006940 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006941 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006942 goto unenable;
6943 }
6944
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006945 gpio_direction_output(msm_bahama_sys_rst, 0);
6946 usleep_range(1000, 1050);
6947 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6948 usleep_range(1000, 1050);
6949 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006950 return rc;
6951
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006952unenable:
6953 regulator_disable(vreg_bahama);
6954unget:
6955 regulator_put(vreg_bahama);
6956 return rc;
6957};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006958
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006959static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006960{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006961 if (msm_bahama_setup_power_enable) {
6962 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6963 gpio_free(msm_bahama_sys_rst);
6964 regulator_disable(vreg_bahama);
6965 regulator_put(vreg_bahama);
6966 msm_bahama_setup_power_enable = 0;
6967 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006968
6969 return 0;
6970};
6971
6972static unsigned int msm_bahama_core_config(int type)
6973{
6974 int rc = 0;
6975
6976 if (type == BAHAMA_ID) {
6977
6978 int i;
6979 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6980
6981 const struct bahama_config_register v20_init[] = {
6982 /* reg, value, mask */
6983 { 0xF4, 0x84, 0xFF }, /* AREG */
6984 { 0xF0, 0x04, 0xFF } /* DREG */
6985 };
6986
6987 if (read_bahama_ver() == VER_2_0) {
6988 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6989 u8 value = v20_init[i].value;
6990 rc = marimba_write_bit_mask(&config,
6991 v20_init[i].reg,
6992 &value,
6993 sizeof(v20_init[i].value),
6994 v20_init[i].mask);
6995 if (rc < 0) {
6996 printk(KERN_ERR
6997 "%s: reg %d write failed: %d\n",
6998 __func__, v20_init[i].reg, rc);
6999 return rc;
7000 }
7001 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
7002 " mask 0x%02x\n",
7003 __func__, v20_init[i].reg,
7004 v20_init[i].value, v20_init[i].mask);
7005 }
7006 }
7007 }
7008 printk(KERN_INFO "core type: %d\n", type);
7009
7010 return rc;
7011}
7012
7013static struct regulator *fm_regulator_s3;
7014static struct msm_xo_voter *fm_clock;
7015
7016static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
7017{
7018 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307019 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007020 .direction = PM_GPIO_DIR_IN,
7021 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307022 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007023 .function = PM_GPIO_FUNC_NORMAL,
7024 .inv_int_pol = 0,
7025 };
7026
7027 if (!fm_regulator_s3) {
7028 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
7029 if (IS_ERR(fm_regulator_s3)) {
7030 rc = PTR_ERR(fm_regulator_s3);
7031 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
7032 __func__, rc);
7033 goto out;
7034 }
7035 }
7036
7037
7038 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
7039 if (rc < 0) {
7040 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
7041 __func__, rc);
7042 goto fm_fail_put;
7043 }
7044
7045 rc = regulator_enable(fm_regulator_s3);
7046 if (rc < 0) {
7047 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
7048 __func__, rc);
7049 goto fm_fail_put;
7050 }
7051
7052 /*Vote for XO clock*/
7053 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
7054
7055 if (IS_ERR(fm_clock)) {
7056 rc = PTR_ERR(fm_clock);
7057 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
7058 __func__, rc);
7059 goto fm_fail_switch;
7060 }
7061
7062 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
7063 if (rc < 0) {
7064 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
7065 __func__, rc);
7066 goto fm_fail_vote;
7067 }
7068
7069 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307070 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007071 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307072 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007073 __func__, rc);
7074 goto fm_fail_clock;
7075 }
7076 goto out;
7077
7078fm_fail_clock:
7079 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
7080fm_fail_vote:
7081 msm_xo_put(fm_clock);
7082fm_fail_switch:
7083 regulator_disable(fm_regulator_s3);
7084fm_fail_put:
7085 regulator_put(fm_regulator_s3);
7086out:
7087 return rc;
7088};
7089
7090static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
7091{
7092 int rc = 0;
7093 if (fm_regulator_s3 != NULL) {
7094 rc = regulator_disable(fm_regulator_s3);
7095 if (rc < 0) {
7096 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
7097 __func__, rc);
7098 }
7099 regulator_put(fm_regulator_s3);
7100 fm_regulator_s3 = NULL;
7101 }
7102 printk(KERN_ERR "%s: Voting off for XO", __func__);
7103
7104 if (fm_clock != NULL) {
7105 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
7106 if (rc < 0) {
7107 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
7108 __func__, rc);
7109 }
7110 msm_xo_put(fm_clock);
7111 }
7112 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
7113}
7114
7115/* Slave id address for FM/CDC/QMEMBIST
7116 * Values can be programmed using Marimba slave id 0
7117 * should there be a conflict with other I2C devices
7118 * */
7119#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
7120#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
7121
7122static struct marimba_fm_platform_data marimba_fm_pdata = {
7123 .fm_setup = fm_radio_setup,
7124 .fm_shutdown = fm_radio_shutdown,
7125 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
7126 .is_fm_soc_i2s_master = false,
7127 .config_i2s_gpio = NULL,
7128};
7129
7130/*
7131Just initializing the BAHAMA related slave
7132*/
7133static struct marimba_platform_data marimba_pdata = {
7134 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
7135 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
7136 .bahama_setup = msm_bahama_setup_power,
7137 .bahama_shutdown = msm_bahama_shutdown_power,
7138 .bahama_core_config = msm_bahama_core_config,
7139 .fm = &marimba_fm_pdata,
7140 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
7141};
7142
7143
7144static struct i2c_board_info msm_marimba_board_info[] = {
7145 {
7146 I2C_BOARD_INFO("marimba", 0xc),
7147 .platform_data = &marimba_pdata,
7148 }
7149};
7150#endif /* CONFIG_MAIMBA_CORE */
7151
7152#ifdef CONFIG_I2C
7153#define I2C_SURF 1
7154#define I2C_FFA (1 << 1)
7155#define I2C_RUMI (1 << 2)
7156#define I2C_SIM (1 << 3)
7157#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007158#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007159
7160struct i2c_registry {
7161 u8 machs;
7162 int bus;
7163 struct i2c_board_info *info;
7164 int len;
7165};
7166
7167static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007168#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7169 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007170 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007171 MSM_GSBI8_QUP_I2C_BUS_ID,
7172 core_expander_i2c_info,
7173 ARRAY_SIZE(core_expander_i2c_info),
7174 },
7175 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007176 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007177 MSM_GSBI8_QUP_I2C_BUS_ID,
7178 docking_expander_i2c_info,
7179 ARRAY_SIZE(docking_expander_i2c_info),
7180 },
7181 {
7182 I2C_SURF,
7183 MSM_GSBI8_QUP_I2C_BUS_ID,
7184 surf_expanders_i2c_info,
7185 ARRAY_SIZE(surf_expanders_i2c_info),
7186 },
7187 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007188 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007189 MSM_GSBI3_QUP_I2C_BUS_ID,
7190 fha_expanders_i2c_info,
7191 ARRAY_SIZE(fha_expanders_i2c_info),
7192 },
7193 {
7194 I2C_FLUID,
7195 MSM_GSBI3_QUP_I2C_BUS_ID,
7196 fluid_expanders_i2c_info,
7197 ARRAY_SIZE(fluid_expanders_i2c_info),
7198 },
7199 {
7200 I2C_FLUID,
7201 MSM_GSBI8_QUP_I2C_BUS_ID,
7202 fluid_core_expander_i2c_info,
7203 ARRAY_SIZE(fluid_core_expander_i2c_info),
7204 },
7205#endif
7206#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7207 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7208 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007209 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007210 MSM_GSBI3_QUP_I2C_BUS_ID,
7211 msm_i2c_gsbi3_tdisc_info,
7212 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7213 },
7214#endif
7215 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007216 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007217 MSM_GSBI3_QUP_I2C_BUS_ID,
7218 cy8ctmg200_board_info,
7219 ARRAY_SIZE(cy8ctmg200_board_info),
7220 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007221 {
7222 I2C_DRAGON,
7223 MSM_GSBI3_QUP_I2C_BUS_ID,
7224 cy8ctma340_dragon_board_info,
7225 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7226 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007227#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7228 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7229 {
7230 I2C_FLUID,
7231 MSM_GSBI3_QUP_I2C_BUS_ID,
7232 cyttsp_fluid_info,
7233 ARRAY_SIZE(cyttsp_fluid_info),
7234 },
7235 {
7236 I2C_FFA | I2C_SURF,
7237 MSM_GSBI3_QUP_I2C_BUS_ID,
7238 cyttsp_ffa_info,
7239 ARRAY_SIZE(cyttsp_ffa_info),
7240 },
7241#endif
7242#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007243 {
7244 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007245 MSM_GSBI4_QUP_I2C_BUS_ID,
7246 msm_camera_boardinfo,
7247 ARRAY_SIZE(msm_camera_boardinfo),
7248 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007249 {
7250 I2C_DRAGON,
7251 MSM_GSBI4_QUP_I2C_BUS_ID,
7252 msm_camera_dragon_boardinfo,
7253 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7254 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007255#endif
7256 {
7257 I2C_SURF | I2C_FFA | I2C_FLUID,
7258 MSM_GSBI7_QUP_I2C_BUS_ID,
7259 msm_i2c_gsbi7_timpani_info,
7260 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7261 },
7262#if defined(CONFIG_MARIMBA_CORE)
7263 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007264 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007265 MSM_GSBI7_QUP_I2C_BUS_ID,
7266 msm_marimba_board_info,
7267 ARRAY_SIZE(msm_marimba_board_info),
7268 },
7269#endif /* CONFIG_MARIMBA_CORE */
7270#ifdef CONFIG_ISL9519_CHARGER
7271 {
7272 I2C_SURF | I2C_FFA,
7273 MSM_GSBI8_QUP_I2C_BUS_ID,
7274 isl_charger_i2c_info,
7275 ARRAY_SIZE(isl_charger_i2c_info),
7276 },
7277#endif
7278#if defined(CONFIG_HAPTIC_ISA1200) || \
7279 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7280 {
7281 I2C_FLUID,
7282 MSM_GSBI8_QUP_I2C_BUS_ID,
7283 msm_isa1200_board_info,
7284 ARRAY_SIZE(msm_isa1200_board_info),
7285 },
7286#endif
7287#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7288 {
7289 I2C_FLUID,
7290 MSM_GSBI8_QUP_I2C_BUS_ID,
7291 smb137b_charger_i2c_info,
7292 ARRAY_SIZE(smb137b_charger_i2c_info),
7293 },
7294#endif
7295#if defined(CONFIG_BATTERY_BQ27520) || \
7296 defined(CONFIG_BATTERY_BQ27520_MODULE)
7297 {
7298 I2C_FLUID,
7299 MSM_GSBI8_QUP_I2C_BUS_ID,
7300 msm_bq27520_board_info,
7301 ARRAY_SIZE(msm_bq27520_board_info),
7302 },
7303#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007304#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7305 {
7306 I2C_DRAGON,
7307 MSM_GSBI8_QUP_I2C_BUS_ID,
7308 wm8903_codec_i2c_info,
7309 ARRAY_SIZE(wm8903_codec_i2c_info),
7310 },
7311#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007312};
7313#endif /* CONFIG_I2C */
7314
7315static void fixup_i2c_configs(void)
7316{
7317#ifdef CONFIG_I2C
7318#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7319 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7320 sx150x_data[SX150X_CORE].irq_summary =
7321 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007322 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7323 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007324 sx150x_data[SX150X_CORE].irq_summary =
7325 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7326 else if (machine_is_msm8x60_fluid())
7327 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7328 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7329#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007330#endif
7331}
7332
7333static void register_i2c_devices(void)
7334{
7335#ifdef CONFIG_I2C
7336 u8 mach_mask = 0;
7337 int i;
7338
7339 /* Build the matching 'supported_machs' bitmask */
7340 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7341 mach_mask = I2C_SURF;
7342 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7343 mach_mask = I2C_FFA;
7344 else if (machine_is_msm8x60_rumi3())
7345 mach_mask = I2C_RUMI;
7346 else if (machine_is_msm8x60_sim())
7347 mach_mask = I2C_SIM;
7348 else if (machine_is_msm8x60_fluid())
7349 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007350 else if (machine_is_msm8x60_dragon())
7351 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007352 else
7353 pr_err("unmatched machine ID in register_i2c_devices\n");
7354
7355 /* Run the array and install devices as appropriate */
7356 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7357 if (msm8x60_i2c_devices[i].machs & mach_mask)
7358 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7359 msm8x60_i2c_devices[i].info,
7360 msm8x60_i2c_devices[i].len);
7361 }
7362#endif
7363}
7364
7365static void __init msm8x60_init_uart12dm(void)
7366{
7367#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7368 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7369 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7370
7371 if (!fpga_mem)
7372 pr_err("%s(): Error getting memory\n", __func__);
7373
7374 /* Advanced mode */
7375 writew(0xFFFF, fpga_mem + 0x15C);
7376 /* FPGA_UART_SEL */
7377 writew(0, fpga_mem + 0x172);
7378 /* FPGA_GPIO_CONFIG_117 */
7379 writew(1, fpga_mem + 0xEA);
7380 /* FPGA_GPIO_CONFIG_118 */
7381 writew(1, fpga_mem + 0xEC);
7382 mb();
7383 iounmap(fpga_mem);
7384#endif
7385}
7386
7387#define MSM_GSBI9_PHYS 0x19900000
7388#define GSBI_DUAL_MODE_CODE 0x60
7389
7390static void __init msm8x60_init_buses(void)
7391{
7392#ifdef CONFIG_I2C_QUP
7393 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7394 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7395 writel_relaxed(0x6 << 4, gsbi_mem);
7396 /* Ensure protocol code is written before proceeding further */
7397 mb();
7398 iounmap(gsbi_mem);
7399
7400 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7401 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7402 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7403 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7404
7405#ifdef CONFIG_MSM_GSBI9_UART
7406 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7407 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7408 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7409 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7410 iounmap(gsbi_mem);
7411 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7412 }
7413#endif
7414 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7415 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7416#endif
7417#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7418 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7419#endif
7420#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007421 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7422#endif
7423
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307424#ifdef CONFIG_MSM_SSBI
7425 msm_device_ssbi_pmic1.dev.platform_data =
7426 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307427 msm_device_ssbi_pmic2.dev.platform_data =
7428 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307429#endif
7430
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007431 if (machine_is_msm8x60_fluid()) {
7432#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7433 (defined(CONFIG_SMB137B_CHARGER) || \
7434 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7435 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7436#endif
7437#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7438 msm_gsbi10_qup_spi_device.dev.platform_data =
7439 &msm_gsbi10_qup_spi_pdata;
7440#endif
7441 }
7442
Lena Salman57d167e2012-03-21 19:46:38 +02007443#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007444 /*
7445 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7446 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7447 * and ID notifications are available only on V2 surf and FFA
7448 * with a hardware workaround.
7449 */
7450 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7451 (machine_is_msm8x60_surf() ||
7452 (machine_is_msm8x60_ffa() &&
7453 pmic_id_notif_supported)))
7454 msm_otg_pdata.phy_can_powercollapse = 1;
7455 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7456#endif
7457
Lena Salman57d167e2012-03-21 19:46:38 +02007458#ifdef CONFIG_USB_MSM_72K
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007459 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7460#endif
7461
7462#ifdef CONFIG_SERIAL_MSM_HS
7463 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7464 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7465#endif
7466#ifdef CONFIG_MSM_GSBI9_UART
7467 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7468 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7469 if (IS_ERR(msm_device_uart_gsbi9))
7470 pr_err("%s(): Failed to create uart gsbi9 device\n",
7471 __func__);
7472 }
7473#endif
7474
7475#ifdef CONFIG_MSM_BUS_SCALING
7476
7477 /* RPM calls are only enabled on V2 */
7478 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7479 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7480 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7481 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7482 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7483 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7484 }
7485
7486 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7487 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7488 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7489 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7490 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7491#endif
7492}
7493
7494static void __init msm8x60_map_io(void)
7495{
7496 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7497 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007498
7499 if (socinfo_init() < 0)
7500 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007501}
7502
7503/*
7504 * Most segments of the EBI2 bus are disabled by default.
7505 */
7506static void __init msm8x60_init_ebi2(void)
7507{
7508 uint32_t ebi2_cfg;
7509 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007510 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7511
7512 if (IS_ERR(mem_clk)) {
7513 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7514 "msm_ebi2", "mem_clk");
7515 return;
7516 }
7517 clk_enable(mem_clk);
7518 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007519
7520 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7521 if (ebi2_cfg_ptr != 0) {
7522 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7523
7524 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007525 machine_is_msm8x60_fluid() ||
7526 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007527 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7528 else if (machine_is_msm8x60_sim())
7529 ebi2_cfg |= (1 << 4); /* CS2 */
7530 else if (machine_is_msm8x60_rumi3())
7531 ebi2_cfg |= (1 << 5); /* CS3 */
7532
7533 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7534 iounmap(ebi2_cfg_ptr);
7535 }
7536
7537 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007538 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007539 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7540 if (ebi2_cfg_ptr != 0) {
7541 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7542 writel_relaxed(0UL, ebi2_cfg_ptr);
7543
7544 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7545 * LAN9221 Ethernet controller reads and writes.
7546 * The lowest 4 bits are the read delay, the next
7547 * 4 are the write delay. */
7548 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7549#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7550 /*
7551 * RECOVERY=5, HOLD_WR=1
7552 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7553 * WAIT_WR=1, WAIT_RD=2
7554 */
7555 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7556 /*
7557 * HOLD_RD=1
7558 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7559 */
7560 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7561#else
7562 /* EBI2 CS3 muxed address/data,
7563 * two cyc addr enable */
7564 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7565
7566#endif
7567 iounmap(ebi2_cfg_ptr);
7568 }
7569 }
7570}
7571
7572static void __init msm8x60_configure_smc91x(void)
7573{
7574 if (machine_is_msm8x60_sim()) {
7575
7576 smc91x_resources[0].start = 0x1b800300;
7577 smc91x_resources[0].end = 0x1b8003ff;
7578
7579 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7580 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7581
7582 } else if (machine_is_msm8x60_rumi3()) {
7583
7584 smc91x_resources[0].start = 0x1d000300;
7585 smc91x_resources[0].end = 0x1d0003ff;
7586
7587 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7588 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7589 }
7590}
7591
7592static void __init msm8x60_init_tlmm(void)
7593{
7594 if (machine_is_msm8x60_rumi3())
7595 msm_gpio_install_direct_irq(0, 0, 1);
7596}
7597
7598#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7599 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7600 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7601 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7602 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7603
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007604/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007605#define MAX_SDCC_CONTROLLER 5
7606
7607struct msm_sdcc_gpio {
7608 /* maximum 10 GPIOs per SDCC controller */
7609 s16 no;
7610 /* name of this GPIO */
7611 const char *name;
7612 bool always_on;
7613 bool is_enabled;
7614};
7615
7616#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7617static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7618 {159, "sdc1_dat_0"},
7619 {160, "sdc1_dat_1"},
7620 {161, "sdc1_dat_2"},
7621 {162, "sdc1_dat_3"},
7622#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7623 {163, "sdc1_dat_4"},
7624 {164, "sdc1_dat_5"},
7625 {165, "sdc1_dat_6"},
7626 {166, "sdc1_dat_7"},
7627#endif
7628 {167, "sdc1_clk"},
7629 {168, "sdc1_cmd"}
7630};
7631#endif
7632
7633#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7634static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7635 {143, "sdc2_dat_0"},
7636 {144, "sdc2_dat_1", 1},
7637 {145, "sdc2_dat_2"},
7638 {146, "sdc2_dat_3"},
7639#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7640 {147, "sdc2_dat_4"},
7641 {148, "sdc2_dat_5"},
7642 {149, "sdc2_dat_6"},
7643 {150, "sdc2_dat_7"},
7644#endif
7645 {151, "sdc2_cmd"},
7646 {152, "sdc2_clk", 1}
7647};
7648#endif
7649
7650#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7651static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7652 {95, "sdc5_cmd"},
7653 {96, "sdc5_dat_3"},
7654 {97, "sdc5_clk", 1},
7655 {98, "sdc5_dat_2"},
7656 {99, "sdc5_dat_1", 1},
7657 {100, "sdc5_dat_0"}
7658};
7659#endif
7660
7661struct msm_sdcc_pad_pull_cfg {
7662 enum msm_tlmm_pull_tgt pull;
7663 u32 pull_val;
7664};
7665
7666struct msm_sdcc_pad_drv_cfg {
7667 enum msm_tlmm_hdrive_tgt drv;
7668 u32 drv_val;
7669};
7670
7671#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7672static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7673 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7674 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7675 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7676};
7677
7678static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7679 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7680 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7681};
7682
7683static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7684 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7685 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7686 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7687};
7688
7689static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7690 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7691 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7692};
7693#endif
7694
7695#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7696static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7697 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7698 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7699 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7700};
7701
7702static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7703 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7704 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7705};
7706
7707static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7708 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7709 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7710 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7711};
7712
7713static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7714 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7715 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7716};
7717#endif
7718
7719struct msm_sdcc_pin_cfg {
7720 /*
7721 * = 1 if controller pins are using gpios
7722 * = 0 if controller has dedicated MSM pins
7723 */
7724 u8 is_gpio;
7725 u8 cfg_sts;
7726 u8 gpio_data_size;
7727 struct msm_sdcc_gpio *gpio_data;
7728 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7729 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7730 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7731 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7732 u8 pad_drv_data_size;
7733 u8 pad_pull_data_size;
7734 u8 sdio_lpm_gpio_cfg;
7735};
7736
7737
7738static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7739#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7740 [0] = {
7741 .is_gpio = 1,
7742 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7743 .gpio_data = sdc1_gpio_cfg
7744 },
7745#endif
7746#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7747 [1] = {
7748 .is_gpio = 1,
7749 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7750 .gpio_data = sdc2_gpio_cfg
7751 },
7752#endif
7753#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7754 [2] = {
7755 .is_gpio = 0,
7756 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7757 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7758 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7759 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7760 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7761 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7762 },
7763#endif
7764#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7765 [3] = {
7766 .is_gpio = 0,
7767 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7768 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7769 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7770 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7771 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7772 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7773 },
7774#endif
7775#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7776 [4] = {
7777 .is_gpio = 1,
7778 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7779 .gpio_data = sdc5_gpio_cfg
7780 }
7781#endif
7782};
7783
7784static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7785{
7786 int rc = 0;
7787 struct msm_sdcc_pin_cfg *curr;
7788 int n;
7789
7790 curr = &sdcc_pin_cfg_data[dev_id - 1];
7791 if (!curr->gpio_data)
7792 goto out;
7793
7794 for (n = 0; n < curr->gpio_data_size; n++) {
7795 if (enable) {
7796
7797 if (curr->gpio_data[n].always_on &&
7798 curr->gpio_data[n].is_enabled)
7799 continue;
7800 pr_debug("%s: enable: %s\n", __func__,
7801 curr->gpio_data[n].name);
7802 rc = gpio_request(curr->gpio_data[n].no,
7803 curr->gpio_data[n].name);
7804 if (rc) {
7805 pr_err("%s: gpio_request(%d, %s)"
7806 "failed", __func__,
7807 curr->gpio_data[n].no,
7808 curr->gpio_data[n].name);
7809 goto free_gpios;
7810 }
7811 /* set direction as output for all GPIOs */
7812 rc = gpio_direction_output(
7813 curr->gpio_data[n].no, 1);
7814 if (rc) {
7815 pr_err("%s: gpio_direction_output"
7816 "(%d, 1) failed\n", __func__,
7817 curr->gpio_data[n].no);
7818 goto free_gpios;
7819 }
7820 curr->gpio_data[n].is_enabled = 1;
7821 } else {
7822 /*
7823 * now free this GPIO which will put GPIO
7824 * in low power mode and will also put GPIO
7825 * in input mode
7826 */
7827 if (curr->gpio_data[n].always_on)
7828 continue;
7829 pr_debug("%s: disable: %s\n", __func__,
7830 curr->gpio_data[n].name);
7831 gpio_free(curr->gpio_data[n].no);
7832 curr->gpio_data[n].is_enabled = 0;
7833 }
7834 }
7835 curr->cfg_sts = enable;
7836 goto out;
7837
7838free_gpios:
7839 for (; n >= 0; n--)
7840 gpio_free(curr->gpio_data[n].no);
7841out:
7842 return rc;
7843}
7844
7845static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7846{
7847 int rc = 0;
7848 struct msm_sdcc_pin_cfg *curr;
7849 int n;
7850
7851 curr = &sdcc_pin_cfg_data[dev_id - 1];
7852 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7853 goto out;
7854
7855 if (enable) {
7856 /*
7857 * set up the normal driver strength and
7858 * pull config for pads
7859 */
7860 for (n = 0; n < curr->pad_drv_data_size; n++) {
7861 if (curr->sdio_lpm_gpio_cfg) {
7862 if (curr->pad_drv_on_data[n].drv ==
7863 TLMM_HDRV_SDC4_DATA)
7864 continue;
7865 }
7866 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7867 curr->pad_drv_on_data[n].drv_val);
7868 }
7869 for (n = 0; n < curr->pad_pull_data_size; n++) {
7870 if (curr->sdio_lpm_gpio_cfg) {
7871 if (curr->pad_pull_on_data[n].pull ==
7872 TLMM_PULL_SDC4_DATA)
7873 continue;
7874 }
7875 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7876 curr->pad_pull_on_data[n].pull_val);
7877 }
7878 } else {
7879 /* set the low power config for pads */
7880 for (n = 0; n < curr->pad_drv_data_size; n++) {
7881 if (curr->sdio_lpm_gpio_cfg) {
7882 if (curr->pad_drv_off_data[n].drv ==
7883 TLMM_HDRV_SDC4_DATA)
7884 continue;
7885 }
7886 msm_tlmm_set_hdrive(
7887 curr->pad_drv_off_data[n].drv,
7888 curr->pad_drv_off_data[n].drv_val);
7889 }
7890 for (n = 0; n < curr->pad_pull_data_size; n++) {
7891 if (curr->sdio_lpm_gpio_cfg) {
7892 if (curr->pad_pull_off_data[n].pull ==
7893 TLMM_PULL_SDC4_DATA)
7894 continue;
7895 }
7896 msm_tlmm_set_pull(
7897 curr->pad_pull_off_data[n].pull,
7898 curr->pad_pull_off_data[n].pull_val);
7899 }
7900 }
7901 curr->cfg_sts = enable;
7902out:
7903 return rc;
7904}
7905
7906struct sdcc_reg {
7907 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7908 const char *reg_name;
7909 /*
7910 * is set voltage supported for this regulator?
7911 * 0 = not supported, 1 = supported
7912 */
7913 unsigned char set_voltage_sup;
7914 /* voltage level to be set */
7915 unsigned int level;
7916 /* VDD/VCC/VCCQ voltage regulator handle */
7917 struct regulator *reg;
7918 /* is this regulator enabled? */
7919 bool enabled;
7920 /* is this regulator needs to be always on? */
7921 bool always_on;
7922 /* is operating power mode setting required for this regulator? */
7923 bool op_pwr_mode_sup;
7924 /* Load values for low power and high power mode */
7925 unsigned int lpm_uA;
7926 unsigned int hpm_uA;
7927};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007928/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007929static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7930/* only SDCC1 requires VCCQ voltage */
7931static struct sdcc_reg sdcc_vccq_reg_data[1];
7932/* all SDCC controllers may require voting for VDD PAD voltage */
7933static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7934
7935struct sdcc_reg_data {
7936 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7937 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7938 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7939 unsigned char sts; /* regulator enable/disable status */
7940};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007941/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007942static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7943
7944static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7945{
7946 int rc = 0;
7947
7948 /* Get the regulator handle */
7949 vreg->reg = regulator_get(NULL, vreg->reg_name);
7950 if (IS_ERR(vreg->reg)) {
7951 rc = PTR_ERR(vreg->reg);
7952 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7953 __func__, vreg->reg_name, rc);
7954 goto out;
7955 }
7956
7957 /* Set the voltage level if required */
7958 if (vreg->set_voltage_sup) {
7959 rc = regulator_set_voltage(vreg->reg, vreg->level,
7960 vreg->level);
7961 if (rc) {
7962 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7963 __func__, vreg->reg_name, rc);
7964 goto vreg_put;
7965 }
7966 }
7967 goto out;
7968
7969vreg_put:
7970 regulator_put(vreg->reg);
7971out:
7972 return rc;
7973}
7974
7975static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7976{
7977 regulator_put(vreg->reg);
7978}
7979
7980/* this init function should be called only once for each SDCC */
7981static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7982{
7983 int rc = 0;
7984 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7985 struct sdcc_reg_data *curr;
7986
7987 curr = &sdcc_vreg_data[dev_id - 1];
7988 curr_vdd_reg = curr->vdd_data;
7989 curr_vccq_reg = curr->vccq_data;
7990 curr_vddp_reg = curr->vddp_data;
7991
7992 if (init) {
7993 /*
7994 * get the regulator handle from voltage regulator framework
7995 * and then try to set the voltage level for the regulator
7996 */
7997 if (curr_vdd_reg) {
7998 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7999 if (rc)
8000 goto out;
8001 }
8002 if (curr_vccq_reg) {
8003 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
8004 if (rc)
8005 goto vdd_reg_deinit;
8006 }
8007 if (curr_vddp_reg) {
8008 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
8009 if (rc)
8010 goto vccq_reg_deinit;
8011 }
8012 goto out;
8013 } else
8014 /* deregister with all regulators from regulator framework */
8015 goto vddp_reg_deinit;
8016
8017vddp_reg_deinit:
8018 if (curr_vddp_reg)
8019 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
8020vccq_reg_deinit:
8021 if (curr_vccq_reg)
8022 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
8023vdd_reg_deinit:
8024 if (curr_vdd_reg)
8025 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
8026out:
8027 return rc;
8028}
8029
8030static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
8031{
8032 int rc;
8033
8034 if (!vreg->enabled) {
8035 rc = regulator_enable(vreg->reg);
8036 if (rc) {
8037 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
8038 __func__, vreg->reg_name, rc);
8039 goto out;
8040 }
8041 vreg->enabled = 1;
8042 }
8043
8044 /* Put always_on regulator in HPM (high power mode) */
8045 if (vreg->always_on && vreg->op_pwr_mode_sup) {
8046 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
8047 if (rc < 0) {
8048 pr_err("%s: reg=%s: HPM setting failed"
8049 " hpm_uA=%d, rc=%d\n",
8050 __func__, vreg->reg_name,
8051 vreg->hpm_uA, rc);
8052 goto vreg_disable;
8053 }
8054 rc = 0;
8055 }
8056 goto out;
8057
8058vreg_disable:
8059 regulator_disable(vreg->reg);
8060 vreg->enabled = 0;
8061out:
8062 return rc;
8063}
8064
8065static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
8066{
8067 int rc;
8068
8069 /* Never disable always_on regulator */
8070 if (!vreg->always_on) {
8071 rc = regulator_disable(vreg->reg);
8072 if (rc) {
8073 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
8074 __func__, vreg->reg_name, rc);
8075 goto out;
8076 }
8077 vreg->enabled = 0;
8078 }
8079
8080 /* Put always_on regulator in LPM (low power mode) */
8081 if (vreg->always_on && vreg->op_pwr_mode_sup) {
8082 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
8083 if (rc < 0) {
8084 pr_err("%s: reg=%s: LPM setting failed"
8085 " lpm_uA=%d, rc=%d\n",
8086 __func__,
8087 vreg->reg_name,
8088 vreg->lpm_uA, rc);
8089 goto out;
8090 }
8091 rc = 0;
8092 }
8093
8094out:
8095 return rc;
8096}
8097
8098static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
8099{
8100 int rc = 0;
8101 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
8102 struct sdcc_reg_data *curr;
8103
8104 curr = &sdcc_vreg_data[dev_id - 1];
8105 curr_vdd_reg = curr->vdd_data;
8106 curr_vccq_reg = curr->vccq_data;
8107 curr_vddp_reg = curr->vddp_data;
8108
8109 /* check if regulators are initialized or not? */
8110 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
8111 (curr_vccq_reg && !curr_vccq_reg->reg) ||
8112 (curr_vddp_reg && !curr_vddp_reg->reg)) {
8113 /* initialize voltage regulators required for this SDCC */
8114 rc = msm_sdcc_vreg_init(dev_id, 1);
8115 if (rc) {
8116 pr_err("%s: regulator init failed = %d\n",
8117 __func__, rc);
8118 goto out;
8119 }
8120 }
8121
8122 if (curr->sts == enable)
8123 goto out;
8124
8125 if (curr_vdd_reg) {
8126 if (enable)
8127 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
8128 else
8129 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
8130 if (rc)
8131 goto out;
8132 }
8133
8134 if (curr_vccq_reg) {
8135 if (enable)
8136 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
8137 else
8138 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
8139 if (rc)
8140 goto out;
8141 }
8142
8143 if (curr_vddp_reg) {
8144 if (enable)
8145 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
8146 else
8147 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
8148 if (rc)
8149 goto out;
8150 }
8151 curr->sts = enable;
8152
8153out:
8154 return rc;
8155}
8156
8157static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
8158{
8159 u32 rc_pin_cfg = 0;
8160 u32 rc_vreg_cfg = 0;
8161 u32 rc = 0;
8162 struct platform_device *pdev;
8163 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8164
8165 pdev = container_of(dv, struct platform_device, dev);
8166
8167 /* setup gpio/pad */
8168 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8169 if (curr_pin_cfg->cfg_sts == !!vdd)
8170 goto setup_vreg;
8171
8172 if (curr_pin_cfg->is_gpio)
8173 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
8174 else
8175 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
8176
8177setup_vreg:
8178 /* setup voltage regulators */
8179 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
8180
8181 if (rc_pin_cfg || rc_vreg_cfg)
8182 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8183
8184 return rc;
8185}
8186
8187static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8188{
8189 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8190 struct platform_device *pdev;
8191
8192 pdev = container_of(dv, struct platform_device, dev);
8193 /* setup gpio/pad */
8194 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8195
8196 if (curr_pin_cfg->cfg_sts == active)
8197 return;
8198
8199 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8200 if (curr_pin_cfg->is_gpio)
8201 msm_sdcc_setup_gpio(pdev->id, active);
8202 else
8203 msm_sdcc_setup_pad(pdev->id, active);
8204 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8205}
8206
8207static int msm_sdc3_get_wpswitch(struct device *dev)
8208{
8209 struct platform_device *pdev;
8210 int status;
8211 pdev = container_of(dev, struct platform_device, dev);
8212
8213 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8214 if (status) {
8215 pr_err("%s:Failed to request GPIO %d\n",
8216 __func__, GPIO_SDC_WP);
8217 } else {
8218 status = gpio_direction_input(GPIO_SDC_WP);
8219 if (!status) {
8220 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8221 pr_info("%s: WP Status for Slot %d = %d\n",
8222 __func__, pdev->id, status);
8223 }
8224 gpio_free(GPIO_SDC_WP);
8225 }
8226 return status;
8227}
8228
8229#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8230int sdc5_register_status_notify(void (*callback)(int, void *),
8231 void *dev_id)
8232{
8233 sdc5_status_notify_cb = callback;
8234 sdc5_status_notify_cb_devid = dev_id;
8235 return 0;
8236}
8237#endif
8238
8239#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8240int sdc2_register_status_notify(void (*callback)(int, void *),
8241 void *dev_id)
8242{
8243 sdc2_status_notify_cb = callback;
8244 sdc2_status_notify_cb_devid = dev_id;
8245 return 0;
8246}
8247#endif
8248
8249/* Interrupt handler for SDC2 and SDC5 detection
8250 * This function uses dual-edge interrputs settings in order
8251 * to get SDIO detection when the GPIO is rising and SDIO removal
8252 * when the GPIO is falling */
8253static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8254{
8255 int status;
8256
8257 if (!machine_is_msm8x60_fusion() &&
8258 !machine_is_msm8x60_fusn_ffa())
8259 return IRQ_NONE;
8260
8261 status = gpio_get_value(MDM2AP_SYNC);
8262 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8263 __func__, status);
8264
8265#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8266 if (sdc2_status_notify_cb) {
8267 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8268 sdc2_status_notify_cb(status,
8269 sdc2_status_notify_cb_devid);
8270 }
8271#endif
8272
8273#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8274 if (sdc5_status_notify_cb) {
8275 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8276 sdc5_status_notify_cb(status,
8277 sdc5_status_notify_cb_devid);
8278 }
8279#endif
8280 return IRQ_HANDLED;
8281}
8282
8283static int msm8x60_multi_sdio_init(void)
8284{
8285 int ret, irq_num;
8286
8287 if (!machine_is_msm8x60_fusion() &&
8288 !machine_is_msm8x60_fusn_ffa())
8289 return 0;
8290
8291 ret = msm_gpiomux_get(MDM2AP_SYNC);
8292 if (ret) {
8293 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8294 __func__, MDM2AP_SYNC, ret);
8295 return ret;
8296 }
8297
8298 irq_num = gpio_to_irq(MDM2AP_SYNC);
8299
8300 ret = request_irq(irq_num,
8301 msm8x60_multi_sdio_slot_status_irq,
8302 IRQ_TYPE_EDGE_BOTH,
8303 "sdio_multidetection", NULL);
8304
8305 if (ret) {
8306 pr_err("%s:Failed to request irq, ret=%d\n",
8307 __func__, ret);
8308 return ret;
8309 }
8310
8311 return ret;
8312}
8313
8314#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8315#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8316static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8317{
8318 int status;
8319
8320 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8321 , "SD_HW_Detect");
8322 if (status) {
8323 pr_err("%s:Failed to request GPIO %d\n", __func__,
8324 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8325 } else {
8326 status = gpio_direction_input(
8327 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8328 if (!status)
8329 status = !(gpio_get_value_cansleep(
8330 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8331 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8332 }
8333 return (unsigned int) status;
8334}
8335#endif
8336#endif
8337
8338#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8339static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8340{
8341 struct platform_device *pdev;
8342 enum msm_mpm_pin pin;
8343 int ret = 0;
8344
8345 pdev = container_of(dev, struct platform_device, dev);
8346
8347 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8348 if (pdev->id == 4)
8349 pin = MSM_MPM_PIN_SDC4_DAT1;
8350 else
8351 return -EINVAL;
8352
8353 switch (mode) {
8354 case SDC_DAT1_DISABLE:
8355 ret = msm_mpm_enable_pin(pin, 0);
8356 break;
8357 case SDC_DAT1_ENABLE:
8358 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8359 ret = msm_mpm_enable_pin(pin, 1);
8360 break;
8361 case SDC_DAT1_ENWAKE:
8362 ret = msm_mpm_set_pin_wake(pin, 1);
8363 break;
8364 case SDC_DAT1_DISWAKE:
8365 ret = msm_mpm_set_pin_wake(pin, 0);
8366 break;
8367 default:
8368 ret = -EINVAL;
8369 break;
8370 }
8371 return ret;
8372}
8373#endif
8374#endif
8375
8376#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8377static struct mmc_platform_data msm8x60_sdc1_data = {
8378 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8379 .translate_vdd = msm_sdcc_setup_power,
8380#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8381 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8382#else
8383 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8384#endif
8385 .msmsdcc_fmin = 400000,
8386 .msmsdcc_fmid = 24000000,
8387 .msmsdcc_fmax = 48000000,
8388 .nonremovable = 1,
8389 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008390};
8391#endif
8392
8393#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8394static struct mmc_platform_data msm8x60_sdc2_data = {
8395 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8396 .translate_vdd = msm_sdcc_setup_power,
8397 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8398 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8399 .msmsdcc_fmin = 400000,
8400 .msmsdcc_fmid = 24000000,
8401 .msmsdcc_fmax = 48000000,
8402 .nonremovable = 0,
8403 .pclk_src_dfab = 1,
8404 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008405#ifdef CONFIG_MSM_SDIO_AL
8406 .is_sdio_al_client = 1,
8407#endif
8408};
8409#endif
8410
8411#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8412static struct mmc_platform_data msm8x60_sdc3_data = {
8413 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8414 .translate_vdd = msm_sdcc_setup_power,
8415 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8416 .wpswitch = msm_sdc3_get_wpswitch,
8417#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8418 .status = msm8x60_sdcc_slot_status,
8419 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8420 PMIC_GPIO_SDC3_DET - 1),
8421 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8422#endif
8423 .msmsdcc_fmin = 400000,
8424 .msmsdcc_fmid = 24000000,
8425 .msmsdcc_fmax = 48000000,
8426 .nonremovable = 0,
8427 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008428};
8429#endif
8430
8431#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8432static struct mmc_platform_data msm8x60_sdc4_data = {
8433 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8434 .translate_vdd = msm_sdcc_setup_power,
8435 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8436 .msmsdcc_fmin = 400000,
8437 .msmsdcc_fmid = 24000000,
8438 .msmsdcc_fmax = 48000000,
8439 .nonremovable = 0,
8440 .pclk_src_dfab = 1,
8441 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008442};
8443#endif
8444
8445#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8446static struct mmc_platform_data msm8x60_sdc5_data = {
8447 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8448 .translate_vdd = msm_sdcc_setup_power,
8449 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8450 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8451 .msmsdcc_fmin = 400000,
8452 .msmsdcc_fmid = 24000000,
8453 .msmsdcc_fmax = 48000000,
8454 .nonremovable = 0,
8455 .pclk_src_dfab = 1,
8456 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008457#ifdef CONFIG_MSM_SDIO_AL
8458 .is_sdio_al_client = 1,
8459#endif
8460};
8461#endif
8462
8463static void __init msm8x60_init_mmc(void)
8464{
8465#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8466 /* SDCC1 : eMMC card connected */
8467 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8468 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8469 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8470 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308471 sdcc_vreg_data[0].vdd_data->always_on = 1;
8472 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8473 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8474 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008475
8476 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8477 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8478 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8479 sdcc_vreg_data[0].vccq_data->always_on = 1;
8480
8481 msm_add_sdcc(1, &msm8x60_sdc1_data);
8482#endif
8483#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8484 /*
8485 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8486 * and no card is connected on 8660 SURF/FFA/FLUID.
8487 */
8488 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8489 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8490 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8491 sdcc_vreg_data[1].vdd_data->level = 1800000;
8492
8493 sdcc_vreg_data[1].vccq_data = NULL;
8494
8495 if (machine_is_msm8x60_fusion())
8496 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8497 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8498#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8499 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8500 msm_sdcc_setup_gpio(2, 1);
8501#endif
8502 msm_add_sdcc(2, &msm8x60_sdc2_data);
8503 }
8504#endif
8505#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8506 /* SDCC3 : External card slot connected */
8507 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8508 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8509 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8510 sdcc_vreg_data[2].vdd_data->level = 2850000;
8511 sdcc_vreg_data[2].vdd_data->always_on = 1;
8512 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8513 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8514 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8515
8516 sdcc_vreg_data[2].vccq_data = NULL;
8517
8518 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8519 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8520 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8521 sdcc_vreg_data[2].vddp_data->level = 2850000;
8522 sdcc_vreg_data[2].vddp_data->always_on = 1;
8523 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8524 /* Sleep current required is ~300 uA. But min. RPM
8525 * vote can be in terms of mA (min. 1 mA).
8526 * So let's vote for 2 mA during sleep.
8527 */
8528 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8529 /* Max. Active current required is 16 mA */
8530 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8531
8532 if (machine_is_msm8x60_fluid())
8533 msm8x60_sdc3_data.wpswitch = NULL;
8534 msm_add_sdcc(3, &msm8x60_sdc3_data);
8535#endif
8536#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8537 /* SDCC4 : WLAN WCN1314 chip is connected */
8538 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8539 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8540 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8541 sdcc_vreg_data[3].vdd_data->level = 1800000;
8542
8543 sdcc_vreg_data[3].vccq_data = NULL;
8544
8545 msm_add_sdcc(4, &msm8x60_sdc4_data);
8546#endif
8547#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8548 /*
8549 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8550 * and no card is connected on 8660 SURF/FFA/FLUID.
8551 */
8552 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8553 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8554 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8555 sdcc_vreg_data[4].vdd_data->level = 1800000;
8556
8557 sdcc_vreg_data[4].vccq_data = NULL;
8558
8559 if (machine_is_msm8x60_fusion())
8560 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8561 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8562#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8563 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8564 msm_sdcc_setup_gpio(5, 1);
8565#endif
8566 msm_add_sdcc(5, &msm8x60_sdc5_data);
8567 }
8568#endif
8569}
8570
8571#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8572static inline void display_common_power(int on) {}
8573#else
8574
8575#define _GET_REGULATOR(var, name) do { \
8576 if (var == NULL) { \
8577 var = regulator_get(NULL, name); \
8578 if (IS_ERR(var)) { \
8579 pr_err("'%s' regulator not found, rc=%ld\n", \
8580 name, PTR_ERR(var)); \
8581 var = NULL; \
8582 } \
8583 } \
8584} while (0)
8585
8586static int dsub_regulator(int on)
8587{
8588 static struct regulator *dsub_reg;
8589 static struct regulator *mpp0_reg;
8590 static int dsub_reg_enabled;
8591 int rc = 0;
8592
8593 _GET_REGULATOR(dsub_reg, "8901_l3");
8594 if (IS_ERR(dsub_reg)) {
8595 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8596 __func__, PTR_ERR(dsub_reg));
8597 return PTR_ERR(dsub_reg);
8598 }
8599
8600 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8601 if (IS_ERR(mpp0_reg)) {
8602 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8603 __func__, PTR_ERR(mpp0_reg));
8604 return PTR_ERR(mpp0_reg);
8605 }
8606
8607 if (on && !dsub_reg_enabled) {
8608 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8609 if (rc) {
8610 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8611 " err=%d", __func__, rc);
8612 goto dsub_regulator_err;
8613 }
8614 rc = regulator_enable(dsub_reg);
8615 if (rc) {
8616 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8617 " err=%d", __func__, rc);
8618 goto dsub_regulator_err;
8619 }
8620 rc = regulator_enable(mpp0_reg);
8621 if (rc) {
8622 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8623 " err=%d", __func__, rc);
8624 goto dsub_regulator_err;
8625 }
8626 dsub_reg_enabled = 1;
8627 } else if (!on && dsub_reg_enabled) {
8628 rc = regulator_disable(dsub_reg);
8629 if (rc)
8630 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8631 " err=%d", __func__, rc);
8632 rc = regulator_disable(mpp0_reg);
8633 if (rc)
8634 printk(KERN_WARNING "%s: failed to disable reg "
8635 "8901_mpp0 err=%d", __func__, rc);
8636 dsub_reg_enabled = 0;
8637 }
8638
8639 return rc;
8640
8641dsub_regulator_err:
8642 regulator_put(mpp0_reg);
8643 regulator_put(dsub_reg);
8644 return rc;
8645}
8646
8647static int display_power_on;
8648static void setup_display_power(void)
8649{
8650 if (display_power_on)
8651 if (lcdc_vga_enabled) {
8652 dsub_regulator(1);
8653 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8654 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8655 if (machine_is_msm8x60_ffa() ||
8656 machine_is_msm8x60_fusn_ffa())
8657 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8658 } else {
8659 dsub_regulator(0);
8660 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8661 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8662 if (machine_is_msm8x60_ffa() ||
8663 machine_is_msm8x60_fusn_ffa())
8664 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8665 }
8666 else {
8667 dsub_regulator(0);
8668 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8669 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8670 /* BACKLIGHT */
8671 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8672 /* LVDS */
8673 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8674 }
8675}
8676
8677#define _GET_REGULATOR(var, name) do { \
8678 if (var == NULL) { \
8679 var = regulator_get(NULL, name); \
8680 if (IS_ERR(var)) { \
8681 pr_err("'%s' regulator not found, rc=%ld\n", \
8682 name, PTR_ERR(var)); \
8683 var = NULL; \
8684 } \
8685 } \
8686} while (0)
8687
8688#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8689
8690static void display_common_power(int on)
8691{
8692 int rc;
8693 static struct regulator *display_reg;
8694
8695 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8696 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8697 if (on) {
8698 /* LVDS */
8699 _GET_REGULATOR(display_reg, "8901_l2");
8700 if (!display_reg)
8701 return;
8702 rc = regulator_set_voltage(display_reg,
8703 3300000, 3300000);
8704 if (rc)
8705 goto out;
8706 rc = regulator_enable(display_reg);
8707 if (rc)
8708 goto out;
8709 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8710 "LVDS_STDN_OUT_N");
8711 if (rc) {
8712 printk(KERN_ERR "%s: LVDS gpio %d request"
8713 "failed\n", __func__,
8714 GPIO_LVDS_SHUTDOWN_N);
8715 goto out2;
8716 }
8717
8718 /* BACKLIGHT */
8719 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8720 if (rc) {
8721 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8722 "failed\n", __func__,
8723 GPIO_BACKLIGHT_EN);
8724 goto out3;
8725 }
8726
8727 if (machine_is_msm8x60_ffa() ||
8728 machine_is_msm8x60_fusn_ffa()) {
8729 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8730 "DONGLE_PWR_EN");
8731 if (rc) {
8732 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8733 " %d request failed\n", __func__,
8734 GPIO_DONGLE_PWR_EN);
8735 goto out4;
8736 }
8737 }
8738
8739 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8740 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8741 if (machine_is_msm8x60_ffa() ||
8742 machine_is_msm8x60_fusn_ffa())
8743 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8744 mdelay(20);
8745 display_power_on = 1;
8746 setup_display_power();
8747 } else {
8748 if (display_power_on) {
8749 display_power_on = 0;
8750 setup_display_power();
8751 mdelay(20);
8752 if (machine_is_msm8x60_ffa() ||
8753 machine_is_msm8x60_fusn_ffa())
8754 gpio_free(GPIO_DONGLE_PWR_EN);
8755 goto out4;
8756 }
8757 }
8758 }
8759#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8760 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8761 else if (machine_is_msm8x60_fluid()) {
8762 static struct regulator *fluid_reg;
8763 static struct regulator *fluid_reg2;
8764
8765 if (on) {
8766 _GET_REGULATOR(fluid_reg, "8901_l2");
8767 if (!fluid_reg)
8768 return;
8769 _GET_REGULATOR(fluid_reg2, "8058_s3");
8770 if (!fluid_reg2) {
8771 regulator_put(fluid_reg);
8772 return;
8773 }
8774 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8775 if (rc) {
8776 regulator_put(fluid_reg2);
8777 regulator_put(fluid_reg);
8778 return;
8779 }
8780 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8781 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8782 regulator_enable(fluid_reg);
8783 regulator_enable(fluid_reg2);
8784 msleep(20);
8785 gpio_direction_output(GPIO_RESX_N, 0);
8786 udelay(10);
8787 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8788 display_power_on = 1;
8789 setup_display_power();
8790 } else {
8791 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8792 gpio_free(GPIO_RESX_N);
8793 msleep(20);
8794 regulator_disable(fluid_reg2);
8795 regulator_disable(fluid_reg);
8796 regulator_put(fluid_reg2);
8797 regulator_put(fluid_reg);
8798 display_power_on = 0;
8799 setup_display_power();
8800 fluid_reg = NULL;
8801 fluid_reg2 = NULL;
8802 }
8803 }
8804#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008805#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8806 else if (machine_is_msm8x60_dragon()) {
8807 static struct regulator *dragon_reg;
8808 static struct regulator *dragon_reg2;
8809
8810 if (on) {
8811 _GET_REGULATOR(dragon_reg, "8901_l2");
8812 if (!dragon_reg)
8813 return;
8814 _GET_REGULATOR(dragon_reg2, "8058_l16");
8815 if (!dragon_reg2) {
8816 regulator_put(dragon_reg);
8817 dragon_reg = NULL;
8818 return;
8819 }
8820
8821 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8822 if (rc) {
8823 pr_err("%s: gpio %d request failed with rc=%d\n",
8824 __func__, GPIO_NT35582_BL_EN, rc);
8825 regulator_put(dragon_reg);
8826 regulator_put(dragon_reg2);
8827 dragon_reg = NULL;
8828 dragon_reg2 = NULL;
8829 return;
8830 }
8831
8832 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8833 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8834 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8835 pr_err("%s: config gpio '%d' failed!\n",
8836 __func__, GPIO_NT35582_RESET);
8837 gpio_free(GPIO_NT35582_BL_EN);
8838 regulator_put(dragon_reg);
8839 regulator_put(dragon_reg2);
8840 dragon_reg = NULL;
8841 dragon_reg2 = NULL;
8842 return;
8843 }
8844
8845 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8846 if (rc) {
8847 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8848 __func__, GPIO_NT35582_RESET, rc);
8849 gpio_free(GPIO_NT35582_BL_EN);
8850 regulator_put(dragon_reg);
8851 regulator_put(dragon_reg2);
8852 dragon_reg = NULL;
8853 dragon_reg2 = NULL;
8854 return;
8855 }
8856
8857 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8858 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8859 regulator_enable(dragon_reg);
8860 regulator_enable(dragon_reg2);
8861 msleep(20);
8862
8863 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8864 msleep(20);
8865 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8866 msleep(20);
8867 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8868 msleep(50);
8869
8870 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8871
8872 display_power_on = 1;
8873 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8874 gpio_free(GPIO_NT35582_RESET);
8875 gpio_free(GPIO_NT35582_BL_EN);
8876 regulator_disable(dragon_reg2);
8877 regulator_disable(dragon_reg);
8878 regulator_put(dragon_reg2);
8879 regulator_put(dragon_reg);
8880 display_power_on = 0;
8881 dragon_reg = NULL;
8882 dragon_reg2 = NULL;
8883 }
8884 }
8885#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008886 return;
8887
8888out4:
8889 gpio_free(GPIO_BACKLIGHT_EN);
8890out3:
8891 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8892out2:
8893 regulator_disable(display_reg);
8894out:
8895 regulator_put(display_reg);
8896 display_reg = NULL;
8897}
8898#undef _GET_REGULATOR
8899#endif
8900
8901static int mipi_dsi_panel_power(int on);
8902
8903#define LCDC_NUM_GPIO 28
8904#define LCDC_GPIO_START 0
8905
8906static void lcdc_samsung_panel_power(int on)
8907{
8908 int n, ret = 0;
8909
8910 display_common_power(on);
8911
8912 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8913 if (on) {
8914 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8915 if (unlikely(ret)) {
8916 pr_err("%s not able to get gpio\n", __func__);
8917 break;
8918 }
8919 } else
8920 gpio_free(LCDC_GPIO_START + n);
8921 }
8922
8923 if (ret) {
8924 for (n--; n >= 0; n--)
8925 gpio_free(LCDC_GPIO_START + n);
8926 }
8927
8928 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8929}
8930
8931#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8932#define _GET_REGULATOR(var, name) do { \
8933 var = regulator_get(NULL, name); \
8934 if (IS_ERR(var)) { \
8935 pr_err("'%s' regulator not found, rc=%ld\n", \
8936 name, IS_ERR(var)); \
8937 var = NULL; \
8938 return -ENODEV; \
8939 } \
8940} while (0)
8941
8942static int hdmi_enable_5v(int on)
8943{
8944 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8945 static struct regulator *reg_8901_mpp0; /* External 5V */
8946 static int prev_on;
8947 int rc;
8948
8949 if (on == prev_on)
8950 return 0;
8951
8952 if (!reg_8901_hdmi_mvs)
8953 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8954 if (!reg_8901_mpp0)
8955 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8956
8957 if (on) {
8958 rc = regulator_enable(reg_8901_mpp0);
8959 if (rc) {
8960 pr_err("'%s' regulator enable failed, rc=%d\n",
8961 "reg_8901_mpp0", rc);
8962 return rc;
8963 }
8964 rc = regulator_enable(reg_8901_hdmi_mvs);
8965 if (rc) {
8966 pr_err("'%s' regulator enable failed, rc=%d\n",
8967 "8901_hdmi_mvs", rc);
8968 return rc;
8969 }
8970 pr_info("%s(on): success\n", __func__);
8971 } else {
8972 rc = regulator_disable(reg_8901_hdmi_mvs);
8973 if (rc)
8974 pr_warning("'%s' regulator disable failed, rc=%d\n",
8975 "8901_hdmi_mvs", rc);
8976 rc = regulator_disable(reg_8901_mpp0);
8977 if (rc)
8978 pr_warning("'%s' regulator disable failed, rc=%d\n",
8979 "reg_8901_mpp0", rc);
8980 pr_info("%s(off): success\n", __func__);
8981 }
8982
8983 prev_on = on;
8984
8985 return 0;
8986}
8987
8988static int hdmi_core_power(int on, int show)
8989{
8990 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8991 static int prev_on;
8992 int rc;
8993
8994 if (on == prev_on)
8995 return 0;
8996
8997 if (!reg_8058_l16)
8998 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8999
9000 if (on) {
9001 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
9002 if (!rc)
9003 rc = regulator_enable(reg_8058_l16);
9004 if (rc) {
9005 pr_err("'%s' regulator enable failed, rc=%d\n",
9006 "8058_l16", rc);
9007 return rc;
9008 }
9009 rc = gpio_request(170, "HDMI_DDC_CLK");
9010 if (rc) {
9011 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
9012 "HDMI_DDC_CLK", 170, rc);
9013 goto error1;
9014 }
9015 rc = gpio_request(171, "HDMI_DDC_DATA");
9016 if (rc) {
9017 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
9018 "HDMI_DDC_DATA", 171, rc);
9019 goto error2;
9020 }
9021 rc = gpio_request(172, "HDMI_HPD");
9022 if (rc) {
9023 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
9024 "HDMI_HPD", 172, rc);
9025 goto error3;
9026 }
9027 pr_info("%s(on): success\n", __func__);
9028 } else {
9029 gpio_free(170);
9030 gpio_free(171);
9031 gpio_free(172);
9032 rc = regulator_disable(reg_8058_l16);
9033 if (rc)
9034 pr_warning("'%s' regulator disable failed, rc=%d\n",
9035 "8058_l16", rc);
9036 pr_info("%s(off): success\n", __func__);
9037 }
9038
9039 prev_on = on;
9040
9041 return 0;
9042
9043error3:
9044 gpio_free(171);
9045error2:
9046 gpio_free(170);
9047error1:
9048 regulator_disable(reg_8058_l16);
9049 return rc;
9050}
9051
9052static int hdmi_cec_power(int on)
9053{
9054 static struct regulator *reg_8901_l3; /* HDMI_CEC */
9055 static int prev_on;
9056 int rc;
9057
9058 if (on == prev_on)
9059 return 0;
9060
9061 if (!reg_8901_l3)
9062 _GET_REGULATOR(reg_8901_l3, "8901_l3");
9063
9064 if (on) {
9065 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
9066 if (!rc)
9067 rc = regulator_enable(reg_8901_l3);
9068 if (rc) {
9069 pr_err("'%s' regulator enable failed, rc=%d\n",
9070 "8901_l3", rc);
9071 return rc;
9072 }
9073 rc = gpio_request(169, "HDMI_CEC_VAR");
9074 if (rc) {
9075 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
9076 "HDMI_CEC_VAR", 169, rc);
9077 goto error;
9078 }
9079 pr_info("%s(on): success\n", __func__);
9080 } else {
9081 gpio_free(169);
9082 rc = regulator_disable(reg_8901_l3);
9083 if (rc)
9084 pr_warning("'%s' regulator disable failed, rc=%d\n",
9085 "8901_l3", rc);
9086 pr_info("%s(off): success\n", __func__);
9087 }
9088
9089 prev_on = on;
9090
9091 return 0;
9092error:
9093 regulator_disable(reg_8901_l3);
9094 return rc;
9095}
9096
9097#undef _GET_REGULATOR
9098
9099#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
9100
9101static int lcdc_panel_power(int on)
9102{
9103 int flag_on = !!on;
9104 static int lcdc_power_save_on;
9105
9106 if (lcdc_power_save_on == flag_on)
9107 return 0;
9108
9109 lcdc_power_save_on = flag_on;
9110
9111 lcdc_samsung_panel_power(on);
9112
9113 return 0;
9114}
9115
9116#ifdef CONFIG_MSM_BUS_SCALING
Nagamalleswararao Ganji5fabbd62011-11-06 23:10:43 -08009117
9118static struct msm_bus_vectors rotator_init_vectors[] = {
9119 {
9120 .src = MSM_BUS_MASTER_ROTATOR,
9121 .dst = MSM_BUS_SLAVE_SMI,
9122 .ab = 0,
9123 .ib = 0,
9124 },
9125 {
9126 .src = MSM_BUS_MASTER_ROTATOR,
9127 .dst = MSM_BUS_SLAVE_EBI_CH0,
9128 .ab = 0,
9129 .ib = 0,
9130 },
9131};
9132
9133static struct msm_bus_vectors rotator_ui_vectors[] = {
9134 {
9135 .src = MSM_BUS_MASTER_ROTATOR,
9136 .dst = MSM_BUS_SLAVE_SMI,
9137 .ab = 0,
9138 .ib = 0,
9139 },
9140 {
9141 .src = MSM_BUS_MASTER_ROTATOR,
9142 .dst = MSM_BUS_SLAVE_EBI_CH0,
9143 .ab = (1024 * 600 * 4 * 2 * 60),
9144 .ib = (1024 * 600 * 4 * 2 * 60 * 1.5),
9145 },
9146};
9147
9148static struct msm_bus_vectors rotator_vga_vectors[] = {
9149 {
9150 .src = MSM_BUS_MASTER_ROTATOR,
9151 .dst = MSM_BUS_SLAVE_SMI,
9152 .ab = (640 * 480 * 2 * 2 * 30),
9153 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9154 },
9155 {
9156 .src = MSM_BUS_MASTER_ROTATOR,
9157 .dst = MSM_BUS_SLAVE_EBI_CH0,
9158 .ab = (640 * 480 * 2 * 2 * 30),
9159 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9160 },
9161};
9162
9163static struct msm_bus_vectors rotator_720p_vectors[] = {
9164 {
9165 .src = MSM_BUS_MASTER_ROTATOR,
9166 .dst = MSM_BUS_SLAVE_SMI,
9167 .ab = (1280 * 736 * 2 * 2 * 30),
9168 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9169 },
9170 {
9171 .src = MSM_BUS_MASTER_ROTATOR,
9172 .dst = MSM_BUS_SLAVE_EBI_CH0,
9173 .ab = (1280 * 736 * 2 * 2 * 30),
9174 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9175 },
9176};
9177
9178static struct msm_bus_vectors rotator_1080p_vectors[] = {
9179 {
9180 .src = MSM_BUS_MASTER_ROTATOR,
9181 .dst = MSM_BUS_SLAVE_SMI,
9182 .ab = (1920 * 1088 * 2 * 2 * 30),
9183 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9184 },
9185 {
9186 .src = MSM_BUS_MASTER_ROTATOR,
9187 .dst = MSM_BUS_SLAVE_EBI_CH0,
9188 .ab = (1920 * 1088 * 2 * 2 * 30),
9189 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9190 },
9191};
9192
9193static struct msm_bus_paths rotator_bus_scale_usecases[] = {
9194 {
9195 ARRAY_SIZE(rotator_init_vectors),
9196 rotator_init_vectors,
9197 },
9198 {
9199 ARRAY_SIZE(rotator_ui_vectors),
9200 rotator_ui_vectors,
9201 },
9202 {
9203 ARRAY_SIZE(rotator_vga_vectors),
9204 rotator_vga_vectors,
9205 },
9206 {
9207 ARRAY_SIZE(rotator_720p_vectors),
9208 rotator_720p_vectors,
9209 },
9210 {
9211 ARRAY_SIZE(rotator_1080p_vectors),
9212 rotator_1080p_vectors,
9213 },
9214};
9215
9216struct msm_bus_scale_pdata rotator_bus_scale_pdata = {
9217 rotator_bus_scale_usecases,
9218 ARRAY_SIZE(rotator_bus_scale_usecases),
9219 .name = "rotator",
9220};
9221
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009222static struct msm_bus_vectors mdp_init_vectors[] = {
9223 /* For now, 0th array entry is reserved.
9224 * Please leave 0 as is and don't use it
9225 */
9226 {
9227 .src = MSM_BUS_MASTER_MDP_PORT0,
9228 .dst = MSM_BUS_SLAVE_SMI,
9229 .ab = 0,
9230 .ib = 0,
9231 },
9232 /* Master and slaves can be from different fabrics */
9233 {
9234 .src = MSM_BUS_MASTER_MDP_PORT0,
9235 .dst = MSM_BUS_SLAVE_EBI_CH0,
9236 .ab = 0,
9237 .ib = 0,
9238 },
9239};
9240
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009241#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009242static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9243 /* Default case static display/UI/2d/3d if FB SMI */
9244 {
9245 .src = MSM_BUS_MASTER_MDP_PORT0,
9246 .dst = MSM_BUS_SLAVE_SMI,
9247 .ab = 388800000,
9248 .ib = 486000000,
9249 },
9250 /* Master and slaves can be from different fabrics */
9251 {
9252 .src = MSM_BUS_MASTER_MDP_PORT0,
9253 .dst = MSM_BUS_SLAVE_EBI_CH0,
9254 .ab = 0,
9255 .ib = 0,
9256 },
9257};
9258
9259static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9260 /* Default case static display/UI/2d/3d if FB SMI */
9261 {
9262 .src = MSM_BUS_MASTER_MDP_PORT0,
9263 .dst = MSM_BUS_SLAVE_SMI,
9264 .ab = 0,
9265 .ib = 0,
9266 },
9267 /* Master and slaves can be from different fabrics */
9268 {
9269 .src = MSM_BUS_MASTER_MDP_PORT0,
9270 .dst = MSM_BUS_SLAVE_EBI_CH0,
9271 .ab = 388800000,
9272 .ib = 486000000 * 2,
9273 },
9274};
9275static struct msm_bus_vectors mdp_vga_vectors[] = {
9276 /* VGA and less video */
9277 {
9278 .src = MSM_BUS_MASTER_MDP_PORT0,
9279 .dst = MSM_BUS_SLAVE_SMI,
9280 .ab = 458092800,
9281 .ib = 572616000,
9282 },
9283 {
9284 .src = MSM_BUS_MASTER_MDP_PORT0,
9285 .dst = MSM_BUS_SLAVE_EBI_CH0,
9286 .ab = 458092800,
9287 .ib = 572616000 * 2,
9288 },
9289};
9290static struct msm_bus_vectors mdp_720p_vectors[] = {
9291 /* 720p and less video */
9292 {
9293 .src = MSM_BUS_MASTER_MDP_PORT0,
9294 .dst = MSM_BUS_SLAVE_SMI,
9295 .ab = 471744000,
9296 .ib = 589680000,
9297 },
9298 /* Master and slaves can be from different fabrics */
9299 {
9300 .src = MSM_BUS_MASTER_MDP_PORT0,
9301 .dst = MSM_BUS_SLAVE_EBI_CH0,
9302 .ab = 471744000,
9303 .ib = 589680000 * 2,
9304 },
9305};
9306
9307static struct msm_bus_vectors mdp_1080p_vectors[] = {
9308 /* 1080p and less video */
9309 {
9310 .src = MSM_BUS_MASTER_MDP_PORT0,
9311 .dst = MSM_BUS_SLAVE_SMI,
9312 .ab = 575424000,
9313 .ib = 719280000,
9314 },
9315 /* Master and slaves can be from different fabrics */
9316 {
9317 .src = MSM_BUS_MASTER_MDP_PORT0,
9318 .dst = MSM_BUS_SLAVE_EBI_CH0,
9319 .ab = 575424000,
9320 .ib = 719280000 * 2,
9321 },
9322};
9323
9324#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009325static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9326 /* Default case static display/UI/2d/3d if FB SMI */
9327 {
9328 .src = MSM_BUS_MASTER_MDP_PORT0,
9329 .dst = MSM_BUS_SLAVE_SMI,
9330 .ab = 175110000,
9331 .ib = 218887500,
9332 },
9333 /* Master and slaves can be from different fabrics */
9334 {
9335 .src = MSM_BUS_MASTER_MDP_PORT0,
9336 .dst = MSM_BUS_SLAVE_EBI_CH0,
9337 .ab = 0,
9338 .ib = 0,
9339 },
9340};
9341
9342static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9343 /* Default case static display/UI/2d/3d if FB SMI */
9344 {
9345 .src = MSM_BUS_MASTER_MDP_PORT0,
9346 .dst = MSM_BUS_SLAVE_SMI,
9347 .ab = 0,
9348 .ib = 0,
9349 },
9350 /* Master and slaves can be from different fabrics */
9351 {
9352 .src = MSM_BUS_MASTER_MDP_PORT0,
9353 .dst = MSM_BUS_SLAVE_EBI_CH0,
9354 .ab = 216000000,
9355 .ib = 270000000 * 2,
9356 },
9357};
9358static struct msm_bus_vectors mdp_vga_vectors[] = {
9359 /* VGA and less video */
9360 {
9361 .src = MSM_BUS_MASTER_MDP_PORT0,
9362 .dst = MSM_BUS_SLAVE_SMI,
9363 .ab = 216000000,
9364 .ib = 270000000,
9365 },
9366 {
9367 .src = MSM_BUS_MASTER_MDP_PORT0,
9368 .dst = MSM_BUS_SLAVE_EBI_CH0,
9369 .ab = 216000000,
9370 .ib = 270000000 * 2,
9371 },
9372};
9373
9374static struct msm_bus_vectors mdp_720p_vectors[] = {
9375 /* 720p and less video */
9376 {
9377 .src = MSM_BUS_MASTER_MDP_PORT0,
9378 .dst = MSM_BUS_SLAVE_SMI,
9379 .ab = 230400000,
9380 .ib = 288000000,
9381 },
9382 /* Master and slaves can be from different fabrics */
9383 {
9384 .src = MSM_BUS_MASTER_MDP_PORT0,
9385 .dst = MSM_BUS_SLAVE_EBI_CH0,
9386 .ab = 230400000,
9387 .ib = 288000000 * 2,
9388 },
9389};
9390
9391static struct msm_bus_vectors mdp_1080p_vectors[] = {
9392 /* 1080p and less video */
9393 {
9394 .src = MSM_BUS_MASTER_MDP_PORT0,
9395 .dst = MSM_BUS_SLAVE_SMI,
9396 .ab = 334080000,
9397 .ib = 417600000,
9398 },
9399 /* Master and slaves can be from different fabrics */
9400 {
9401 .src = MSM_BUS_MASTER_MDP_PORT0,
9402 .dst = MSM_BUS_SLAVE_EBI_CH0,
9403 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009404 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009405 },
9406};
9407
9408#endif
9409static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9410 {
9411 ARRAY_SIZE(mdp_init_vectors),
9412 mdp_init_vectors,
9413 },
9414 {
9415 ARRAY_SIZE(mdp_sd_smi_vectors),
9416 mdp_sd_smi_vectors,
9417 },
9418 {
9419 ARRAY_SIZE(mdp_sd_ebi_vectors),
9420 mdp_sd_ebi_vectors,
9421 },
9422 {
9423 ARRAY_SIZE(mdp_vga_vectors),
9424 mdp_vga_vectors,
9425 },
9426 {
9427 ARRAY_SIZE(mdp_720p_vectors),
9428 mdp_720p_vectors,
9429 },
9430 {
9431 ARRAY_SIZE(mdp_1080p_vectors),
9432 mdp_1080p_vectors,
9433 },
9434};
9435static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9436 mdp_bus_scale_usecases,
9437 ARRAY_SIZE(mdp_bus_scale_usecases),
9438 .name = "mdp",
9439};
9440
9441#endif
9442#ifdef CONFIG_MSM_BUS_SCALING
9443static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9444 /* For now, 0th array entry is reserved.
9445 * Please leave 0 as is and don't use it
9446 */
9447 {
9448 .src = MSM_BUS_MASTER_MDP_PORT0,
9449 .dst = MSM_BUS_SLAVE_SMI,
9450 .ab = 0,
9451 .ib = 0,
9452 },
9453 /* Master and slaves can be from different fabrics */
9454 {
9455 .src = MSM_BUS_MASTER_MDP_PORT0,
9456 .dst = MSM_BUS_SLAVE_EBI_CH0,
9457 .ab = 0,
9458 .ib = 0,
9459 },
9460};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009461
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009462static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9463 /* For now, 0th array entry is reserved.
9464 * Please leave 0 as is and don't use it
9465 */
9466 {
9467 .src = MSM_BUS_MASTER_MDP_PORT0,
9468 .dst = MSM_BUS_SLAVE_SMI,
9469 .ab = 566092800,
9470 .ib = 707616000,
9471 },
9472 /* Master and slaves can be from different fabrics */
9473 {
9474 .src = MSM_BUS_MASTER_MDP_PORT0,
9475 .dst = MSM_BUS_SLAVE_EBI_CH0,
9476 .ab = 566092800,
9477 .ib = 707616000,
9478 },
9479};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009480
9481static struct msm_bus_vectors dtv_bus_hdmi_prim_vectors[] = {
9482 /* For now, 0th array entry is reserved.
9483 * Please leave 0 as is and don't use it
9484 */
9485 {
9486 .src = MSM_BUS_MASTER_MDP_PORT0,
9487 .dst = MSM_BUS_SLAVE_SMI,
9488 .ab = 2000000000,
9489 .ib = 2000000000,
9490 },
9491 /* Master and slaves can be from different fabrics */
9492 {
9493 .src = MSM_BUS_MASTER_MDP_PORT0,
9494 .dst = MSM_BUS_SLAVE_EBI_CH0,
9495 .ab = 2000000000,
9496 .ib = 2000000000,
9497 },
9498};
9499
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009500static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9501 {
9502 ARRAY_SIZE(dtv_bus_init_vectors),
9503 dtv_bus_init_vectors,
9504 },
9505 {
9506 ARRAY_SIZE(dtv_bus_def_vectors),
9507 dtv_bus_def_vectors,
9508 },
9509};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009510
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009511static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9512 dtv_bus_scale_usecases,
9513 ARRAY_SIZE(dtv_bus_scale_usecases),
9514 .name = "dtv",
9515};
9516
9517static struct lcdc_platform_data dtv_pdata = {
9518 .bus_scale_table = &dtv_bus_scale_pdata,
9519};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009520
9521static struct msm_bus_paths dtv_hdmi_prim_bus_scale_usecases[] = {
9522 {
9523 ARRAY_SIZE(dtv_bus_init_vectors),
9524 dtv_bus_init_vectors,
9525 },
9526 {
9527 ARRAY_SIZE(dtv_bus_hdmi_prim_vectors),
9528 dtv_bus_hdmi_prim_vectors,
9529 },
9530};
9531
9532static struct msm_bus_scale_pdata dtv_hdmi_prim_bus_scale_pdata = {
9533 dtv_hdmi_prim_bus_scale_usecases,
9534 ARRAY_SIZE(dtv_hdmi_prim_bus_scale_usecases),
9535 .name = "dtv",
9536};
9537
9538static struct lcdc_platform_data dtv_hdmi_prim_pdata = {
9539 .bus_scale_table = &dtv_hdmi_prim_bus_scale_pdata,
9540};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009541#endif
9542
9543
9544static struct lcdc_platform_data lcdc_pdata = {
9545 .lcdc_power_save = lcdc_panel_power,
9546};
9547
9548
9549#define MDP_VSYNC_GPIO 28
9550
9551/*
9552 * MIPI_DSI only use 8058_LDO0 which need always on
9553 * therefore it need to be put at low power mode if
9554 * it was not used instead of turn it off.
9555 */
9556static int mipi_dsi_panel_power(int on)
9557{
9558 int flag_on = !!on;
9559 static int mipi_dsi_power_save_on;
9560 static struct regulator *ldo0;
9561 int rc = 0;
9562
9563 if (mipi_dsi_power_save_on == flag_on)
9564 return 0;
9565
9566 mipi_dsi_power_save_on = flag_on;
9567
9568 if (ldo0 == NULL) { /* init */
9569 ldo0 = regulator_get(NULL, "8058_l0");
9570 if (IS_ERR(ldo0)) {
9571 pr_debug("%s: LDO0 failed\n", __func__);
9572 rc = PTR_ERR(ldo0);
9573 return rc;
9574 }
9575
9576 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9577 if (rc)
9578 goto out;
9579
9580 rc = regulator_enable(ldo0);
9581 if (rc)
9582 goto out;
9583 }
9584
9585 if (on) {
9586 /* set ldo0 to HPM */
9587 rc = regulator_set_optimum_mode(ldo0, 100000);
9588 if (rc < 0)
9589 goto out;
9590 } else {
9591 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309592 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009593 if (rc < 0)
9594 goto out;
9595 }
9596
9597 return 0;
9598out:
9599 regulator_disable(ldo0);
9600 regulator_put(ldo0);
9601 ldo0 = NULL;
9602 return rc;
9603}
9604
9605static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9606 .vsync_gpio = MDP_VSYNC_GPIO,
9607 .dsi_power_save = mipi_dsi_panel_power,
9608};
9609
9610#ifdef CONFIG_FB_MSM_TVOUT
9611static struct regulator *reg_8058_l13;
9612
9613static int atv_dac_power(int on)
9614{
9615 int rc = 0;
9616 #define _GET_REGULATOR(var, name) do { \
9617 var = regulator_get(NULL, name); \
9618 if (IS_ERR(var)) { \
9619 pr_info("'%s' regulator not found, rc=%ld\n", \
9620 name, IS_ERR(var)); \
9621 var = NULL; \
9622 return -ENODEV; \
9623 } \
9624 } while (0)
9625
9626 if (!reg_8058_l13)
9627 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9628 #undef _GET_REGULATOR
9629
9630 if (on) {
9631 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9632 if (rc) {
9633 pr_info("%s: '%s' regulator set voltage failed,\
9634 rc=%d\n", __func__, "8058_l13", rc);
9635 return rc;
9636 }
9637
9638 rc = regulator_enable(reg_8058_l13);
9639 if (rc) {
9640 pr_err("%s: '%s' regulator enable failed,\
9641 rc=%d\n", __func__, "8058_l13", rc);
9642 return rc;
9643 }
9644 } else {
9645 rc = regulator_force_disable(reg_8058_l13);
9646 if (rc)
9647 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9648 __func__, "8058_l13", rc);
9649 }
9650 return rc;
9651
9652}
9653#endif
9654
9655#ifdef CONFIG_FB_MSM_MIPI_DSI
9656int mdp_core_clk_rate_table[] = {
9657 85330000,
Huaibin Yang1f180ee2012-01-30 16:23:06 -08009658 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009659 160000000,
9660 200000000,
9661};
9662#else
9663int mdp_core_clk_rate_table[] = {
9664 59080000,
Huaibin Yang1f180ee2012-01-30 16:23:06 -08009665 128000000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009666 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009667 200000000,
9668};
9669#endif
9670
9671static struct msm_panel_common_pdata mdp_pdata = {
9672 .gpio = MDP_VSYNC_GPIO,
9673 .mdp_core_clk_rate = 59080000,
9674 .mdp_core_clk_table = mdp_core_clk_rate_table,
9675 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9676#ifdef CONFIG_MSM_BUS_SCALING
9677 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9678#endif
9679 .mdp_rev = MDP_REV_41,
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009680#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Ravishangar Kalyanama3b168b2012-03-26 11:13:11 -07009681 .mem_hid = BIT(ION_CP_WB_HEAP_ID),
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009682#else
9683 .mem_hid = MEMTYPE_EBI1,
9684#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009685};
9686
Huaibin Yanga5419422011-12-08 23:52:10 -08009687static void __init reserve_mdp_memory(void)
9688{
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009689 mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9690 mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9691#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
9692 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9693 mdp_pdata.ov0_wb_size;
9694 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9695 mdp_pdata.ov1_wb_size;
9696#endif
Huaibin Yanga5419422011-12-08 23:52:10 -08009697}
9698
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009699#ifdef CONFIG_FB_MSM_TVOUT
9700
9701#ifdef CONFIG_MSM_BUS_SCALING
9702static struct msm_bus_vectors atv_bus_init_vectors[] = {
9703 /* For now, 0th array entry is reserved.
9704 * Please leave 0 as is and don't use it
9705 */
9706 {
9707 .src = MSM_BUS_MASTER_MDP_PORT0,
9708 .dst = MSM_BUS_SLAVE_SMI,
9709 .ab = 0,
9710 .ib = 0,
9711 },
9712 /* Master and slaves can be from different fabrics */
9713 {
9714 .src = MSM_BUS_MASTER_MDP_PORT0,
9715 .dst = MSM_BUS_SLAVE_EBI_CH0,
9716 .ab = 0,
9717 .ib = 0,
9718 },
9719};
9720static struct msm_bus_vectors atv_bus_def_vectors[] = {
9721 /* For now, 0th array entry is reserved.
9722 * Please leave 0 as is and don't use it
9723 */
9724 {
9725 .src = MSM_BUS_MASTER_MDP_PORT0,
9726 .dst = MSM_BUS_SLAVE_SMI,
9727 .ab = 236390400,
9728 .ib = 265939200,
9729 },
9730 /* Master and slaves can be from different fabrics */
9731 {
9732 .src = MSM_BUS_MASTER_MDP_PORT0,
9733 .dst = MSM_BUS_SLAVE_EBI_CH0,
9734 .ab = 236390400,
9735 .ib = 265939200,
9736 },
9737};
9738static struct msm_bus_paths atv_bus_scale_usecases[] = {
9739 {
9740 ARRAY_SIZE(atv_bus_init_vectors),
9741 atv_bus_init_vectors,
9742 },
9743 {
9744 ARRAY_SIZE(atv_bus_def_vectors),
9745 atv_bus_def_vectors,
9746 },
9747};
9748static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9749 atv_bus_scale_usecases,
9750 ARRAY_SIZE(atv_bus_scale_usecases),
9751 .name = "atv",
9752};
9753#endif
9754
9755static struct tvenc_platform_data atv_pdata = {
9756 .poll = 0,
9757 .pm_vid_en = atv_dac_power,
9758#ifdef CONFIG_MSM_BUS_SCALING
9759 .bus_scale_table = &atv_bus_scale_pdata,
9760#endif
9761};
9762#endif
9763
9764static void __init msm_fb_add_devices(void)
9765{
9766#ifdef CONFIG_FB_MSM_LCDC_DSUB
9767 mdp_pdata.mdp_core_clk_table = NULL;
9768 mdp_pdata.num_mdp_clk = 0;
9769 mdp_pdata.mdp_core_clk_rate = 200000000;
9770#endif
9771 if (machine_is_msm8x60_rumi3())
9772 msm_fb_register_device("mdp", NULL);
9773 else
9774 msm_fb_register_device("mdp", &mdp_pdata);
9775
9776 msm_fb_register_device("lcdc", &lcdc_pdata);
9777 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9778#ifdef CONFIG_MSM_BUS_SCALING
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009779 if (hdmi_is_primary)
9780 msm_fb_register_device("dtv", &dtv_hdmi_prim_pdata);
9781 else
9782 msm_fb_register_device("dtv", &dtv_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009783#endif
9784#ifdef CONFIG_FB_MSM_TVOUT
9785 msm_fb_register_device("tvenc", &atv_pdata);
9786 msm_fb_register_device("tvout_device", NULL);
9787#endif
9788}
9789
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07009790/**
9791 * Set MDP clocks to high frequency to avoid underflow when
9792 * using high resolution 1200x1920 WUXGA/HDMI as primary panels
9793 */
9794static void set_mdp_clocks_for_wuxga(void)
9795{
9796 int i;
9797
9798 mdp_sd_smi_vectors[0].ab = 2000000000;
9799 mdp_sd_smi_vectors[0].ib = 2000000000;
9800 mdp_sd_smi_vectors[1].ab = 2000000000;
9801 mdp_sd_smi_vectors[1].ib = 2000000000;
9802
9803 mdp_sd_ebi_vectors[0].ab = 2000000000;
9804 mdp_sd_ebi_vectors[0].ib = 2000000000;
9805 mdp_sd_ebi_vectors[1].ab = 2000000000;
9806 mdp_sd_ebi_vectors[1].ib = 2000000000;
9807
9808 mdp_vga_vectors[0].ab = 2000000000;
9809 mdp_vga_vectors[0].ib = 2000000000;
9810 mdp_vga_vectors[1].ab = 2000000000;
9811 mdp_vga_vectors[1].ib = 2000000000;
9812
9813 mdp_720p_vectors[0].ab = 2000000000;
9814 mdp_720p_vectors[0].ib = 2000000000;
9815 mdp_720p_vectors[1].ab = 2000000000;
9816 mdp_720p_vectors[1].ib = 2000000000;
9817
9818 mdp_1080p_vectors[0].ab = 2000000000;
9819 mdp_1080p_vectors[0].ib = 2000000000;
9820 mdp_1080p_vectors[1].ab = 2000000000;
9821 mdp_1080p_vectors[1].ib = 2000000000;
9822
9823 mdp_pdata.mdp_core_clk_rate = 200000000;
9824
9825 for (i = 0; i < ARRAY_SIZE(mdp_core_clk_rate_table); i++)
9826 mdp_core_clk_rate_table[i] = 200000000;
9827}
9828
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009829#if (defined(CONFIG_MARIMBA_CORE)) && \
9830 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9831
9832static const struct {
9833 char *name;
9834 int vmin;
9835 int vmax;
9836} bt_regs_info[] = {
9837 { "8058_s3", 1800000, 1800000 },
9838 { "8058_s2", 1300000, 1300000 },
9839 { "8058_l8", 2900000, 3050000 },
9840};
9841
9842static struct {
9843 bool enabled;
9844} bt_regs_status[] = {
9845 { false },
9846 { false },
9847 { false },
9848};
9849static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9850
9851static int bahama_bt(int on)
9852{
9853 int rc;
9854 int i;
9855 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9856
9857 struct bahama_variant_register {
9858 const size_t size;
9859 const struct bahama_config_register *set;
9860 };
9861
9862 const struct bahama_config_register *p;
9863
9864 u8 version;
9865
9866 const struct bahama_config_register v10_bt_on[] = {
9867 { 0xE9, 0x00, 0xFF },
9868 { 0xF4, 0x80, 0xFF },
9869 { 0xE4, 0x00, 0xFF },
9870 { 0xE5, 0x00, 0x0F },
9871#ifdef CONFIG_WLAN
9872 { 0xE6, 0x38, 0x7F },
9873 { 0xE7, 0x06, 0xFF },
9874#endif
9875 { 0xE9, 0x21, 0xFF },
9876 { 0x01, 0x0C, 0x1F },
9877 { 0x01, 0x08, 0x1F },
9878 };
9879
9880 const struct bahama_config_register v20_bt_on_fm_off[] = {
9881 { 0x11, 0x0C, 0xFF },
9882 { 0x13, 0x01, 0xFF },
9883 { 0xF4, 0x80, 0xFF },
9884 { 0xF0, 0x00, 0xFF },
9885 { 0xE9, 0x00, 0xFF },
9886#ifdef CONFIG_WLAN
9887 { 0x81, 0x00, 0x7F },
9888 { 0x82, 0x00, 0xFF },
9889 { 0xE6, 0x38, 0x7F },
9890 { 0xE7, 0x06, 0xFF },
9891#endif
9892 { 0xE9, 0x21, 0xFF },
9893 };
9894
9895 const struct bahama_config_register v20_bt_on_fm_on[] = {
9896 { 0x11, 0x0C, 0xFF },
9897 { 0x13, 0x01, 0xFF },
9898 { 0xF4, 0x86, 0xFF },
9899 { 0xF0, 0x06, 0xFF },
9900 { 0xE9, 0x00, 0xFF },
9901#ifdef CONFIG_WLAN
9902 { 0x81, 0x00, 0x7F },
9903 { 0x82, 0x00, 0xFF },
9904 { 0xE6, 0x38, 0x7F },
9905 { 0xE7, 0x06, 0xFF },
9906#endif
9907 { 0xE9, 0x21, 0xFF },
9908 };
9909
9910 const struct bahama_config_register v10_bt_off[] = {
9911 { 0xE9, 0x00, 0xFF },
9912 };
9913
9914 const struct bahama_config_register v20_bt_off_fm_off[] = {
9915 { 0xF4, 0x84, 0xFF },
9916 { 0xF0, 0x04, 0xFF },
9917 { 0xE9, 0x00, 0xFF }
9918 };
9919
9920 const struct bahama_config_register v20_bt_off_fm_on[] = {
9921 { 0xF4, 0x86, 0xFF },
9922 { 0xF0, 0x06, 0xFF },
9923 { 0xE9, 0x00, 0xFF }
9924 };
9925 const struct bahama_variant_register bt_bahama[2][3] = {
9926 {
9927 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9928 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9929 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9930 },
9931 {
9932 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9933 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9934 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9935 }
9936 };
9937
9938 u8 offset = 0; /* index into bahama configs */
9939
9940 on = on ? 1 : 0;
9941 version = read_bahama_ver();
9942
9943 if (version == VER_UNSUPPORTED) {
9944 dev_err(&msm_bt_power_device.dev,
9945 "%s: unsupported version\n",
9946 __func__);
9947 return -EIO;
9948 }
9949
9950 if (version == VER_2_0) {
9951 if (marimba_get_fm_status(&config))
9952 offset = 0x01;
9953 }
9954
9955 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9956 if (on && (version == VER_2_0)) {
9957 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9958 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9959 && (bt_regs_status[i].enabled == true)) {
9960 if (regulator_disable(bt_regs[i])) {
9961 dev_err(&msm_bt_power_device.dev,
9962 "%s: regulator disable failed",
9963 __func__);
9964 }
9965 bt_regs_status[i].enabled = false;
9966 break;
9967 }
9968 }
9969 }
9970
9971 p = bt_bahama[on][version + offset].set;
9972
9973 dev_info(&msm_bt_power_device.dev,
9974 "%s: found version %d\n", __func__, version);
9975
9976 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9977 u8 value = (p+i)->value;
9978 rc = marimba_write_bit_mask(&config,
9979 (p+i)->reg,
9980 &value,
9981 sizeof((p+i)->value),
9982 (p+i)->mask);
9983 if (rc < 0) {
9984 dev_err(&msm_bt_power_device.dev,
9985 "%s: reg %d write failed: %d\n",
9986 __func__, (p+i)->reg, rc);
9987 return rc;
9988 }
9989 dev_dbg(&msm_bt_power_device.dev,
9990 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9991 __func__, (p+i)->reg,
9992 value, (p+i)->mask);
9993 }
9994 /* Update BT Status */
9995 if (on)
9996 marimba_set_bt_status(&config, true);
9997 else
9998 marimba_set_bt_status(&config, false);
9999
10000 return 0;
10001}
10002
10003static int bluetooth_use_regulators(int on)
10004{
10005 int i, recover = -1, rc = 0;
10006
10007 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
10008 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
10009 bt_regs_info[i].name) :
10010 (regulator_put(bt_regs[i]), NULL);
10011 if (IS_ERR(bt_regs[i])) {
10012 rc = PTR_ERR(bt_regs[i]);
10013 dev_err(&msm_bt_power_device.dev,
10014 "regulator %s get failed (%d)\n",
10015 bt_regs_info[i].name, rc);
10016 recover = i - 1;
10017 bt_regs[i] = NULL;
10018 break;
10019 }
10020
10021 if (!on)
10022 continue;
10023
10024 rc = regulator_set_voltage(bt_regs[i],
10025 bt_regs_info[i].vmin,
10026 bt_regs_info[i].vmax);
10027 if (rc < 0) {
10028 dev_err(&msm_bt_power_device.dev,
10029 "regulator %s voltage set (%d)\n",
10030 bt_regs_info[i].name, rc);
10031 recover = i;
10032 break;
10033 }
10034 }
10035
10036 if (on && (recover > -1))
10037 for (i = recover; i >= 0; i--) {
10038 regulator_put(bt_regs[i]);
10039 bt_regs[i] = NULL;
10040 }
10041
10042 return rc;
10043}
10044
10045static int bluetooth_switch_regulators(int on)
10046{
10047 int i, rc = 0;
10048
10049 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
10050 if (on && (bt_regs_status[i].enabled == false)) {
10051 rc = regulator_enable(bt_regs[i]);
10052 if (rc < 0) {
10053 dev_err(&msm_bt_power_device.dev,
10054 "regulator %s %s failed (%d)\n",
10055 bt_regs_info[i].name,
10056 "enable", rc);
10057 if (i > 0) {
10058 while (--i) {
10059 regulator_disable(bt_regs[i]);
10060 bt_regs_status[i].enabled
10061 = false;
10062 }
10063 break;
10064 }
10065 }
10066 bt_regs_status[i].enabled = true;
10067 } else if (!on && (bt_regs_status[i].enabled == true)) {
10068 rc = regulator_disable(bt_regs[i]);
10069 if (rc < 0) {
10070 dev_err(&msm_bt_power_device.dev,
10071 "regulator %s %s failed (%d)\n",
10072 bt_regs_info[i].name,
10073 "disable", rc);
10074 break;
10075 }
10076 bt_regs_status[i].enabled = false;
10077 }
10078 }
10079 return rc;
10080}
10081
10082static struct msm_xo_voter *bt_clock;
10083
10084static int bluetooth_power(int on)
10085{
10086 int rc = 0;
10087 int id;
10088
10089 /* In case probe function fails, cur_connv_type would be -1 */
10090 id = adie_get_detected_connectivity_type();
10091 if (id != BAHAMA_ID) {
10092 pr_err("%s: unexpected adie connectivity type: %d\n",
10093 __func__, id);
10094 return -ENODEV;
10095 }
10096
10097 if (on) {
10098
10099 rc = bluetooth_use_regulators(1);
10100 if (rc < 0)
10101 goto out;
10102
10103 rc = bluetooth_switch_regulators(1);
10104
10105 if (rc < 0)
10106 goto fail_put;
10107
10108 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
10109
10110 if (IS_ERR(bt_clock)) {
10111 pr_err("Couldn't get TCXO_D0 voter\n");
10112 goto fail_switch;
10113 }
10114
10115 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
10116
10117 if (rc < 0) {
10118 pr_err("Failed to vote for TCXO_DO ON\n");
10119 goto fail_vote;
10120 }
10121
10122 rc = bahama_bt(1);
10123
10124 if (rc < 0)
10125 goto fail_clock;
10126
10127 msleep(10);
10128
10129 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
10130
10131 if (rc < 0) {
10132 pr_err("Failed to vote for TCXO_DO pin control\n");
10133 goto fail_vote;
10134 }
10135 } else {
10136 /* check for initial RFKILL block (power off) */
10137 /* some RFKILL versions/configurations rfkill_register */
10138 /* calls here for an initial set_block */
10139 /* avoid calling i2c and regulator before unblock (on) */
10140 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
10141 dev_info(&msm_bt_power_device.dev,
10142 "%s: initialized OFF/blocked\n", __func__);
10143 goto out;
10144 }
10145
10146 bahama_bt(0);
10147
10148fail_clock:
10149 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
10150fail_vote:
10151 msm_xo_put(bt_clock);
10152fail_switch:
10153 bluetooth_switch_regulators(0);
10154fail_put:
10155 bluetooth_use_regulators(0);
10156 }
10157
10158out:
10159 if (rc < 0)
10160 on = 0;
10161 dev_info(&msm_bt_power_device.dev,
10162 "Bluetooth power switch: state %d result %d\n", on, rc);
10163
10164 return rc;
10165}
10166
10167#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
10168
10169static void __init msm8x60_cfg_smsc911x(void)
10170{
10171 smsc911x_resources[1].start =
10172 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10173 smsc911x_resources[1].end =
10174 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10175}
10176
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010177void msm_fusion_setup_pinctrl(void)
10178{
10179 struct msm_xo_voter *a1;
10180
10181 if (socinfo_get_platform_subtype() == 0x3) {
10182 /*
10183 * Vote for the A1 clock to be in pin control mode before
10184 * the external images are loaded.
10185 */
10186 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
10187 BUG_ON(!a1);
10188 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
10189 }
10190}
10191
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010192struct msm_board_data {
10193 struct msm_gpiomux_configs *gpiomux_cfgs;
10194};
10195
10196static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
10197 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10198};
10199
10200static struct msm_board_data msm8x60_sim_board_data __initdata = {
10201 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10202};
10203
10204static struct msm_board_data msm8x60_surf_board_data __initdata = {
10205 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10206};
10207
10208static struct msm_board_data msm8x60_ffa_board_data __initdata = {
10209 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10210};
10211
10212static struct msm_board_data msm8x60_fluid_board_data __initdata = {
10213 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
10214};
10215
10216static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
10217 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10218};
10219
10220static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
10221 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10222};
10223
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010224static struct msm_board_data msm8x60_dragon_board_data __initdata = {
10225 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
10226};
10227
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010228static void __init msm8x60_init(struct msm_board_data *board_data)
10229{
10230 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010231#ifdef CONFIG_USB_EHCI_MSM_72K
10232 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
10233 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
10234 .level = PM8901_MPP_DIG_LEVEL_L5,
10235 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
10236 };
10237#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010238 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070010239
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010240 /*
10241 * Initialize RPM first as other drivers and devices may need
10242 * it for their initialization.
10243 */
Praveen Chidambaram78499012011-11-01 17:15:17 -060010244 BUG_ON(msm_rpm_init(&msm8660_rpm_data));
10245 BUG_ON(msm_rpmrs_levels_init(&msm_rpmrs_data));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010246 if (msm_xo_init())
10247 pr_err("Failed to initialize XO votes\n");
10248
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010249 msm8x60_check_2d_hardware();
10250
10251 /* Change SPM handling of core 1 if PMM 8160 is present. */
10252 soc_platform_version = socinfo_get_platform_version();
10253 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
10254 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
10255 struct msm_spm_platform_data *spm_data;
10256
10257 spm_data = &msm_spm_data_v1[1];
10258 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10259 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10260
10261 spm_data = &msm_spm_data[1];
10262 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10263 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10264 }
10265
10266 /*
10267 * Initialize SPM before acpuclock as the latter calls into SPM
10268 * driver to set ACPU voltages.
10269 */
10270 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10271 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
10272 else
10273 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
10274
10275 /*
10276 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10277 * devices so that the RPM doesn't drop into a low power mode that an
10278 * un-reworked SURF cannot resume from.
10279 */
10280 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010281 int i;
10282
10283 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10284 if (rpm_regulator_init_data[i].id
10285 == RPM_VREG_ID_PM8901_L4
10286 || rpm_regulator_init_data[i].id
10287 == RPM_VREG_ID_PM8901_L6)
10288 rpm_regulator_init_data[i]
10289 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010290 }
10291
10292 /*
10293 * Disable regulator info printing so that regulator registration
10294 * messages do not enter the kmsg log.
10295 */
10296 regulator_suppress_info_printing();
10297
10298 /* Initialize regulators needed for clock_init. */
10299 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10300
Stephen Boydbb600ae2011-08-02 20:11:40 -070010301 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010302
10303 /* Buses need to be initialized before early-device registration
10304 * to get the platform data for fabrics.
10305 */
10306 msm8x60_init_buses();
10307 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10308 /* CPU frequency control is not supported on simulated targets. */
10309 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010310 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010311
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010312 /*
10313 * Enable EBI2 only for boards which make use of it. Leave
10314 * it disabled for all others for additional power savings.
10315 */
10316 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10317 machine_is_msm8x60_rumi3() ||
10318 machine_is_msm8x60_sim() ||
10319 machine_is_msm8x60_fluid() ||
10320 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010321 msm8x60_init_ebi2();
10322 msm8x60_init_tlmm();
10323 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10324 msm8x60_init_uart12dm();
10325 msm8x60_init_mmc();
10326
10327#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10328 msm8x60_init_pm8058_othc();
10329#endif
10330
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010331 if (machine_is_msm8x60_fluid())
10332 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10333 else if (machine_is_msm8x60_dragon())
10334 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10335 else
10336 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010337
Jilai Wang53d27a82011-07-13 14:32:58 -040010338 /* Specify reset pin for OV9726 */
10339 if (machine_is_msm8x60_dragon()) {
10340 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10341 ov9726_sensor_8660_info.mount_angle = 270;
10342 }
10343
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010344#ifdef CONFIG_BATTERY_MSM8X60
10345 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10346 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10347 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10348 platform_device_register(&msm_charger_device);
10349#endif
10350
10351 if (machine_is_msm8x60_dragon())
10352 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10353 if (!machine_is_msm8x60_fluid())
10354 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10355
10356 /* configure pmic leds */
10357 if (machine_is_msm8x60_fluid())
10358 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10359 else if (machine_is_msm8x60_dragon())
10360 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10361 else
10362 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10363
10364 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10365 machine_is_msm8x60_dragon()) {
10366 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10367 }
10368
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010369 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10370 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010371 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010372 msm8x60_cfg_smsc911x();
10373 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10374 platform_add_devices(msm_footswitch_devices,
10375 msm_num_footswitch_devices);
10376 platform_add_devices(surf_devices,
10377 ARRAY_SIZE(surf_devices));
10378
10379#ifdef CONFIG_MSM_DSPS
10380 if (machine_is_msm8x60_fluid()) {
10381 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10382 msm8x60_init_dsps();
10383 }
10384#endif
10385
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010386 pm8901_vreg_mpp0_init();
10387
10388 platform_device_register(&msm8x60_8901_mpp_vreg);
10389
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010390#ifdef CONFIG_USB_EHCI_MSM_72K
10391 /*
10392 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10393 * fluid
10394 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010395 if (machine_is_msm8x60_fluid())
10396 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10397 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010398#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010399
10400#ifdef CONFIG_SND_SOC_MSM8660_APQ
10401 if (machine_is_msm8x60_dragon())
10402 platform_add_devices(dragon_alsa_devices,
10403 ARRAY_SIZE(dragon_alsa_devices));
10404 else
10405#endif
10406 platform_add_devices(asoc_devices,
10407 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010408 } else {
10409 msm8x60_configure_smc91x();
10410 platform_add_devices(rumi_sim_devices,
10411 ARRAY_SIZE(rumi_sim_devices));
10412 }
10413#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010414 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10415 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010416 msm8x60_cfg_isp1763();
10417#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010418
10419 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10420 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10421
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010422
10423#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10424 if (machine_is_msm8x60_fluid())
10425 platform_device_register(&msm_gsbi10_qup_spi_device);
10426 else
10427 platform_device_register(&msm_gsbi1_qup_spi_device);
10428#endif
10429
10430#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10431 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10432 if (machine_is_msm8x60_fluid())
10433 cyttsp_set_params();
10434#endif
10435 if (!machine_is_msm8x60_sim())
10436 msm_fb_add_devices();
10437 fixup_i2c_configs();
10438 register_i2c_devices();
10439
Terence Hampson1c73fef2011-07-19 17:10:49 -040010440 if (machine_is_msm8x60_dragon())
10441 smsc911x_config.reset_gpio
10442 = GPIO_ETHERNET_RESET_N_DRAGON;
10443
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010444 platform_device_register(&smsc911x_device);
10445
10446#if (defined(CONFIG_SPI_QUP)) && \
10447 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010448 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10449 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010450
10451 if (machine_is_msm8x60_fluid()) {
10452#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10453 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10454 spi_register_board_info(lcdc_samsung_spi_board_info,
10455 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10456 } else
10457#endif
10458 {
10459#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10460 spi_register_board_info(lcdc_auo_spi_board_info,
10461 ARRAY_SIZE(lcdc_auo_spi_board_info));
10462#endif
10463 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010464#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10465 } else if (machine_is_msm8x60_dragon()) {
10466 spi_register_board_info(lcdc_nt35582_spi_board_info,
10467 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10468#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010469 }
10470#endif
10471
10472 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10473 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10474 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10475 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010476 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010477
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010478 pm8058_gpios_init();
10479
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010480#ifdef CONFIG_SENSORS_MSM_ADC
10481 if (machine_is_msm8x60_fluid()) {
10482 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10483 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10484 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10485 msm_adc_pdata.gpio_config = APROC_CONFIG;
10486 else
10487 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10488 }
10489 msm_adc_pdata.target_hw = MSM_8x60;
10490#endif
10491#ifdef CONFIG_MSM8X60_AUDIO
10492 msm_snddev_init();
10493#endif
10494#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10495 if (machine_is_msm8x60_fluid())
10496 platform_device_register(&fluid_leds_gpio);
10497 else
10498 platform_device_register(&gpio_leds);
10499#endif
10500
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010501 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010502
10503 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10504 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010505}
10506
10507static void __init msm8x60_rumi3_init(void)
10508{
10509 msm8x60_init(&msm8x60_rumi3_board_data);
10510}
10511
10512static void __init msm8x60_sim_init(void)
10513{
10514 msm8x60_init(&msm8x60_sim_board_data);
10515}
10516
10517static void __init msm8x60_surf_init(void)
10518{
10519 msm8x60_init(&msm8x60_surf_board_data);
10520}
10521
10522static void __init msm8x60_ffa_init(void)
10523{
10524 msm8x60_init(&msm8x60_ffa_board_data);
10525}
10526
10527static void __init msm8x60_fluid_init(void)
10528{
10529 msm8x60_init(&msm8x60_fluid_board_data);
10530}
10531
10532static void __init msm8x60_charm_surf_init(void)
10533{
10534 msm8x60_init(&msm8x60_charm_surf_board_data);
10535}
10536
10537static void __init msm8x60_charm_ffa_init(void)
10538{
10539 msm8x60_init(&msm8x60_charm_ffa_board_data);
10540}
10541
10542static void __init msm8x60_charm_init_early(void)
10543{
10544 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010545}
10546
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010547static void __init msm8x60_dragon_init(void)
10548{
10549 msm8x60_init(&msm8x60_dragon_board_data);
10550}
10551
Steve Mucklea55df6e2010-01-07 12:43:24 -080010552MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10553 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010554 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010555 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010556 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010557 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010558 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010559 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010560MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010561
10562MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10563 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010564 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010565 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010566 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010567 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010568 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010569 .init_early = msm8x60_charm_init_early,
10570MACHINE_END
10571
10572MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10573 .map_io = msm8x60_map_io,
10574 .reserve = msm8x60_reserve,
10575 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010576 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010577 .init_machine = msm8x60_surf_init,
10578 .timer = &msm_timer,
10579 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010580MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010581
10582MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10583 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010584 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010585 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010586 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010587 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010588 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010589 .init_early = msm8x60_charm_init_early,
10590MACHINE_END
10591
10592MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10593 .map_io = msm8x60_map_io,
10594 .reserve = msm8x60_reserve,
10595 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010596 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010597 .init_machine = msm8x60_fluid_init,
10598 .timer = &msm_timer,
10599 .init_early = msm8x60_charm_init_early,
10600MACHINE_END
10601
10602MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10603 .map_io = msm8x60_map_io,
10604 .reserve = msm8x60_reserve,
10605 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010606 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010607 .init_machine = msm8x60_charm_surf_init,
10608 .timer = &msm_timer,
10609 .init_early = msm8x60_charm_init_early,
10610MACHINE_END
10611
10612MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10613 .map_io = msm8x60_map_io,
10614 .reserve = msm8x60_reserve,
10615 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010616 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010617 .init_machine = msm8x60_charm_ffa_init,
10618 .timer = &msm_timer,
10619 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010620MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010621
10622MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10623 .map_io = msm8x60_map_io,
10624 .reserve = msm8x60_reserve,
10625 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010626 .handle_irq = gic_handle_irq,
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010627 .init_machine = msm8x60_dragon_init,
10628 .timer = &msm_timer,
10629 .init_early = msm8x60_charm_init_early,
10630MACHINE_END