Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2011, Code Aurora Forum. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #ifndef __PM8XXX_MPP_H |
| 14 | #define __PM8XXX_MPP_H |
| 15 | |
| 16 | #include <linux/errno.h> |
| 17 | |
| 18 | #define PM8XXX_MPP_DEV_NAME "pm8xxx-mpp" |
| 19 | |
| 20 | struct pm8xxx_mpp_core_data { |
| 21 | int base_addr; |
| 22 | int nmpps; |
| 23 | }; |
| 24 | |
| 25 | struct pm8xxx_mpp_platform_data { |
| 26 | struct pm8xxx_mpp_core_data core_data; |
| 27 | int mpp_base; |
| 28 | }; |
| 29 | |
| 30 | /** |
| 31 | * struct pm8xxx_mpp_config_data - structure to specify mpp configuration values |
| 32 | * @type: MPP type which determines the overall MPP function (i.e. digital |
| 33 | * in/out/bi, analog in/out, current sink, or test). It should be |
| 34 | * set to the value of one of PM8XXX_MPP_TYPE_D_*. |
| 35 | * @level: meaning depends upon MPP type specified |
| 36 | * @control: meaning depends upon MPP type specified |
| 37 | * |
| 38 | * Usage of level argument: |
| 39 | * 1. type = PM8XXX_MPP_TYPE_D_INPUT, PM8XXX_MPP_TYPE_D_OUTPUT, |
| 40 | * PM8XXX_MPP_TYPE_D_BI_DIR, or PM8XXX_MPP_TYPE_DTEST_OUTPUT - |
| 41 | * |
| 42 | * level specifies that digital logic level to use for the MPP. It should |
| 43 | * be set to the value of one of PM8XXX_MPP_DIG_LEVEL_*. Actual regulator |
| 44 | * connections for these level choices are PMIC chip specific. |
| 45 | * |
| 46 | * 2. type = PM8XXX_MPP_TYPE_A_INPUT - |
| 47 | * |
| 48 | * level specifies where in the PMIC chip the analog input value should |
| 49 | * be routed to. It should be set to the value of one of |
| 50 | * PM8XXX_MPP_AIN_AMUX_*. |
| 51 | * |
| 52 | * 3. type = PM8XXX_MPP_TYPE_A_OUTPUT - |
| 53 | * |
| 54 | * level specifies the output analog voltage reference level. It should |
| 55 | * be set to the value of one of PM8XXX_MPP_AOUT_LVL_*. |
| 56 | * |
| 57 | * 4. type = PM8XXX_MPP_TYPE_SINK or PM8XXX_MPP_TYPE_DTEST_SINK - |
| 58 | * |
| 59 | * level specifies the output current level. It should be set to the value |
| 60 | * of one of PM8XXX_MPP_CS_OUT_*. |
| 61 | * |
| 62 | * Usage of control argument: |
| 63 | * 1. type = PM8XXX_MPP_TYPE_D_INPUT - |
| 64 | * |
| 65 | * control specifies how the digital input should be routed in the chip. |
| 66 | * It should be set to the value of one of PM8XXX_MPP_DIN_TO_*. |
| 67 | * |
| 68 | * 2. type = PM8XXX_MPP_TYPE_D_OUTPUT - |
| 69 | * |
| 70 | * control specifies the digital output value. It should be set to the |
| 71 | * value of one of PM8XXX_MPP_DOUT_CTRL_*. |
| 72 | * |
| 73 | * 3. type = PM8XXX_MPP_TYPE_D_BI_DIR - |
| 74 | * |
| 75 | * control specifies the pullup resistor value. It should be set to the |
| 76 | * value of one of PM8XXX_MPP_BI_PULLUP_*. |
| 77 | * |
| 78 | * 4. type = PM8XXX_MPP_TYPE_A_INPUT - |
| 79 | * |
| 80 | * control is unused; a value of 0 is sufficient. |
| 81 | * |
| 82 | * 5. type = PM8XXX_MPP_TYPE_A_OUTPUT - |
| 83 | * |
| 84 | * control specifies if analog output is enabled. It should be set to the |
| 85 | * value of one of PM8XXX_MPP_AOUT_CTRL_*. |
| 86 | * |
| 87 | * 6. type = PM8XXX_MPP_TYPE_SINK - |
| 88 | * |
| 89 | * control specifies if current sinking is enabled. It should be set to |
| 90 | * the value of one of PM8XXX_MPP_CS_CTRL_*. |
| 91 | * |
| 92 | * 7. type = PM8XXX_MPP_TYPE_DTEST_SINK - |
| 93 | * |
| 94 | * control specifies if current sinking is enabled. It should be set to |
| 95 | * the value of one of PM8XXX_MPP_DTEST_CS_CTRL_*. |
| 96 | * |
| 97 | * 8. type = PM8XXX_MPP_TYPE_DTEST_OUTPUT - |
| 98 | * |
| 99 | * control specifies which DTEST bus value to output. It should be set to |
| 100 | * the value of one of PM8XXX_MPP_DTEST_*. |
| 101 | */ |
| 102 | struct pm8xxx_mpp_config_data { |
| 103 | unsigned type; |
| 104 | unsigned level; |
| 105 | unsigned control; |
| 106 | }; |
| 107 | |
| 108 | /* API */ |
| 109 | #if defined(CONFIG_GPIO_PM8XXX_MPP) || defined(CONFIG_GPIO_PM8XXX_MPP_MODULE) |
| 110 | |
| 111 | /** |
| 112 | * pm8xxx_mpp_config() - configure control options of a multi-purpose pin (MPP) |
| 113 | * @mpp: global GPIO number corresponding to the MPP |
| 114 | * @config: configuration to set for this MPP |
| 115 | * Context: can sleep |
| 116 | * |
| 117 | * RETURNS: an appropriate -ERRNO error value on error, or zero for success. |
| 118 | */ |
| 119 | int pm8xxx_mpp_config(unsigned mpp, struct pm8xxx_mpp_config_data *config); |
| 120 | |
| 121 | #else |
| 122 | |
| 123 | static inline int pm8xxx_mpp_config(unsigned mpp, |
| 124 | struct pm8xxx_mpp_config_data *config) |
| 125 | { |
| 126 | return -ENXIO; |
| 127 | } |
| 128 | |
| 129 | #endif |
| 130 | |
| 131 | /* MPP Type: type */ |
| 132 | #define PM8XXX_MPP_TYPE_D_INPUT 0 |
| 133 | #define PM8XXX_MPP_TYPE_D_OUTPUT 1 |
| 134 | #define PM8XXX_MPP_TYPE_D_BI_DIR 2 |
| 135 | #define PM8XXX_MPP_TYPE_A_INPUT 3 |
| 136 | #define PM8XXX_MPP_TYPE_A_OUTPUT 4 |
| 137 | #define PM8XXX_MPP_TYPE_SINK 5 |
| 138 | #define PM8XXX_MPP_TYPE_DTEST_SINK 6 |
| 139 | #define PM8XXX_MPP_TYPE_DTEST_OUTPUT 7 |
| 140 | |
| 141 | /* Digital Input/Output: level */ |
| 142 | #define PM8XXX_MPP_DIG_LEVEL_VIO_0 0 |
| 143 | #define PM8XXX_MPP_DIG_LEVEL_VIO_1 1 |
| 144 | #define PM8XXX_MPP_DIG_LEVEL_VIO_2 2 |
| 145 | #define PM8XXX_MPP_DIG_LEVEL_VIO_3 3 |
| 146 | #define PM8XXX_MPP_DIG_LEVEL_VIO_4 4 |
| 147 | #define PM8XXX_MPP_DIG_LEVEL_VIO_5 5 |
| 148 | #define PM8XXX_MPP_DIG_LEVEL_VIO_6 6 |
| 149 | #define PM8XXX_MPP_DIG_LEVEL_VIO_7 7 |
| 150 | |
| 151 | /* Digital Input/Output: level [PM8058] */ |
| 152 | #define PM8058_MPP_DIG_LEVEL_VPH 0 |
| 153 | #define PM8058_MPP_DIG_LEVEL_S3 1 |
| 154 | #define PM8058_MPP_DIG_LEVEL_L2 2 |
| 155 | #define PM8058_MPP_DIG_LEVEL_L3 3 |
| 156 | |
| 157 | /* Digital Input/Output: level [PM8901] */ |
| 158 | #define PM8901_MPP_DIG_LEVEL_MSMIO 0 |
| 159 | #define PM8901_MPP_DIG_LEVEL_DIG 1 |
| 160 | #define PM8901_MPP_DIG_LEVEL_L5 2 |
| 161 | #define PM8901_MPP_DIG_LEVEL_S4 3 |
| 162 | #define PM8901_MPP_DIG_LEVEL_VPH 4 |
| 163 | |
| 164 | /* Digital Input/Output: level [PM8921] */ |
| 165 | #define PM8921_MPP_DIG_LEVEL_S4 1 |
| 166 | #define PM8921_MPP_DIG_LEVEL_L15 3 |
| 167 | #define PM8921_MPP_DIG_LEVEL_L17 4 |
| 168 | #define PM8921_MPP_DIG_LEVEL_VPH 7 |
| 169 | |
Jay Chokshi | 24fc9b6 | 2011-07-18 10:51:05 -0700 | [diff] [blame] | 170 | /* Digital Input/Output: level [PM8821] */ |
| 171 | #define PM8821_MPP_DIG_LEVEL_1P8 1 |
| 172 | #define PM8821_MPP_DIG_LEVEL_VPH 7 |
| 173 | |
David Collins | fdefdf9 | 2011-09-08 14:18:59 -0700 | [diff] [blame] | 174 | /* Digital Input/Output: level [PM8018] */ |
| 175 | #define PM8018_MPP_DIG_LEVEL_L4 0 |
| 176 | #define PM8018_MPP_DIG_LEVEL_L14 1 |
| 177 | #define PM8018_MPP_DIG_LEVEL_S3 2 |
| 178 | #define PM8018_MPP_DIG_LEVEL_L6 3 |
| 179 | #define PM8018_MPP_DIG_LEVEL_L2 4 |
| 180 | #define PM8018_MPP_DIG_LEVEL_L5 5 |
| 181 | #define PM8018_MPP_DIG_LEVEL_VPH 7 |
| 182 | |
Jay Chokshi | 9d36a3d | 2011-10-26 15:57:51 -0700 | [diff] [blame] | 183 | /* Digital Input/Output: level [PM8038] */ |
| 184 | #define PM8038_MPP_DIG_LEVEL_L20 0 |
| 185 | #define PM8038_MPP_DIG_LEVEL_L11 1 |
| 186 | #define PM8038_MPP_DIG_LEVEL_L5 2 |
| 187 | #define PM8038_MPP_DIG_LEVEL_L15 3 |
| 188 | #define PM8038_MPP_DIG_LEVEL_L17 4 |
| 189 | #define PM8038_MPP_DIG_LEVEL_VPH 7 |
| 190 | |
Bryan Huntsman | 3f2bc4d | 2011-08-16 17:27:22 -0700 | [diff] [blame] | 191 | /* Digital Input: control */ |
| 192 | #define PM8XXX_MPP_DIN_TO_INT 0 |
| 193 | #define PM8XXX_MPP_DIN_TO_DBUS1 1 |
| 194 | #define PM8XXX_MPP_DIN_TO_DBUS2 2 |
| 195 | #define PM8XXX_MPP_DIN_TO_DBUS3 3 |
| 196 | |
| 197 | /* Digital Output: control */ |
| 198 | #define PM8XXX_MPP_DOUT_CTRL_LOW 0 |
| 199 | #define PM8XXX_MPP_DOUT_CTRL_HIGH 1 |
| 200 | #define PM8XXX_MPP_DOUT_CTRL_MPP 2 |
| 201 | #define PM8XXX_MPP_DOUT_CTRL_INV_MPP 3 |
| 202 | |
| 203 | /* Bidirectional: control */ |
| 204 | #define PM8XXX_MPP_BI_PULLUP_1KOHM 0 |
| 205 | #define PM8XXX_MPP_BI_PULLUP_OPEN 1 |
| 206 | #define PM8XXX_MPP_BI_PULLUP_10KOHM 2 |
| 207 | #define PM8XXX_MPP_BI_PULLUP_30KOHM 3 |
| 208 | |
| 209 | /* Analog Input: level */ |
| 210 | #define PM8XXX_MPP_AIN_AMUX_CH5 0 |
| 211 | #define PM8XXX_MPP_AIN_AMUX_CH6 1 |
| 212 | #define PM8XXX_MPP_AIN_AMUX_CH7 2 |
| 213 | #define PM8XXX_MPP_AIN_AMUX_CH8 3 |
| 214 | #define PM8XXX_MPP_AIN_AMUX_CH9 4 |
| 215 | #define PM8XXX_MPP_AIN_AMUX_ABUS1 5 |
| 216 | #define PM8XXX_MPP_AIN_AMUX_ABUS2 6 |
| 217 | #define PM8XXX_MPP_AIN_AMUX_ABUS3 7 |
| 218 | |
| 219 | /* Analog Output: level */ |
| 220 | #define PM8XXX_MPP_AOUT_LVL_1V25 0 |
| 221 | #define PM8XXX_MPP_AOUT_LVL_1V25_2 1 |
| 222 | #define PM8XXX_MPP_AOUT_LVL_0V625 2 |
| 223 | #define PM8XXX_MPP_AOUT_LVL_0V3125 3 |
| 224 | #define PM8XXX_MPP_AOUT_LVL_MPP 4 |
| 225 | #define PM8XXX_MPP_AOUT_LVL_ABUS1 5 |
| 226 | #define PM8XXX_MPP_AOUT_LVL_ABUS2 6 |
| 227 | #define PM8XXX_MPP_AOUT_LVL_ABUS3 7 |
| 228 | |
| 229 | /* Analog Output: control */ |
| 230 | #define PM8XXX_MPP_AOUT_CTRL_DISABLE 0 |
| 231 | #define PM8XXX_MPP_AOUT_CTRL_ENABLE 1 |
| 232 | #define PM8XXX_MPP_AOUT_CTRL_MPP_HIGH_EN 2 |
| 233 | #define PM8XXX_MPP_AOUT_CTRL_MPP_LOW_EN 3 |
| 234 | |
| 235 | /* Current Sink: level */ |
| 236 | #define PM8XXX_MPP_CS_OUT_5MA 0 |
| 237 | #define PM8XXX_MPP_CS_OUT_10MA 1 |
| 238 | #define PM8XXX_MPP_CS_OUT_15MA 2 |
| 239 | #define PM8XXX_MPP_CS_OUT_20MA 3 |
| 240 | #define PM8XXX_MPP_CS_OUT_25MA 4 |
| 241 | #define PM8XXX_MPP_CS_OUT_30MA 5 |
| 242 | #define PM8XXX_MPP_CS_OUT_35MA 6 |
| 243 | #define PM8XXX_MPP_CS_OUT_40MA 7 |
| 244 | |
| 245 | /* Current Sink: control */ |
| 246 | #define PM8XXX_MPP_CS_CTRL_DISABLE 0 |
| 247 | #define PM8XXX_MPP_CS_CTRL_ENABLE 1 |
| 248 | #define PM8XXX_MPP_CS_CTRL_MPP_HIGH_EN 2 |
| 249 | #define PM8XXX_MPP_CS_CTRL_MPP_LOW_EN 3 |
| 250 | |
| 251 | /* DTEST Current Sink: control */ |
| 252 | #define PM8XXX_MPP_DTEST_CS_CTRL_EN1 0 |
| 253 | #define PM8XXX_MPP_DTEST_CS_CTRL_EN2 1 |
| 254 | #define PM8XXX_MPP_DTEST_CS_CTRL_EN3 2 |
| 255 | #define PM8XXX_MPP_DTEST_CS_CTRL_EN4 3 |
| 256 | |
| 257 | /* DTEST Digital Output: control */ |
| 258 | #define PM8XXX_MPP_DTEST_DBUS1 0 |
| 259 | #define PM8XXX_MPP_DTEST_DBUS2 1 |
| 260 | #define PM8XXX_MPP_DTEST_DBUS3 2 |
| 261 | #define PM8XXX_MPP_DTEST_DBUS4 3 |
| 262 | |
| 263 | #endif |