blob: a73c71664918e3cedba9768fef993f07560e0b72 [file] [log] [blame]
Chris Zankel173d6682006-12-10 02:18:48 -08001/*
2 * Xtensa processor core configuration information.
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 * Copyright (C) 1999-2006 Tensilica Inc.
9 */
10
11#ifndef XTENSA_TIE_H
12#define XTENSA_TIE_H
13
14/*----------------------------------------------------------------------
15 COPROCESSORS and EXTRA STATE
16 ----------------------------------------------------------------------*/
17
18#define XCHAL_CP_NUM 0 /* number of coprocessors */
19#define XCHAL_CP_MASK 0x00
20
21#endif /*XTENSA_CONFIG_TIE_H*/
22