| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 1 | /* | 
| David Hardeman | abda5c8 | 2005-09-01 22:34:53 +0200 | [diff] [blame] | 2 |  *	i6300esb:	Watchdog timer driver for Intel 6300ESB chipset | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 3 |  * | 
 | 4 |  *	(c) Copyright 2004 Google Inc. | 
| David Hardeman | abda5c8 | 2005-09-01 22:34:53 +0200 | [diff] [blame] | 5 |  *	(c) Copyright 2005 David Härdeman <david@2gen.com> | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 6 |  * | 
 | 7 |  *	This program is free software; you can redistribute it and/or | 
 | 8 |  *	modify it under the terms of the GNU General Public License | 
 | 9 |  *	as published by the Free Software Foundation; either version | 
 | 10 |  *	2 of the License, or (at your option) any later version. | 
 | 11 |  * | 
| David Hardeman | abda5c8 | 2005-09-01 22:34:53 +0200 | [diff] [blame] | 12 |  *      based on i810-tco.c which is in turn based on softdog.c | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 13 |  * | 
 | 14 |  * 	The timer is implemented in the following I/O controller hubs: | 
 | 15 |  * 	(See the intel documentation on http://developer.intel.com.) | 
 | 16 |  * 	6300ESB chip : document number 300641-003 | 
 | 17 |  * | 
 | 18 |  *  2004YYZZ Ross Biro | 
 | 19 |  *	Initial version 0.01 | 
 | 20 |  *  2004YYZZ Ross Biro | 
 | 21 |  *  	Version 0.02 | 
 | 22 |  *  20050210 David Härdeman <david@2gen.com> | 
 | 23 |  *      Ported driver to kernel 2.6 | 
 | 24 |  */ | 
 | 25 |  | 
 | 26 | /* | 
 | 27 |  *      Includes, defines, variables, module parameters, ... | 
 | 28 |  */ | 
 | 29 |  | 
 | 30 | #include <linux/module.h> | 
 | 31 | #include <linux/types.h> | 
 | 32 | #include <linux/kernel.h> | 
 | 33 | #include <linux/fs.h> | 
 | 34 | #include <linux/mm.h> | 
 | 35 | #include <linux/miscdevice.h> | 
 | 36 | #include <linux/watchdog.h> | 
 | 37 | #include <linux/reboot.h> | 
 | 38 | #include <linux/init.h> | 
 | 39 | #include <linux/pci.h> | 
 | 40 | #include <linux/ioport.h> | 
 | 41 |  | 
 | 42 | #include <asm/uaccess.h> | 
 | 43 | #include <asm/io.h> | 
 | 44 |  | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 45 | /* Module and version information */ | 
 | 46 | #define ESB_VERSION "0.03" | 
 | 47 | #define ESB_MODULE_NAME "i6300ESB timer" | 
 | 48 | #define ESB_DRIVER_NAME ESB_MODULE_NAME ", v" ESB_VERSION | 
 | 49 | #define PFX ESB_MODULE_NAME ": " | 
 | 50 |  | 
| David Hardeman | abda5c8 | 2005-09-01 22:34:53 +0200 | [diff] [blame] | 51 | /* PCI configuration registers */ | 
 | 52 | #define ESB_CONFIG_REG  0x60            /* Config register                   */ | 
 | 53 | #define ESB_LOCK_REG    0x68            /* WDT lock register                 */ | 
 | 54 |  | 
 | 55 | /* Memory mapped registers */ | 
 | 56 | #define ESB_TIMER1_REG  BASEADDR + 0x00 /* Timer1 value after each reset     */ | 
 | 57 | #define ESB_TIMER2_REG  BASEADDR + 0x04 /* Timer2 value after each reset     */ | 
 | 58 | #define ESB_GINTSR_REG  BASEADDR + 0x08 /* General Interrupt Status Register */ | 
 | 59 | #define ESB_RELOAD_REG  BASEADDR + 0x0c /* Reload register                   */ | 
 | 60 |  | 
 | 61 | /* Lock register bits */ | 
 | 62 | #define ESB_WDT_FUNC    ( 0x01 << 2 )   /* Watchdog functionality            */ | 
 | 63 | #define ESB_WDT_ENABLE  ( 0x01 << 1 )   /* Enable WDT                        */ | 
 | 64 | #define ESB_WDT_LOCK    ( 0x01 << 0 )   /* Lock (nowayout)                   */ | 
 | 65 |  | 
 | 66 | /* Config register bits */ | 
 | 67 | #define ESB_WDT_REBOOT  ( 0x01 << 5 )   /* Enable reboot on timeout          */ | 
 | 68 | #define ESB_WDT_FREQ    ( 0x01 << 2 )   /* Decrement frequency               */ | 
 | 69 | #define ESB_WDT_INTTYPE ( 0x11 << 0 )   /* Interrupt type on timer1 timeout  */ | 
 | 70 |  | 
 | 71 | /* Reload register bits */ | 
 | 72 | #define ESB_WDT_RELOAD ( 0x01 << 8 )    /* prevent timeout                   */ | 
 | 73 |  | 
 | 74 | /* Magic constants */ | 
 | 75 | #define ESB_UNLOCK1     0x80            /* Step 1 to unlock reset registers  */ | 
 | 76 | #define ESB_UNLOCK2     0x86            /* Step 2 to unlock reset registers  */ | 
 | 77 |  | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 78 | /* internal variables */ | 
 | 79 | static void __iomem *BASEADDR; | 
 | 80 | static spinlock_t esb_lock; /* Guards the hardware */ | 
 | 81 | static unsigned long timer_alive; | 
 | 82 | static struct pci_dev *esb_pci; | 
 | 83 | static unsigned short triggered; /* The status of the watchdog upon boot */ | 
 | 84 | static char esb_expect_close; | 
 | 85 |  | 
 | 86 | /* module parameters */ | 
 | 87 | #define WATCHDOG_HEARTBEAT 30   /* 30 sec default heartbeat (1<heartbeat<2*1023) */ | 
 | 88 | static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */ | 
 | 89 | module_param(heartbeat, int, 0); | 
 | 90 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (1<heartbeat<2046, default=" __MODULE_STRING(WATCHDOG_HEARTBEAT) ")"); | 
 | 91 |  | 
| Naveen Gupta | 811f999 | 2005-08-21 13:02:41 +0200 | [diff] [blame] | 92 | static int nowayout = WATCHDOG_NOWAYOUT; | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 93 | module_param(nowayout, int, 0); | 
 | 94 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)"); | 
 | 95 |  | 
 | 96 | /* | 
 | 97 |  * Some i6300ESB specific functions | 
 | 98 |  */ | 
 | 99 |  | 
 | 100 | /* | 
 | 101 |  * Prepare for reloading the timer by unlocking the proper registers. | 
 | 102 |  * This is performed by first writing 0x80 followed by 0x86 to the | 
 | 103 |  * reload register. After this the appropriate registers can be written | 
 | 104 |  * to once before they need to be unlocked again. | 
 | 105 |  */ | 
 | 106 | static inline void esb_unlock_registers(void) { | 
 | 107 |         writeb(ESB_UNLOCK1, ESB_RELOAD_REG); | 
 | 108 |         writeb(ESB_UNLOCK2, ESB_RELOAD_REG); | 
 | 109 | } | 
 | 110 |  | 
 | 111 | static void esb_timer_start(void) | 
 | 112 | { | 
 | 113 | 	u8 val; | 
 | 114 |  | 
 | 115 | 	/* Enable or Enable + Lock? */ | 
| Naveen Gupta | 28562af | 2005-08-17 09:10:10 +0200 | [diff] [blame] | 116 | 	val = 0x02 | (nowayout ? 0x01 : 0x00); | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 117 |  | 
 | 118 |         pci_write_config_byte(esb_pci, ESB_LOCK_REG, val); | 
 | 119 | } | 
 | 120 |  | 
 | 121 | static int esb_timer_stop(void) | 
 | 122 | { | 
 | 123 | 	u8 val; | 
 | 124 |  | 
 | 125 | 	spin_lock(&esb_lock); | 
 | 126 | 	/* First, reset timers as suggested by the docs */ | 
 | 127 | 	esb_unlock_registers(); | 
| Naveen Gupta | ce2f50b | 2005-08-17 09:11:46 +0200 | [diff] [blame] | 128 | 	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG); | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 129 | 	/* Then disable the WDT */ | 
 | 130 | 	pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x0); | 
 | 131 | 	pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val); | 
 | 132 | 	spin_unlock(&esb_lock); | 
 | 133 |  | 
 | 134 | 	/* Returns 0 if the timer was disabled, non-zero otherwise */ | 
 | 135 | 	return (val & 0x01); | 
 | 136 | } | 
 | 137 |  | 
 | 138 | static void esb_timer_keepalive(void) | 
 | 139 | { | 
 | 140 | 	spin_lock(&esb_lock); | 
 | 141 | 	esb_unlock_registers(); | 
| Naveen Gupta | ce2f50b | 2005-08-17 09:11:46 +0200 | [diff] [blame] | 142 | 	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG); | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 143 |         /* FIXME: Do we need to flush anything here? */ | 
 | 144 | 	spin_unlock(&esb_lock); | 
 | 145 | } | 
 | 146 |  | 
 | 147 | static int esb_timer_set_heartbeat(int time) | 
 | 148 | { | 
 | 149 | 	u32 val; | 
 | 150 |  | 
 | 151 | 	if (time < 0x1 || time > (2 * 0x03ff)) | 
 | 152 | 		return -EINVAL; | 
 | 153 |  | 
 | 154 | 	spin_lock(&esb_lock); | 
 | 155 |  | 
 | 156 | 	/* We shift by 9, so if we are passed a value of 1 sec, | 
 | 157 | 	 * val will be 1 << 9 = 512, then write that to two | 
 | 158 | 	 * timers => 2 * 512 = 1024 (which is decremented at 1KHz) | 
 | 159 | 	 */ | 
 | 160 | 	val = time << 9; | 
 | 161 |  | 
 | 162 | 	/* Write timer 1 */ | 
 | 163 | 	esb_unlock_registers(); | 
 | 164 | 	writel(val, ESB_TIMER1_REG); | 
 | 165 |  | 
 | 166 | 	/* Write timer 2 */ | 
 | 167 | 	esb_unlock_registers(); | 
 | 168 |         writel(val, ESB_TIMER2_REG); | 
 | 169 |  | 
 | 170 |         /* Reload */ | 
 | 171 | 	esb_unlock_registers(); | 
| Naveen Gupta | ce2f50b | 2005-08-17 09:11:46 +0200 | [diff] [blame] | 172 | 	writew(ESB_WDT_RELOAD, ESB_RELOAD_REG); | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 173 |  | 
 | 174 | 	/* FIXME: Do we need to flush everything out? */ | 
 | 175 |  | 
 | 176 | 	/* Done */ | 
 | 177 | 	heartbeat = time; | 
 | 178 | 	spin_unlock(&esb_lock); | 
 | 179 | 	return 0; | 
 | 180 | } | 
 | 181 |  | 
 | 182 | static int esb_timer_read (void) | 
 | 183 | { | 
 | 184 |        	u32 count; | 
 | 185 |  | 
 | 186 | 	/* This isn't documented, and doesn't take into | 
 | 187 |          * acount which stage is running, but it looks | 
 | 188 |          * like a 20 bit count down, so we might as well report it. | 
 | 189 |          */ | 
 | 190 |         pci_read_config_dword(esb_pci, 0x64, &count); | 
 | 191 |         return (int)count; | 
 | 192 | } | 
 | 193 |  | 
 | 194 | /* | 
 | 195 |  * 	/dev/watchdog handling | 
 | 196 |  */ | 
 | 197 |  | 
 | 198 | static int esb_open (struct inode *inode, struct file *file) | 
 | 199 | { | 
 | 200 |         /* /dev/watchdog can only be opened once */ | 
 | 201 |         if (test_and_set_bit(0, &timer_alive)) | 
 | 202 |                 return -EBUSY; | 
 | 203 |  | 
 | 204 |         /* Reload and activate timer */ | 
 | 205 |         esb_timer_keepalive (); | 
 | 206 |         esb_timer_start (); | 
 | 207 |  | 
 | 208 | 	return nonseekable_open(inode, file); | 
 | 209 | } | 
 | 210 |  | 
 | 211 | static int esb_release (struct inode *inode, struct file *file) | 
 | 212 | { | 
 | 213 |         /* Shut off the timer. */ | 
 | 214 |         if (esb_expect_close == 42) { | 
 | 215 |                 esb_timer_stop (); | 
 | 216 |         } else { | 
 | 217 |                 printk(KERN_CRIT PFX "Unexpected close, not stopping watchdog!\n"); | 
 | 218 |                 esb_timer_keepalive (); | 
 | 219 |         } | 
 | 220 |         clear_bit(0, &timer_alive); | 
 | 221 |         esb_expect_close = 0; | 
 | 222 |         return 0; | 
 | 223 | } | 
 | 224 |  | 
 | 225 | static ssize_t esb_write (struct file *file, const char __user *data, | 
 | 226 | 			  size_t len, loff_t * ppos) | 
 | 227 | { | 
 | 228 | 	/* See if we got the magic character 'V' and reload the timer */ | 
 | 229 |         if (len) { | 
 | 230 | 		if (!nowayout) { | 
 | 231 | 			size_t i; | 
 | 232 |  | 
 | 233 | 			/* note: just in case someone wrote the magic character | 
 | 234 | 			 * five months ago... */ | 
 | 235 | 			esb_expect_close = 0; | 
 | 236 |  | 
 | 237 | 			/* scan to see whether or not we got the magic character */ | 
 | 238 | 			for (i = 0; i != len; i++) { | 
 | 239 | 				char c; | 
 | 240 | 				if(get_user(c, data+i)) | 
 | 241 | 					return -EFAULT; | 
 | 242 | 				if (c == 'V') | 
 | 243 | 					esb_expect_close = 42; | 
 | 244 | 			} | 
 | 245 | 		} | 
 | 246 |  | 
 | 247 | 		/* someone wrote to us, we should reload the timer */ | 
 | 248 | 		esb_timer_keepalive (); | 
 | 249 | 	} | 
 | 250 | 	return len; | 
 | 251 | } | 
 | 252 |  | 
 | 253 | static int esb_ioctl (struct inode *inode, struct file *file, | 
 | 254 | 		      unsigned int cmd, unsigned long arg) | 
 | 255 | { | 
 | 256 | 	int new_options, retval = -EINVAL; | 
 | 257 | 	int new_heartbeat; | 
 | 258 | 	void __user *argp = (void __user *)arg; | 
 | 259 | 	int __user *p = argp; | 
 | 260 | 	static struct watchdog_info ident = { | 
 | 261 | 		.options =              WDIOF_SETTIMEOUT | | 
 | 262 | 					WDIOF_KEEPALIVEPING | | 
 | 263 | 					WDIOF_MAGICCLOSE, | 
 | 264 | 		.firmware_version =     0, | 
 | 265 | 		.identity =             ESB_MODULE_NAME, | 
 | 266 | 	}; | 
 | 267 |  | 
 | 268 | 	switch (cmd) { | 
 | 269 | 		case WDIOC_GETSUPPORT: | 
 | 270 | 			return copy_to_user(argp, &ident, | 
 | 271 | 					    sizeof (ident)) ? -EFAULT : 0; | 
 | 272 |  | 
 | 273 | 		case WDIOC_GETSTATUS: | 
 | 274 | 			return put_user (esb_timer_read(), p); | 
 | 275 |  | 
 | 276 | 		case WDIOC_GETBOOTSTATUS: | 
 | 277 | 			return put_user (triggered, p); | 
 | 278 |  | 
 | 279 |                 case WDIOC_KEEPALIVE: | 
 | 280 |                         esb_timer_keepalive (); | 
 | 281 |                         return 0; | 
 | 282 |  | 
 | 283 |                 case WDIOC_SETOPTIONS: | 
 | 284 |                 { | 
 | 285 |                         if (get_user (new_options, p)) | 
 | 286 |                                 return -EFAULT; | 
 | 287 |  | 
 | 288 |                         if (new_options & WDIOS_DISABLECARD) { | 
 | 289 |                                 esb_timer_stop (); | 
 | 290 |                                 retval = 0; | 
 | 291 |                         } | 
 | 292 |  | 
 | 293 |                         if (new_options & WDIOS_ENABLECARD) { | 
 | 294 |                                 esb_timer_keepalive (); | 
 | 295 |                                 esb_timer_start (); | 
 | 296 |                                 retval = 0; | 
 | 297 |                         } | 
 | 298 |  | 
 | 299 |                         return retval; | 
 | 300 |                 } | 
 | 301 |  | 
 | 302 |                 case WDIOC_SETTIMEOUT: | 
 | 303 |                 { | 
 | 304 |                         if (get_user(new_heartbeat, p)) | 
 | 305 |                                 return -EFAULT; | 
 | 306 |  | 
 | 307 |                         if (esb_timer_set_heartbeat(new_heartbeat)) | 
 | 308 |                             return -EINVAL; | 
 | 309 |  | 
 | 310 |                         esb_timer_keepalive (); | 
 | 311 |                         /* Fall */ | 
 | 312 |                 } | 
 | 313 |  | 
 | 314 |                 case WDIOC_GETTIMEOUT: | 
 | 315 |                         return put_user(heartbeat, p); | 
 | 316 |  | 
 | 317 |                 default: | 
 | 318 |                         return -ENOIOCTLCMD; | 
 | 319 |         } | 
 | 320 | } | 
 | 321 |  | 
 | 322 | /* | 
 | 323 |  *      Notify system | 
 | 324 |  */ | 
 | 325 |  | 
 | 326 | static int esb_notify_sys (struct notifier_block *this, unsigned long code, void *unused) | 
 | 327 | { | 
 | 328 |         if (code==SYS_DOWN || code==SYS_HALT) { | 
 | 329 |                 /* Turn the WDT off */ | 
 | 330 |                 esb_timer_stop (); | 
 | 331 |         } | 
 | 332 |  | 
 | 333 |         return NOTIFY_DONE; | 
 | 334 | } | 
 | 335 |  | 
 | 336 | /* | 
 | 337 |  *      Kernel Interfaces | 
 | 338 |  */ | 
 | 339 |  | 
 | 340 | static struct file_operations esb_fops = { | 
 | 341 |         .owner =        THIS_MODULE, | 
 | 342 |         .llseek =       no_llseek, | 
 | 343 |         .write =        esb_write, | 
 | 344 |         .ioctl =        esb_ioctl, | 
 | 345 |         .open =         esb_open, | 
 | 346 |         .release =      esb_release, | 
 | 347 | }; | 
 | 348 |  | 
 | 349 | static struct miscdevice esb_miscdev = { | 
 | 350 |         .minor =        WATCHDOG_MINOR, | 
 | 351 |         .name =         "watchdog", | 
 | 352 |         .fops =         &esb_fops, | 
 | 353 | }; | 
 | 354 |  | 
 | 355 | static struct notifier_block esb_notifier = { | 
 | 356 |         .notifier_call =        esb_notify_sys, | 
 | 357 | }; | 
 | 358 |  | 
 | 359 | /* | 
 | 360 |  * Data for PCI driver interface | 
 | 361 |  * | 
 | 362 |  * This data only exists for exporting the supported | 
 | 363 |  * PCI ids via MODULE_DEVICE_TABLE.  We do not actually | 
 | 364 |  * register a pci_driver, because someone else might one day | 
 | 365 |  * want to register another driver on the same PCI id. | 
 | 366 |  */ | 
 | 367 | static struct pci_device_id esb_pci_tbl[] = { | 
| Jiri Slaby | bb5dc36 | 2005-08-22 09:05:03 +0200 | [diff] [blame] | 368 |         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB_9), }, | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 369 |         { 0, },                 /* End of list */ | 
 | 370 | }; | 
 | 371 | MODULE_DEVICE_TABLE (pci, esb_pci_tbl); | 
 | 372 |  | 
 | 373 | /* | 
 | 374 |  *      Init & exit routines | 
 | 375 |  */ | 
 | 376 |  | 
 | 377 | static unsigned char __init esb_getdevice (void) | 
 | 378 | { | 
 | 379 | 	u8 val1; | 
 | 380 | 	unsigned short val2; | 
 | 381 |  | 
 | 382 |         struct pci_dev *dev = NULL; | 
 | 383 |         /* | 
 | 384 |          *      Find the PCI device | 
 | 385 |          */ | 
 | 386 |  | 
| Naveen Gupta | 811f999 | 2005-08-21 13:02:41 +0200 | [diff] [blame] | 387 |         for_each_pci_dev(dev) { | 
| Jiri Slaby | bb5dc36 | 2005-08-22 09:05:03 +0200 | [diff] [blame] | 388 |                 if (pci_match_id(esb_pci_tbl, dev)) { | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 389 |                         esb_pci = dev; | 
 | 390 |                         break; | 
 | 391 |                 } | 
| Naveen Gupta | 811f999 | 2005-08-21 13:02:41 +0200 | [diff] [blame] | 392 | 	} | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 393 |  | 
 | 394 |         if (esb_pci) { | 
 | 395 |         	if (pci_enable_device(esb_pci)) { | 
 | 396 | 			printk (KERN_ERR PFX "failed to enable device\n"); | 
| Naveen Gupta | 811f999 | 2005-08-21 13:02:41 +0200 | [diff] [blame] | 397 | 			goto err_devput; | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 398 | 		} | 
 | 399 |  | 
 | 400 | 		if (pci_request_region(esb_pci, 0, ESB_MODULE_NAME)) { | 
 | 401 | 			printk (KERN_ERR PFX "failed to request region\n"); | 
 | 402 | 			goto err_disable; | 
 | 403 | 		} | 
 | 404 |  | 
 | 405 | 		BASEADDR = ioremap(pci_resource_start(esb_pci, 0), | 
 | 406 | 				   pci_resource_len(esb_pci, 0)); | 
 | 407 | 		if (BASEADDR == NULL) { | 
 | 408 |                 	/* Something's wrong here, BASEADDR has to be set */ | 
 | 409 | 			printk (KERN_ERR PFX "failed to get BASEADDR\n"); | 
 | 410 |                         goto err_release; | 
 | 411 |                 } | 
 | 412 |  | 
 | 413 | 		/* | 
 | 414 | 		 * The watchdog has two timers, it can be setup so that the | 
 | 415 | 		 * expiry of timer1 results in an interrupt and the expiry of | 
 | 416 | 		 * timer2 results in a reboot. We set it to not generate | 
 | 417 | 		 * any interrupts as there is not much we can do with it | 
 | 418 | 		 * right now. | 
 | 419 | 		 * | 
 | 420 | 		 * We also enable reboots and set the timer frequency to | 
 | 421 | 		 * the PCI clock divided by 2^15 (approx 1KHz). | 
 | 422 | 		 */ | 
 | 423 | 		pci_write_config_word(esb_pci, ESB_CONFIG_REG, 0x0003); | 
 | 424 |  | 
 | 425 | 		/* Check that the WDT isn't already locked */ | 
 | 426 | 		pci_read_config_byte(esb_pci, ESB_LOCK_REG, &val1); | 
 | 427 | 		if (val1 & ESB_WDT_LOCK) | 
 | 428 | 			printk (KERN_WARNING PFX "nowayout already set\n"); | 
 | 429 |  | 
 | 430 | 		/* Set the timer to watchdog mode and disable it for now */ | 
 | 431 | 		pci_write_config_byte(esb_pci, ESB_LOCK_REG, 0x00); | 
 | 432 |  | 
 | 433 | 		/* Check if the watchdog was previously triggered */ | 
 | 434 | 		esb_unlock_registers(); | 
 | 435 | 		val2 = readw(ESB_RELOAD_REG); | 
 | 436 | 		triggered = (val2 & (0x01 << 9) >> 9); | 
 | 437 |  | 
 | 438 | 		/* Reset trigger flag and timers */ | 
 | 439 | 		esb_unlock_registers(); | 
 | 440 | 		writew((0x11 << 8), ESB_RELOAD_REG); | 
 | 441 |  | 
 | 442 | 		/* Done */ | 
 | 443 | 		return 1; | 
 | 444 |  | 
 | 445 | err_release: | 
 | 446 | 		pci_release_region(esb_pci, 0); | 
 | 447 | err_disable: | 
 | 448 | 		pci_disable_device(esb_pci); | 
| Naveen Gupta | 811f999 | 2005-08-21 13:02:41 +0200 | [diff] [blame] | 449 | err_devput: | 
| Jiri Slaby | c69af03 | 2005-08-17 09:09:13 +0200 | [diff] [blame] | 450 | 		pci_dev_put(esb_pci); | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 451 | 	} | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 452 | 	return 0; | 
 | 453 | } | 
 | 454 |  | 
 | 455 | static int __init watchdog_init (void) | 
 | 456 | { | 
 | 457 |         int ret; | 
 | 458 |  | 
 | 459 |         spin_lock_init(&esb_lock); | 
 | 460 |  | 
 | 461 |         /* Check whether or not the hardware watchdog is there */ | 
 | 462 |         if (!esb_getdevice () || esb_pci == NULL) | 
 | 463 |                 return -ENODEV; | 
 | 464 |  | 
 | 465 |         /* Check that the heartbeat value is within it's range ; if not reset to the default */ | 
 | 466 |         if (esb_timer_set_heartbeat (heartbeat)) { | 
 | 467 |                 esb_timer_set_heartbeat (WATCHDOG_HEARTBEAT); | 
 | 468 |                 printk(KERN_INFO PFX "heartbeat value must be 1<heartbeat<2046, using %d\n", | 
 | 469 | 		       heartbeat); | 
 | 470 |         } | 
 | 471 |  | 
 | 472 |         ret = register_reboot_notifier(&esb_notifier); | 
 | 473 |         if (ret != 0) { | 
 | 474 |                 printk(KERN_ERR PFX "cannot register reboot notifier (err=%d)\n", | 
 | 475 |                         ret); | 
 | 476 |                 goto err_unmap; | 
 | 477 |         } | 
 | 478 |  | 
 | 479 |         ret = misc_register(&esb_miscdev); | 
 | 480 |         if (ret != 0) { | 
 | 481 |                 printk(KERN_ERR PFX "cannot register miscdev on minor=%d (err=%d)\n", | 
 | 482 |                         WATCHDOG_MINOR, ret); | 
 | 483 |                 goto err_notifier; | 
 | 484 |         } | 
 | 485 |  | 
 | 486 |         esb_timer_stop (); | 
 | 487 |  | 
 | 488 |         printk (KERN_INFO PFX "initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n", | 
 | 489 |                 BASEADDR, heartbeat, nowayout); | 
 | 490 |  | 
 | 491 |         return 0; | 
 | 492 |  | 
 | 493 | err_notifier: | 
 | 494 |         unregister_reboot_notifier(&esb_notifier); | 
 | 495 | err_unmap: | 
 | 496 | 	iounmap(BASEADDR); | 
 | 497 | /* err_release: */ | 
 | 498 | 	pci_release_region(esb_pci, 0); | 
 | 499 | /* err_disable: */ | 
 | 500 | 	pci_disable_device(esb_pci); | 
| Naveen Gupta | 811f999 | 2005-08-21 13:02:41 +0200 | [diff] [blame] | 501 | /* err_devput: */ | 
| Jiri Slaby | c69af03 | 2005-08-17 09:09:13 +0200 | [diff] [blame] | 502 | 	pci_dev_put(esb_pci); | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 503 |         return ret; | 
 | 504 | } | 
 | 505 |  | 
 | 506 | static void __exit watchdog_cleanup (void) | 
 | 507 | { | 
 | 508 | 	/* Stop the timer before we leave */ | 
 | 509 | 	if (!nowayout) | 
 | 510 | 		esb_timer_stop (); | 
 | 511 |  | 
 | 512 | 	/* Deregister */ | 
 | 513 | 	misc_deregister(&esb_miscdev); | 
 | 514 |         unregister_reboot_notifier(&esb_notifier); | 
 | 515 | 	iounmap(BASEADDR); | 
 | 516 | 	pci_release_region(esb_pci, 0); | 
 | 517 | 	pci_disable_device(esb_pci); | 
| Jiri Slaby | c69af03 | 2005-08-17 09:09:13 +0200 | [diff] [blame] | 518 | 	pci_dev_put(esb_pci); | 
| David Hardeman | cc90ef0 | 2005-08-17 09:07:44 +0200 | [diff] [blame] | 519 | } | 
 | 520 |  | 
 | 521 | module_init(watchdog_init); | 
 | 522 | module_exit(watchdog_cleanup); | 
 | 523 |  | 
 | 524 | MODULE_AUTHOR("Ross Biro and David Härdeman"); | 
 | 525 | MODULE_DESCRIPTION("Watchdog driver for Intel 6300ESB chipsets"); | 
 | 526 | MODULE_LICENSE("GPL"); | 
 | 527 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); |