| Chris Zankel | 9a8fd55 | 2005-06-23 22:01:26 -0700 | [diff] [blame] | 1 | /* |
| 2 | * include/asm-xtensa/pci-bridge.h |
| 3 | * |
| 4 | * This file is subject to the terms and conditions of the GNU General |
| 5 | * Public License. See the file "COPYING" in the main directory of |
| 6 | * this archive for more details. |
| 7 | * |
| 8 | * Copyright (C) 2005 Tensilica Inc. |
| 9 | */ |
| 10 | |
| 11 | #ifndef _XTENSA_PCI_BRIDGE_H |
| 12 | #define _XTENSA_PCI_BRIDGE_H |
| 13 | |
| 14 | #ifdef __KERNEL__ |
| 15 | |
| 16 | struct device_node; |
| 17 | struct pci_controller; |
| 18 | |
| 19 | /* |
| 20 | * pciauto_bus_scan() enumerates the pci space. |
| 21 | */ |
| 22 | |
| 23 | extern int pciauto_bus_scan(struct pci_controller *, int); |
| 24 | |
| 25 | struct pci_space { |
| 26 | unsigned long start; |
| 27 | unsigned long end; |
| 28 | unsigned long base; |
| 29 | }; |
| 30 | |
| 31 | /* |
| 32 | * Structure of a PCI controller (host bridge) |
| 33 | */ |
| 34 | |
| 35 | struct pci_controller { |
| 36 | int index; /* used for pci_controller_num */ |
| 37 | struct pci_controller *next; |
| 38 | struct pci_bus *bus; |
| 39 | void *arch_data; |
| 40 | |
| 41 | int first_busno; |
| 42 | int last_busno; |
| 43 | |
| 44 | struct pci_ops *ops; |
| 45 | volatile unsigned int *cfg_addr; |
| 46 | volatile unsigned char *cfg_data; |
| 47 | |
| 48 | /* Currently, we limit ourselves to 1 IO range and 3 mem |
| 49 | * ranges since the common pci_bus structure can't handle more |
| 50 | */ |
| 51 | struct resource io_resource; |
| 52 | struct resource mem_resources[3]; |
| 53 | int mem_resource_count; |
| 54 | |
| 55 | /* Host bridge I/O and Memory space |
| 56 | * Used for BAR placement algorithms |
| 57 | */ |
| 58 | struct pci_space io_space; |
| 59 | struct pci_space mem_space; |
| 60 | |
| 61 | /* Return the interrupt number fo a device. */ |
| 62 | int (*map_irq)(struct pci_dev*, u8, u8); |
| 63 | |
| 64 | }; |
| 65 | |
| 66 | static inline void pcibios_init_resource(struct resource *res, |
| 67 | unsigned long start, unsigned long end, int flags, char *name) |
| 68 | { |
| 69 | res->start = start; |
| 70 | res->end = end; |
| 71 | res->flags = flags; |
| 72 | res->name = name; |
| 73 | res->parent = NULL; |
| 74 | res->sibling = NULL; |
| 75 | res->child = NULL; |
| 76 | } |
| 77 | |
| 78 | |
| 79 | /* These are used for config access before all the PCI probing has been done. */ |
| 80 | int early_read_config_byte(struct pci_controller*, int, int, int, u8*); |
| 81 | int early_read_config_word(struct pci_controller*, int, int, int, u16*); |
| 82 | int early_read_config_dword(struct pci_controller*, int, int, int, u32*); |
| 83 | int early_write_config_byte(struct pci_controller*, int, int, int, u8); |
| 84 | int early_write_config_word(struct pci_controller*, int, int, int, u16); |
| 85 | int early_write_config_dword(struct pci_controller*, int, int, int, u32); |
| 86 | |
| 87 | #endif /* __KERNEL__ */ |
| 88 | #endif /* _XTENSA_PCI_BRIDGE_H */ |