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Linus Torvalds1da177e2005-04-16 15:20:36 -07001#ifndef __ASM_MACH_APIC_H
2#define __ASM_MACH_APIC_H
3
4extern u8 bios_cpu_apicid[];
5
6#define xapic_phys_to_log_apicid(cpu) (bios_cpu_apicid[cpu])
7#define esr_disable (1)
8
9static inline int apic_id_registered(void)
10{
11 return (1);
12}
13
14static inline cpumask_t target_cpus(void)
15{
16#if defined CONFIG_ES7000_CLUSTERED_APIC
17 return CPU_MASK_ALL;
18#else
19 return cpumask_of_cpu(smp_processor_id());
20#endif
21}
22#define TARGET_CPUS (target_cpus())
23
24#if defined CONFIG_ES7000_CLUSTERED_APIC
25#define APIC_DFR_VALUE (APIC_DFR_CLUSTER)
26#define INT_DELIVERY_MODE (dest_LowestPrio)
27#define INT_DEST_MODE (1) /* logical delivery broadcast to all procs */
28#define NO_BALANCE_IRQ (1)
29#undef WAKE_SECONDARY_VIA_INIT
30#define WAKE_SECONDARY_VIA_MIP
31#else
32#define APIC_DFR_VALUE (APIC_DFR_FLAT)
33#define INT_DELIVERY_MODE (dest_Fixed)
34#define INT_DEST_MODE (0) /* phys delivery to target procs */
35#define NO_BALANCE_IRQ (0)
36#undef APIC_DEST_LOGICAL
37#define APIC_DEST_LOGICAL 0x0
38#define WAKE_SECONDARY_VIA_INIT
39#endif
40
Linus Torvalds1da177e2005-04-16 15:20:36 -070041static inline unsigned long check_apicid_used(physid_mask_t bitmap, int apicid)
42{
43 return 0;
44}
45static inline unsigned long check_apicid_present(int bit)
46{
47 return physid_isset(bit, phys_cpu_present_map);
48}
49
50#define apicid_cluster(apicid) (apicid & 0xF0)
51
52static inline unsigned long calculate_ldr(int cpu)
53{
54 unsigned long id;
55 id = xapic_phys_to_log_apicid(cpu);
56 return (SET_APIC_LOGICAL_ID(id));
57}
58
59/*
60 * Set up the logical destination ID.
61 *
62 * Intel recommends to set DFR, LdR and TPR before enabling
63 * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
64 * document number 292116). So here it goes...
65 */
66static inline void init_apic_ldr(void)
67{
68 unsigned long val;
69 int cpu = smp_processor_id();
70
71 apic_write_around(APIC_DFR, APIC_DFR_VALUE);
72 val = calculate_ldr(cpu);
73 apic_write_around(APIC_LDR, val);
74}
75
76extern void es7000_sw_apic(void);
77static inline void enable_apic_mode(void)
78{
79 es7000_sw_apic();
80 return;
81}
82
83extern int apic_version [MAX_APICS];
84static inline void clustered_apic_check(void)
85{
86 int apic = bios_cpu_apicid[smp_processor_id()];
87 printk("Enabling APIC mode: %s. Using %d I/O APICs, target cpus %lx\n",
88 (apic_version[apic] == 0x14) ?
89 "Physical Cluster" : "Logical Cluster", nr_ioapics, cpus_addr(TARGET_CPUS)[0]);
90}
91
92static inline int multi_timer_check(int apic, int irq)
93{
94 return 0;
95}
96
97static inline int apicid_to_node(int logical_apicid)
98{
99 return 0;
100}
101
102
103static inline int cpu_present_to_apicid(int mps_cpu)
104{
105 if (!mps_cpu)
106 return boot_cpu_physical_apicid;
107 else if (mps_cpu < NR_CPUS)
108 return (int) bios_cpu_apicid[mps_cpu];
109 else
110 return BAD_APICID;
111}
112
113static inline physid_mask_t apicid_to_cpu_present(int phys_apicid)
114{
115 static int id = 0;
116 physid_mask_t mask;
117 mask = physid_mask_of_physid(id);
118 ++id;
119 return mask;
120}
121
122extern u8 cpu_2_logical_apicid[];
123/* Mapping from cpu number to logical apicid */
124static inline int cpu_to_logical_apicid(int cpu)
125{
126 if (cpu >= NR_CPUS)
127 return BAD_APICID;
128 return (int)cpu_2_logical_apicid[cpu];
129}
130
131static inline int mpc_apic_id(struct mpc_config_processor *m, struct mpc_config_translation *unused)
132{
133 printk("Processor #%d %ld:%ld APIC version %d\n",
134 m->mpc_apicid,
135 (m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
136 (m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
137 m->mpc_apicver);
138 return (m->mpc_apicid);
139}
140
141static inline physid_mask_t ioapic_phys_id_map(physid_mask_t phys_map)
142{
143 /* For clustered we don't have a good way to do this yet - hack */
144 return physids_promote(0xff);
145}
146
147
148static inline void setup_portio_remap(void)
149{
150}
151
152extern unsigned int boot_cpu_physical_apicid;
153static inline int check_phys_apicid_present(int cpu_physical_apicid)
154{
155 boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
156 return (1);
157}
158
159static inline unsigned int cpu_mask_to_apicid(cpumask_t cpumask)
160{
161 int num_bits_set;
162 int cpus_found = 0;
163 int cpu;
164 int apicid;
165
166 num_bits_set = cpus_weight(cpumask);
167 /* Return id to all */
168 if (num_bits_set == NR_CPUS)
169#if defined CONFIG_ES7000_CLUSTERED_APIC
170 return 0xFF;
171#else
172 return cpu_to_logical_apicid(0);
173#endif
174 /*
175 * The cpus in the mask must all be on the apic cluster. If are not
176 * on the same apicid cluster return default value of TARGET_CPUS.
177 */
178 cpu = first_cpu(cpumask);
179 apicid = cpu_to_logical_apicid(cpu);
180 while (cpus_found < num_bits_set) {
181 if (cpu_isset(cpu, cpumask)) {
182 int new_apicid = cpu_to_logical_apicid(cpu);
183 if (apicid_cluster(apicid) !=
184 apicid_cluster(new_apicid)){
185 printk ("%s: Not a valid mask!\n",__FUNCTION__);
186#if defined CONFIG_ES7000_CLUSTERED_APIC
187 return 0xFF;
188#else
189 return cpu_to_logical_apicid(0);
190#endif
191 }
192 apicid = new_apicid;
193 cpus_found++;
194 }
195 cpu++;
196 }
197 return apicid;
198}
199
200static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
201{
202 return cpuid_apic >> index_msb;
203}
204
205#endif /* __ASM_MACH_APIC_H */