| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* | 
|  | 2 | * | 
|  | 3 | * BRIEF MODULE DESCRIPTION | 
|  | 4 | *	Au1000 IrDA driver. | 
|  | 5 | * | 
|  | 6 | * Copyright 2001 MontaVista Software Inc. | 
|  | 7 | * Author: MontaVista Software, Inc. | 
|  | 8 | *         	ppopov@mvista.com or source@mvista.com | 
|  | 9 | * | 
|  | 10 | *  This program is free software; you can redistribute  it and/or modify it | 
|  | 11 | *  under  the terms of  the GNU General  Public License as published by the | 
|  | 12 | *  Free Software Foundation;  either version 2 of the  License, or (at your | 
|  | 13 | *  option) any later version. | 
|  | 14 | * | 
|  | 15 | *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED | 
|  | 16 | *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF | 
|  | 17 | *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN | 
|  | 18 | *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT, | 
|  | 19 | *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT | 
|  | 20 | *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF | 
|  | 21 | *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON | 
|  | 22 | *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT | 
|  | 23 | *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF | 
|  | 24 | *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 
|  | 25 | * | 
|  | 26 | *  You should have received a copy of the  GNU General Public License along | 
|  | 27 | *  with this program; if not, write  to the Free Software Foundation, Inc., | 
|  | 28 | *  675 Mass Ave, Cambridge, MA 02139, USA. | 
|  | 29 | */ | 
|  | 30 |  | 
|  | 31 | #ifndef AU1000_IRCC_H | 
|  | 32 | #define AU1000_IRCC_H | 
|  | 33 |  | 
|  | 34 | #include <linux/time.h> | 
|  | 35 |  | 
|  | 36 | #include <linux/spinlock.h> | 
|  | 37 | #include <linux/pm.h> | 
|  | 38 | #include <asm/io.h> | 
|  | 39 |  | 
|  | 40 | #define NUM_IR_IFF          1 | 
|  | 41 | #define NUM_IR_DESC        64 | 
|  | 42 | #define RING_SIZE_4       0x0 | 
|  | 43 | #define RING_SIZE_16      0x3 | 
|  | 44 | #define RING_SIZE_64      0xF | 
|  | 45 | #define MAX_NUM_IR_DESC    64 | 
|  | 46 | #define MAX_BUF_SIZE     2048 | 
|  | 47 |  | 
|  | 48 | #define BPS_115200          0 | 
|  | 49 | #define BPS_57600           1 | 
|  | 50 | #define BPS_38400           2 | 
|  | 51 | #define BPS_19200           5 | 
|  | 52 | #define BPS_9600           11 | 
|  | 53 | #define BPS_2400           47 | 
|  | 54 |  | 
|  | 55 | /* Ring descriptor flags */ | 
|  | 56 | #define AU_OWN           (1<<7) /* tx,rx */ | 
|  | 57 |  | 
|  | 58 | #define IR_DIS_CRC       (1<<6) /* tx */ | 
|  | 59 | #define IR_BAD_CRC       (1<<5) /* tx */ | 
|  | 60 | #define IR_NEED_PULSE    (1<<4) /* tx */ | 
|  | 61 | #define IR_FORCE_UNDER   (1<<3) /* tx */ | 
|  | 62 | #define IR_DISABLE_TX    (1<<2) /* tx */ | 
|  | 63 | #define IR_HW_UNDER      (1<<0) /* tx */ | 
|  | 64 | #define IR_TX_ERROR      (IR_DIS_CRC|IR_BAD_CRC|IR_HW_UNDER) | 
|  | 65 |  | 
|  | 66 | #define IR_PHY_ERROR     (1<<6) /* rx */ | 
|  | 67 | #define IR_CRC_ERROR     (1<<5) /* rx */ | 
|  | 68 | #define IR_MAX_LEN       (1<<4) /* rx */ | 
|  | 69 | #define IR_FIFO_OVER     (1<<3) /* rx */ | 
|  | 70 | #define IR_SIR_ERROR     (1<<2) /* rx */ | 
|  | 71 | #define IR_RX_ERROR      (IR_PHY_ERROR|IR_CRC_ERROR| \ | 
|  | 72 | IR_MAX_LEN|IR_FIFO_OVER|IR_SIR_ERROR) | 
|  | 73 |  | 
|  | 74 | typedef struct db_dest { | 
|  | 75 | struct db_dest *pnext; | 
|  | 76 | volatile u32 *vaddr; | 
|  | 77 | dma_addr_t dma_addr; | 
|  | 78 | } db_dest_t; | 
|  | 79 |  | 
|  | 80 |  | 
|  | 81 | typedef struct ring_desc { | 
|  | 82 | u8 count_0;               /* 7:0  */ | 
|  | 83 | u8 count_1;               /* 12:8 */ | 
|  | 84 | u8 reserved; | 
|  | 85 | u8 flags; | 
|  | 86 | u8 addr_0;                /* 7:0   */ | 
|  | 87 | u8 addr_1;                /* 15:8  */ | 
|  | 88 | u8 addr_2;                /* 23:16 */ | 
|  | 89 | u8 addr_3;                /* 31:24 */ | 
|  | 90 | } ring_dest_t; | 
|  | 91 |  | 
|  | 92 |  | 
|  | 93 | /* Private data for each instance */ | 
|  | 94 | struct au1k_private { | 
|  | 95 |  | 
|  | 96 | db_dest_t *pDBfree; | 
|  | 97 | db_dest_t db[2*NUM_IR_DESC]; | 
|  | 98 | volatile ring_dest_t *rx_ring[NUM_IR_DESC]; | 
|  | 99 | volatile ring_dest_t *tx_ring[NUM_IR_DESC]; | 
|  | 100 | db_dest_t *rx_db_inuse[NUM_IR_DESC]; | 
|  | 101 | db_dest_t *tx_db_inuse[NUM_IR_DESC]; | 
|  | 102 | u32 rx_head; | 
|  | 103 | u32 tx_head; | 
|  | 104 | u32 tx_tail; | 
|  | 105 | u32 tx_full; | 
|  | 106 |  | 
|  | 107 | iobuff_t rx_buff; | 
|  | 108 |  | 
|  | 109 | struct net_device *netdev; | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 |  | 
|  | 111 | struct timeval stamp; | 
|  | 112 | struct timeval now; | 
|  | 113 | struct qos_info		qos; | 
|  | 114 | struct irlap_cb		*irlap; | 
|  | 115 |  | 
|  | 116 | u8 open; | 
|  | 117 | u32 speed; | 
|  | 118 | u32 newspeed; | 
|  | 119 |  | 
|  | 120 | u32 intr_work_done; /* number of Rx and Tx pkts processed in the isr */ | 
|  | 121 | struct timer_list timer; | 
|  | 122 |  | 
|  | 123 | spinlock_t lock;           /* For serializing operations */ | 
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | }; | 
|  | 125 | #endif /* AU1000_IRCC_H */ |