blob: 26f246d8b7d4abf361b51ad1312c9b6f2c295636 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/*
2 * Copyright (C) 2008 Google, Inc.
Taniya Das2e948192011-12-20 11:15:13 +05303 * Copyright (c) 2008-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18#include <linux/msm_kgsl.h>
19#include <linux/regulator/machine.h>
20#include <linux/dma-mapping.h>
Taniya Das2e948192011-12-20 11:15:13 +053021#include <linux/init.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <asm/clkdev.h>
23#include <mach/irqs.h>
24#include <mach/msm_iomap.h>
25#include <mach/dma.h>
26#include <mach/board.h>
27
28#include "devices.h"
29#include "gpio_hw.h"
30#include "footswitch.h"
31
32#include <asm/mach/flash.h>
33
34#include <asm/mach/mmc.h>
35#include <mach/msm_hsusb.h>
36#include <mach/usbdiag.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070037#include <mach/rpc_hsusb.h>
38
39static struct resource resources_uart1[] = {
40 {
41 .start = INT_UART1,
42 .end = INT_UART1,
43 .flags = IORESOURCE_IRQ,
44 },
45 {
Taniya Das13b811a2011-12-09 18:33:45 +053046 .start = MSM7XXX_UART1_PHYS,
47 .end = MSM7XXX_UART1_PHYS + MSM7XXX_UART1_SIZE - 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070048 .flags = IORESOURCE_MEM,
49 },
50};
51
52static struct resource resources_uart2[] = {
53 {
54 .start = INT_UART2,
55 .end = INT_UART2,
56 .flags = IORESOURCE_IRQ,
57 },
58 {
Taniya Das13b811a2011-12-09 18:33:45 +053059 .start = MSM7XXX_UART2_PHYS,
60 .end = MSM7XXX_UART2_PHYS + MSM7XXX_UART2_SIZE - 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070061 .flags = IORESOURCE_MEM,
62 },
63};
64
65struct platform_device msm_device_uart1 = {
66 .name = "msm_serial",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(resources_uart1),
69 .resource = resources_uart1,
70};
71
72struct platform_device msm_device_uart2 = {
73 .name = "msm_serial",
74 .id = 1,
75 .num_resources = ARRAY_SIZE(resources_uart2),
76 .resource = resources_uart2,
77};
78
Laxminath Kasam1f2cd2a2012-02-15 12:12:44 +053079static struct resource resources_adsp[] = {
80 {
81 .start = INT_ADSP_A9_A11,
82 .end = INT_ADSP_A9_A11,
83 .flags = IORESOURCE_IRQ,
84 },
85};
86
87struct platform_device msm_adsp_device = {
88 .name = "msm_adsp",
89 .id = -1,
90 .num_resources = ARRAY_SIZE(resources_adsp),
91 .resource = resources_adsp,
92};
93
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070094#define MSM_UART1DM_PHYS 0xA0200000
95#define MSM_UART2DM_PHYS 0xA0300000
96static struct resource msm_uart1_dm_resources[] = {
97 {
98 .start = MSM_UART1DM_PHYS,
99 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
100 .flags = IORESOURCE_MEM,
101 },
102 {
103 .start = INT_UART1DM_IRQ,
104 .end = INT_UART1DM_IRQ,
105 .flags = IORESOURCE_IRQ,
106 },
107 {
108 .start = INT_UART1DM_RX,
109 .end = INT_UART1DM_RX,
110 .flags = IORESOURCE_IRQ,
111 },
112 {
113 .start = DMOV_HSUART1_TX_CHAN,
114 .end = DMOV_HSUART1_RX_CHAN,
115 .name = "uartdm_channels",
116 .flags = IORESOURCE_DMA,
117 },
118 {
119 .start = DMOV_HSUART1_TX_CRCI,
120 .end = DMOV_HSUART1_RX_CRCI,
121 .name = "uartdm_crci",
122 .flags = IORESOURCE_DMA,
123 },
124};
125
126static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
127
128struct platform_device msm_device_uart_dm1 = {
129 .name = "msm_serial_hs",
130 .id = 0,
131 .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
132 .resource = msm_uart1_dm_resources,
133 .dev = {
134 .dma_mask = &msm_uart_dm1_dma_mask,
135 .coherent_dma_mask = DMA_BIT_MASK(32),
136 },
137};
138
139static struct resource msm_uart2_dm_resources[] = {
140 {
141 .start = MSM_UART2DM_PHYS,
142 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
143 .flags = IORESOURCE_MEM,
144 },
145 {
146 .start = INT_UART2DM_IRQ,
147 .end = INT_UART2DM_IRQ,
148 .flags = IORESOURCE_IRQ,
149 },
150 {
151 .start = INT_UART2DM_RX,
152 .end = INT_UART2DM_RX,
153 .flags = IORESOURCE_IRQ,
154 },
155 {
156 .start = DMOV_HSUART2_TX_CHAN,
157 .end = DMOV_HSUART2_RX_CHAN,
158 .name = "uartdm_channels",
159 .flags = IORESOURCE_DMA,
160 },
161 {
162 .start = DMOV_HSUART2_TX_CRCI,
163 .end = DMOV_HSUART2_RX_CRCI,
164 .name = "uartdm_crci",
165 .flags = IORESOURCE_DMA,
166 },
167};
168
169static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32);
170
171struct platform_device msm_device_uart_dm2 = {
172 .name = "msm_serial_hs",
173 .id = 1,
174 .num_resources = ARRAY_SIZE(msm_uart2_dm_resources),
175 .resource = msm_uart2_dm_resources,
176 .dev = {
177 .dma_mask = &msm_uart_dm2_dma_mask,
178 .coherent_dma_mask = DMA_BIT_MASK(32),
179 },
180};
181
182#define MSM_I2C_SIZE SZ_4K
183#define MSM_I2C_PHYS 0xA9900000
184static struct resource resources_i2c[] = {
185 {
186 .start = MSM_I2C_PHYS,
187 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
188 .flags = IORESOURCE_MEM,
189 },
190 {
191 .start = INT_PWB_I2C,
192 .end = INT_PWB_I2C,
193 .flags = IORESOURCE_IRQ,
194 },
195};
196
197struct platform_device msm_device_i2c = {
198 .name = "msm_i2c",
199 .id = 0,
200 .num_resources = ARRAY_SIZE(resources_i2c),
201 .resource = resources_i2c,
202};
203
204#define MSM_HSUSB_PHYS 0xA0800000
205static struct resource resources_hsusb_otg[] = {
206 {
207 .start = MSM_HSUSB_PHYS,
208 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
209 .flags = IORESOURCE_MEM,
210 },
211 {
212 .start = INT_USB_HS,
213 .end = INT_USB_HS,
214 .flags = IORESOURCE_IRQ,
215 },
216};
217
218static u64 dma_mask = 0xffffffffULL;
219struct platform_device msm_device_hsusb_otg = {
220 .name = "msm_hsusb_otg",
221 .id = -1,
222 .num_resources = ARRAY_SIZE(resources_hsusb_otg),
223 .resource = resources_hsusb_otg,
224 .dev = {
225 .dma_mask = &dma_mask,
226 .coherent_dma_mask = 0xffffffffULL,
227 },
228};
229
230static struct resource resources_hsusb_peripheral[] = {
231 {
232 .start = MSM_HSUSB_PHYS,
233 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
234 .flags = IORESOURCE_MEM,
235 },
236 {
237 .start = INT_USB_HS,
238 .end = INT_USB_HS,
239 .flags = IORESOURCE_IRQ,
240 },
241};
242
243static struct resource resources_gadget_peripheral[] = {
244 {
245 .start = MSM_HSUSB_PHYS,
246 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
247 .flags = IORESOURCE_MEM,
248 },
249 {
250 .start = INT_USB_HS,
251 .end = INT_USB_HS,
252 .flags = IORESOURCE_IRQ,
253 },
254};
255
256struct platform_device msm_device_hsusb_peripheral = {
257 .name = "msm_hsusb_peripheral",
258 .id = -1,
259 .num_resources = ARRAY_SIZE(resources_hsusb_peripheral),
260 .resource = resources_hsusb_peripheral,
261 .dev = {
262 .dma_mask = &dma_mask,
263 .coherent_dma_mask = 0xffffffffULL,
264 },
265};
266
267struct platform_device msm_device_gadget_peripheral = {
268 .name = "msm_hsusb",
269 .id = -1,
270 .num_resources = ARRAY_SIZE(resources_gadget_peripheral),
271 .resource = resources_gadget_peripheral,
272 .dev = {
273 .dma_mask = &dma_mask,
274 .coherent_dma_mask = 0xffffffffULL,
275 },
276};
277
278static struct resource resources_hsusb_host[] = {
279 {
280 .start = MSM_HSUSB_PHYS,
281 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
282 .flags = IORESOURCE_MEM,
283 },
284 {
285 .start = INT_USB_HS,
286 .end = INT_USB_HS,
287 .flags = IORESOURCE_IRQ,
288 },
289};
290
291struct platform_device msm_device_hsusb_host = {
292 .name = "msm_hsusb_host",
293 .id = 0,
294 .num_resources = ARRAY_SIZE(resources_hsusb_host),
295 .resource = resources_hsusb_host,
296 .dev = {
297 .dma_mask = &dma_mask,
298 .coherent_dma_mask = 0xffffffffULL,
299 },
300};
301
302static struct platform_device *msm_host_devices[] = {
303 &msm_device_hsusb_host,
304};
305
306int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
307{
308 struct platform_device *pdev;
309
310 pdev = msm_host_devices[host];
311 if (!pdev)
312 return -ENODEV;
313 pdev->dev.platform_data = plat;
314 return platform_device_register(pdev);
315}
316
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700317struct platform_device asoc_msm_pcm = {
318 .name = "msm-dsp-audio",
319 .id = 0,
320};
321
322struct platform_device asoc_msm_dai0 = {
323 .name = "msm-codec-dai",
324 .id = 0,
325};
326
327struct platform_device asoc_msm_dai1 = {
328 .name = "msm-cpu-dai",
329 .id = 0,
330};
331
332#define MSM_NAND_PHYS 0xA0A00000
333static struct resource resources_nand[] = {
334 [0] = {
335 .name = "msm_nand_dmac",
336 .start = DMOV_NAND_CHAN,
337 .end = DMOV_NAND_CHAN,
338 .flags = IORESOURCE_DMA,
339 },
340 [1] = {
341 .name = "msm_nand_phys",
342 .start = MSM_NAND_PHYS,
343 .end = MSM_NAND_PHYS + 0x7FF,
344 .flags = IORESOURCE_MEM,
345 },
346};
347
348static struct resource resources_otg[] = {
349 {
350 .start = MSM_HSUSB_PHYS,
351 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
352 .flags = IORESOURCE_MEM,
353 },
354 {
355 .start = INT_USB_HS,
356 .end = INT_USB_HS,
357 .flags = IORESOURCE_IRQ,
358 },
359};
360
361struct platform_device msm_device_otg = {
362 .name = "msm_otg",
363 .id = -1,
364 .num_resources = ARRAY_SIZE(resources_otg),
365 .resource = resources_otg,
366 .dev = {
367 .coherent_dma_mask = 0xffffffffULL,
368 },
369};
370
371struct flash_platform_data msm_nand_data = {
372 .parts = NULL,
373 .nr_parts = 0,
374};
375
376struct platform_device msm_device_nand = {
377 .name = "msm_nand",
378 .id = -1,
379 .num_resources = ARRAY_SIZE(resources_nand),
380 .resource = resources_nand,
381 .dev = {
382 .platform_data = &msm_nand_data,
383 },
384};
385
386struct platform_device msm_device_smd = {
387 .name = "msm_smd",
388 .id = -1,
389};
390
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700391static struct resource msm_dmov_resource[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700392 {
393 .start = INT_ADM_AARM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700394 .flags = IORESOURCE_IRQ,
395 },
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700396 {
397 .start = 0xA9700000,
398 .end = 0xA9700000 + SZ_4K - 1,
399 .flags = IORESOURCE_MEM,
400 },
401};
402
403static struct msm_dmov_pdata msm_dmov_pdata = {
404 .sd = 3,
405 .sd_size = 0x400,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700406};
407
408struct platform_device msm_device_dmov = {
409 .name = "msm_dmov",
410 .id = -1,
411 .resource = msm_dmov_resource,
412 .num_resources = ARRAY_SIZE(msm_dmov_resource),
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700413 .dev = {
414 .platform_data = &msm_dmov_pdata,
415 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700416};
417
418#define MSM_SDC1_BASE 0xA0400000
419#define MSM_SDC2_BASE 0xA0500000
420#define MSM_SDC3_BASE 0xA0600000
421#define MSM_SDC4_BASE 0xA0700000
422static struct resource resources_sdc1[] = {
423 {
424 .start = MSM_SDC1_BASE,
425 .end = MSM_SDC1_BASE + SZ_4K - 1,
426 .flags = IORESOURCE_MEM,
427 },
428 {
429 .start = INT_SDC1_0,
430 .end = INT_SDC1_1,
431 .flags = IORESOURCE_IRQ,
432 },
433 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700434 .name = "sdcc_dma_chnl",
435 .start = DMOV_SDC1_CHAN,
436 .end = DMOV_SDC1_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700437 .flags = IORESOURCE_DMA,
438 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700439 {
440 .name = "sdcc_dma_crci",
441 .start = DMOV_SDC1_CRCI,
442 .end = DMOV_SDC1_CRCI,
443 .flags = IORESOURCE_DMA,
444 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700445};
446
447static struct resource resources_sdc2[] = {
448 {
449 .start = MSM_SDC2_BASE,
450 .end = MSM_SDC2_BASE + SZ_4K - 1,
451 .flags = IORESOURCE_MEM,
452 },
453 {
454 .start = INT_SDC2_0,
455 .end = INT_SDC2_1,
456 .flags = IORESOURCE_IRQ,
457 },
458 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700459 .name = "sdcc_dma_chnl",
460 .start = DMOV_SDC2_CHAN,
461 .end = DMOV_SDC2_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700462 .flags = IORESOURCE_DMA,
463 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700464 {
465 .name = "sdcc_dma_crci",
466 .start = DMOV_SDC2_CRCI,
467 .end = DMOV_SDC2_CRCI,
468 .flags = IORESOURCE_DMA,
469 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700470};
471
472static struct resource resources_sdc3[] = {
473 {
474 .start = MSM_SDC3_BASE,
475 .end = MSM_SDC3_BASE + SZ_4K - 1,
476 .flags = IORESOURCE_MEM,
477 },
478 {
479 .start = INT_SDC3_0,
480 .end = INT_SDC3_1,
481 .flags = IORESOURCE_IRQ,
482 },
483 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700484 .name = "sdcc_dma_chnl",
485 .start = DMOV_SDC3_CHAN,
486 .end = DMOV_SDC3_CHAN,
487 .flags = IORESOURCE_DMA,
488 },
489 {
490 .name = "sdcc_dma_crci",
491 .start = DMOV_SDC3_CRCI,
492 .end = DMOV_SDC3_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700493 .flags = IORESOURCE_DMA,
494 },
495};
496
497static struct resource resources_sdc4[] = {
498 {
499 .start = MSM_SDC4_BASE,
500 .end = MSM_SDC4_BASE + SZ_4K - 1,
501 .flags = IORESOURCE_MEM,
502 },
503 {
504 .start = INT_SDC4_0,
505 .end = INT_SDC4_1,
506 .flags = IORESOURCE_IRQ,
507 },
508 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700509 .name = "sdcc_dma_chnl",
510 .start = DMOV_SDC4_CHAN,
511 .end = DMOV_SDC4_CHAN,
512 .flags = IORESOURCE_DMA,
513 },
514 {
515 .name = "sdcc_dma_crci",
516 .start = DMOV_SDC4_CRCI,
517 .end = DMOV_SDC4_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700518 .flags = IORESOURCE_DMA,
519 },
520};
521
522struct platform_device msm_device_sdc1 = {
523 .name = "msm_sdcc",
524 .id = 1,
525 .num_resources = ARRAY_SIZE(resources_sdc1),
526 .resource = resources_sdc1,
527 .dev = {
528 .coherent_dma_mask = 0xffffffff,
529 },
530};
531
532struct platform_device msm_device_sdc2 = {
533 .name = "msm_sdcc",
534 .id = 2,
535 .num_resources = ARRAY_SIZE(resources_sdc2),
536 .resource = resources_sdc2,
537 .dev = {
538 .coherent_dma_mask = 0xffffffff,
539 },
540};
541
542struct platform_device msm_device_sdc3 = {
543 .name = "msm_sdcc",
544 .id = 3,
545 .num_resources = ARRAY_SIZE(resources_sdc3),
546 .resource = resources_sdc3,
547 .dev = {
548 .coherent_dma_mask = 0xffffffff,
549 },
550};
551
552struct platform_device msm_device_sdc4 = {
553 .name = "msm_sdcc",
554 .id = 4,
555 .num_resources = ARRAY_SIZE(resources_sdc4),
556 .resource = resources_sdc4,
557 .dev = {
558 .coherent_dma_mask = 0xffffffff,
559 },
560};
561
562static struct platform_device *msm_sdcc_devices[] __initdata = {
563 &msm_device_sdc1,
564 &msm_device_sdc2,
565 &msm_device_sdc3,
566 &msm_device_sdc4,
567};
568
569int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
570{
571 struct platform_device *pdev;
572
573 if (controller < 1 || controller > 4)
574 return -EINVAL;
575
576 pdev = msm_sdcc_devices[controller-1];
577 pdev->dev.platform_data = plat;
578 return platform_device_register(pdev);
579}
580
581#if defined(CONFIG_FB_MSM_MDP40)
582#define MDP_BASE 0xA3F00000
583#define PMDH_BASE 0xAD600000
584#define EMDH_BASE 0xAD700000
585#define TVENC_BASE 0xAD400000
586#else
587#define MDP_BASE 0xAA200000
588#define PMDH_BASE 0xAA600000
589#define EMDH_BASE 0xAA700000
590#define TVENC_BASE 0xAA400000
591#endif
592
593static struct resource msm_mdp_resources[] = {
594 {
595 .name = "mdp",
596 .start = MDP_BASE,
597 .end = MDP_BASE + 0x000F0000 - 1,
598 .flags = IORESOURCE_MEM,
599 },
600 {
601 .start = INT_MDP,
602 .end = INT_MDP,
603 .flags = IORESOURCE_IRQ,
604 },
605};
606
607static struct resource msm_mddi_resources[] = {
608 {
609 .name = "pmdh",
610 .start = PMDH_BASE,
611 .end = PMDH_BASE + PAGE_SIZE - 1,
612 .flags = IORESOURCE_MEM,
613 }
614};
615
616static struct resource msm_mddi_ext_resources[] = {
617 {
618 .name = "emdh",
619 .start = EMDH_BASE,
620 .end = EMDH_BASE + PAGE_SIZE - 1,
621 .flags = IORESOURCE_MEM,
622 }
623};
624
625static struct resource msm_ebi2_lcd_resources[] = {
626 {
627 .name = "base",
628 .start = 0xa0d00000,
629 .end = 0xa0d00000 + PAGE_SIZE - 1,
630 .flags = IORESOURCE_MEM,
631 },
632 {
633 .name = "lcd01",
634 .start = 0x98000000,
635 .end = 0x98000000 + 0x80000 - 1,
636 .flags = IORESOURCE_MEM,
637 },
638 {
639 .name = "lcd02",
640 .start = 0x9c000000,
641 .end = 0x9c000000 + 0x80000 - 1,
642 .flags = IORESOURCE_MEM,
643 },
644};
645
646static struct resource msm_tvenc_resources[] = {
647 {
648 .name = "tvenc",
649 .start = TVENC_BASE,
650 .end = TVENC_BASE + PAGE_SIZE - 1,
651 .flags = IORESOURCE_MEM,
652 }
653};
654
655static struct platform_device msm_mdp_device = {
656 .name = "mdp",
657 .id = 0,
658 .num_resources = ARRAY_SIZE(msm_mdp_resources),
659 .resource = msm_mdp_resources,
660};
661
662static struct platform_device msm_mddi_device = {
663 .name = "mddi",
664 .id = 0,
665 .num_resources = ARRAY_SIZE(msm_mddi_resources),
666 .resource = msm_mddi_resources,
667};
668
669static struct platform_device msm_mddi_ext_device = {
670 .name = "mddi_ext",
671 .id = 0,
672 .num_resources = ARRAY_SIZE(msm_mddi_ext_resources),
673 .resource = msm_mddi_ext_resources,
674};
675
676static struct platform_device msm_ebi2_lcd_device = {
677 .name = "ebi2_lcd",
678 .id = 0,
679 .num_resources = ARRAY_SIZE(msm_ebi2_lcd_resources),
680 .resource = msm_ebi2_lcd_resources,
681};
682
683static struct platform_device msm_lcdc_device = {
684 .name = "lcdc",
685 .id = 0,
686};
687
688static struct platform_device msm_tvenc_device = {
689 .name = "tvenc",
690 .id = 0,
691 .num_resources = ARRAY_SIZE(msm_tvenc_resources),
692 .resource = msm_tvenc_resources,
693};
694
695/* TSIF begin */
696#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
697
698#define MSM_TSIF_PHYS (0xa0100000)
699#define MSM_TSIF_SIZE (0x200)
700
701static struct resource tsif_resources[] = {
702 [0] = {
703 .flags = IORESOURCE_IRQ,
704 .start = INT_TSIF_IRQ,
705 .end = INT_TSIF_IRQ,
706 },
707 [1] = {
708 .flags = IORESOURCE_MEM,
709 .start = MSM_TSIF_PHYS,
710 .end = MSM_TSIF_PHYS + MSM_TSIF_SIZE - 1,
711 },
712 [2] = {
713 .flags = IORESOURCE_DMA,
714 .start = DMOV_TSIF_CHAN,
715 .end = DMOV_TSIF_CRCI,
716 },
717};
718
719static void tsif_release(struct device *dev)
720{
721 dev_info(dev, "release\n");
722}
723
724struct platform_device msm_device_tsif = {
725 .name = "msm_tsif",
726 .id = 0,
727 .num_resources = ARRAY_SIZE(tsif_resources),
728 .resource = tsif_resources,
729 .dev = {
730 .release = tsif_release,
731 },
732};
733#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
734/* TSIF end */
735
736#define MSM_TSSC_PHYS 0xAA300000
737static struct resource resources_tssc[] = {
738 {
739 .start = MSM_TSSC_PHYS,
740 .end = MSM_TSSC_PHYS + SZ_4K - 1,
741 .name = "tssc",
742 .flags = IORESOURCE_MEM,
743 },
744 {
745 .start = INT_TCHSCRN1,
746 .end = INT_TCHSCRN1,
747 .name = "tssc1",
748 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
749 },
750 {
751 .start = INT_TCHSCRN2,
752 .end = INT_TCHSCRN2,
753 .name = "tssc2",
754 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
755 },
756};
757
758struct platform_device msm_device_tssc = {
759 .name = "msm_touchscreen",
760 .id = 0,
761 .num_resources = ARRAY_SIZE(resources_tssc),
762 .resource = resources_tssc,
763};
764
765static void __init msm_register_device(struct platform_device *pdev, void *data)
766{
767 int ret;
768
769 pdev->dev.platform_data = data;
770
771 ret = platform_device_register(pdev);
772 if (ret)
773 dev_err(&pdev->dev,
774 "%s: platform_device_register() failed = %d\n",
775 __func__, ret);
776}
777
778void __init msm_fb_register_device(char *name, void *data)
779{
780 if (!strncmp(name, "mdp", 3))
781 msm_register_device(&msm_mdp_device, data);
782 else if (!strncmp(name, "pmdh", 4))
783 msm_register_device(&msm_mddi_device, data);
784 else if (!strncmp(name, "emdh", 4))
785 msm_register_device(&msm_mddi_ext_device, data);
786 else if (!strncmp(name, "ebi2", 4))
787 msm_register_device(&msm_ebi2_lcd_device, data);
788 else if (!strncmp(name, "tvenc", 5))
789 msm_register_device(&msm_tvenc_device, data);
790 else if (!strncmp(name, "lcdc", 4))
791 msm_register_device(&msm_lcdc_device, data);
792 else
793 printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
794}
795
796static struct platform_device msm_camera_device = {
797 .name = "msm_camera",
798 .id = 0,
799};
800
801void __init msm_camera_register_device(void *res, uint32_t num,
802 void *data)
803{
804 msm_camera_device.num_resources = num;
805 msm_camera_device.resource = res;
806
807 msm_register_device(&msm_camera_device, data);
808}
809
810static struct resource kgsl_3d0_resources[] = {
811 {
812 .name = KGSL_3D0_REG_MEMORY,
813 .start = 0xA0000000,
814 .end = 0xA001ffff,
815 .flags = IORESOURCE_MEM,
816 },
817 {
818 .name = KGSL_3D0_IRQ,
819 .start = INT_GRAPHICS,
820 .end = INT_GRAPHICS,
821 .flags = IORESOURCE_IRQ,
822 },
823};
824
825static struct kgsl_device_platform_data kgsl_3d0_pdata = {
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600826 /* bus_freq has been set to 160000 for power savings.
827 * OEMs may modify the value at their discretion for performance
828 * The appropriate maximum replacement for 160000 is:
829 * msm7x2x_clock_data.max_axi_khz
830 */
831 .pwrlevel = {
832 {
833 .gpu_freq = 0,
834 .bus_freq = 160000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700835 },
836 },
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600837 .init_level = 0,
838 .num_levels = 1,
839 .set_grp_async = NULL,
840 .idle_timeout = HZ/5,
841 .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700842};
843
844struct platform_device msm_kgsl_3d0 = {
845 .name = "kgsl-3d0",
846 .id = 0,
847 .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
848 .resource = kgsl_3d0_resources,
849 .dev = {
850 .platform_data = &kgsl_3d0_pdata,
851 },
852};
853
854struct platform_device *msm_footswitch_devices[] = {
855 FS_PCOM(FS_GFX3D, "fs_gfx3d"),
856};
857unsigned msm_num_footswitch_devices = ARRAY_SIZE(msm_footswitch_devices);
Taniya Das2e948192011-12-20 11:15:13 +0530858
859static struct resource gpio_resources[] = {
860 {
861 .start = INT_GPIO_GROUP1,
862 .flags = IORESOURCE_IRQ,
863 },
864 {
865 .start = INT_GPIO_GROUP2,
866 .flags = IORESOURCE_IRQ,
867 },
868};
869
870static struct platform_device msm_device_gpio = {
871 .name = "msmgpio",
872 .id = -1,
873 .resource = gpio_resources,
874 .num_resources = ARRAY_SIZE(gpio_resources),
875};
876
877static int __init msm7627_init_gpio(void)
878{
879 platform_device_register(&msm_device_gpio);
880 return 0;
881}
882
883postcore_initcall(msm7627_init_gpio);