blob: 104b2e0c6c0d9d5e8f1bebaae34acd83e1dc098d [file] [log] [blame]
Taniya Das2e948192011-12-20 11:15:13 +05301/* Copyright (c) 2011-2012, Code Aurora Forum. All rights reserved.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 */
12
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/dma-mapping.h>
16#include <linux/msm_kgsl.h>
17#include <linux/regulator/machine.h>
Taniya Das2e948192011-12-20 11:15:13 +053018#include <linux/init.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070019#include <mach/irqs.h>
20#include <mach/msm_iomap.h>
21#include <mach/board.h>
22#include <mach/dma.h>
23#include <mach/dal_axi.h>
24#include <asm/mach/flash.h>
25#include <asm/hardware/cache-l2x0.h>
26#include <asm/mach/mmc.h>
27#include <mach/rpc_hsusb.h>
28#include <mach/socinfo.h>
29
30#include "devices.h"
31#include "devices-msm7x2xa.h"
32#include "footswitch.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -070033#include "acpuclock.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034
35/* Address of GSBI blocks */
36#define MSM_GSBI0_PHYS 0xA1200000
37#define MSM_GSBI1_PHYS 0xA1300000
38
39/* GSBI QUPe devices */
40#define MSM_GSBI0_QUP_PHYS (MSM_GSBI0_PHYS + 0x80000)
41#define MSM_GSBI1_QUP_PHYS (MSM_GSBI1_PHYS + 0x80000)
42
43static struct resource gsbi0_qup_i2c_resources[] = {
44 {
45 .name = "qup_phys_addr",
46 .start = MSM_GSBI0_QUP_PHYS,
47 .end = MSM_GSBI0_QUP_PHYS + SZ_4K - 1,
48 .flags = IORESOURCE_MEM,
49 },
50 {
51 .name = "gsbi_qup_i2c_addr",
52 .start = MSM_GSBI0_PHYS,
53 .end = MSM_GSBI0_PHYS + SZ_4K - 1,
54 .flags = IORESOURCE_MEM,
55 },
56 {
57 .name = "qup_err_intr",
58 .start = INT_PWB_I2C,
59 .end = INT_PWB_I2C,
60 .flags = IORESOURCE_IRQ,
61 },
62};
63
64/* Use GSBI0 QUP for /dev/i2c-0 */
65struct platform_device msm_gsbi0_qup_i2c_device = {
66 .name = "qup_i2c",
67 .id = MSM_GSBI0_QUP_I2C_BUS_ID,
68 .num_resources = ARRAY_SIZE(gsbi0_qup_i2c_resources),
69 .resource = gsbi0_qup_i2c_resources,
70};
71
72static struct resource gsbi1_qup_i2c_resources[] = {
73 {
74 .name = "qup_phys_addr",
75 .start = MSM_GSBI1_QUP_PHYS,
76 .end = MSM_GSBI1_QUP_PHYS + SZ_4K - 1,
77 .flags = IORESOURCE_MEM,
78 },
79 {
80 .name = "gsbi_qup_i2c_addr",
81 .start = MSM_GSBI1_PHYS,
82 .end = MSM_GSBI1_PHYS + SZ_4K - 1,
83 .flags = IORESOURCE_MEM,
84 },
85 {
86 .name = "qup_err_intr",
87 .start = INT_ARM11_DMA,
88 .end = INT_ARM11_DMA,
89 .flags = IORESOURCE_IRQ,
90 },
91};
92
93/* Use GSBI1 QUP for /dev/i2c-1 */
94struct platform_device msm_gsbi1_qup_i2c_device = {
95 .name = "qup_i2c",
96 .id = MSM_GSBI1_QUP_I2C_BUS_ID,
97 .num_resources = ARRAY_SIZE(gsbi1_qup_i2c_resources),
98 .resource = gsbi1_qup_i2c_resources,
99};
100
101#define MSM_HSUSB_PHYS 0xA0800000
102static struct resource resources_hsusb_otg[] = {
103 {
104 .start = MSM_HSUSB_PHYS,
105 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
106 .flags = IORESOURCE_MEM,
107 },
108 {
109 .start = INT_USB_HS,
110 .end = INT_USB_HS,
111 .flags = IORESOURCE_IRQ,
112 },
113};
114
115static u64 dma_mask = 0xffffffffULL;
116struct platform_device msm_device_otg = {
117 .name = "msm_otg",
118 .id = -1,
119 .num_resources = ARRAY_SIZE(resources_hsusb_otg),
120 .resource = resources_hsusb_otg,
121 .dev = {
122 .dma_mask = &dma_mask,
123 .coherent_dma_mask = 0xffffffffULL,
124 },
125};
126
127static struct resource resources_gadget_peripheral[] = {
128 {
129 .start = MSM_HSUSB_PHYS,
130 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
131 .flags = IORESOURCE_MEM,
132 },
133 {
134 .start = INT_USB_HS,
135 .end = INT_USB_HS,
136 .flags = IORESOURCE_IRQ,
137 },
138};
139
140struct platform_device msm_device_gadget_peripheral = {
141 .name = "msm_hsusb",
142 .id = -1,
143 .num_resources = ARRAY_SIZE(resources_gadget_peripheral),
144 .resource = resources_gadget_peripheral,
145 .dev = {
146 .dma_mask = &dma_mask,
147 .coherent_dma_mask = 0xffffffffULL,
148 },
149};
150
151static struct resource resources_hsusb_host[] = {
152 {
153 .start = MSM_HSUSB_PHYS,
154 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
155 .flags = IORESOURCE_MEM,
156 },
157 {
158 .start = INT_USB_HS,
159 .end = INT_USB_HS,
160 .flags = IORESOURCE_IRQ,
161 },
162};
163
164struct platform_device msm_device_hsusb_host = {
165 .name = "msm_hsusb_host",
166 .id = 0,
167 .num_resources = ARRAY_SIZE(resources_hsusb_host),
168 .resource = resources_hsusb_host,
169 .dev = {
170 .dma_mask = &dma_mask,
171 .coherent_dma_mask = 0xffffffffULL,
172 },
173};
174
175static struct platform_device *msm_host_devices[] = {
176 &msm_device_hsusb_host,
177};
178
179int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
180{
181 struct platform_device *pdev;
182
183 pdev = msm_host_devices[host];
184 if (!pdev)
185 return -ENODEV;
186 pdev->dev.platform_data = plat;
187 return platform_device_register(pdev);
188}
189
190static struct resource msm_dmov_resource[] = {
191 {
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700192 .start = INT_ADM_AARM,
193 .flags = IORESOURCE_IRQ,
194 },
195 {
196 .start = 0xA9700000,
197 .end = 0xA9700000 + SZ_4K - 1,
198 .flags = IORESOURCE_MEM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700199 },
200};
201
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700202static struct msm_dmov_pdata msm_dmov_pdata = {
203 .sd = 3,
204 .sd_size = 0x400,
205};
206
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700207struct platform_device msm_device_dmov = {
Jeff Ohlstein905f1ce2011-09-07 18:50:18 -0700208 .name = "msm_dmov",
209 .id = -1,
210 .resource = msm_dmov_resource,
211 .num_resources = ARRAY_SIZE(msm_dmov_resource),
212 .dev = {
213 .platform_data = &msm_dmov_pdata,
214 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700215};
216
217struct platform_device msm_device_smd = {
218 .name = "msm_smd",
219 .id = -1,
220};
221
222static struct resource resources_uart1[] = {
223 {
224 .start = INT_UART1,
225 .end = INT_UART1,
226 .flags = IORESOURCE_IRQ,
227 },
228 {
229 .start = MSM_UART1_PHYS,
230 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
231 .flags = IORESOURCE_MEM,
232 },
233};
234
235struct platform_device msm_device_uart1 = {
236 .name = "msm_serial",
237 .id = 0,
238 .num_resources = ARRAY_SIZE(resources_uart1),
239 .resource = resources_uart1,
240};
241
242#define MSM_UART1DM_PHYS 0xA0200000
243static struct resource msm_uart1_dm_resources[] = {
244 {
245 .start = MSM_UART1DM_PHYS,
246 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
247 .flags = IORESOURCE_MEM,
248 },
249 {
250 .start = INT_UART1DM_IRQ,
251 .end = INT_UART1DM_IRQ,
252 .flags = IORESOURCE_IRQ,
253 },
254 {
255 .start = INT_UART1DM_RX,
256 .end = INT_UART1DM_RX,
257 .flags = IORESOURCE_IRQ,
258 },
259 {
260 .start = DMOV_HSUART1_TX_CHAN,
261 .end = DMOV_HSUART1_RX_CHAN,
262 .name = "uartdm_channels",
263 .flags = IORESOURCE_DMA,
264 },
265 {
266 .start = DMOV_HSUART1_TX_CRCI,
267 .end = DMOV_HSUART1_RX_CRCI,
268 .name = "uartdm_crci",
269 .flags = IORESOURCE_DMA,
270 },
271};
272
273static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
274struct platform_device msm_device_uart_dm1 = {
275 .name = "msm_serial_hs",
276 .id = 0,
277 .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
278 .resource = msm_uart1_dm_resources,
279 .dev = {
280 .dma_mask = &msm_uart_dm1_dma_mask,
281 .coherent_dma_mask = DMA_BIT_MASK(32),
282 },
283};
284
285#define MSM_UART2DM_PHYS 0xA0300000
286static struct resource msm_uart2dm_resources[] = {
287 {
288 .start = MSM_UART2DM_PHYS,
289 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
290 .name = "uartdm_resource",
291 .flags = IORESOURCE_MEM,
292 },
293 {
294 .start = INT_UART2DM_IRQ,
295 .end = INT_UART2DM_IRQ,
296 .flags = IORESOURCE_IRQ,
297 },
298};
299
300struct platform_device msm_device_uart_dm2 = {
301 .name = "msm_serial_hsl",
302 .id = 0,
303 .num_resources = ARRAY_SIZE(msm_uart2dm_resources),
304 .resource = msm_uart2dm_resources,
305};
306
307#define MSM_NAND_PHYS 0xA0A00000
308#define MSM_NANDC01_PHYS 0xA0A40000
309#define MSM_NANDC10_PHYS 0xA0A80000
310#define MSM_NANDC11_PHYS 0xA0AC0000
311#define EBI2_REG_BASE 0xA0D00000
312static struct resource resources_nand[] = {
313 [0] = {
314 .name = "msm_nand_dmac",
315 .start = DMOV_NAND_CHAN,
316 .end = DMOV_NAND_CHAN,
317 .flags = IORESOURCE_DMA,
318 },
319 [1] = {
320 .name = "msm_nand_phys",
321 .start = MSM_NAND_PHYS,
322 .end = MSM_NAND_PHYS + 0x7FF,
323 .flags = IORESOURCE_MEM,
324 },
325 [2] = {
326 .name = "msm_nandc01_phys",
327 .start = MSM_NANDC01_PHYS,
328 .end = MSM_NANDC01_PHYS + 0x7FF,
329 .flags = IORESOURCE_MEM,
330 },
331 [3] = {
332 .name = "msm_nandc10_phys",
333 .start = MSM_NANDC10_PHYS,
334 .end = MSM_NANDC10_PHYS + 0x7FF,
335 .flags = IORESOURCE_MEM,
336 },
337 [4] = {
338 .name = "msm_nandc11_phys",
339 .start = MSM_NANDC11_PHYS,
340 .end = MSM_NANDC11_PHYS + 0x7FF,
341 .flags = IORESOURCE_MEM,
342 },
343 [5] = {
344 .name = "ebi2_reg_base",
345 .start = EBI2_REG_BASE,
346 .end = EBI2_REG_BASE + 0x60,
347 .flags = IORESOURCE_MEM,
348 },
349};
350
351struct flash_platform_data msm_nand_data;
352
353struct platform_device msm_device_nand = {
354 .name = "msm_nand",
355 .id = -1,
356 .num_resources = ARRAY_SIZE(resources_nand),
357 .resource = resources_nand,
358 .dev = {
359 .platform_data = &msm_nand_data,
360 },
361};
362
363#define MSM_SDC1_BASE 0xA0400000
364#define MSM_SDC2_BASE 0xA0500000
365#define MSM_SDC3_BASE 0xA0600000
366#define MSM_SDC4_BASE 0xA0700000
367static struct resource resources_sdc1[] = {
368 {
369 .start = MSM_SDC1_BASE,
370 .end = MSM_SDC1_BASE + SZ_4K - 1,
371 .flags = IORESOURCE_MEM,
372 },
373 {
374 .start = INT_SDC1_0,
375 .end = INT_SDC1_1,
376 .flags = IORESOURCE_IRQ,
377 },
378 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700379 .name = "sdcc_dma_chnl",
380 .start = DMOV_SDC1_CHAN,
381 .end = DMOV_SDC1_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700382 .flags = IORESOURCE_DMA,
383 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700384 {
385 .name = "sdcc_dma_crci",
386 .start = DMOV_SDC1_CRCI,
387 .end = DMOV_SDC1_CRCI,
388 .flags = IORESOURCE_DMA,
389 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700390};
391
392static struct resource resources_sdc2[] = {
393 {
394 .start = MSM_SDC2_BASE,
395 .end = MSM_SDC2_BASE + SZ_4K - 1,
396 .flags = IORESOURCE_MEM,
397 },
398 {
399 .start = INT_SDC2_0,
400 .end = INT_SDC2_1,
401 .flags = IORESOURCE_IRQ,
402 },
403 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700404 .name = "sdcc_dma_chnl",
405 .start = DMOV_SDC2_CHAN,
406 .end = DMOV_SDC2_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700407 .flags = IORESOURCE_DMA,
408 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700409 {
410 .name = "sdcc_dma_crci",
411 .start = DMOV_SDC2_CRCI,
412 .end = DMOV_SDC2_CRCI,
413 .flags = IORESOURCE_DMA,
414 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700415};
416
417static struct resource resources_sdc3[] = {
418 {
419 .start = MSM_SDC3_BASE,
420 .end = MSM_SDC3_BASE + SZ_4K - 1,
421 .flags = IORESOURCE_MEM,
422 },
423 {
424 .start = INT_SDC3_0,
425 .end = INT_SDC3_1,
426 .flags = IORESOURCE_IRQ,
427 },
428 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700429 .name = "sdcc_dma_chnl",
Sujit Reddy Thumma119bfbb2011-10-12 11:52:21 +0530430 .start = DMOV_SDC3_CHAN,
431 .end = DMOV_SDC3_CHAN,
Krishna Konda25786ec2011-07-25 16:21:36 -0700432 .flags = IORESOURCE_DMA,
433 },
434 {
435 .name = "sdcc_dma_crci",
Sujit Reddy Thumma119bfbb2011-10-12 11:52:21 +0530436 .start = DMOV_SDC3_CRCI,
437 .end = DMOV_SDC3_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700438 .flags = IORESOURCE_DMA,
439 },
440};
441
442static struct resource resources_sdc4[] = {
443 {
444 .start = MSM_SDC4_BASE,
445 .end = MSM_SDC4_BASE + SZ_4K - 1,
446 .flags = IORESOURCE_MEM,
447 },
448 {
449 .start = INT_SDC4_0,
450 .end = INT_SDC4_1,
451 .flags = IORESOURCE_IRQ,
452 },
453 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700454 .name = "sdcc_dma_chnl",
Sujit Reddy Thumma119bfbb2011-10-12 11:52:21 +0530455 .start = DMOV_SDC4_CHAN,
456 .end = DMOV_SDC4_CHAN,
Krishna Konda25786ec2011-07-25 16:21:36 -0700457 .flags = IORESOURCE_DMA,
458 },
459 {
460 .name = "sdcc_dma_crci",
Sujit Reddy Thumma119bfbb2011-10-12 11:52:21 +0530461 .start = DMOV_SDC4_CRCI,
462 .end = DMOV_SDC4_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700463 .flags = IORESOURCE_DMA,
464 },
465};
466
467struct platform_device msm_device_sdc1 = {
468 .name = "msm_sdcc",
469 .id = 1,
470 .num_resources = ARRAY_SIZE(resources_sdc1),
471 .resource = resources_sdc1,
472 .dev = {
473 .coherent_dma_mask = 0xffffffff,
474 },
475};
476
477struct platform_device msm_device_sdc2 = {
478 .name = "msm_sdcc",
479 .id = 2,
480 .num_resources = ARRAY_SIZE(resources_sdc2),
481 .resource = resources_sdc2,
482 .dev = {
483 .coherent_dma_mask = 0xffffffff,
484 },
485};
486
487struct platform_device msm_device_sdc3 = {
488 .name = "msm_sdcc",
489 .id = 3,
490 .num_resources = ARRAY_SIZE(resources_sdc3),
491 .resource = resources_sdc3,
492 .dev = {
493 .coherent_dma_mask = 0xffffffff,
494 },
495};
496
497struct platform_device msm_device_sdc4 = {
498 .name = "msm_sdcc",
499 .id = 4,
500 .num_resources = ARRAY_SIZE(resources_sdc4),
501 .resource = resources_sdc4,
502 .dev = {
503 .coherent_dma_mask = 0xffffffff,
504 },
505};
506
507static struct platform_device *msm_sdcc_devices[] __initdata = {
508 &msm_device_sdc1,
509 &msm_device_sdc2,
510 &msm_device_sdc3,
511 &msm_device_sdc4,
512};
513
514int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
515{
516 struct platform_device *pdev;
517
518 if (controller < 1 || controller > 4)
519 return -EINVAL;
520
521 pdev = msm_sdcc_devices[controller-1];
522 pdev->dev.platform_data = plat;
523 return platform_device_register(pdev);
524}
525
Suresh Vankadara20cd3be2012-01-18 00:34:06 +0530526#ifdef CONFIG_MSM_CAMERA_V4L2
527static struct resource msm_csic0_resources[] = {
528 {
529 .name = "csic",
530 .start = 0xA0F00000,
531 .end = 0xA0F00000 + 0x00100000 - 1,
532 .flags = IORESOURCE_MEM,
533 },
534 {
535 .name = "csic",
536 .start = INT_CSI_IRQ_0,
537 .end = INT_CSI_IRQ_0,
538 .flags = IORESOURCE_IRQ,
539 },
540};
541
542static struct resource msm_csic1_resources[] = {
543 {
544 .name = "csic",
545 .start = 0xA1000000,
546 .end = 0xA1000000 + 0x00100000 - 1,
547 .flags = IORESOURCE_MEM,
548 },
549 {
550 .name = "csic",
551 .start = INT_CSI_IRQ_1,
552 .end = INT_CSI_IRQ_1,
553 .flags = IORESOURCE_IRQ,
554 },
555};
556
557struct platform_device msm7x27a_device_csic0 = {
558 .name = "msm_csic",
559 .id = 0,
560 .resource = msm_csic0_resources,
561 .num_resources = ARRAY_SIZE(msm_csic0_resources),
562};
563
564struct platform_device msm7x27a_device_csic1 = {
565 .name = "msm_csic",
566 .id = 1,
567 .resource = msm_csic1_resources,
568 .num_resources = ARRAY_SIZE(msm_csic1_resources),
569};
570
571static struct resource msm_clkctl_resources[] = {
572 {
573 .name = "clk_ctl",
574 .start = MSM_CLK_CTL_PHYS,
575 .end = MSM_CLK_CTL_PHYS + MSM_CLK_CTL_SIZE - 1,
576 .flags = IORESOURCE_MEM,
577 },
578};
579struct platform_device msm7x27a_device_clkctl = {
580 .name = "msm_clk_ctl",
581 .id = 0,
582 .resource = msm_clkctl_resources,
583 .num_resources = ARRAY_SIZE(msm_clkctl_resources),
584};
585
586struct platform_device msm7x27a_device_vfe = {
587 .name = "msm_vfe",
588 .id = 0,
589};
590
591#endif
592
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700593#define MDP_BASE 0xAA200000
594#define MIPI_DSI_HW_BASE 0xA1100000
595
596static struct resource msm_mipi_dsi_resources[] = {
597 {
598 .name = "mipi_dsi",
599 .start = MIPI_DSI_HW_BASE,
600 .end = MIPI_DSI_HW_BASE + 0x000F0000 - 1,
601 .flags = IORESOURCE_MEM,
602 },
603 {
604 .start = INT_DSI_IRQ,
605 .end = INT_DSI_IRQ,
606 .flags = IORESOURCE_IRQ,
607 },
608};
609
610static struct platform_device msm_mipi_dsi_device = {
611 .name = "mipi_dsi",
612 .id = 1,
613 .num_resources = ARRAY_SIZE(msm_mipi_dsi_resources),
614 .resource = msm_mipi_dsi_resources,
615};
616
617static struct resource msm_mdp_resources[] = {
618 {
619 .name = "mdp",
620 .start = MDP_BASE,
621 .end = MDP_BASE + 0x000F1008 - 1,
622 .flags = IORESOURCE_MEM,
623 },
624 {
625 .start = INT_MDP,
626 .end = INT_MDP,
627 .flags = IORESOURCE_IRQ,
628 },
629};
630
631static struct platform_device msm_mdp_device = {
632 .name = "mdp",
633 .id = 0,
634 .num_resources = ARRAY_SIZE(msm_mdp_resources),
635 .resource = msm_mdp_resources,
636};
637
638static struct platform_device msm_lcdc_device = {
639 .name = "lcdc",
640 .id = 0,
641};
642
643static struct resource kgsl_3d0_resources[] = {
644 {
645 .name = KGSL_3D0_REG_MEMORY,
646 .start = 0xA0000000,
647 .end = 0xA001ffff,
648 .flags = IORESOURCE_MEM,
649 },
650 {
651 .name = KGSL_3D0_IRQ,
652 .start = INT_GRAPHICS,
653 .end = INT_GRAPHICS,
654 .flags = IORESOURCE_IRQ,
655 },
656};
657
658static struct kgsl_device_platform_data kgsl_3d0_pdata = {
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600659 .pwrlevel = {
660 {
661 .gpu_freq = 245760000,
662 .bus_freq = 200000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700663 },
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600664 {
Lynus Vazeaf0aac2012-01-05 12:28:47 +0530665 .gpu_freq = 192000000,
666 .bus_freq = 160000000,
667 },
668 {
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600669 .gpu_freq = 133330000,
670 .bus_freq = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700671 },
672 },
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600673 .init_level = 0,
Lynus Vazeaf0aac2012-01-05 12:28:47 +0530674 .num_levels = 3,
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600675 .set_grp_async = set_grp_xbar_async,
676 .idle_timeout = HZ/5,
677 .nap_allowed = false,
678 .clk_map = KGSL_CLK_CORE | KGSL_CLK_IFACE | KGSL_CLK_MEM,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700679};
680
681struct platform_device msm_kgsl_3d0 = {
682 .name = "kgsl-3d0",
683 .id = 0,
684 .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
685 .resource = kgsl_3d0_resources,
686 .dev = {
687 .platform_data = &kgsl_3d0_pdata,
688 },
689};
690
691void __init msm7x25a_kgsl_3d0_init(void)
692{
693 if (cpu_is_msm7x25a() || cpu_is_msm7x25aa()) {
Lynus Vaz971610e2012-01-06 11:00:32 +0530694 kgsl_3d0_pdata.num_levels = 2;
Lucille Sylvesterdce84cd2011-10-12 14:15:37 -0600695 kgsl_3d0_pdata.pwrlevel[0].gpu_freq = 133330000;
696 kgsl_3d0_pdata.pwrlevel[0].bus_freq = 160000000;
697 kgsl_3d0_pdata.pwrlevel[1].gpu_freq = 96000000;
698 kgsl_3d0_pdata.pwrlevel[1].bus_freq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700699 }
700}
701
702static void __init msm_register_device(struct platform_device *pdev, void *data)
703{
704 int ret;
705
706 pdev->dev.platform_data = data;
707
708 ret = platform_device_register(pdev);
709
710 if (ret)
711 dev_err(&pdev->dev,
712 "%s: platform_device_register() failed = %d\n",
713 __func__, ret);
714}
715
716void __init msm_fb_register_device(char *name, void *data)
717{
718 if (!strncmp(name, "mdp", 3))
719 msm_register_device(&msm_mdp_device, data);
720 else if (!strncmp(name, "mipi_dsi", 8))
721 msm_register_device(&msm_mipi_dsi_device, data);
722 else if (!strncmp(name, "lcdc", 4))
723 msm_register_device(&msm_lcdc_device, data);
724 else
725 printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
726}
727
728#define PERPH_WEB_BLOCK_ADDR (0xA9D00040)
729#define PDM0_CTL_OFFSET (0x04)
730#define SIZE_8B (0x08)
731
732static struct resource resources_led[] = {
733 {
734 .start = PERPH_WEB_BLOCK_ADDR,
735 .end = PERPH_WEB_BLOCK_ADDR + (SIZE_8B) - 1,
736 .name = "led-gpio-pdm",
737 .flags = IORESOURCE_MEM,
738 },
739};
740
741static struct led_info msm_kpbl_pdm_led_pdata = {
742 .name = "keyboard-backlight",
743};
744
745struct platform_device led_pdev = {
746 .name = "leds-msm-pdm",
747 /* use pdev id to represent pdm id */
748 .id = 0,
749 .num_resources = ARRAY_SIZE(resources_led),
750 .resource = resources_led,
751 .dev = {
752 .platform_data = &msm_kpbl_pdm_led_pdata,
753 },
754};
755
Manish Dewangan3a260992011-06-24 18:01:34 +0530756struct platform_device asoc_msm_pcm = {
757 .name = "msm-dsp-audio",
758 .id = 0,
759};
760
761struct platform_device asoc_msm_dai0 = {
762 .name = "msm-codec-dai",
763 .id = 0,
764};
765
766struct platform_device asoc_msm_dai1 = {
767 .name = "msm-cpu-dai",
768 .id = 0,
769};
770
Taniya Das2e948192011-12-20 11:15:13 +0530771static struct resource gpio_resources[] = {
772 {
773 .start = INT_GPIO_GROUP1,
774 .flags = IORESOURCE_IRQ,
775 },
776 {
777 .start = INT_GPIO_GROUP2,
778 .flags = IORESOURCE_IRQ,
779 },
780};
781
782static struct platform_device msm_device_gpio = {
783 .name = "msmgpio",
784 .id = -1,
785 .resource = gpio_resources,
786 .num_resources = ARRAY_SIZE(gpio_resources),
787};
788
789static int msm7627a_init_gpio(void)
790{
791 platform_device_register(&msm_device_gpio);
792 return 0;
793}
794postcore_initcall(msm7627a_init_gpio);
795
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700796int __init msm7x2x_misc_init(void)
797{
Stephen Boydbb600ae2011-08-02 20:11:40 -0700798 msm_clock_init(&msm7x27a_clock_init_data);
Matt Wagantallec57f062011-08-16 23:54:46 -0700799 if (cpu_is_msm7x27aa())
800 acpuclk_init(&acpuclk_7x27aa_soc_data);
801 else
802 acpuclk_init(&acpuclk_7x27a_soc_data);
803
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700804
805 return 0;
806}
807
808#ifdef CONFIG_CACHE_L2X0
809static int __init msm7x27x_cache_init(void)
810{
811 int aux_ctrl = 0;
812
813 /* Way Size 010(0x2) 32KB */
814 aux_ctrl = (0x1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) | \
815 (0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | \
816 (0x1 << L2X0_AUX_CTRL_EVNT_MON_BUS_EN_SHIFT);
817
818 l2x0_init(MSM_L2CC_BASE, aux_ctrl, L2X0_AUX_CTRL_MASK);
819
820 return 0;
821}
822#else
pankaj kumar80d7cb62011-08-23 13:37:55 +0530823static int __init msm7x27x_cache_init(void){ return 0; }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700824#endif
825
826void __init msm_common_io_init(void)
827{
828 msm_map_common_io();
829 msm7x27x_cache_init();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -0700830 if (socinfo_init() < 0)
831 pr_err("%s: socinfo_init() failed!\n", __func__);
832
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700833}
834
835struct platform_device *msm_footswitch_devices[] = {
836 FS_PCOM(FS_GFX3D, "fs_gfx3d"),
837};
838unsigned msm_num_footswitch_devices = ARRAY_SIZE(msm_footswitch_devices);