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review.evervolv.com / android_kernel_htc_msm8960 / 225abeefd4f610ec9fe801ebd8782828c2c6b77c / . / arch / arm / boot / dts / msmcopper.dts
blob: 08c16fa9b2b41c098aa8f3be2f7da9cb9ea06ccf [file] [log] [blame]
Sathish Ambley4df614c2011-10-07 16:30:46 -0700[diff] [blame]1/dts-v1/;
2
3/include/ "skeleton.dtsi"
4
5/ {
6 model = "Qualcomm MSM Copper";
7 compatible = "qcom,msmcopper-sim", "qcom,msmcopper";
8 interrupt-parent = <&intc>;
9
10 intc: interrupt-controller@F9000000 {
11 compatible = "qcom,msm-qgic2";
12 interrupt-controller;
Michael Bohanc7224532012-01-06 16:02:52 -0800[diff] [blame]13 #interrupt-cells = <3>;
Sathish Ambley4df614c2011-10-07 16:30:46 -0700[diff] [blame]14 reg = <0xF9000000 0x1000>,
15 <0xF9002000 0x1000>;
16 };
Sathish Ambley3d50c762011-10-25 15:26:00 -0700[diff] [blame]17
Michael Bohan0425f6f2012-01-17 14:36:39 -0800[diff] [blame]18 msmgpio: gpio@fd400000 {
19 compatible = "qcom,msm-gpio";
20 interrupt-controller;
21 #interrupt-cells = <2>;
22 reg = <0xfd400000 0x4000>;
23 };
24
Sathish Ambley098f9bd2011-11-09 16:32:53 -0800[diff] [blame]25 timer {
26 compatible = "qcom,msm-qtimer";
Michael Bohanc7224532012-01-06 16:02:52 -0800[diff] [blame]27 interrupts = <1 2 0>;
Sathish Ambley098f9bd2011-11-09 16:32:53 -0800[diff] [blame]28 };
29
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]30 serial@f991f000 {
Sathish Ambley3d50c762011-10-25 15:26:00 -0700[diff] [blame]31 compatible = "qcom,msm-lsuart-v14";
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]32 reg = <0xf991f000 0x1000>;
Michael Bohanc7224532012-01-06 16:02:52 -0800[diff] [blame]33 interrupts = <0 109 0>;
Sathish Ambley3d50c762011-10-25 15:26:00 -0700[diff] [blame]34 };
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530[diff] [blame]35
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]36 usb@f9a55000 {
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530[diff] [blame]37 compatible = "qcom,hsusb-otg";
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]38 reg = <0xf9a55000 0x400>;
Michael Bohanc7224532012-01-06 16:02:52 -0800[diff] [blame]39 interrupts = <0 134 0>;
Pavankumar Kondetieaea7fe2011-10-27 14:46:45 +0530[diff] [blame]40
41 qcom,hsusb-otg-phy-type = <2>;
42 qcom,hsusb-otg-mode = <1>;
43 qcom,hsusb-otg-otg-control = <1>;
44 };
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]45
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]46 qcom,sdcc@f980b000 {
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]47 cell-index = <1>;
48 compatible = "qcom,msm-sdcc";
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]49 reg = <0xf980b000 0x1000>;
Michael Bohanc7224532012-01-06 16:02:52 -0800[diff] [blame]50 interrupts = <0 123 0>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]51
52 qcom,sdcc-clk-rates = <400000 24000000 48000000>;
53 qcom,sdcc-sup-voltages = <3300 3300>;
54 qcom,sdcc-bus-width = <8>;
55 qcom,sdcc-nonremovable;
56 qcom,sdcc-disable_cmd23;
57 };
58
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]59 qcom,sdcc@f984b000 {
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]60 cell-index = <3>;
61 compatible = "qcom,msm-sdcc";
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]62 reg = <0xf984b000 0x1000>;
Michael Bohanc7224532012-01-06 16:02:52 -0800[diff] [blame]63 interrupts = <0 127 0>;
Sujit Reddy Thumma7285c2e2011-11-04 10:18:15 +0530[diff] [blame]64
65 qcom,sdcc-clk-rates = <400000 24000000 48000000>;
66 qcom,sdcc-sup-voltages = <3300 3300>;
67 qcom,sdcc-bus-width = <4>;
68 qcom,sdcc-disable_cmd23;
69 };
Yan He1466daa2011-11-30 17:25:38 -0800[diff] [blame]70
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]71 qcom,sps@f9980000 {
Yan He1466daa2011-11-30 17:25:38 -0800[diff] [blame]72 compatible = "qcom,msm_sps";
David Brown225abee2012-02-09 22:28:50 -0800[diff] [blame^]73 reg = <0xf9984000 0x15000>,
74 <0xf9999000 0xb000>;
Michael Bohanc7224532012-01-06 16:02:52 -0800[diff] [blame]75 interrupts = <0 94 0>;
Yan He1466daa2011-11-30 17:25:38 -0800[diff] [blame]76
77 qcom,bam-dma-res-pipes = <6>;
78 };
79
Harini Jayaraman5f98dbb2011-12-20 13:38:19 -0700[diff] [blame]80 spi@f9924000 {
81 compatible = "qcom,spi-qup-v2";
82 reg = <0xf9924000 0x1000>;
83 interrupts = <96>;
84 spi-max-frequency = <24000000>;
85 };
Sathish Ambley4df614c2011-10-07 16:30:46 -0700[diff] [blame]86};