| Sakari Ailus | a5e9086 | 2007-07-18 18:04:17 -0300 | [diff] [blame] | 1 | /* | 
 | 2 |  * drivers/media/video/tcm825x.h | 
 | 3 |  * | 
 | 4 |  * Register definitions for the TCM825X CameraChip. | 
 | 5 |  * | 
 | 6 |  * Author: David Cohen (david.cohen@indt.org.br) | 
 | 7 |  * | 
 | 8 |  * This file is licensed under the terms of the GNU General Public License | 
 | 9 |  * version 2. This program is licensed "as is" without any warranty of any | 
 | 10 |  * kind, whether express or implied. | 
 | 11 |  * | 
 | 12 |  * This file was based on ov9640.h from MontaVista | 
 | 13 |  */ | 
 | 14 |  | 
 | 15 | #ifndef TCM825X_H | 
 | 16 | #define TCM825X_H | 
 | 17 |  | 
 | 18 | #include <linux/videodev2.h> | 
 | 19 |  | 
 | 20 | #include <media/v4l2-int-device.h> | 
 | 21 |  | 
 | 22 | #define TCM825X_NAME "tcm825x" | 
 | 23 |  | 
 | 24 | #define TCM825X_MASK(x)  x & 0x00ff | 
 | 25 | #define TCM825X_ADDR(x) (x & 0xff00) >> 8 | 
 | 26 |  | 
 | 27 | /* The TCM825X I2C sensor chip has a fixed slave address of 0x3d. */ | 
 | 28 | #define TCM825X_I2C_ADDR	0x3d | 
 | 29 |  | 
 | 30 | /* | 
 | 31 |  * define register offsets for the TCM825X sensor chip | 
 | 32 |  * OFFSET(8 bits) + MASK(8 bits) | 
 | 33 |  * MASK bit 4 and 3 are used when the register uses more than one address | 
 | 34 |  */ | 
 | 35 | #define TCM825X_FPS		0x0280 | 
 | 36 | #define TCM825X_ACF		0x0240 | 
 | 37 | #define TCM825X_DOUTBUF		0x020C | 
 | 38 | #define TCM825X_DCLKP		0x0202 | 
 | 39 | #define TCM825X_ACFDET		0x0201 | 
 | 40 | #define TCM825X_DOUTSW		0x0380 | 
 | 41 | #define TCM825X_DATAHZ		0x0340 | 
 | 42 | #define TCM825X_PICSIZ		0x033c | 
 | 43 | #define TCM825X_PICFMT		0x0302 | 
 | 44 | #define TCM825X_V_INV		0x0480 | 
 | 45 | #define TCM825X_H_INV		0x0440 | 
 | 46 | #define TCM825X_ESRLSW		0x0430 | 
 | 47 | #define TCM825X_V_LENGTH	0x040F | 
 | 48 | #define TCM825X_ALCSW		0x0580 | 
 | 49 | #define TCM825X_ESRLIM		0x0560 | 
 | 50 | #define TCM825X_ESRSPD_U        0x051F | 
 | 51 | #define TCM825X_ESRSPD_L        0x06FF | 
 | 52 | #define TCM825X_AG		0x07FF | 
 | 53 | #define TCM825X_ESRSPD2         0x06FF | 
 | 54 | #define TCM825X_ALCMODE         0x0830 | 
 | 55 | #define TCM825X_ALCH            0x080F | 
 | 56 | #define TCM825X_ALCL            0x09FF | 
 | 57 | #define TCM825X_AWBSW           0x0A80 | 
 | 58 | #define TCM825X_MRG             0x0BFF | 
 | 59 | #define TCM825X_MBG             0x0CFF | 
 | 60 | #define TCM825X_GAMSW           0x0D80 | 
 | 61 | #define TCM825X_HDTG            0x0EFF | 
 | 62 | #define TCM825X_VDTG            0x0FFF | 
 | 63 | #define TCM825X_HDTCORE         0x10F0 | 
 | 64 | #define TCM825X_VDTCORE         0x100F | 
 | 65 | #define TCM825X_CONT            0x11FF | 
 | 66 | #define TCM825X_BRIGHT          0x12FF | 
 | 67 | #define TCM825X_VHUE            0x137F | 
 | 68 | #define TCM825X_UHUE            0x147F | 
 | 69 | #define TCM825X_VGAIN           0x153F | 
 | 70 | #define TCM825X_UGAIN           0x163F | 
 | 71 | #define TCM825X_UVCORE          0x170F | 
 | 72 | #define TCM825X_SATU            0x187F | 
 | 73 | #define TCM825X_MHMODE          0x1980 | 
 | 74 | #define TCM825X_MHLPFSEL        0x1940 | 
 | 75 | #define TCM825X_YMODE           0x1930 | 
 | 76 | #define TCM825X_MIXHG           0x1907 | 
 | 77 | #define TCM825X_LENS            0x1A3F | 
 | 78 | #define TCM825X_AGLIM           0x1BE0 | 
 | 79 | #define TCM825X_LENSRPOL        0x1B10 | 
 | 80 | #define TCM825X_LENSRGAIN       0x1B0F | 
 | 81 | #define TCM825X_ES100S          0x1CFF | 
 | 82 | #define TCM825X_ES120S          0x1DFF | 
 | 83 | #define TCM825X_DMASK           0x1EC0 | 
 | 84 | #define TCM825X_CODESW          0x1E20 | 
 | 85 | #define TCM825X_CODESEL         0x1E10 | 
 | 86 | #define TCM825X_TESPIC          0x1E04 | 
 | 87 | #define TCM825X_PICSEL          0x1E03 | 
 | 88 | #define TCM825X_HNUM            0x20FF | 
 | 89 | #define TCM825X_VOUTPH          0x287F | 
 | 90 | #define TCM825X_ESROUT          0x327F | 
 | 91 | #define TCM825X_ESROUT2         0x33FF | 
 | 92 | #define TCM825X_AGOUT           0x34FF | 
 | 93 | #define TCM825X_DGOUT           0x353F | 
 | 94 | #define TCM825X_AGSLOW1         0x39C0 | 
 | 95 | #define TCM825X_FLLSMODE        0x3930 | 
 | 96 | #define TCM825X_FLLSLIM         0x390F | 
 | 97 | #define TCM825X_DETSEL          0x3AF0 | 
 | 98 | #define TCM825X_ACDETNC         0x3A0F | 
 | 99 | #define TCM825X_AGSLOW2         0x3BC0 | 
 | 100 | #define TCM825X_DG              0x3B3F | 
 | 101 | #define TCM825X_REJHLEV         0x3CFF | 
 | 102 | #define TCM825X_ALCLOCK         0x3D80 | 
 | 103 | #define TCM825X_FPSLNKSW        0x3D40 | 
 | 104 | #define TCM825X_ALCSPD          0x3D30 | 
 | 105 | #define TCM825X_REJH            0x3D03 | 
 | 106 | #define TCM825X_SHESRSW         0x3E80 | 
 | 107 | #define TCM825X_ESLIMSEL        0x3E40 | 
 | 108 | #define TCM825X_SHESRSPD        0x3E30 | 
 | 109 | #define TCM825X_ELSTEP          0x3E0C | 
 | 110 | #define TCM825X_ELSTART         0x3E03 | 
 | 111 | #define TCM825X_AGMIN           0x3FFF | 
 | 112 | #define TCM825X_PREGRG          0x423F | 
 | 113 | #define TCM825X_PREGBG          0x433F | 
 | 114 | #define TCM825X_PRERG           0x443F | 
 | 115 | #define TCM825X_PREBG           0x453F | 
 | 116 | #define TCM825X_MSKBR           0x477F | 
 | 117 | #define TCM825X_MSKGR           0x487F | 
 | 118 | #define TCM825X_MSKRB           0x497F | 
 | 119 | #define TCM825X_MSKGB           0x4A7F | 
 | 120 | #define TCM825X_MSKRG           0x4B7F | 
 | 121 | #define TCM825X_MSKBG           0x4C7F | 
 | 122 | #define TCM825X_HDTCSW          0x4D80 | 
 | 123 | #define TCM825X_VDTCSW          0x4D40 | 
 | 124 | #define TCM825X_DTCYL           0x4D3F | 
 | 125 | #define TCM825X_HDTPSW          0x4E80 | 
 | 126 | #define TCM825X_VDTPSW          0x4E40 | 
 | 127 | #define TCM825X_DTCGAIN         0x4E3F | 
 | 128 | #define TCM825X_DTLLIMSW        0x4F10 | 
 | 129 | #define TCM825X_DTLYLIM         0x4F0F | 
 | 130 | #define TCM825X_YLCUTLMSK       0x5080 | 
 | 131 | #define TCM825X_YLCUTL          0x503F | 
 | 132 | #define TCM825X_YLCUTHMSK       0x5180 | 
 | 133 | #define TCM825X_YLCUTH          0x513F | 
 | 134 | #define TCM825X_UVSKNC          0x527F | 
 | 135 | #define TCM825X_UVLJ            0x537F | 
 | 136 | #define TCM825X_WBGMIN          0x54FF | 
 | 137 | #define TCM825X_WBGMAX          0x55FF | 
 | 138 | #define TCM825X_WBSPDUP         0x5603 | 
 | 139 | #define TCM825X_ALLAREA         0x5820 | 
 | 140 | #define TCM825X_WBLOCK          0x5810 | 
 | 141 | #define TCM825X_WB2SP           0x580F | 
 | 142 | #define TCM825X_KIZUSW          0x5920 | 
 | 143 | #define TCM825X_PBRSW           0x5910 | 
 | 144 | #define TCM825X_ABCSW           0x5903 | 
 | 145 | #define TCM825X_PBDLV           0x5AFF | 
 | 146 | #define TCM825X_PBC1LV          0x5BFF | 
 | 147 |  | 
 | 148 | #define TCM825X_NUM_REGS	(TCM825X_ADDR(TCM825X_PBC1LV) + 1) | 
 | 149 |  | 
 | 150 | #define TCM825X_BYTES_PER_PIXEL 2 | 
 | 151 |  | 
 | 152 | #define TCM825X_REG_TERM 0xff		/* terminating list entry for reg */ | 
 | 153 | #define TCM825X_VAL_TERM 0xff		/* terminating list entry for val */ | 
 | 154 |  | 
 | 155 | /* define a structure for tcm825x register initialization values */ | 
 | 156 | struct tcm825x_reg { | 
 | 157 | 	u8 val; | 
 | 158 | 	u16 reg; | 
 | 159 | }; | 
 | 160 |  | 
 | 161 | enum image_size { subQCIF = 0, QQVGA, QCIF, QVGA, CIF, VGA }; | 
 | 162 | enum pixel_format { YUV422 = 0, RGB565 }; | 
 | 163 | #define NUM_IMAGE_SIZES 6 | 
 | 164 | #define NUM_PIXEL_FORMATS 2 | 
 | 165 |  | 
| Sakari Ailus | 2060955 | 2007-08-30 09:20:42 -0300 | [diff] [blame] | 166 | #define TCM825X_XCLK_MIN	11900000 | 
 | 167 | #define TCM825X_XCLK_MAX	25000000 | 
 | 168 |  | 
| Sakari Ailus | a5e9086 | 2007-07-18 18:04:17 -0300 | [diff] [blame] | 169 | struct capture_size { | 
 | 170 | 	unsigned long width; | 
 | 171 | 	unsigned long height; | 
 | 172 | }; | 
 | 173 |  | 
 | 174 | struct tcm825x_platform_data { | 
 | 175 | 	/* Is the sensor usable? Doesn't yet mean it's there, but you | 
 | 176 | 	 * can try! */ | 
 | 177 | 	int (*is_okay)(void); | 
 | 178 | 	/* Set power state, zero is off, non-zero is on. */ | 
 | 179 | 	int (*power_set)(int power); | 
 | 180 | 	/* Default registers written after power-on or reset. */ | 
 | 181 | 	const struct tcm825x_reg *(*default_regs)(void); | 
 | 182 | 	int (*needs_reset)(struct v4l2_int_device *s, void *buf, | 
 | 183 | 			   struct v4l2_pix_format *fmt); | 
| Sakari Ailus | 2060955 | 2007-08-30 09:20:42 -0300 | [diff] [blame] | 184 | 	int (*ifparm)(struct v4l2_ifparm *p); | 
| Sakari Ailus | 34cb616 | 2008-05-13 09:21:06 -0300 | [diff] [blame] | 185 | 	int (*is_upside_down)(void); | 
| Sakari Ailus | a5e9086 | 2007-07-18 18:04:17 -0300 | [diff] [blame] | 186 | }; | 
 | 187 |  | 
 | 188 | /* Array of image sizes supported by TCM825X.  These must be ordered from | 
 | 189 |  * smallest image size to largest. | 
 | 190 |  */ | 
| Tobias Klauser | e23b290 | 2009-02-09 18:06:49 -0300 | [diff] [blame] | 191 | static const struct capture_size tcm825x_sizes[] = { | 
| Sakari Ailus | a5e9086 | 2007-07-18 18:04:17 -0300 | [diff] [blame] | 192 | 	{ 128,  96 }, /* subQCIF */ | 
 | 193 | 	{ 160, 120 }, /* QQVGA */ | 
 | 194 | 	{ 176, 144 }, /* QCIF */ | 
 | 195 | 	{ 320, 240 }, /* QVGA */ | 
 | 196 | 	{ 352, 288 }, /* CIF */ | 
 | 197 | 	{ 640, 480 }, /* VGA */ | 
 | 198 | }; | 
 | 199 |  | 
 | 200 | #endif /* ifndef TCM825X_H */ |