blob: cdbfc59ece6115e3b5dce81e9e0807a346efb187 [file] [log] [blame]
Stepan Moskovchenko24cd8642011-11-29 13:07:53 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/platform_device.h>
17#include <linux/bootmem.h>
18#include <asm/mach-types.h>
19#include <mach/msm_bus_board.h>
20#include <mach/board.h>
21#include <mach/gpio.h>
22#include <mach/gpiomux.h>
23#include "devices.h"
24#include "board-msm8960.h"
25
26#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
27#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 3) /* 4 bpp x 3 pages */
28#else
29#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 2) /* 4 bpp x 2 pages */
30#endif
31
32#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
33#define MSM_FB_EXT_BUF_SIZE (1920 * 1088 * 2 * 1) /* 2 bpp x 1 page */
34#elif defined(CONFIG_FB_MSM_TVOUT)
35#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
36#else
37#define MSM_FB_EXT_BUF_SIZE 0
38#endif
39
40#ifdef CONFIG_FB_MSM_OVERLAY_WRITEBACK
41/* width x height x 3 bpp x 2 frame buffer */
42#define MSM_FB_WRITEBACK_SIZE (1376 * 768 * 3 * 2)
43#define MSM_FB_WRITEBACK_OFFSET \
44 (MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE)
45#else
46#define MSM_FB_WRITEBACK_SIZE 0
47#define MSM_FB_WRITEBACK_OFFSET 0
48#endif
49
50#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
51/* 4 bpp x 2 page HDMI case */
52#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
53#else
54/* Note: must be multiple of 4096 */
55#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
56 MSM_FB_WRITEBACK_SIZE, 4096)
57#endif
58
59#define MDP_VSYNC_GPIO 0
60
61#define PANEL_NAME_MAX_LEN 30
62#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
63#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
64#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
65#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
66#define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
67#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
68#define HDMI_PANEL_NAME "hdmi_msm"
69#define TVOUT_PANEL_NAME "tvout_msm"
70
71static int writeback_offset(void)
72{
73 return MSM_FB_WRITEBACK_OFFSET;
74}
75
76static struct resource msm_fb_resources[] = {
77 {
78 .flags = IORESOURCE_DMA,
79 }
80};
81
82static int msm_fb_detect_panel(const char *name)
83{
84 if (machine_is_msm8960_liquid()) {
85 if (!strncmp(name, MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
86 strnlen(MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME,
87 PANEL_NAME_MAX_LEN)))
88 return 0;
89 } else {
90 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
91 strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
92 PANEL_NAME_MAX_LEN)))
93 return 0;
94
95#ifndef CONFIG_FB_MSM_MIPI_PANEL_DETECT
96 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
97 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
98 PANEL_NAME_MAX_LEN)))
99 return 0;
100
101 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
102 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
103 PANEL_NAME_MAX_LEN)))
104 return 0;
105
106 if (!strncmp(name, MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
107 strnlen(MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
108 PANEL_NAME_MAX_LEN)))
109 return 0;
110
111 if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
112 strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
113 PANEL_NAME_MAX_LEN)))
114 return 0;
115#endif
116 }
117
118 if (!strncmp(name, HDMI_PANEL_NAME,
119 strnlen(HDMI_PANEL_NAME,
120 PANEL_NAME_MAX_LEN)))
121 return 0;
122
123 if (!strncmp(name, TVOUT_PANEL_NAME,
124 strnlen(TVOUT_PANEL_NAME,
125 PANEL_NAME_MAX_LEN)))
126 return 0;
127
128 pr_warning("%s: not supported '%s'", __func__, name);
129 return -ENODEV;
130}
131
132static struct msm_fb_platform_data msm_fb_pdata = {
133 .detect_client = msm_fb_detect_panel,
134};
135
136static struct platform_device msm_fb_device = {
137 .name = "msm_fb",
138 .id = 0,
139 .num_resources = ARRAY_SIZE(msm_fb_resources),
140 .resource = msm_fb_resources,
141 .dev.platform_data = &msm_fb_pdata,
142};
143
144static bool dsi_power_on;
145
146/**
147 * LiQUID panel on/off
148 *
149 * @param on
150 *
151 * @return int
152 */
153static int mipi_dsi_liquid_panel_power(int on)
154{
155 static struct regulator *reg_l2, *reg_ext_3p3v;
156 static int gpio21, gpio24, gpio43;
157 int rc;
158
159 pr_info("%s: on=%d\n", __func__, on);
160
161 gpio21 = PM8921_GPIO_PM_TO_SYS(21); /* disp power enable_n */
162 gpio43 = PM8921_GPIO_PM_TO_SYS(43); /* Displays Enable (rst_n)*/
163 gpio24 = PM8921_GPIO_PM_TO_SYS(24); /* Backlight PWM */
164
165 if (!dsi_power_on) {
166
167 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
168 "dsi_vdda");
169 if (IS_ERR(reg_l2)) {
170 pr_err("could not get 8921_l2, rc = %ld\n",
171 PTR_ERR(reg_l2));
172 return -ENODEV;
173 }
174
175 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
176 if (rc) {
177 pr_err("set_voltage l2 failed, rc=%d\n", rc);
178 return -EINVAL;
179 }
180
181 reg_ext_3p3v = regulator_get(&msm_mipi_dsi1_device.dev,
182 "vdd_lvds_3p3v");
183 if (IS_ERR(reg_ext_3p3v)) {
184 pr_err("could not get reg_ext_3p3v, rc = %ld\n",
185 PTR_ERR(reg_ext_3p3v));
186 return -ENODEV;
187 }
188
189 rc = gpio_request(gpio21, "disp_pwr_en_n");
190 if (rc) {
191 pr_err("request gpio 21 failed, rc=%d\n", rc);
192 return -ENODEV;
193 }
194
195 rc = gpio_request(gpio43, "disp_rst_n");
196 if (rc) {
197 pr_err("request gpio 43 failed, rc=%d\n", rc);
198 return -ENODEV;
199 }
200
201 rc = gpio_request(gpio24, "disp_backlight_pwm");
202 if (rc) {
203 pr_err("request gpio 24 failed, rc=%d\n", rc);
204 return -ENODEV;
205 }
206
207 dsi_power_on = true;
208 }
209
210 if (on) {
211 rc = regulator_set_optimum_mode(reg_l2, 100000);
212 if (rc < 0) {
213 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
214 return -EINVAL;
215 }
216 rc = regulator_enable(reg_l2);
217 if (rc) {
218 pr_err("enable l2 failed, rc=%d\n", rc);
219 return -ENODEV;
220 }
221
222 rc = regulator_enable(reg_ext_3p3v);
223 if (rc) {
224 pr_err("enable reg_ext_3p3v failed, rc=%d\n", rc);
225 return -ENODEV;
226 }
227
228 /* set reset pin before power enable */
229 gpio_set_value_cansleep(gpio43, 0); /* disp disable (resx=0) */
230
231 gpio_set_value_cansleep(gpio21, 0); /* disp power enable_n */
232 msleep(20);
233 gpio_set_value_cansleep(gpio43, 1); /* disp enable */
234 msleep(20);
235 gpio_set_value_cansleep(gpio43, 0); /* disp enable */
236 msleep(20);
237 gpio_set_value_cansleep(gpio43, 1); /* disp enable */
238 msleep(20);
239 } else {
240 gpio_set_value_cansleep(gpio43, 0);
241 gpio_set_value_cansleep(gpio21, 1);
242
243 rc = regulator_disable(reg_l2);
244 if (rc) {
245 pr_err("disable reg_l2 failed, rc=%d\n", rc);
246 return -ENODEV;
247 }
248 rc = regulator_disable(reg_ext_3p3v);
249 if (rc) {
250 pr_err("disable reg_ext_3p3v failed, rc=%d\n", rc);
251 return -ENODEV;
252 }
253 rc = regulator_set_optimum_mode(reg_l2, 100);
254 if (rc < 0) {
255 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
256 return -EINVAL;
257 }
258 }
259
260 return 0;
261}
262
263static int mipi_dsi_cdp_panel_power(int on)
264{
265 static struct regulator *reg_l8, *reg_l23, *reg_l2;
266 static int gpio43;
267 int rc;
268
269 pr_info("%s: state : %d\n", __func__, on);
270
271 if (!dsi_power_on) {
272
273 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
274 "dsi_vdc");
275 if (IS_ERR(reg_l8)) {
276 pr_err("could not get 8921_l8, rc = %ld\n",
277 PTR_ERR(reg_l8));
278 return -ENODEV;
279 }
280 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
281 "dsi_vddio");
282 if (IS_ERR(reg_l23)) {
283 pr_err("could not get 8921_l23, rc = %ld\n",
284 PTR_ERR(reg_l23));
285 return -ENODEV;
286 }
287 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
288 "dsi_vdda");
289 if (IS_ERR(reg_l2)) {
290 pr_err("could not get 8921_l2, rc = %ld\n",
291 PTR_ERR(reg_l2));
292 return -ENODEV;
293 }
294 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
295 if (rc) {
296 pr_err("set_voltage l8 failed, rc=%d\n", rc);
297 return -EINVAL;
298 }
299 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
300 if (rc) {
301 pr_err("set_voltage l23 failed, rc=%d\n", rc);
302 return -EINVAL;
303 }
304 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
305 if (rc) {
306 pr_err("set_voltage l2 failed, rc=%d\n", rc);
307 return -EINVAL;
308 }
309 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
310 rc = gpio_request(gpio43, "disp_rst_n");
311 if (rc) {
312 pr_err("request gpio 43 failed, rc=%d\n", rc);
313 return -ENODEV;
314 }
315 dsi_power_on = true;
316 }
317 if (on) {
318 rc = regulator_set_optimum_mode(reg_l8, 100000);
319 if (rc < 0) {
320 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
321 return -EINVAL;
322 }
323 rc = regulator_set_optimum_mode(reg_l23, 100000);
324 if (rc < 0) {
325 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
326 return -EINVAL;
327 }
328 rc = regulator_set_optimum_mode(reg_l2, 100000);
329 if (rc < 0) {
330 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
331 return -EINVAL;
332 }
333 rc = regulator_enable(reg_l8);
334 if (rc) {
335 pr_err("enable l8 failed, rc=%d\n", rc);
336 return -ENODEV;
337 }
338 rc = regulator_enable(reg_l23);
339 if (rc) {
340 pr_err("enable l8 failed, rc=%d\n", rc);
341 return -ENODEV;
342 }
343 rc = regulator_enable(reg_l2);
344 if (rc) {
345 pr_err("enable l2 failed, rc=%d\n", rc);
346 return -ENODEV;
347 }
348 gpio_set_value_cansleep(gpio43, 1);
349 } else {
350 rc = regulator_disable(reg_l2);
351 if (rc) {
352 pr_err("disable reg_l2 failed, rc=%d\n", rc);
353 return -ENODEV;
354 }
355 rc = regulator_disable(reg_l8);
356 if (rc) {
357 pr_err("disable reg_l8 failed, rc=%d\n", rc);
358 return -ENODEV;
359 }
360 rc = regulator_disable(reg_l23);
361 if (rc) {
362 pr_err("disable reg_l23 failed, rc=%d\n", rc);
363 return -ENODEV;
364 }
365 rc = regulator_set_optimum_mode(reg_l8, 100);
366 if (rc < 0) {
367 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
368 return -EINVAL;
369 }
370 rc = regulator_set_optimum_mode(reg_l23, 100);
371 if (rc < 0) {
372 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
373 return -EINVAL;
374 }
375 rc = regulator_set_optimum_mode(reg_l2, 100);
376 if (rc < 0) {
377 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
378 return -EINVAL;
379 }
380 gpio_set_value_cansleep(gpio43, 0);
381 }
382 return 0;
383}
384
385static int mipi_dsi_panel_power(int on)
386{
387 int ret;
388
389 pr_info("%s: on=%d\n", __func__, on);
390
391 if (machine_is_msm8960_liquid())
392 ret = mipi_dsi_liquid_panel_power(on);
393 else
394 ret = mipi_dsi_cdp_panel_power(on);
395
396 return ret;
397}
398
399static struct mipi_dsi_platform_data mipi_dsi_pdata = {
400 .vsync_gpio = MDP_VSYNC_GPIO,
401 .dsi_power_save = mipi_dsi_panel_power,
402};
403
404#ifdef CONFIG_MSM_BUS_SCALING
405
406static struct msm_bus_vectors mdp_init_vectors[] = {
407 {
408 .src = MSM_BUS_MASTER_MDP_PORT0,
409 .dst = MSM_BUS_SLAVE_EBI_CH0,
410 .ab = 0,
411 .ib = 0,
412 },
413};
414
415#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
416static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
417 /* If HDMI is used as primary */
418 {
419 .src = MSM_BUS_MASTER_MDP_PORT0,
420 .dst = MSM_BUS_SLAVE_EBI_CH0,
421 .ab = 2000000000,
422 .ib = 2000000000,
423 },
424};
425static struct msm_bus_paths mdp_bus_scale_usecases[] = {
426 {
427 ARRAY_SIZE(mdp_init_vectors),
428 mdp_init_vectors,
429 },
430 {
431 ARRAY_SIZE(hdmi_as_primary_vectors),
432 hdmi_as_primary_vectors,
433 },
434 {
435 ARRAY_SIZE(hdmi_as_primary_vectors),
436 hdmi_as_primary_vectors,
437 },
438 {
439 ARRAY_SIZE(hdmi_as_primary_vectors),
440 hdmi_as_primary_vectors,
441 },
442 {
443 ARRAY_SIZE(hdmi_as_primary_vectors),
444 hdmi_as_primary_vectors,
445 },
446 {
447 ARRAY_SIZE(hdmi_as_primary_vectors),
448 hdmi_as_primary_vectors,
449 },
450};
451#else
452static struct msm_bus_vectors mdp_ui_vectors[] = {
453 {
454 .src = MSM_BUS_MASTER_MDP_PORT0,
455 .dst = MSM_BUS_SLAVE_EBI_CH0,
456 .ab = 216000000 * 2,
457 .ib = 270000000 * 2,
458 },
459};
460
461static struct msm_bus_vectors mdp_vga_vectors[] = {
462 /* VGA and less video */
463 {
464 .src = MSM_BUS_MASTER_MDP_PORT0,
465 .dst = MSM_BUS_SLAVE_EBI_CH0,
466 .ab = 216000000 * 2,
467 .ib = 270000000 * 2,
468 },
469};
470
471static struct msm_bus_vectors mdp_720p_vectors[] = {
472 /* 720p and less video */
473 {
474 .src = MSM_BUS_MASTER_MDP_PORT0,
475 .dst = MSM_BUS_SLAVE_EBI_CH0,
476 .ab = 230400000 * 2,
477 .ib = 288000000 * 2,
478 },
479};
480
481static struct msm_bus_vectors mdp_1080p_vectors[] = {
482 /* 1080p and less video */
483 {
484 .src = MSM_BUS_MASTER_MDP_PORT0,
485 .dst = MSM_BUS_SLAVE_EBI_CH0,
486 .ab = 334080000 * 2,
487 .ib = 417600000 * 2,
488 },
489};
490
491static struct msm_bus_paths mdp_bus_scale_usecases[] = {
492 {
493 ARRAY_SIZE(mdp_init_vectors),
494 mdp_init_vectors,
495 },
496 {
497 ARRAY_SIZE(mdp_ui_vectors),
498 mdp_ui_vectors,
499 },
500 {
501 ARRAY_SIZE(mdp_ui_vectors),
502 mdp_ui_vectors,
503 },
504 {
505 ARRAY_SIZE(mdp_vga_vectors),
506 mdp_vga_vectors,
507 },
508 {
509 ARRAY_SIZE(mdp_720p_vectors),
510 mdp_720p_vectors,
511 },
512 {
513 ARRAY_SIZE(mdp_1080p_vectors),
514 mdp_1080p_vectors,
515 },
516};
517#endif
518
519static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
520 mdp_bus_scale_usecases,
521 ARRAY_SIZE(mdp_bus_scale_usecases),
522 .name = "mdp",
523};
524
525#endif
526
527#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
528int mdp_core_clk_rate_table[] = {
529 200000000,
530 200000000,
531 200000000,
532 200000000,
533};
534#else
535int mdp_core_clk_rate_table[] = {
536 85330000,
537 85330000,
538 160000000,
539 200000000,
540};
541#endif
542
543static struct msm_panel_common_pdata mdp_pdata = {
544 .gpio = MDP_VSYNC_GPIO,
545#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
546 .mdp_core_clk_rate = 200000000,
547#else
548 .mdp_core_clk_rate = 85330000,
549#endif
550 .mdp_core_clk_table = mdp_core_clk_rate_table,
551 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
552#ifdef CONFIG_MSM_BUS_SCALING
553 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
554#endif
555 .mdp_rev = MDP_REV_42,
556 .writeback_offset = writeback_offset,
557};
558
559static struct platform_device mipi_dsi_renesas_panel_device = {
560 .name = "mipi_renesas",
561 .id = 0,
562};
563
564static struct platform_device mipi_dsi_simulator_panel_device = {
565 .name = "mipi_simulator",
566 .id = 0,
567};
568
569#define LPM_CHANNEL0 0
570static int toshiba_gpio[] = {LPM_CHANNEL0};
571
572static struct mipi_dsi_panel_platform_data toshiba_pdata = {
573 .gpio = toshiba_gpio,
574};
575
576static struct platform_device mipi_dsi_toshiba_panel_device = {
577 .name = "mipi_toshiba",
578 .id = 0,
579 .dev = {
580 .platform_data = &toshiba_pdata,
581 }
582};
583
584#define FPGA_3D_GPIO_CONFIG_ADDR 0xB5
585static int dsi2lvds_gpio[2] = {
586 0,/* Backlight PWM-ID=0 for PMIC-GPIO#24 */
587 0x1F08 /* DSI2LVDS Bridge GPIO Output, mask=0x1f, out=0x08 */
588 };
589
590static struct msm_panel_common_pdata mipi_dsi2lvds_pdata = {
591 .gpio_num = dsi2lvds_gpio,
592};
593
594static struct mipi_dsi_phy_ctrl dsi_novatek_cmd_mode_phy_db = {
595
596/* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
597 {0x0F, 0x0a, 0x04, 0x00, 0x20}, /* regulator */
598 /* timing */
599 {0xab, 0x8a, 0x18, 0x00, 0x92, 0x97, 0x1b, 0x8c,
600 0x0c, 0x03, 0x04, 0xa0},
601 {0x5f, 0x00, 0x00, 0x10}, /* phy ctrl */
602 {0xff, 0x00, 0x06, 0x00}, /* strength */
603 /* pll control */
604 {0x40, 0xf9, 0x30, 0xda, 0x00, 0x40, 0x03, 0x62,
605 0x40, 0x07, 0x03,
606 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01},
607};
608
609static struct mipi_dsi_panel_platform_data novatek_pdata = {
610 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
611 .fpga_ctrl_mode = FPGA_SPI_INTF,
612 .phy_ctrl_settings = &dsi_novatek_cmd_mode_phy_db,
613};
614
615static struct platform_device mipi_dsi_novatek_panel_device = {
616 .name = "mipi_novatek",
617 .id = 0,
618 .dev = {
619 .platform_data = &novatek_pdata,
620 }
621};
622
623static struct platform_device mipi_dsi2lvds_bridge_device = {
624 .name = "mipi_tc358764",
625 .id = 0,
626 .dev.platform_data = &mipi_dsi2lvds_pdata,
627};
628
629#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
630static struct resource hdmi_msm_resources[] = {
631 {
632 .name = "hdmi_msm_qfprom_addr",
633 .start = 0x00700000,
634 .end = 0x007060FF,
635 .flags = IORESOURCE_MEM,
636 },
637 {
638 .name = "hdmi_msm_hdmi_addr",
639 .start = 0x04A00000,
640 .end = 0x04A00FFF,
641 .flags = IORESOURCE_MEM,
642 },
643 {
644 .name = "hdmi_msm_irq",
645 .start = HDMI_IRQ,
646 .end = HDMI_IRQ,
647 .flags = IORESOURCE_IRQ,
648 },
649};
650
651static int hdmi_enable_5v(int on);
652static int hdmi_core_power(int on, int show);
653static int hdmi_cec_power(int on);
654
655static struct msm_hdmi_platform_data hdmi_msm_data = {
656 .irq = HDMI_IRQ,
657 .enable_5v = hdmi_enable_5v,
658 .core_power = hdmi_core_power,
659 .cec_power = hdmi_cec_power,
660};
661
662static struct platform_device hdmi_msm_device = {
663 .name = "hdmi_msm",
664 .id = 0,
665 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
666 .resource = hdmi_msm_resources,
667 .dev.platform_data = &hdmi_msm_data,
668};
669#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
670
671#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
672static struct platform_device wfd_panel_device = {
673 .name = "wfd_panel",
674 .id = 0,
675 .dev.platform_data = NULL,
676};
677#endif
678
679#ifdef CONFIG_MSM_BUS_SCALING
680static struct msm_bus_vectors dtv_bus_init_vectors[] = {
681 {
682 .src = MSM_BUS_MASTER_MDP_PORT0,
683 .dst = MSM_BUS_SLAVE_EBI_CH0,
684 .ab = 0,
685 .ib = 0,
686 },
687};
688
689#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
690static struct msm_bus_vectors dtv_bus_def_vectors[] = {
691 {
692 .src = MSM_BUS_MASTER_MDP_PORT0,
693 .dst = MSM_BUS_SLAVE_EBI_CH0,
694 .ab = 2000000000,
695 .ib = 2000000000,
696 },
697};
698#else
699static struct msm_bus_vectors dtv_bus_def_vectors[] = {
700 {
701 .src = MSM_BUS_MASTER_MDP_PORT0,
702 .dst = MSM_BUS_SLAVE_EBI_CH0,
703 .ab = 566092800 * 2,
704 .ib = 707616000 * 2,
705 },
706};
707#endif
708
709static struct msm_bus_paths dtv_bus_scale_usecases[] = {
710 {
711 ARRAY_SIZE(dtv_bus_init_vectors),
712 dtv_bus_init_vectors,
713 },
714 {
715 ARRAY_SIZE(dtv_bus_def_vectors),
716 dtv_bus_def_vectors,
717 },
718};
719static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
720 dtv_bus_scale_usecases,
721 ARRAY_SIZE(dtv_bus_scale_usecases),
722 .name = "dtv",
723};
724
725static struct lcdc_platform_data dtv_pdata = {
726 .bus_scale_table = &dtv_bus_scale_pdata,
727};
728#endif
729
730static struct gpiomux_setting mdp_vsync_suspend_cfg = {
731 .func = GPIOMUX_FUNC_GPIO,
732 .drv = GPIOMUX_DRV_2MA,
733 .pull = GPIOMUX_PULL_DOWN,
734};
735
736static struct gpiomux_setting mdp_vsync_active_cfg = {
737 .func = GPIOMUX_FUNC_1,
738 .drv = GPIOMUX_DRV_2MA,
739 .pull = GPIOMUX_PULL_DOWN,
740};
741
742static struct msm_gpiomux_config msm8960_mdp_vsync_configs[] __initdata = {
743 {
744 .gpio = MDP_VSYNC_GPIO,
745 .settings = {
746 [GPIOMUX_ACTIVE] = &mdp_vsync_active_cfg,
747 [GPIOMUX_SUSPENDED] = &mdp_vsync_suspend_cfg,
748 },
749 }
750};
751
752#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
753static struct gpiomux_setting hdmi_suspend_cfg = {
754 .func = GPIOMUX_FUNC_GPIO,
755 .drv = GPIOMUX_DRV_2MA,
756 .pull = GPIOMUX_PULL_DOWN,
757};
758
759static struct gpiomux_setting hdmi_active_1_cfg = {
760 .func = GPIOMUX_FUNC_1,
761 .drv = GPIOMUX_DRV_2MA,
762 .pull = GPIOMUX_PULL_UP,
763};
764
765static struct gpiomux_setting hdmi_active_2_cfg = {
766 .func = GPIOMUX_FUNC_1,
767 .drv = GPIOMUX_DRV_2MA,
768 .pull = GPIOMUX_PULL_DOWN,
769};
770
771static struct msm_gpiomux_config msm8960_hdmi_configs[] __initdata = {
772 {
773 .gpio = 99,
774 .settings = {
775 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
776 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
777 },
778 },
779 {
780 .gpio = 100,
781 .settings = {
782 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
783 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
784 },
785 },
786 {
787 .gpio = 101,
788 .settings = {
789 [GPIOMUX_ACTIVE] = &hdmi_active_1_cfg,
790 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
791 },
792 },
793 {
794 .gpio = 102,
795 .settings = {
796 [GPIOMUX_ACTIVE] = &hdmi_active_2_cfg,
797 [GPIOMUX_SUSPENDED] = &hdmi_suspend_cfg,
798 },
799 },
800};
801
802static int hdmi_enable_5v(int on)
803{
804 /* TBD: PM8921 regulator instead of 8901 */
805 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
806 static int prev_on;
807 int rc;
808
809 if (on == prev_on)
810 return 0;
811
812 if (!reg_8921_hdmi_mvs)
813 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
814 "hdmi_mvs");
815
816 if (on) {
817 rc = regulator_enable(reg_8921_hdmi_mvs);
818 if (rc) {
819 pr_err("'%s' regulator enable failed, rc=%d\n",
820 "8921_hdmi_mvs", rc);
821 return rc;
822 }
823 pr_debug("%s(on): success\n", __func__);
824 } else {
825 rc = regulator_disable(reg_8921_hdmi_mvs);
826 if (rc)
827 pr_warning("'%s' regulator disable failed, rc=%d\n",
828 "8921_hdmi_mvs", rc);
829 pr_debug("%s(off): success\n", __func__);
830 }
831
832 prev_on = on;
833
834 return 0;
835}
836
837static int hdmi_core_power(int on, int show)
838{
839 static struct regulator *reg_8921_l23, *reg_8921_s4;
840 static int prev_on;
841 int rc;
842
843 if (on == prev_on)
844 return 0;
845
846 /* TBD: PM8921 regulator instead of 8901 */
847 if (!reg_8921_l23) {
848 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
849 if (IS_ERR(reg_8921_l23)) {
850 pr_err("could not get reg_8921_l23, rc = %ld\n",
851 PTR_ERR(reg_8921_l23));
852 return -ENODEV;
853 }
854 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
855 if (rc) {
856 pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc);
857 return -EINVAL;
858 }
859 }
860 if (!reg_8921_s4) {
861 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
862 if (IS_ERR(reg_8921_s4)) {
863 pr_err("could not get reg_8921_s4, rc = %ld\n",
864 PTR_ERR(reg_8921_s4));
865 return -ENODEV;
866 }
867 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
868 if (rc) {
869 pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
870 return -EINVAL;
871 }
872 }
873
874 if (on) {
875 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
876 if (rc < 0) {
877 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
878 return -EINVAL;
879 }
880 rc = regulator_enable(reg_8921_l23);
881 if (rc) {
882 pr_err("'%s' regulator enable failed, rc=%d\n",
883 "hdmi_avdd", rc);
884 return rc;
885 }
886 rc = regulator_enable(reg_8921_s4);
887 if (rc) {
888 pr_err("'%s' regulator enable failed, rc=%d\n",
889 "hdmi_vcc", rc);
890 return rc;
891 }
892 rc = gpio_request(100, "HDMI_DDC_CLK");
893 if (rc) {
894 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
895 "HDMI_DDC_CLK", 100, rc);
896 goto error1;
897 }
898 rc = gpio_request(101, "HDMI_DDC_DATA");
899 if (rc) {
900 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
901 "HDMI_DDC_DATA", 101, rc);
902 goto error2;
903 }
904 rc = gpio_request(102, "HDMI_HPD");
905 if (rc) {
906 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
907 "HDMI_HPD", 102, rc);
908 goto error3;
909 }
910 pr_debug("%s(on): success\n", __func__);
911 } else {
912 gpio_free(100);
913 gpio_free(101);
914 gpio_free(102);
915
916 rc = regulator_disable(reg_8921_l23);
917 if (rc) {
918 pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
919 return -ENODEV;
920 }
921 rc = regulator_disable(reg_8921_s4);
922 if (rc) {
923 pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
924 return -ENODEV;
925 }
926 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
927 if (rc < 0) {
928 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
929 return -EINVAL;
930 }
931 pr_debug("%s(off): success\n", __func__);
932 }
933
934 prev_on = on;
935
936 return 0;
937
938error3:
939 gpio_free(101);
940error2:
941 gpio_free(100);
942error1:
943 regulator_disable(reg_8921_l23);
944 regulator_disable(reg_8921_s4);
945 return rc;
946}
947
948static int hdmi_cec_power(int on)
949{
950 static int prev_on;
951 int rc;
952
953 if (on == prev_on)
954 return 0;
955
956 if (on) {
957 rc = gpio_request(99, "HDMI_CEC_VAR");
958 if (rc) {
959 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
960 "HDMI_CEC_VAR", 99, rc);
961 goto error;
962 }
963 pr_debug("%s(on): success\n", __func__);
964 } else {
965 gpio_free(99);
966 pr_debug("%s(off): success\n", __func__);
967 }
968
969 prev_on = on;
970
971 return 0;
972error:
973 return rc;
974}
975#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
976
977void __init msm8960_init_fb(void)
978{
979#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
980 msm_gpiomux_install(msm8960_hdmi_configs,
981 ARRAY_SIZE(msm8960_hdmi_configs));
982#endif
983
984 msm_gpiomux_install(msm8960_mdp_vsync_configs,
985 ARRAY_SIZE(msm8960_mdp_vsync_configs));
986
987 platform_device_register(&msm_fb_device);
988
989 if (machine_is_msm8960_sim())
990 platform_device_register(&mipi_dsi_simulator_panel_device);
991
992 if (machine_is_msm8960_rumi3())
993 platform_device_register(&mipi_dsi_renesas_panel_device);
994
995 if (!machine_is_msm8960_sim() && !machine_is_msm8960_rumi3()) {
996 platform_device_register(&mipi_dsi_novatek_panel_device);
997
998#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
999 platform_device_register(&hdmi_msm_device);
1000#endif
1001 }
1002
1003 if (machine_is_msm8960_liquid())
1004 platform_device_register(&mipi_dsi2lvds_bridge_device);
1005 else
1006 platform_device_register(&mipi_dsi_toshiba_panel_device);
1007
1008 if (machine_is_msm8x60_rumi3()) {
1009 msm_fb_register_device("mdp", NULL);
1010 mipi_dsi_pdata.target_type = 1;
1011 } else
1012 msm_fb_register_device("mdp", &mdp_pdata);
1013 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
1014#ifdef CONFIG_MSM_BUS_SCALING
1015 msm_fb_register_device("dtv", &dtv_pdata);
1016#endif
1017}
1018
1019void __init msm8960_allocate_fb_region(void)
1020{
1021 void *addr;
1022 unsigned long size;
1023
1024 size = MSM_FB_SIZE;
1025 addr = alloc_bootmem_align(size, 0x1000);
1026 msm_fb_resources[0].start = __pa(addr);
1027 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
1028 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
1029 size, addr, __pa(addr));
1030}