| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | menu "DMA support" |
| 2 | |
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame] | 3 | config SH_DMA_API |
| 4 | bool |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | |
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame] | 6 | config SH_DMA |
| 7 | bool "SuperH on-chip DMA controller (DMAC) support" |
| Paul Mundt | 3e76783 | 2007-07-20 14:23:04 +0900 | [diff] [blame] | 8 | depends on CPU_SH3 || CPU_SH4 |
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame] | 9 | select SH_DMA_API |
| 10 | default n |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 11 | |
| Nobuhiro Iwamatsu | 988f831 | 2009-03-16 03:22:07 +0000 | [diff] [blame] | 12 | config SH_DMA_IRQ_MULTI |
| 13 | bool |
| 14 | depends on SH_DMA |
| Paul Mundt | a27873c | 2009-04-04 11:40:22 -0400 | [diff] [blame] | 15 | default y if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \ |
| 16 | CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7750R || \ |
| 17 | CPU_SUBTYPE_SH7751R || CPU_SUBTYPE_SH7091 || \ |
| 18 | CPU_SUBTYPE_SH7763 || CPU_SUBTYPE_SH7764 || \ |
| Magnus Damm | 3d6ad46 | 2009-05-11 09:01:08 +0000 | [diff] [blame] | 19 | CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || \ |
| 20 | CPU_SUBTYPE_SH7760 |
| Nobuhiro Iwamatsu | 988f831 | 2009-03-16 03:22:07 +0000 | [diff] [blame] | 21 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 22 | config NR_ONCHIP_DMA_CHANNELS |
| Paul Mundt | fc10020 | 2007-07-20 14:24:57 +0900 | [diff] [blame] | 23 | int |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 24 | depends on SH_DMA |
| Paul Mundt | a27873c | 2009-04-04 11:40:22 -0400 | [diff] [blame] | 25 | default "4" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7751 || \ |
| 26 | CPU_SUBTYPE_SH7750S || CPU_SUBTYPE_SH7091 |
| 27 | default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R || \ |
| 28 | CPU_SUBTYPE_SH7760 |
| 29 | default "12" if CPU_SUBTYPE_SH7723 || CPU_SUBTYPE_SH7780 || \ |
| Kuninori Morimoto | 24d7619 | 2009-08-19 10:24:15 +0000 | [diff] [blame^] | 30 | CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7724 |
| Nobuhiro Iwamatsu | 71b973a | 2009-03-10 17:26:49 +0900 | [diff] [blame] | 31 | default "6" |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 32 | help |
| 33 | This allows you to specify the number of channels that the on-chip |
| Kuninori Morimoto | 24d7619 | 2009-08-19 10:24:15 +0000 | [diff] [blame^] | 34 | DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the |
| 35 | SH7750R/SH7751R/SH7760, 12 for the SH7723/SH7780/SH7785/SH7724, default is 6. |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 36 | |
| 37 | config NR_DMA_CHANNELS_BOOL |
| 38 | depends on SH_DMA |
| 39 | bool "Override default number of maximum DMA channels" |
| 40 | help |
| 41 | This allows you to forcibly update the maximum number of supported |
| 42 | DMA channels for a given board. If this is unset, this will default |
| 43 | to the number of channels that the on-chip DMAC has. |
| 44 | |
| 45 | config NR_DMA_CHANNELS |
| 46 | int "Maximum number of DMA channels" |
| 47 | depends on SH_DMA && NR_DMA_CHANNELS_BOOL |
| 48 | default NR_ONCHIP_DMA_CHANNELS |
| 49 | help |
| 50 | This allows you to specify the maximum number of DMA channels to |
| 51 | support. Setting this to a higher value allows for cascading DMACs |
| 52 | with additional channels. |
| 53 | |
| Manuel Lauss | fc467a2 | 2007-05-09 17:36:15 +0900 | [diff] [blame] | 54 | config SH_DMABRG |
| 55 | bool "SH7760 DMABRG support" |
| 56 | depends on CPU_SUBTYPE_SH7760 |
| 57 | help |
| 58 | The DMABRG does data transfers from main memory to Audio/USB units |
| 59 | of the SH7760. |
| 60 | Say Y if you want to use Audio/USB DMA on your SH7760 board. |
| 61 | |
| Paul Mundt | da62e71 | 2009-03-17 09:30:36 +0900 | [diff] [blame] | 62 | config PVR2_DMA |
| 63 | tristate "PowerVR 2 DMAC support" |
| 64 | depends on SH_DREAMCAST && SH_DMA |
| 65 | help |
| 66 | Selecting this will enable support for the PVR2 DMA controller. |
| 67 | As this chains off of the on-chip DMAC, that must also be |
| 68 | enabled by default. |
| 69 | |
| 70 | This is primarily used by the pvr2fb framebuffer driver for |
| 71 | certain optimizations, but is not necessary for functionality. |
| 72 | |
| 73 | If in doubt, say N. |
| 74 | |
| Paul Mundt | 40f49e7 | 2009-03-17 12:47:56 +0900 | [diff] [blame] | 75 | config G2_DMA |
| 76 | tristate "G2 Bus DMA support" |
| 77 | depends on SH_DREAMCAST |
| 78 | select SH_DMA_API |
| 79 | help |
| 80 | This enables support for the DMA controller for the Dreamcast's |
| 81 | G2 bus. Drivers that want this will generally enable this on |
| 82 | their own. |
| 83 | |
| 84 | If in doubt, say N. |
| 85 | |
| Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 86 | endmenu |