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Zhu Yib481de92007-09-25 17:54:57 -07001/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -07008 * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -07009 *
10 * This program is free software; you can redistribute it and/or modify
Ian Schram01ebd062007-10-25 17:15:22 +080011 * it under the terms of version 2 of the GNU General Public License as
Zhu Yib481de92007-09-25 17:54:57 -070012 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
22 * USA
23 *
24 * The full GNU General Public License is included in this distribution
25 * in the file called LICENSE.GPL.
26 *
27 * Contact Information:
Winkler, Tomas759ef892008-12-09 11:28:58 -080028 * Intel Linux Wireless <ilw@linux.intel.com>
Zhu Yib481de92007-09-25 17:54:57 -070029 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
30 *
31 * BSD LICENSE
32 *
Reinette Chatreeb7ae892008-03-11 16:17:17 -070033 * Copyright(c) 2005 - 2008 Intel Corporation. All rights reserved.
Zhu Yib481de92007-09-25 17:54:57 -070034 * All rights reserved.
35 *
36 * Redistribution and use in source and binary forms, with or without
37 * modification, are permitted provided that the following conditions
38 * are met:
39 *
40 * * Redistributions of source code must retain the above copyright
41 * notice, this list of conditions and the following disclaimer.
42 * * Redistributions in binary form must reproduce the above copyright
43 * notice, this list of conditions and the following disclaimer in
44 * the documentation and/or other materials provided with the
45 * distribution.
46 * * Neither the name Intel Corporation nor the names of its
47 * contributors may be used to endorse or promote products derived
48 * from this software without specific prior written permission.
49 *
50 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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56 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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60 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61 *
62 *****************************************************************************/
Ben Cahillfcd427b2007-11-29 11:10:00 +080063/*
64 * Please use this file (iwl-4965-hw.h) only for hardware-related definitions.
Tomas Winkler5a36ba02008-04-24 11:55:37 -070065 * Use iwl-commands.h for uCode API definitions.
Tomas Winkler3e0d4cb2008-04-24 11:55:38 -070066 * Use iwl-dev.h for driver implementation definitions.
Ben Cahillfcd427b2007-11-29 11:10:00 +080067 */
Zhu Yib481de92007-09-25 17:54:57 -070068
69#ifndef __iwl_4965_hw_h__
70#define __iwl_4965_hw_h__
71
Emmanuel Grumbach4b52c392008-04-23 17:15:07 -070072#include "iwl-fh.h"
73
Tomas Winklera96a27f2008-10-23 23:48:56 -070074/* EEPROM */
Tomas Winkler073d3f52008-04-21 15:41:52 -070075#define IWL4965_EEPROM_IMG_SIZE 1024
76
Ben Cahill1fea8e82007-11-29 11:09:52 +080077/*
78 * uCode queue management definitions ...
79 * Queue #4 is the command queue for 3945 and 4965; map it to Tx FIFO chnl 4.
80 * The first queue used for block-ack aggregation is #7 (4965 only).
81 * All block-ack aggregation queues should map to Tx DMA/FIFO channel 7.
82 */
Christoph Hellwig5d08cd12007-10-25 17:15:50 +080083#define IWL_CMD_QUEUE_NUM 4
84#define IWL_CMD_FIFO_NUM 4
Ron Rindjunsky7f3e4bb2008-06-12 09:46:55 +080085#define IWL49_FIRST_AMPDU_QUEUE 7
Christoph Hellwig5d08cd12007-10-25 17:15:50 +080086
Christoph Hellwig5d08cd12007-10-25 17:15:50 +080087/* Time constants */
88#define SHORT_SLOT_TIME 9
89#define LONG_SLOT_TIME 20
90
91/* RSSI to dBm */
Samuel Ortiz250bdd22008-12-19 10:37:11 +080092#define IWL49_RSSI_OFFSET 44
Christoph Hellwig5d08cd12007-10-25 17:15:50 +080093
Christoph Hellwig5d08cd12007-10-25 17:15:50 +080094
Christoph Hellwig5d08cd12007-10-25 17:15:50 +080095
Tomas Winkler8f061892008-05-29 16:34:56 +080096/* PCI registers */
Tomas Winklere7b63582008-09-03 11:26:49 +080097#define PCI_CFG_RETRY_TIMEOUT 0x041
98#define PCI_CFG_POWER_SOURCE 0x0C8
99#define PCI_REG_WUM8 0x0E8
100#define PCI_CFG_LINK_CTRL 0x0F0
Tomas Winkler8f061892008-05-29 16:34:56 +0800101
102/* PCI register values */
Tomas Winklere7b63582008-09-03 11:26:49 +0800103#define PCI_CFG_LINK_CTRL_VAL_L0S_EN 0x01
104#define PCI_CFG_LINK_CTRL_VAL_L1_EN 0x02
105#define PCI_CFG_CMD_REG_INT_DIS_MSK 0x04
Christoph Hellwig5d08cd12007-10-25 17:15:50 +0800106#define PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT (0x80000000)
107
Christoph Hellwig5d08cd12007-10-25 17:15:50 +0800108
Christoph Hellwig5d08cd12007-10-25 17:15:50 +0800109#define IWL_NUM_SCAN_RATES (2)
110
Christoph Hellwig5d08cd12007-10-25 17:15:50 +0800111#define IWL_DEFAULT_TX_RETRY 15
Christoph Hellwig5d08cd12007-10-25 17:15:50 +0800112
113#define RX_QUEUE_SIZE 256
114#define RX_QUEUE_MASK 255
115#define RX_QUEUE_SIZE_LOG 8
116
Christoph Hellwig5d08cd12007-10-25 17:15:50 +0800117#define TFD_TX_CMD_SLOTS 256
118#define TFD_CMD_SLOTS 32
119
Christoph Hellwig5d08cd12007-10-25 17:15:50 +0800120/*
121 * RX related structures and functions
122 */
123#define RX_FREE_BUFFERS 64
124#define RX_LOW_WATERMARK 8
125
Ben Cahillfcd427b2007-11-29 11:10:00 +0800126/* Size of one Rx buffer in host DRAM */
Ron Rindjunsky9ee1ba42007-11-26 16:14:42 +0200127#define IWL_RX_BUF_SIZE_4K (4 * 1024)
128#define IWL_RX_BUF_SIZE_8K (8 * 1024)
Ben Cahillfcd427b2007-11-29 11:10:00 +0800129
130/* Sizes and addresses for instruction and data memory (SRAM) in
131 * 4965's embedded processor. Driver access is via HBUS_TARG_MEM_* regs. */
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800132#define IWL49_RTC_INST_LOWER_BOUND (0x000000)
Tomas Winkler12a81f62008-04-03 16:05:20 -0700133#define IWL49_RTC_INST_UPPER_BOUND (0x018000)
Ben Cahillfcd427b2007-11-29 11:10:00 +0800134
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800135#define IWL49_RTC_DATA_LOWER_BOUND (0x800000)
Tomas Winkler12a81f62008-04-03 16:05:20 -0700136#define IWL49_RTC_DATA_UPPER_BOUND (0x80A000)
Ben Cahillfcd427b2007-11-29 11:10:00 +0800137
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800138#define IWL49_RTC_INST_SIZE (IWL49_RTC_INST_UPPER_BOUND - \
139 IWL49_RTC_INST_LOWER_BOUND)
140#define IWL49_RTC_DATA_SIZE (IWL49_RTC_DATA_UPPER_BOUND - \
141 IWL49_RTC_DATA_LOWER_BOUND)
Zhu Yib481de92007-09-25 17:54:57 -0700142
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800143#define IWL49_MAX_INST_SIZE IWL49_RTC_INST_SIZE
144#define IWL49_MAX_DATA_SIZE IWL49_RTC_DATA_SIZE
Zhu Yib481de92007-09-25 17:54:57 -0700145
Ben Cahillfcd427b2007-11-29 11:10:00 +0800146/* Size of uCode instruction memory in bootstrap state machine */
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800147#define IWL49_MAX_BSM_SIZE BSM_SRAM_SIZE
Ben Cahillfcd427b2007-11-29 11:10:00 +0800148
Christoph Hellwigbb8c0932008-01-27 16:41:47 -0800149static inline int iwl4965_hw_valid_rtc_data_addr(u32 addr)
Zhu Yib481de92007-09-25 17:54:57 -0700150{
Samuel Ortiz250bdd22008-12-19 10:37:11 +0800151 return (addr >= IWL49_RTC_DATA_LOWER_BOUND) &&
Tomas Winkler12a81f62008-04-03 16:05:20 -0700152 (addr < IWL49_RTC_DATA_UPPER_BOUND);
Zhu Yib481de92007-09-25 17:54:57 -0700153}
154
Ben Cahill5991b412007-11-29 11:10:01 +0800155/********************* START TEMPERATURE *************************************/
156
Ben Cahill0c434c52007-11-29 11:10:02 +0800157/**
Ben Cahill5991b412007-11-29 11:10:01 +0800158 * 4965 temperature calculation.
159 *
160 * The driver must calculate the device temperature before calculating
161 * a txpower setting (amplifier gain is temperature dependent). The
162 * calculation uses 4 measurements, 3 of which (R1, R2, R3) are calibration
163 * values used for the life of the driver, and one of which (R4) is the
164 * real-time temperature indicator.
165 *
166 * uCode provides all 4 values to the driver via the "initialize alive"
167 * notification (see struct iwl4965_init_alive_resp). After the runtime uCode
168 * image loads, uCode updates the R4 value via statistics notifications
169 * (see STATISTICS_NOTIFICATION), which occur after each received beacon
170 * when associated, or can be requested via REPLY_STATISTICS_CMD.
171 *
172 * NOTE: uCode provides the R4 value as a 23-bit signed value. Driver
173 * must sign-extend to 32 bits before applying formula below.
174 *
175 * Formula:
176 *
177 * degrees Kelvin = ((97 * 259 * (R4 - R2) / (R3 - R1)) / 100) + 8
178 *
179 * NOTE: The basic formula is 259 * (R4-R2) / (R3-R1). The 97/100 is
180 * an additional correction, which should be centered around 0 degrees
181 * Celsius (273 degrees Kelvin). The 8 (3 percent of 273) compensates for
182 * centering the 97/100 correction around 0 degrees K.
183 *
184 * Add 273 to Kelvin value to find degrees Celsius, for comparing current
185 * temperature with factory-measured temperatures when calculating txpower
186 * settings.
187 */
188#define TEMPERATURE_CALIB_KELVIN_OFFSET 8
189#define TEMPERATURE_CALIB_A_VAL 259
190
191/* Limit range of calculated temperature to be between these Kelvin values */
192#define IWL_TX_POWER_TEMPERATURE_MIN (263)
193#define IWL_TX_POWER_TEMPERATURE_MAX (410)
194
195#define IWL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(t) \
196 (((t) < IWL_TX_POWER_TEMPERATURE_MIN) || \
197 ((t) > IWL_TX_POWER_TEMPERATURE_MAX))
198
199/********************* END TEMPERATURE ***************************************/
200
Zhu Yib481de92007-09-25 17:54:57 -0700201/********************* START TXPOWER *****************************************/
Zhu Yib481de92007-09-25 17:54:57 -0700202
Ben Cahill0c434c52007-11-29 11:10:02 +0800203/**
204 * 4965 txpower calculations rely on information from three sources:
205 *
206 * 1) EEPROM
207 * 2) "initialize" alive notification
208 * 3) statistics notifications
209 *
210 * EEPROM data consists of:
211 *
212 * 1) Regulatory information (max txpower and channel usage flags) is provided
213 * separately for each channel that can possibly supported by 4965.
214 * 40 MHz wide (.11n fat) channels are listed separately from 20 MHz
215 * (legacy) channels.
216 *
217 * See struct iwl4965_eeprom_channel for format, and struct iwl4965_eeprom
218 * for locations in EEPROM.
219 *
220 * 2) Factory txpower calibration information is provided separately for
221 * sub-bands of contiguous channels. 2.4GHz has just one sub-band,
222 * but 5 GHz has several sub-bands.
223 *
224 * In addition, per-band (2.4 and 5 Ghz) saturation txpowers are provided.
225 *
226 * See struct iwl4965_eeprom_calib_info (and the tree of structures
227 * contained within it) for format, and struct iwl4965_eeprom for
228 * locations in EEPROM.
229 *
230 * "Initialization alive" notification (see struct iwl4965_init_alive_resp)
231 * consists of:
232 *
233 * 1) Temperature calculation parameters.
234 *
235 * 2) Power supply voltage measurement.
236 *
237 * 3) Tx gain compensation to balance 2 transmitters for MIMO use.
238 *
239 * Statistics notifications deliver:
240 *
241 * 1) Current values for temperature param R4.
242 */
243
244/**
245 * To calculate a txpower setting for a given desired target txpower, channel,
246 * modulation bit rate, and transmitter chain (4965 has 2 transmitters to
247 * support MIMO and transmit diversity), driver must do the following:
248 *
249 * 1) Compare desired txpower vs. (EEPROM) regulatory limit for this channel.
250 * Do not exceed regulatory limit; reduce target txpower if necessary.
251 *
252 * If setting up txpowers for MIMO rates (rate indexes 8-15, 24-31),
253 * 2 transmitters will be used simultaneously; driver must reduce the
254 * regulatory limit by 3 dB (half-power) for each transmitter, so the
255 * combined total output of the 2 transmitters is within regulatory limits.
256 *
257 *
258 * 2) Compare target txpower vs. (EEPROM) saturation txpower *reduced by
259 * backoff for this bit rate*. Do not exceed (saturation - backoff[rate]);
260 * reduce target txpower if necessary.
261 *
262 * Backoff values below are in 1/2 dB units (equivalent to steps in
263 * txpower gain tables):
264 *
265 * OFDM 6 - 36 MBit: 10 steps (5 dB)
266 * OFDM 48 MBit: 15 steps (7.5 dB)
267 * OFDM 54 MBit: 17 steps (8.5 dB)
268 * OFDM 60 MBit: 20 steps (10 dB)
269 * CCK all rates: 10 steps (5 dB)
270 *
271 * Backoff values apply to saturation txpower on a per-transmitter basis;
272 * when using MIMO (2 transmitters), each transmitter uses the same
273 * saturation level provided in EEPROM, and the same backoff values;
274 * no reduction (such as with regulatory txpower limits) is required.
275 *
276 * Saturation and Backoff values apply equally to 20 Mhz (legacy) channel
277 * widths and 40 Mhz (.11n fat) channel widths; there is no separate
278 * factory measurement for fat channels.
279 *
280 * The result of this step is the final target txpower. The rest of
281 * the steps figure out the proper settings for the device to achieve
282 * that target txpower.
283 *
284 *
Tomas Winklera96a27f2008-10-23 23:48:56 -0700285 * 3) Determine (EEPROM) calibration sub band for the target channel, by
286 * comparing against first and last channels in each sub band
Ben Cahill0c434c52007-11-29 11:10:02 +0800287 * (see struct iwl4965_eeprom_calib_subband_info).
288 *
289 *
290 * 4) Linearly interpolate (EEPROM) factory calibration measurement sets,
Tomas Winklera96a27f2008-10-23 23:48:56 -0700291 * referencing the 2 factory-measured (sample) channels within the sub band.
Ben Cahill0c434c52007-11-29 11:10:02 +0800292 *
293 * Interpolation is based on difference between target channel's frequency
294 * and the sample channels' frequencies. Since channel numbers are based
295 * on frequency (5 MHz between each channel number), this is equivalent
296 * to interpolating based on channel number differences.
297 *
298 * Note that the sample channels may or may not be the channels at the
Tomas Winklera96a27f2008-10-23 23:48:56 -0700299 * edges of the sub band. The target channel may be "outside" of the
Ben Cahill0c434c52007-11-29 11:10:02 +0800300 * span of the sampled channels.
301 *
302 * Driver may choose the pair (for 2 Tx chains) of measurements (see
303 * struct iwl4965_eeprom_calib_ch_info) for which the actual measured
304 * txpower comes closest to the desired txpower. Usually, though,
305 * the middle set of measurements is closest to the regulatory limits,
306 * and is therefore a good choice for all txpower calculations (this
307 * assumes that high accuracy is needed for maximizing legal txpower,
308 * while lower txpower configurations do not need as much accuracy).
309 *
310 * Driver should interpolate both members of the chosen measurement pair,
311 * i.e. for both Tx chains (radio transmitters), unless the driver knows
312 * that only one of the chains will be used (e.g. only one tx antenna
313 * connected, but this should be unusual). The rate scaling algorithm
314 * switches antennas to find best performance, so both Tx chains will
315 * be used (although only one at a time) even for non-MIMO transmissions.
316 *
317 * Driver should interpolate factory values for temperature, gain table
318 * index, and actual power. The power amplifier detector values are
319 * not used by the driver.
320 *
321 * Sanity check: If the target channel happens to be one of the sample
322 * channels, the results should agree with the sample channel's
323 * measurements!
324 *
325 *
326 * 5) Find difference between desired txpower and (interpolated)
327 * factory-measured txpower. Using (interpolated) factory gain table index
328 * (shown elsewhere) as a starting point, adjust this index lower to
329 * increase txpower, or higher to decrease txpower, until the target
330 * txpower is reached. Each step in the gain table is 1/2 dB.
331 *
332 * For example, if factory measured txpower is 16 dBm, and target txpower
333 * is 13 dBm, add 6 steps to the factory gain index to reduce txpower
334 * by 3 dB.
335 *
336 *
337 * 6) Find difference between current device temperature and (interpolated)
338 * factory-measured temperature for sub-band. Factory values are in
339 * degrees Celsius. To calculate current temperature, see comments for
340 * "4965 temperature calculation".
341 *
342 * If current temperature is higher than factory temperature, driver must
Tomas Winklera96a27f2008-10-23 23:48:56 -0700343 * increase gain (lower gain table index), and vice verse.
Ben Cahill0c434c52007-11-29 11:10:02 +0800344 *
345 * Temperature affects gain differently for different channels:
346 *
347 * 2.4 GHz all channels: 3.5 degrees per half-dB step
348 * 5 GHz channels 34-43: 4.5 degrees per half-dB step
349 * 5 GHz channels >= 44: 4.0 degrees per half-dB step
350 *
351 * NOTE: Temperature can increase rapidly when transmitting, especially
352 * with heavy traffic at high txpowers. Driver should update
353 * temperature calculations often under these conditions to
354 * maintain strong txpower in the face of rising temperature.
355 *
356 *
357 * 7) Find difference between current power supply voltage indicator
358 * (from "initialize alive") and factory-measured power supply voltage
359 * indicator (EEPROM).
360 *
361 * If the current voltage is higher (indicator is lower) than factory
362 * voltage, gain should be reduced (gain table index increased) by:
363 *
364 * (eeprom - current) / 7
365 *
366 * If the current voltage is lower (indicator is higher) than factory
367 * voltage, gain should be increased (gain table index decreased) by:
368 *
369 * 2 * (current - eeprom) / 7
370 *
371 * If number of index steps in either direction turns out to be > 2,
372 * something is wrong ... just use 0.
373 *
374 * NOTE: Voltage compensation is independent of band/channel.
375 *
376 * NOTE: "Initialize" uCode measures current voltage, which is assumed
377 * to be constant after this initial measurement. Voltage
378 * compensation for txpower (number of steps in gain table)
379 * may be calculated once and used until the next uCode bootload.
380 *
381 *
382 * 8) If setting up txpowers for MIMO rates (rate indexes 8-15, 24-31),
383 * adjust txpower for each transmitter chain, so txpower is balanced
384 * between the two chains. There are 5 pairs of tx_atten[group][chain]
385 * values in "initialize alive", one pair for each of 5 channel ranges:
386 *
387 * Group 0: 5 GHz channel 34-43
388 * Group 1: 5 GHz channel 44-70
389 * Group 2: 5 GHz channel 71-124
390 * Group 3: 5 GHz channel 125-200
391 * Group 4: 2.4 GHz all channels
392 *
393 * Add the tx_atten[group][chain] value to the index for the target chain.
394 * The values are signed, but are in pairs of 0 and a non-negative number,
395 * so as to reduce gain (if necessary) of the "hotter" channel. This
396 * avoids any need to double-check for regulatory compliance after
397 * this step.
398 *
399 *
400 * 9) If setting up for a CCK rate, lower the gain by adding a CCK compensation
401 * value to the index:
402 *
403 * Hardware rev B: 9 steps (4.5 dB)
404 * Hardware rev C: 5 steps (2.5 dB)
405 *
406 * Hardware rev for 4965 can be determined by reading CSR_HW_REV_WA_REG,
407 * bits [3:2], 1 = B, 2 = C.
408 *
409 * NOTE: This compensation is in addition to any saturation backoff that
410 * might have been applied in an earlier step.
411 *
412 *
413 * 10) Select the gain table, based on band (2.4 vs 5 GHz).
414 *
415 * Limit the adjusted index to stay within the table!
416 *
417 *
418 * 11) Read gain table entries for DSP and radio gain, place into appropriate
419 * location(s) in command (struct iwl4965_txpowertable_cmd).
420 */
421
422/* Limit range of txpower output target to be between these values */
423#define IWL_TX_POWER_TARGET_POWER_MIN (0) /* 0 dBm = 1 milliwatt */
424#define IWL_TX_POWER_TARGET_POWER_MAX (16) /* 16 dBm */
425
426/**
427 * When MIMO is used (2 transmitters operating simultaneously), driver should
428 * limit each transmitter to deliver a max of 3 dB below the regulatory limit
429 * for the device. That is, use half power for each transmitter, so total
430 * txpower is within regulatory limits.
431 *
432 * The value "6" represents number of steps in gain table to reduce power 3 dB.
433 * Each step is 1/2 dB.
434 */
435#define IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION (6)
436
437/**
438 * CCK gain compensation.
439 *
440 * When calculating txpowers for CCK, after making sure that the target power
441 * is within regulatory and saturation limits, driver must additionally
442 * back off gain by adding these values to the gain table index.
443 *
444 * Hardware rev for 4965 can be determined by reading CSR_HW_REV_WA_REG,
445 * bits [3:2], 1 = B, 2 = C.
446 */
447#define IWL_TX_POWER_CCK_COMPENSATION_B_STEP (9)
448#define IWL_TX_POWER_CCK_COMPENSATION_C_STEP (5)
449
450/*
451 * 4965 power supply voltage compensation for txpower
452 */
453#define TX_POWER_IWL_VOLTAGE_CODES_PER_03V (7)
454
455/**
456 * Gain tables.
457 *
458 * The following tables contain pair of values for setting txpower, i.e.
459 * gain settings for the output of the device's digital signal processor (DSP),
460 * and for the analog gain structure of the transmitter.
461 *
462 * Each entry in the gain tables represents a step of 1/2 dB. Note that these
463 * are *relative* steps, not indications of absolute output power. Output
464 * power varies with temperature, voltage, and channel frequency, and also
465 * requires consideration of average power (to satisfy regulatory constraints),
466 * and peak power (to avoid distortion of the output signal).
467 *
468 * Each entry contains two values:
469 * 1) DSP gain (or sometimes called DSP attenuation). This is a fine-grained
470 * linear value that multiplies the output of the digital signal processor,
471 * before being sent to the analog radio.
472 * 2) Radio gain. This sets the analog gain of the radio Tx path.
473 * It is a coarser setting, and behaves in a logarithmic (dB) fashion.
474 *
475 * EEPROM contains factory calibration data for txpower. This maps actual
476 * measured txpower levels to gain settings in the "well known" tables
477 * below ("well-known" means here that both factory calibration *and* the
478 * driver work with the same table).
479 *
480 * There are separate tables for 2.4 GHz and 5 GHz bands. The 5 GHz table
481 * has an extension (into negative indexes), in case the driver needs to
482 * boost power setting for high device temperatures (higher than would be
483 * present during factory calibration). A 5 Ghz EEPROM index of "40"
484 * corresponds to the 49th entry in the table used by the driver.
485 */
486#define MIN_TX_GAIN_INDEX (0) /* highest gain, lowest idx, 2.4 */
487#define MIN_TX_GAIN_INDEX_52GHZ_EXT (-9) /* highest gain, lowest idx, 5 */
488
489/**
490 * 2.4 GHz gain table
491 *
492 * Index Dsp gain Radio gain
493 * 0 110 0x3f (highest gain)
494 * 1 104 0x3f
495 * 2 98 0x3f
496 * 3 110 0x3e
497 * 4 104 0x3e
498 * 5 98 0x3e
499 * 6 110 0x3d
500 * 7 104 0x3d
501 * 8 98 0x3d
502 * 9 110 0x3c
503 * 10 104 0x3c
504 * 11 98 0x3c
505 * 12 110 0x3b
506 * 13 104 0x3b
507 * 14 98 0x3b
508 * 15 110 0x3a
509 * 16 104 0x3a
510 * 17 98 0x3a
511 * 18 110 0x39
512 * 19 104 0x39
513 * 20 98 0x39
514 * 21 110 0x38
515 * 22 104 0x38
516 * 23 98 0x38
517 * 24 110 0x37
518 * 25 104 0x37
519 * 26 98 0x37
520 * 27 110 0x36
521 * 28 104 0x36
522 * 29 98 0x36
523 * 30 110 0x35
524 * 31 104 0x35
525 * 32 98 0x35
526 * 33 110 0x34
527 * 34 104 0x34
528 * 35 98 0x34
529 * 36 110 0x33
530 * 37 104 0x33
531 * 38 98 0x33
532 * 39 110 0x32
533 * 40 104 0x32
534 * 41 98 0x32
535 * 42 110 0x31
536 * 43 104 0x31
537 * 44 98 0x31
538 * 45 110 0x30
539 * 46 104 0x30
540 * 47 98 0x30
541 * 48 110 0x6
542 * 49 104 0x6
543 * 50 98 0x6
544 * 51 110 0x5
545 * 52 104 0x5
546 * 53 98 0x5
547 * 54 110 0x4
548 * 55 104 0x4
549 * 56 98 0x4
550 * 57 110 0x3
551 * 58 104 0x3
552 * 59 98 0x3
553 * 60 110 0x2
554 * 61 104 0x2
555 * 62 98 0x2
556 * 63 110 0x1
557 * 64 104 0x1
558 * 65 98 0x1
559 * 66 110 0x0
560 * 67 104 0x0
561 * 68 98 0x0
562 * 69 97 0
563 * 70 96 0
564 * 71 95 0
565 * 72 94 0
566 * 73 93 0
567 * 74 92 0
568 * 75 91 0
569 * 76 90 0
570 * 77 89 0
571 * 78 88 0
572 * 79 87 0
573 * 80 86 0
574 * 81 85 0
575 * 82 84 0
576 * 83 83 0
577 * 84 82 0
578 * 85 81 0
579 * 86 80 0
580 * 87 79 0
581 * 88 78 0
582 * 89 77 0
583 * 90 76 0
584 * 91 75 0
585 * 92 74 0
586 * 93 73 0
587 * 94 72 0
588 * 95 71 0
589 * 96 70 0
590 * 97 69 0
591 * 98 68 0
592 */
593
594/**
595 * 5 GHz gain table
596 *
597 * Index Dsp gain Radio gain
598 * -9 123 0x3F (highest gain)
599 * -8 117 0x3F
600 * -7 110 0x3F
601 * -6 104 0x3F
602 * -5 98 0x3F
603 * -4 110 0x3E
604 * -3 104 0x3E
605 * -2 98 0x3E
606 * -1 110 0x3D
607 * 0 104 0x3D
608 * 1 98 0x3D
609 * 2 110 0x3C
610 * 3 104 0x3C
611 * 4 98 0x3C
612 * 5 110 0x3B
613 * 6 104 0x3B
614 * 7 98 0x3B
615 * 8 110 0x3A
616 * 9 104 0x3A
617 * 10 98 0x3A
618 * 11 110 0x39
619 * 12 104 0x39
620 * 13 98 0x39
621 * 14 110 0x38
622 * 15 104 0x38
623 * 16 98 0x38
624 * 17 110 0x37
625 * 18 104 0x37
626 * 19 98 0x37
627 * 20 110 0x36
628 * 21 104 0x36
629 * 22 98 0x36
630 * 23 110 0x35
631 * 24 104 0x35
632 * 25 98 0x35
633 * 26 110 0x34
634 * 27 104 0x34
635 * 28 98 0x34
636 * 29 110 0x33
637 * 30 104 0x33
638 * 31 98 0x33
639 * 32 110 0x32
640 * 33 104 0x32
641 * 34 98 0x32
642 * 35 110 0x31
643 * 36 104 0x31
644 * 37 98 0x31
645 * 38 110 0x30
646 * 39 104 0x30
647 * 40 98 0x30
648 * 41 110 0x25
649 * 42 104 0x25
650 * 43 98 0x25
651 * 44 110 0x24
652 * 45 104 0x24
653 * 46 98 0x24
654 * 47 110 0x23
655 * 48 104 0x23
656 * 49 98 0x23
657 * 50 110 0x22
658 * 51 104 0x18
659 * 52 98 0x18
660 * 53 110 0x17
661 * 54 104 0x17
662 * 55 98 0x17
663 * 56 110 0x16
664 * 57 104 0x16
665 * 58 98 0x16
666 * 59 110 0x15
667 * 60 104 0x15
668 * 61 98 0x15
669 * 62 110 0x14
670 * 63 104 0x14
671 * 64 98 0x14
672 * 65 110 0x13
673 * 66 104 0x13
674 * 67 98 0x13
675 * 68 110 0x12
676 * 69 104 0x08
677 * 70 98 0x08
678 * 71 110 0x07
679 * 72 104 0x07
680 * 73 98 0x07
681 * 74 110 0x06
682 * 75 104 0x06
683 * 76 98 0x06
684 * 77 110 0x05
685 * 78 104 0x05
686 * 79 98 0x05
687 * 80 110 0x04
688 * 81 104 0x04
689 * 82 98 0x04
690 * 83 110 0x03
691 * 84 104 0x03
692 * 85 98 0x03
693 * 86 110 0x02
694 * 87 104 0x02
695 * 88 98 0x02
696 * 89 110 0x01
697 * 90 104 0x01
698 * 91 98 0x01
699 * 92 110 0x00
700 * 93 104 0x00
701 * 94 98 0x00
702 * 95 93 0x00
703 * 96 88 0x00
704 * 97 83 0x00
705 * 98 78 0x00
706 */
707
708
709/**
710 * Sanity checks and default values for EEPROM regulatory levels.
711 * If EEPROM values fall outside MIN/MAX range, use default values.
712 *
713 * Regulatory limits refer to the maximum average txpower allowed by
714 * regulatory agencies in the geographies in which the device is meant
715 * to be operated. These limits are SKU-specific (i.e. geography-specific),
716 * and channel-specific; each channel has an individual regulatory limit
717 * listed in the EEPROM.
718 *
719 * Units are in half-dBm (i.e. "34" means 17 dBm).
720 */
721#define IWL_TX_POWER_DEFAULT_REGULATORY_24 (34)
722#define IWL_TX_POWER_DEFAULT_REGULATORY_52 (34)
723#define IWL_TX_POWER_REGULATORY_MIN (0)
724#define IWL_TX_POWER_REGULATORY_MAX (34)
725
726/**
727 * Sanity checks and default values for EEPROM saturation levels.
728 * If EEPROM values fall outside MIN/MAX range, use default values.
729 *
730 * Saturation is the highest level that the output power amplifier can produce
731 * without significant clipping distortion. This is a "peak" power level.
732 * Different types of modulation (i.e. various "rates", and OFDM vs. CCK)
733 * require differing amounts of backoff, relative to their average power output,
734 * in order to avoid clipping distortion.
735 *
736 * Driver must make sure that it is violating neither the saturation limit,
737 * nor the regulatory limit, when calculating Tx power settings for various
738 * rates.
739 *
740 * Units are in half-dBm (i.e. "38" means 19 dBm).
741 */
742#define IWL_TX_POWER_DEFAULT_SATURATION_24 (38)
743#define IWL_TX_POWER_DEFAULT_SATURATION_52 (38)
744#define IWL_TX_POWER_SATURATION_MIN (20)
745#define IWL_TX_POWER_SATURATION_MAX (50)
746
747/**
748 * Channel groups used for Tx Attenuation calibration (MIMO tx channel balance)
749 * and thermal Txpower calibration.
750 *
751 * When calculating txpower, driver must compensate for current device
752 * temperature; higher temperature requires higher gain. Driver must calculate
753 * current temperature (see "4965 temperature calculation"), then compare vs.
754 * factory calibration temperature in EEPROM; if current temperature is higher
755 * than factory temperature, driver must *increase* gain by proportions shown
756 * in table below. If current temperature is lower than factory, driver must
757 * *decrease* gain.
758 *
759 * Different frequency ranges require different compensation, as shown below.
760 */
761/* Group 0, 5.2 GHz ch 34-43: 4.5 degrees per 1/2 dB. */
762#define CALIB_IWL_TX_ATTEN_GR1_FCH 34
763#define CALIB_IWL_TX_ATTEN_GR1_LCH 43
764
765/* Group 1, 5.3 GHz ch 44-70: 4.0 degrees per 1/2 dB. */
766#define CALIB_IWL_TX_ATTEN_GR2_FCH 44
767#define CALIB_IWL_TX_ATTEN_GR2_LCH 70
768
769/* Group 2, 5.5 GHz ch 71-124: 4.0 degrees per 1/2 dB. */
770#define CALIB_IWL_TX_ATTEN_GR3_FCH 71
771#define CALIB_IWL_TX_ATTEN_GR3_LCH 124
772
773/* Group 3, 5.7 GHz ch 125-200: 4.0 degrees per 1/2 dB. */
774#define CALIB_IWL_TX_ATTEN_GR4_FCH 125
775#define CALIB_IWL_TX_ATTEN_GR4_LCH 200
776
777/* Group 4, 2.4 GHz all channels: 3.5 degrees per 1/2 dB. */
778#define CALIB_IWL_TX_ATTEN_GR5_FCH 1
779#define CALIB_IWL_TX_ATTEN_GR5_LCH 20
780
Zhu Yib481de92007-09-25 17:54:57 -0700781enum {
782 CALIB_CH_GROUP_1 = 0,
783 CALIB_CH_GROUP_2 = 1,
784 CALIB_CH_GROUP_3 = 2,
785 CALIB_CH_GROUP_4 = 3,
786 CALIB_CH_GROUP_5 = 4,
787 CALIB_CH_GROUP_MAX
788};
789
Zhu Yib481de92007-09-25 17:54:57 -0700790/********************* END TXPOWER *****************************************/
791
Ben Cahill5d5456f2007-11-29 11:10:06 +0800792
793/**
794 * Tx/Rx Queues
795 *
796 * Most communication between driver and 4965 is via queues of data buffers.
797 * For example, all commands that the driver issues to device's embedded
798 * controller (uCode) are via the command queue (one of the Tx queues). All
799 * uCode command responses/replies/notifications, including Rx frames, are
800 * conveyed from uCode to driver via the Rx queue.
801 *
802 * Most support for these queues, including handshake support, resides in
803 * structures in host DRAM, shared between the driver and the device. When
804 * allocating this memory, the driver must make sure that data written by
805 * the host CPU updates DRAM immediately (and does not get "stuck" in CPU's
806 * cache memory), so DRAM and cache are consistent, and the device can
807 * immediately see changes made by the driver.
808 *
809 * 4965 supports up to 16 DRAM-based Tx queues, and services these queues via
810 * up to 7 DMA channels (FIFOs). Each Tx queue is supported by a circular array
811 * in DRAM containing 256 Transmit Frame Descriptors (TFDs).
812 */
Emmanuel Grumbach038669e2008-04-23 17:15:04 -0700813#define IWL49_NUM_FIFOS 7
814#define IWL49_CMD_FIFO_NUM 4
815#define IWL49_NUM_QUEUES 16
Tomas Winkler9f17b312008-07-11 11:53:35 +0800816#define IWL49_NUM_AMPDU_QUEUES 8
Ben Cahill5d5456f2007-11-29 11:10:06 +0800817
Zhu Yib481de92007-09-25 17:54:57 -0700818
Ben Cahill5d5456f2007-11-29 11:10:06 +0800819/**
Tomas Winkler127901a2008-10-23 23:48:55 -0700820 * struct iwl4965_schedq_bc_tbl
Ben Cahill5d5456f2007-11-29 11:10:06 +0800821 *
822 * Byte Count table
823 *
824 * Each Tx queue uses a byte-count table containing 320 entries:
825 * one 16-bit entry for each of 256 TFDs, plus an additional 64 entries that
826 * duplicate the first 64 entries (to avoid wrap-around within a Tx window;
827 * max Tx window is 64 TFDs).
828 *
829 * When driver sets up a new TFD, it must also enter the total byte count
830 * of the frame to be transmitted into the corresponding entry in the byte
831 * count table for the chosen Tx queue. If the TFD index is 0-63, the driver
832 * must duplicate the byte count entry in corresponding index 256-319.
833 *
Tomas Winkler127901a2008-10-23 23:48:55 -0700834 * padding puts each byte count table on a 1024-byte boundary;
Ben Cahill5d5456f2007-11-29 11:10:06 +0800835 * 4965 assumes tables are separated by 1024 bytes.
836 */
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800837struct iwl4965_scd_bc_tbl {
Tomas Winkler127901a2008-10-23 23:48:55 -0700838 __le16 tfd_offset[TFD_QUEUE_BC_SIZE];
839 u8 pad[1024 - (TFD_QUEUE_BC_SIZE) * sizeof(__le16)];
Zhu Yib481de92007-09-25 17:54:57 -0700840} __attribute__ ((packed));
841
Tomas Winkler4ddbb7d2008-11-07 09:58:40 -0800842#endif /* !__iwl_4965_hw_h__ */