blob: 63d3d8a3d4e309f3d9b9154c107d0006db558d61 [file] [log] [blame]
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001/*
2 * Copyright (C) 2008 Google, Inc.
3 * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
4 *
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18#include <linux/msm_kgsl.h>
19#include <linux/regulator/machine.h>
20#include <linux/dma-mapping.h>
21#include <asm/clkdev.h>
22#include <mach/irqs.h>
23#include <mach/msm_iomap.h>
24#include <mach/dma.h>
25#include <mach/board.h>
26
27#include "devices.h"
28#include "gpio_hw.h"
29#include "footswitch.h"
30
31#include <asm/mach/flash.h>
32
33#include <asm/mach/mmc.h>
34#include <mach/msm_hsusb.h>
35#include <mach/usbdiag.h>
36#include <mach/usb_gadget_fserial.h>
37#include <mach/rpc_hsusb.h>
38
39static struct resource resources_uart1[] = {
40 {
41 .start = INT_UART1,
42 .end = INT_UART1,
43 .flags = IORESOURCE_IRQ,
44 },
45 {
46 .start = MSM_UART1_PHYS,
47 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
48 .flags = IORESOURCE_MEM,
49 },
50};
51
52static struct resource resources_uart2[] = {
53 {
54 .start = INT_UART2,
55 .end = INT_UART2,
56 .flags = IORESOURCE_IRQ,
57 },
58 {
59 .start = MSM_UART2_PHYS,
60 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
61 .flags = IORESOURCE_MEM,
62 },
63};
64
65struct platform_device msm_device_uart1 = {
66 .name = "msm_serial",
67 .id = 0,
68 .num_resources = ARRAY_SIZE(resources_uart1),
69 .resource = resources_uart1,
70};
71
72struct platform_device msm_device_uart2 = {
73 .name = "msm_serial",
74 .id = 1,
75 .num_resources = ARRAY_SIZE(resources_uart2),
76 .resource = resources_uart2,
77};
78
79#define MSM_UART1DM_PHYS 0xA0200000
80#define MSM_UART2DM_PHYS 0xA0300000
81static struct resource msm_uart1_dm_resources[] = {
82 {
83 .start = MSM_UART1DM_PHYS,
84 .end = MSM_UART1DM_PHYS + PAGE_SIZE - 1,
85 .flags = IORESOURCE_MEM,
86 },
87 {
88 .start = INT_UART1DM_IRQ,
89 .end = INT_UART1DM_IRQ,
90 .flags = IORESOURCE_IRQ,
91 },
92 {
93 .start = INT_UART1DM_RX,
94 .end = INT_UART1DM_RX,
95 .flags = IORESOURCE_IRQ,
96 },
97 {
98 .start = DMOV_HSUART1_TX_CHAN,
99 .end = DMOV_HSUART1_RX_CHAN,
100 .name = "uartdm_channels",
101 .flags = IORESOURCE_DMA,
102 },
103 {
104 .start = DMOV_HSUART1_TX_CRCI,
105 .end = DMOV_HSUART1_RX_CRCI,
106 .name = "uartdm_crci",
107 .flags = IORESOURCE_DMA,
108 },
109};
110
111static u64 msm_uart_dm1_dma_mask = DMA_BIT_MASK(32);
112
113struct platform_device msm_device_uart_dm1 = {
114 .name = "msm_serial_hs",
115 .id = 0,
116 .num_resources = ARRAY_SIZE(msm_uart1_dm_resources),
117 .resource = msm_uart1_dm_resources,
118 .dev = {
119 .dma_mask = &msm_uart_dm1_dma_mask,
120 .coherent_dma_mask = DMA_BIT_MASK(32),
121 },
122};
123
124static struct resource msm_uart2_dm_resources[] = {
125 {
126 .start = MSM_UART2DM_PHYS,
127 .end = MSM_UART2DM_PHYS + PAGE_SIZE - 1,
128 .flags = IORESOURCE_MEM,
129 },
130 {
131 .start = INT_UART2DM_IRQ,
132 .end = INT_UART2DM_IRQ,
133 .flags = IORESOURCE_IRQ,
134 },
135 {
136 .start = INT_UART2DM_RX,
137 .end = INT_UART2DM_RX,
138 .flags = IORESOURCE_IRQ,
139 },
140 {
141 .start = DMOV_HSUART2_TX_CHAN,
142 .end = DMOV_HSUART2_RX_CHAN,
143 .name = "uartdm_channels",
144 .flags = IORESOURCE_DMA,
145 },
146 {
147 .start = DMOV_HSUART2_TX_CRCI,
148 .end = DMOV_HSUART2_RX_CRCI,
149 .name = "uartdm_crci",
150 .flags = IORESOURCE_DMA,
151 },
152};
153
154static u64 msm_uart_dm2_dma_mask = DMA_BIT_MASK(32);
155
156struct platform_device msm_device_uart_dm2 = {
157 .name = "msm_serial_hs",
158 .id = 1,
159 .num_resources = ARRAY_SIZE(msm_uart2_dm_resources),
160 .resource = msm_uart2_dm_resources,
161 .dev = {
162 .dma_mask = &msm_uart_dm2_dma_mask,
163 .coherent_dma_mask = DMA_BIT_MASK(32),
164 },
165};
166
167#define MSM_I2C_SIZE SZ_4K
168#define MSM_I2C_PHYS 0xA9900000
169static struct resource resources_i2c[] = {
170 {
171 .start = MSM_I2C_PHYS,
172 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
173 .flags = IORESOURCE_MEM,
174 },
175 {
176 .start = INT_PWB_I2C,
177 .end = INT_PWB_I2C,
178 .flags = IORESOURCE_IRQ,
179 },
180};
181
182struct platform_device msm_device_i2c = {
183 .name = "msm_i2c",
184 .id = 0,
185 .num_resources = ARRAY_SIZE(resources_i2c),
186 .resource = resources_i2c,
187};
188
189#define MSM_HSUSB_PHYS 0xA0800000
190static struct resource resources_hsusb_otg[] = {
191 {
192 .start = MSM_HSUSB_PHYS,
193 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
194 .flags = IORESOURCE_MEM,
195 },
196 {
197 .start = INT_USB_HS,
198 .end = INT_USB_HS,
199 .flags = IORESOURCE_IRQ,
200 },
201};
202
203static u64 dma_mask = 0xffffffffULL;
204struct platform_device msm_device_hsusb_otg = {
205 .name = "msm_hsusb_otg",
206 .id = -1,
207 .num_resources = ARRAY_SIZE(resources_hsusb_otg),
208 .resource = resources_hsusb_otg,
209 .dev = {
210 .dma_mask = &dma_mask,
211 .coherent_dma_mask = 0xffffffffULL,
212 },
213};
214
215static struct resource resources_hsusb_peripheral[] = {
216 {
217 .start = MSM_HSUSB_PHYS,
218 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
219 .flags = IORESOURCE_MEM,
220 },
221 {
222 .start = INT_USB_HS,
223 .end = INT_USB_HS,
224 .flags = IORESOURCE_IRQ,
225 },
226};
227
228static struct resource resources_gadget_peripheral[] = {
229 {
230 .start = MSM_HSUSB_PHYS,
231 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
232 .flags = IORESOURCE_MEM,
233 },
234 {
235 .start = INT_USB_HS,
236 .end = INT_USB_HS,
237 .flags = IORESOURCE_IRQ,
238 },
239};
240
241struct platform_device msm_device_hsusb_peripheral = {
242 .name = "msm_hsusb_peripheral",
243 .id = -1,
244 .num_resources = ARRAY_SIZE(resources_hsusb_peripheral),
245 .resource = resources_hsusb_peripheral,
246 .dev = {
247 .dma_mask = &dma_mask,
248 .coherent_dma_mask = 0xffffffffULL,
249 },
250};
251
252struct platform_device msm_device_gadget_peripheral = {
253 .name = "msm_hsusb",
254 .id = -1,
255 .num_resources = ARRAY_SIZE(resources_gadget_peripheral),
256 .resource = resources_gadget_peripheral,
257 .dev = {
258 .dma_mask = &dma_mask,
259 .coherent_dma_mask = 0xffffffffULL,
260 },
261};
262
263static struct resource resources_hsusb_host[] = {
264 {
265 .start = MSM_HSUSB_PHYS,
266 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
267 .flags = IORESOURCE_MEM,
268 },
269 {
270 .start = INT_USB_HS,
271 .end = INT_USB_HS,
272 .flags = IORESOURCE_IRQ,
273 },
274};
275
276struct platform_device msm_device_hsusb_host = {
277 .name = "msm_hsusb_host",
278 .id = 0,
279 .num_resources = ARRAY_SIZE(resources_hsusb_host),
280 .resource = resources_hsusb_host,
281 .dev = {
282 .dma_mask = &dma_mask,
283 .coherent_dma_mask = 0xffffffffULL,
284 },
285};
286
287static struct platform_device *msm_host_devices[] = {
288 &msm_device_hsusb_host,
289};
290
291int msm_add_host(unsigned int host, struct msm_usb_host_platform_data *plat)
292{
293 struct platform_device *pdev;
294
295 pdev = msm_host_devices[host];
296 if (!pdev)
297 return -ENODEV;
298 pdev->dev.platform_data = plat;
299 return platform_device_register(pdev);
300}
301
302#ifdef CONFIG_USB_ANDROID_DIAG
303struct usb_diag_platform_data usb_diag_pdata = {
304 .ch_name = DIAG_LEGACY,
305 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
306};
307
308struct platform_device usb_diag_device = {
309 .name = "usb_diag",
310 .id = -1,
311 .dev = {
312 .platform_data = &usb_diag_pdata,
313 },
314};
315#endif
316
317#ifdef CONFIG_USB_F_SERIAL
318static struct usb_gadget_fserial_platform_data fserial_pdata = {
319 .no_ports = 2,
320};
321
322struct platform_device usb_gadget_fserial_device = {
323 .name = "usb_fserial",
324 .id = -1,
325 .dev = {
326 .platform_data = &fserial_pdata,
327 },
328};
329#endif
330
331struct platform_device asoc_msm_pcm = {
332 .name = "msm-dsp-audio",
333 .id = 0,
334};
335
336struct platform_device asoc_msm_dai0 = {
337 .name = "msm-codec-dai",
338 .id = 0,
339};
340
341struct platform_device asoc_msm_dai1 = {
342 .name = "msm-cpu-dai",
343 .id = 0,
344};
345
346#define MSM_NAND_PHYS 0xA0A00000
347static struct resource resources_nand[] = {
348 [0] = {
349 .name = "msm_nand_dmac",
350 .start = DMOV_NAND_CHAN,
351 .end = DMOV_NAND_CHAN,
352 .flags = IORESOURCE_DMA,
353 },
354 [1] = {
355 .name = "msm_nand_phys",
356 .start = MSM_NAND_PHYS,
357 .end = MSM_NAND_PHYS + 0x7FF,
358 .flags = IORESOURCE_MEM,
359 },
360};
361
362static struct resource resources_otg[] = {
363 {
364 .start = MSM_HSUSB_PHYS,
365 .end = MSM_HSUSB_PHYS + SZ_1K - 1,
366 .flags = IORESOURCE_MEM,
367 },
368 {
369 .start = INT_USB_HS,
370 .end = INT_USB_HS,
371 .flags = IORESOURCE_IRQ,
372 },
373};
374
375struct platform_device msm_device_otg = {
376 .name = "msm_otg",
377 .id = -1,
378 .num_resources = ARRAY_SIZE(resources_otg),
379 .resource = resources_otg,
380 .dev = {
381 .coherent_dma_mask = 0xffffffffULL,
382 },
383};
384
385struct flash_platform_data msm_nand_data = {
386 .parts = NULL,
387 .nr_parts = 0,
388};
389
390struct platform_device msm_device_nand = {
391 .name = "msm_nand",
392 .id = -1,
393 .num_resources = ARRAY_SIZE(resources_nand),
394 .resource = resources_nand,
395 .dev = {
396 .platform_data = &msm_nand_data,
397 },
398};
399
400struct platform_device msm_device_smd = {
401 .name = "msm_smd",
402 .id = -1,
403};
404
405struct resource msm_dmov_resource[] = {
406 {
407 .start = INT_ADM_AARM,
408 .end = (resource_size_t)MSM_DMOV_BASE,
409 .flags = IORESOURCE_IRQ,
410 },
411};
412
413struct platform_device msm_device_dmov = {
414 .name = "msm_dmov",
415 .id = -1,
416 .resource = msm_dmov_resource,
417 .num_resources = ARRAY_SIZE(msm_dmov_resource),
418};
419
420#define MSM_SDC1_BASE 0xA0400000
421#define MSM_SDC2_BASE 0xA0500000
422#define MSM_SDC3_BASE 0xA0600000
423#define MSM_SDC4_BASE 0xA0700000
424static struct resource resources_sdc1[] = {
425 {
426 .start = MSM_SDC1_BASE,
427 .end = MSM_SDC1_BASE + SZ_4K - 1,
428 .flags = IORESOURCE_MEM,
429 },
430 {
431 .start = INT_SDC1_0,
432 .end = INT_SDC1_1,
433 .flags = IORESOURCE_IRQ,
434 },
435 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700436 .name = "sdcc_dma_chnl",
437 .start = DMOV_SDC1_CHAN,
438 .end = DMOV_SDC1_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700439 .flags = IORESOURCE_DMA,
440 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700441 {
442 .name = "sdcc_dma_crci",
443 .start = DMOV_SDC1_CRCI,
444 .end = DMOV_SDC1_CRCI,
445 .flags = IORESOURCE_DMA,
446 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447};
448
449static struct resource resources_sdc2[] = {
450 {
451 .start = MSM_SDC2_BASE,
452 .end = MSM_SDC2_BASE + SZ_4K - 1,
453 .flags = IORESOURCE_MEM,
454 },
455 {
456 .start = INT_SDC2_0,
457 .end = INT_SDC2_1,
458 .flags = IORESOURCE_IRQ,
459 },
460 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700461 .name = "sdcc_dma_chnl",
462 .start = DMOV_SDC2_CHAN,
463 .end = DMOV_SDC2_CHAN,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700464 .flags = IORESOURCE_DMA,
465 },
Krishna Konda25786ec2011-07-25 16:21:36 -0700466 {
467 .name = "sdcc_dma_crci",
468 .start = DMOV_SDC2_CRCI,
469 .end = DMOV_SDC2_CRCI,
470 .flags = IORESOURCE_DMA,
471 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700472};
473
474static struct resource resources_sdc3[] = {
475 {
476 .start = MSM_SDC3_BASE,
477 .end = MSM_SDC3_BASE + SZ_4K - 1,
478 .flags = IORESOURCE_MEM,
479 },
480 {
481 .start = INT_SDC3_0,
482 .end = INT_SDC3_1,
483 .flags = IORESOURCE_IRQ,
484 },
485 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700486 .name = "sdcc_dma_chnl",
487 .start = DMOV_SDC3_CHAN,
488 .end = DMOV_SDC3_CHAN,
489 .flags = IORESOURCE_DMA,
490 },
491 {
492 .name = "sdcc_dma_crci",
493 .start = DMOV_SDC3_CRCI,
494 .end = DMOV_SDC3_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700495 .flags = IORESOURCE_DMA,
496 },
497};
498
499static struct resource resources_sdc4[] = {
500 {
501 .start = MSM_SDC4_BASE,
502 .end = MSM_SDC4_BASE + SZ_4K - 1,
503 .flags = IORESOURCE_MEM,
504 },
505 {
506 .start = INT_SDC4_0,
507 .end = INT_SDC4_1,
508 .flags = IORESOURCE_IRQ,
509 },
510 {
Krishna Konda25786ec2011-07-25 16:21:36 -0700511 .name = "sdcc_dma_chnl",
512 .start = DMOV_SDC4_CHAN,
513 .end = DMOV_SDC4_CHAN,
514 .flags = IORESOURCE_DMA,
515 },
516 {
517 .name = "sdcc_dma_crci",
518 .start = DMOV_SDC4_CRCI,
519 .end = DMOV_SDC4_CRCI,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700520 .flags = IORESOURCE_DMA,
521 },
522};
523
524struct platform_device msm_device_sdc1 = {
525 .name = "msm_sdcc",
526 .id = 1,
527 .num_resources = ARRAY_SIZE(resources_sdc1),
528 .resource = resources_sdc1,
529 .dev = {
530 .coherent_dma_mask = 0xffffffff,
531 },
532};
533
534struct platform_device msm_device_sdc2 = {
535 .name = "msm_sdcc",
536 .id = 2,
537 .num_resources = ARRAY_SIZE(resources_sdc2),
538 .resource = resources_sdc2,
539 .dev = {
540 .coherent_dma_mask = 0xffffffff,
541 },
542};
543
544struct platform_device msm_device_sdc3 = {
545 .name = "msm_sdcc",
546 .id = 3,
547 .num_resources = ARRAY_SIZE(resources_sdc3),
548 .resource = resources_sdc3,
549 .dev = {
550 .coherent_dma_mask = 0xffffffff,
551 },
552};
553
554struct platform_device msm_device_sdc4 = {
555 .name = "msm_sdcc",
556 .id = 4,
557 .num_resources = ARRAY_SIZE(resources_sdc4),
558 .resource = resources_sdc4,
559 .dev = {
560 .coherent_dma_mask = 0xffffffff,
561 },
562};
563
564static struct platform_device *msm_sdcc_devices[] __initdata = {
565 &msm_device_sdc1,
566 &msm_device_sdc2,
567 &msm_device_sdc3,
568 &msm_device_sdc4,
569};
570
571int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)
572{
573 struct platform_device *pdev;
574
575 if (controller < 1 || controller > 4)
576 return -EINVAL;
577
578 pdev = msm_sdcc_devices[controller-1];
579 pdev->dev.platform_data = plat;
580 return platform_device_register(pdev);
581}
582
583#if defined(CONFIG_FB_MSM_MDP40)
584#define MDP_BASE 0xA3F00000
585#define PMDH_BASE 0xAD600000
586#define EMDH_BASE 0xAD700000
587#define TVENC_BASE 0xAD400000
588#else
589#define MDP_BASE 0xAA200000
590#define PMDH_BASE 0xAA600000
591#define EMDH_BASE 0xAA700000
592#define TVENC_BASE 0xAA400000
593#endif
594
595static struct resource msm_mdp_resources[] = {
596 {
597 .name = "mdp",
598 .start = MDP_BASE,
599 .end = MDP_BASE + 0x000F0000 - 1,
600 .flags = IORESOURCE_MEM,
601 },
602 {
603 .start = INT_MDP,
604 .end = INT_MDP,
605 .flags = IORESOURCE_IRQ,
606 },
607};
608
609static struct resource msm_mddi_resources[] = {
610 {
611 .name = "pmdh",
612 .start = PMDH_BASE,
613 .end = PMDH_BASE + PAGE_SIZE - 1,
614 .flags = IORESOURCE_MEM,
615 }
616};
617
618static struct resource msm_mddi_ext_resources[] = {
619 {
620 .name = "emdh",
621 .start = EMDH_BASE,
622 .end = EMDH_BASE + PAGE_SIZE - 1,
623 .flags = IORESOURCE_MEM,
624 }
625};
626
627static struct resource msm_ebi2_lcd_resources[] = {
628 {
629 .name = "base",
630 .start = 0xa0d00000,
631 .end = 0xa0d00000 + PAGE_SIZE - 1,
632 .flags = IORESOURCE_MEM,
633 },
634 {
635 .name = "lcd01",
636 .start = 0x98000000,
637 .end = 0x98000000 + 0x80000 - 1,
638 .flags = IORESOURCE_MEM,
639 },
640 {
641 .name = "lcd02",
642 .start = 0x9c000000,
643 .end = 0x9c000000 + 0x80000 - 1,
644 .flags = IORESOURCE_MEM,
645 },
646};
647
648static struct resource msm_tvenc_resources[] = {
649 {
650 .name = "tvenc",
651 .start = TVENC_BASE,
652 .end = TVENC_BASE + PAGE_SIZE - 1,
653 .flags = IORESOURCE_MEM,
654 }
655};
656
657static struct platform_device msm_mdp_device = {
658 .name = "mdp",
659 .id = 0,
660 .num_resources = ARRAY_SIZE(msm_mdp_resources),
661 .resource = msm_mdp_resources,
662};
663
664static struct platform_device msm_mddi_device = {
665 .name = "mddi",
666 .id = 0,
667 .num_resources = ARRAY_SIZE(msm_mddi_resources),
668 .resource = msm_mddi_resources,
669};
670
671static struct platform_device msm_mddi_ext_device = {
672 .name = "mddi_ext",
673 .id = 0,
674 .num_resources = ARRAY_SIZE(msm_mddi_ext_resources),
675 .resource = msm_mddi_ext_resources,
676};
677
678static struct platform_device msm_ebi2_lcd_device = {
679 .name = "ebi2_lcd",
680 .id = 0,
681 .num_resources = ARRAY_SIZE(msm_ebi2_lcd_resources),
682 .resource = msm_ebi2_lcd_resources,
683};
684
685static struct platform_device msm_lcdc_device = {
686 .name = "lcdc",
687 .id = 0,
688};
689
690static struct platform_device msm_tvenc_device = {
691 .name = "tvenc",
692 .id = 0,
693 .num_resources = ARRAY_SIZE(msm_tvenc_resources),
694 .resource = msm_tvenc_resources,
695};
696
697/* TSIF begin */
698#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
699
700#define MSM_TSIF_PHYS (0xa0100000)
701#define MSM_TSIF_SIZE (0x200)
702
703static struct resource tsif_resources[] = {
704 [0] = {
705 .flags = IORESOURCE_IRQ,
706 .start = INT_TSIF_IRQ,
707 .end = INT_TSIF_IRQ,
708 },
709 [1] = {
710 .flags = IORESOURCE_MEM,
711 .start = MSM_TSIF_PHYS,
712 .end = MSM_TSIF_PHYS + MSM_TSIF_SIZE - 1,
713 },
714 [2] = {
715 .flags = IORESOURCE_DMA,
716 .start = DMOV_TSIF_CHAN,
717 .end = DMOV_TSIF_CRCI,
718 },
719};
720
721static void tsif_release(struct device *dev)
722{
723 dev_info(dev, "release\n");
724}
725
726struct platform_device msm_device_tsif = {
727 .name = "msm_tsif",
728 .id = 0,
729 .num_resources = ARRAY_SIZE(tsif_resources),
730 .resource = tsif_resources,
731 .dev = {
732 .release = tsif_release,
733 },
734};
735#endif /* defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE) */
736/* TSIF end */
737
738#define MSM_TSSC_PHYS 0xAA300000
739static struct resource resources_tssc[] = {
740 {
741 .start = MSM_TSSC_PHYS,
742 .end = MSM_TSSC_PHYS + SZ_4K - 1,
743 .name = "tssc",
744 .flags = IORESOURCE_MEM,
745 },
746 {
747 .start = INT_TCHSCRN1,
748 .end = INT_TCHSCRN1,
749 .name = "tssc1",
750 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
751 },
752 {
753 .start = INT_TCHSCRN2,
754 .end = INT_TCHSCRN2,
755 .name = "tssc2",
756 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_RISING,
757 },
758};
759
760struct platform_device msm_device_tssc = {
761 .name = "msm_touchscreen",
762 .id = 0,
763 .num_resources = ARRAY_SIZE(resources_tssc),
764 .resource = resources_tssc,
765};
766
767static void __init msm_register_device(struct platform_device *pdev, void *data)
768{
769 int ret;
770
771 pdev->dev.platform_data = data;
772
773 ret = platform_device_register(pdev);
774 if (ret)
775 dev_err(&pdev->dev,
776 "%s: platform_device_register() failed = %d\n",
777 __func__, ret);
778}
779
780void __init msm_fb_register_device(char *name, void *data)
781{
782 if (!strncmp(name, "mdp", 3))
783 msm_register_device(&msm_mdp_device, data);
784 else if (!strncmp(name, "pmdh", 4))
785 msm_register_device(&msm_mddi_device, data);
786 else if (!strncmp(name, "emdh", 4))
787 msm_register_device(&msm_mddi_ext_device, data);
788 else if (!strncmp(name, "ebi2", 4))
789 msm_register_device(&msm_ebi2_lcd_device, data);
790 else if (!strncmp(name, "tvenc", 5))
791 msm_register_device(&msm_tvenc_device, data);
792 else if (!strncmp(name, "lcdc", 4))
793 msm_register_device(&msm_lcdc_device, data);
794 else
795 printk(KERN_ERR "%s: unknown device! %s\n", __func__, name);
796}
797
798static struct platform_device msm_camera_device = {
799 .name = "msm_camera",
800 .id = 0,
801};
802
803void __init msm_camera_register_device(void *res, uint32_t num,
804 void *data)
805{
806 msm_camera_device.num_resources = num;
807 msm_camera_device.resource = res;
808
809 msm_register_device(&msm_camera_device, data);
810}
811
812static struct resource kgsl_3d0_resources[] = {
813 {
814 .name = KGSL_3D0_REG_MEMORY,
815 .start = 0xA0000000,
816 .end = 0xA001ffff,
817 .flags = IORESOURCE_MEM,
818 },
819 {
820 .name = KGSL_3D0_IRQ,
821 .start = INT_GRAPHICS,
822 .end = INT_GRAPHICS,
823 .flags = IORESOURCE_IRQ,
824 },
825};
826
827static struct kgsl_device_platform_data kgsl_3d0_pdata = {
828 .pwr_data = {
829 /* bus_freq has been set to 160000 for power savings.
830 * OEMs may modify the value at their discretion for performance
831 * The appropriate maximum replacement for 160000 is:
832 * msm7x2x_clock_data.max_axi_khz
833 */
834 .pwrlevel = {
835 {
836 .gpu_freq = 0,
837 .bus_freq = 160000000,
838 },
839 },
840 .init_level = 0,
841 .num_levels = 1,
842 .set_grp_async = NULL,
843 .idle_timeout = HZ/5,
844 },
845 .clk = {
846 .name = {
847 .clk = "grp_clk",
848 .pclk = "grp_pclk",
849 },
850 },
851 .imem_clk_name = {
852 .clk = "imem_clk",
853 },
854};
855
856struct platform_device msm_kgsl_3d0 = {
857 .name = "kgsl-3d0",
858 .id = 0,
859 .num_resources = ARRAY_SIZE(kgsl_3d0_resources),
860 .resource = kgsl_3d0_resources,
861 .dev = {
862 .platform_data = &kgsl_3d0_pdata,
863 },
864};
865
866struct platform_device *msm_footswitch_devices[] = {
867 FS_PCOM(FS_GFX3D, "fs_gfx3d"),
868};
869unsigned msm_num_footswitch_devices = ARRAY_SIZE(msm_footswitch_devices);