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Nagamalleswararao Ganji70fac1e2011-12-29 19:06:37 -08001/* Copyright (c) 2010-2012, Code Aurora Forum. All rights reserved.
Steve Mucklea55df6e2010-01-07 12:43:24 -08002 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
Steve Mucklea55df6e2010-01-07 12:43:24 -080012 */
13
14#include <linux/kernel.h>
15#include <linux/platform_device.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070016#include <linux/gpio.h>
Steve Muckle9161d302010-02-11 11:50:40 -080017#include <linux/irq.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070018#include <linux/io.h>
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +053019#include <linux/msm_ssbi.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070020#include <linux/mfd/pmic8058.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080021
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/leds.h>
23#include <linux/pmic8058-othc.h>
24#include <linux/mfd/pmic8901.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053025#include <linux/regulator/gpio-regulator.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070026#include <linux/regulator/pmic8901-regulator.h>
27#include <linux/bootmem.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070028#include <linux/msm_adc.h>
29#include <linux/m_adcproc.h>
30#include <linux/mfd/marimba.h>
31#include <linux/msm-charger.h>
32#include <linux/i2c.h>
33#include <linux/i2c/sx150x.h>
34#include <linux/smsc911x.h>
35#include <linux/spi/spi.h>
36#include <linux/input/tdisc_shinetsu.h>
37#include <linux/input/cy8c_ts.h>
38#include <linux/cyttsp.h>
39#include <linux/i2c/isa1200.h>
40#include <linux/dma-mapping.h>
41#include <linux/i2c/bq27520.h>
42
43#ifdef CONFIG_ANDROID_PMEM
44#include <linux/android_pmem.h>
45#endif
46
47#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
48#include <linux/i2c/smb137b.h>
49#endif
Lei Zhou338cab82011-08-19 13:38:17 -040050#ifdef CONFIG_SND_SOC_WM8903
51#include <sound/wm8903.h>
52#endif
Steve Mucklea55df6e2010-01-07 12:43:24 -080053#include <asm/mach-types.h>
54#include <asm/mach/arch.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070055#include <asm/setup.h>
Marc Zyngier89bdafd12011-12-22 11:39:20 +053056#include <asm/hardware/gic.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080057
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070058#include <mach/dma.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080059#include <mach/board.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070060#include <mach/irqs.h>
61#include <mach/msm_spi.h>
62#include <mach/msm_serial_hs.h>
63#include <mach/msm_serial_hs_lite.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080064#include <mach/msm_iomap.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070065#include <mach/msm_memtypes.h>
66#include <asm/mach/mmc.h>
67#include <mach/msm_battery.h>
68#include <mach/msm_hsusb.h>
Rohit Vaswania513aa8d2011-07-18 15:14:28 -070069#include <mach/gpiomux.h>
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070070#ifdef CONFIG_MSM_DSPS
71#include <mach/msm_dsps.h>
72#endif
73#include <mach/msm_xo.h>
74#include <mach/msm_bus_board.h>
75#include <mach/socinfo.h>
76#include <linux/i2c/isl9519.h>
77#ifdef CONFIG_USB_G_ANDROID
78#include <linux/usb/android.h>
79#include <mach/usbdiag.h>
80#endif
81#include <linux/regulator/consumer.h>
82#include <linux/regulator/machine.h>
83#include <mach/sdio_al.h>
84#include <mach/rpm.h>
85#include <mach/rpm-regulator.h>
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070086#include <mach/restart.h>
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053087#include <mach/board-msm8660.h>
Steve Mucklea55df6e2010-01-07 12:43:24 -080088
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070089#include "devices.h"
90#include "devices-msm8x60.h"
Abhijeet Dharmapurikarefaca4f2011-12-27 16:24:07 -080091#include <mach/cpuidle.h>
Matt Wagantall7cca4642012-02-01 16:43:24 -080092#include "pm.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070093#include "mpm.h"
94#include "spm.h"
95#include "rpm_log.h"
96#include "timer.h"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070097#include "gpiomux-8x60.h"
98#include "rpm_stats.h"
99#include "peripheral-loader.h"
100#include <linux/platform_data/qcom_crypto_device.h>
101#include "rpm_resources.h"
Matt Wagantall6d9ebee2011-08-26 12:15:24 -0700102#include "acpuclock.h"
Maheshkumar Sivasubramanian8ccc16e2011-10-25 15:59:57 -0600103#include "pm-boot.h"
Laura Abbott63cfd7e2011-10-10 18:21:01 -0700104
105#include <linux/ion.h>
106#include <mach/ion.h>
107
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700108#define MSM_SHARED_RAM_PHYS 0x40000000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700109#define MDM2AP_SYNC 129
110
Terence Hampson1c73fef2011-07-19 17:10:49 -0400111#define GPIO_ETHERNET_RESET_N_DRAGON 30
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700112#define LCDC_SPI_GPIO_CLK 73
113#define LCDC_SPI_GPIO_CS 72
114#define LCDC_SPI_GPIO_MOSI 70
115#define LCDC_AUO_PANEL_NAME "lcdc_auo_wvga"
116#define LCDC_SAMSUNG_OLED_PANEL_NAME "lcdc_samsung_oled"
117#define LCDC_SAMSUNG_WSVGA_PANEL_NAME "lcdc_samsung_wsvga"
118#define LCDC_SAMSUNG_SPI_DEVICE_NAME "lcdc_samsung_ams367pe02"
119#define LCDC_AUO_SPI_DEVICE_NAME "lcdc_auo_nt35582"
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -0400120#define LCDC_NT35582_PANEL_NAME "lcdc_nt35582_wvga"
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700121
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -0700122#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
123#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
124#define MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME "mipi_video_toshiba_wvga"
125#define HDMI_PANEL_NAME "hdmi_msm"
126#define TVOUT_PANEL_NAME "tvout_msm"
127
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700128#define DSPS_PIL_GENERIC_NAME "dsps"
129#define DSPS_PIL_FLUID_NAME "dsps_fluid"
130
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -0800131#ifdef CONFIG_ION_MSM
132static struct platform_device ion_dev;
133#endif
134
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700135enum {
136 GPIO_EXPANDER_IRQ_BASE = PM8901_IRQ_BASE + NR_PMIC8901_IRQS,
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530137 GPIO_EXPANDER_GPIO_BASE = PM8901_MPP_BASE + PM8901_MPPS,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700138 /* CORE expander */
139 GPIO_CORE_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE,
140 GPIO_CLASS_D1_EN = GPIO_CORE_EXPANDER_BASE,
141 GPIO_WLAN_DEEP_SLEEP_N,
142 GPIO_LVDS_SHUTDOWN_N,
143 GPIO_DISP_RESX_N = GPIO_LVDS_SHUTDOWN_N,
144 GPIO_MS_SYS_RESET_N,
145 GPIO_CAP_TS_RESOUT_N,
146 GPIO_CAP_GAUGE_BI_TOUT,
147 GPIO_ETHERNET_PME,
148 GPIO_EXT_GPS_LNA_EN,
149 GPIO_MSM_WAKES_BT,
150 GPIO_ETHERNET_RESET_N,
151 GPIO_HEADSET_DET_N,
152 GPIO_USB_UICC_EN,
153 GPIO_BACKLIGHT_EN,
154 GPIO_EXT_CAMIF_PWR_EN,
155 GPIO_BATT_GAUGE_INT_N,
156 GPIO_BATT_GAUGE_EN,
157 /* DOCKING expander */
158 GPIO_DOCKING_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + 16,
159 GPIO_MIPI_DSI_RST_N = GPIO_DOCKING_EXPANDER_BASE,
160 GPIO_AUX_JTAG_DET_N,
161 GPIO_DONGLE_DET_N,
162 GPIO_SVIDEO_LOAD_DET,
163 GPIO_SVID_AMP_SHUTDOWN1_N,
164 GPIO_SVID_AMP_SHUTDOWN0_N,
165 GPIO_SDC_WP,
166 GPIO_IRDA_PWDN,
167 GPIO_IRDA_RESET_N,
168 GPIO_DONGLE_GPIO0,
169 GPIO_DONGLE_GPIO1,
170 GPIO_DONGLE_GPIO2,
171 GPIO_DONGLE_GPIO3,
172 GPIO_DONGLE_PWR_EN,
173 GPIO_EMMC_RESET_N,
174 GPIO_TP_EXP2_IO15,
175 /* SURF expander */
176 GPIO_SURF_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 2),
177 GPIO_SD_CARD_DET_1 = GPIO_SURF_EXPANDER_BASE,
178 GPIO_SD_CARD_DET_2,
179 GPIO_SD_CARD_DET_4,
180 GPIO_SD_CARD_DET_5,
181 GPIO_UIM3_RST,
182 GPIO_SURF_EXPANDER_IO5,
183 GPIO_SURF_EXPANDER_IO6,
184 GPIO_ADC_I2C_EN,
185 GPIO_SURF_EXPANDER_IO8,
186 GPIO_SURF_EXPANDER_IO9,
187 GPIO_SURF_EXPANDER_IO10,
188 GPIO_SURF_EXPANDER_IO11,
189 GPIO_SURF_EXPANDER_IO12,
190 GPIO_SURF_EXPANDER_IO13,
191 GPIO_SURF_EXPANDER_IO14,
192 GPIO_SURF_EXPANDER_IO15,
193 /* LEFT KB IO expander */
194 GPIO_LEFT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3),
195 GPIO_LEFT_LED_1 = GPIO_LEFT_KB_EXPANDER_BASE,
196 GPIO_LEFT_LED_2,
197 GPIO_LEFT_LED_3,
198 GPIO_LEFT_LED_WLAN,
199 GPIO_JOYSTICK_EN,
200 GPIO_CAP_TS_SLEEP,
201 GPIO_LEFT_KB_IO6,
202 GPIO_LEFT_LED_5,
203 /* RIGHT KB IO expander */
204 GPIO_RIGHT_KB_EXPANDER_BASE = GPIO_EXPANDER_GPIO_BASE + (16 * 3) + 8,
205 GPIO_RIGHT_LED_1 = GPIO_RIGHT_KB_EXPANDER_BASE,
206 GPIO_RIGHT_LED_2,
207 GPIO_RIGHT_LED_3,
208 GPIO_RIGHT_LED_BT,
209 GPIO_WEB_CAMIF_STANDBY,
210 GPIO_COMPASS_RST_N,
211 GPIO_WEB_CAMIF_RESET_N,
212 GPIO_RIGHT_LED_5,
213 GPIO_R_ALTIMETER_RESET_N,
214 /* FLUID S IO expander */
215 GPIO_SOUTH_EXPANDER_BASE,
216 GPIO_MIC2_ANCR_SEL = GPIO_SOUTH_EXPANDER_BASE,
217 GPIO_MIC1_ANCL_SEL,
218 GPIO_HS_MIC4_SEL,
219 GPIO_FML_MIC3_SEL,
220 GPIO_FMR_MIC5_SEL,
221 GPIO_TS_SLEEP,
222 GPIO_HAP_SHIFT_LVL_OE,
223 GPIO_HS_SW_DIR,
224 /* FLUID N IO expander */
225 GPIO_NORTH_EXPANDER_BASE,
226 GPIO_EPM_3_3V_EN = GPIO_NORTH_EXPANDER_BASE,
227 GPIO_EPM_5V_BOOST_EN,
228 GPIO_AUX_CAM_2P7_EN,
229 GPIO_LED_FLASH_EN,
230 GPIO_LED1_GREEN_N,
231 GPIO_LED2_RED_N,
232 GPIO_FRONT_CAM_RESET_N,
233 GPIO_EPM_LVLSFT_EN,
234 GPIO_N_ALTIMETER_RESET_N,
235 /* EPM expander */
236 GPIO_EPM_EXPANDER_BASE,
237 GPIO_PWR_MON_START = GPIO_EPM_EXPANDER_BASE,
238 GPIO_PWR_MON_RESET_N,
239 GPIO_ADC1_PWDN_N,
240 GPIO_ADC2_PWDN_N,
241 GPIO_EPM_EXPANDER_IO4,
242 GPIO_ADC1_MUX_SPI_INT_N_3_3V,
243 GPIO_ADC2_MUX_SPI_INT_N,
244 GPIO_EPM_EXPANDER_IO7,
245 GPIO_PWR_MON_ENABLE,
246 GPIO_EPM_SPI_ADC1_CS_N,
247 GPIO_EPM_SPI_ADC2_CS_N,
248 GPIO_EPM_EXPANDER_IO11,
249 GPIO_EPM_EXPANDER_IO12,
250 GPIO_EPM_EXPANDER_IO13,
251 GPIO_EPM_EXPANDER_IO14,
252 GPIO_EPM_EXPANDER_IO15,
253};
254
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530255struct pm8xxx_mpp_init_info {
256 unsigned mpp;
257 struct pm8xxx_mpp_config_data config;
258};
259
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530260#define PM8058_MPP_INIT(_mpp, _type, _level, _control) \
Anirudh Ghayalc2019332011-11-12 06:29:10 +0530261{ \
262 .mpp = PM8058_MPP_PM_TO_SYS(_mpp), \
263 .config = { \
264 .type = PM8XXX_MPP_TYPE_##_type, \
265 .level = _level, \
266 .control = PM8XXX_MPP_##_control, \
267 } \
268}
269
Anirudh Ghayal9f77e962011-12-06 12:38:21 +0530270#define PM8901_MPP_INIT(_mpp, _type, _level, _control) \
271{ \
272 .mpp = PM8901_MPP_PM_TO_SYS(_mpp), \
273 .config = { \
274 .type = PM8XXX_MPP_TYPE_##_type, \
275 .level = _level, \
276 .control = PM8XXX_MPP_##_control, \
277 } \
278}
279
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700280/*
281 * The UI_INTx_N lines are pmic gpio lines which connect i2c
282 * gpio expanders to the pm8058.
283 */
284#define UI_INT1_N 25
285#define UI_INT2_N 34
286#define UI_INT3_N 14
287/*
288FM GPIO is GPIO 18 on PMIC 8058.
289As the index starts from 0 in the PMIC driver, and hence 17
290corresponds to GPIO 18 on PMIC 8058.
291*/
292#define FM_GPIO 17
293
294#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
295static void (*sdc2_status_notify_cb)(int card_present, void *dev_id);
296static void *sdc2_status_notify_cb_devid;
297#endif
298
299#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
300static void (*sdc5_status_notify_cb)(int card_present, void *dev_id);
301static void *sdc5_status_notify_cb_devid;
302#endif
303
304static struct msm_spm_platform_data msm_spm_data_v1[] __initdata = {
305 [0] = {
306 .reg_base_addr = MSM_SAW0_BASE,
307
308#ifdef CONFIG_MSM_AVS_HW
309 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
310#endif
311 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
312 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
313 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
314 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
315
316 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
317 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
318 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
319
320 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
321 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
322 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
323
324 .awake_vlevel = 0x94,
325 .retention_vlevel = 0x81,
326 .collapse_vlevel = 0x20,
327 .retention_mid_vlevel = 0x94,
328 .collapse_mid_vlevel = 0x8C,
329
330 .vctl_timeout_us = 50,
331 },
332
333 [1] = {
334 .reg_base_addr = MSM_SAW1_BASE,
335
336#ifdef CONFIG_MSM_AVS_HW
337 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
338#endif
339 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x0F,
340 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
341 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0xFFFFFFFF,
342 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0xFFFFFFFF,
343
344 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
345 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
346 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
347
348 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
349 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
350 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
351
352 .awake_vlevel = 0x94,
353 .retention_vlevel = 0x81,
354 .collapse_vlevel = 0x20,
355 .retention_mid_vlevel = 0x94,
356 .collapse_mid_vlevel = 0x8C,
357
358 .vctl_timeout_us = 50,
359 },
360};
361
362static struct msm_spm_platform_data msm_spm_data[] __initdata = {
363 [0] = {
364 .reg_base_addr = MSM_SAW0_BASE,
365
366#ifdef CONFIG_MSM_AVS_HW
367 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
368#endif
369 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
370 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
371 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
372 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
373
374 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x01,
375 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
376 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
377
378 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
379 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
380 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
381
382 .awake_vlevel = 0xA0,
383 .retention_vlevel = 0x89,
384 .collapse_vlevel = 0x20,
385 .retention_mid_vlevel = 0x89,
386 .collapse_mid_vlevel = 0x89,
387
388 .vctl_timeout_us = 50,
389 },
390
391 [1] = {
392 .reg_base_addr = MSM_SAW1_BASE,
393
394#ifdef CONFIG_MSM_AVS_HW
395 .reg_init_values[MSM_SPM_REG_SAW_AVS_CTL] = 0x586020FF,
396#endif
397 .reg_init_values[MSM_SPM_REG_SAW_CFG] = 0x1C,
398 .reg_init_values[MSM_SPM_REG_SAW_SPM_CTL] = 0x68,
399 .reg_init_values[MSM_SPM_REG_SAW_SPM_SLP_TMR_DLY] = 0x0C0CFFFF,
400 .reg_init_values[MSM_SPM_REG_SAW_SPM_WAKE_TMR_DLY] = 0x78780FFF,
401
402 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLK_EN] = 0x13,
403 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_PRECLMP_EN] = 0x07,
404 .reg_init_values[MSM_SPM_REG_SAW_SLP_HSFS_POSTCLMP_EN] = 0x00,
405
406 .reg_init_values[MSM_SPM_REG_SAW_SLP_CLMP_EN] = 0x01,
407 .reg_init_values[MSM_SPM_REG_SAW_SLP_RST_EN] = 0x00,
408 .reg_init_values[MSM_SPM_REG_SAW_SPM_MPM_CFG] = 0x00,
409
410 .awake_vlevel = 0xA0,
411 .retention_vlevel = 0x89,
412 .collapse_vlevel = 0x20,
413 .retention_mid_vlevel = 0x89,
414 .collapse_mid_vlevel = 0x89,
415
416 .vctl_timeout_us = 50,
417 },
418};
419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700420/*
421 * Consumer specific regulator names:
422 * regulator name consumer dev_name
423 */
424static struct regulator_consumer_supply vreg_consumers_8901_S0[] = {
425 REGULATOR_SUPPLY("8901_s0", NULL),
426};
427static struct regulator_consumer_supply vreg_consumers_8901_S1[] = {
428 REGULATOR_SUPPLY("8901_s1", NULL),
429};
430
431static struct regulator_init_data saw_s0_init_data = {
432 .constraints = {
433 .name = "8901_s0",
434 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700435 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700436 .max_uV = 1250000,
437 },
438 .consumer_supplies = vreg_consumers_8901_S0,
439 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S0),
440};
441
442static struct regulator_init_data saw_s1_init_data = {
443 .constraints = {
444 .name = "8901_s1",
445 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
Tianyi Gou7c81dfa2011-07-27 12:15:24 -0700446 .min_uV = 800000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700447 .max_uV = 1250000,
448 },
449 .consumer_supplies = vreg_consumers_8901_S1,
450 .num_consumer_supplies = ARRAY_SIZE(vreg_consumers_8901_S1),
451};
452
453static struct platform_device msm_device_saw_s0 = {
454 .name = "saw-regulator",
455 .id = 0,
456 .dev = {
457 .platform_data = &saw_s0_init_data,
458 },
459};
460
461static struct platform_device msm_device_saw_s1 = {
462 .name = "saw-regulator",
463 .id = 1,
464 .dev = {
465 .platform_data = &saw_s1_init_data,
466 },
467};
468
469/*
470 * The smc91x configuration varies depending on platform.
471 * The resources data structure is filled in at runtime.
472 */
473static struct resource smc91x_resources[] = {
474 [0] = {
475 .flags = IORESOURCE_MEM,
476 },
477 [1] = {
478 .flags = IORESOURCE_IRQ,
479 },
480};
481
482static struct platform_device smc91x_device = {
483 .name = "smc91x",
484 .id = 0,
485 .num_resources = ARRAY_SIZE(smc91x_resources),
486 .resource = smc91x_resources,
487};
488
489static struct resource smsc911x_resources[] = {
490 [0] = {
491 .flags = IORESOURCE_MEM,
492 .start = 0x1b800000,
493 .end = 0x1b8000ff
494 },
495 [1] = {
496 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
497 },
498};
499
500static struct smsc911x_platform_config smsc911x_config = {
501 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
502 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
503 .flags = SMSC911X_USE_16BIT,
504 .has_reset_gpio = 1,
505 .reset_gpio = GPIO_ETHERNET_RESET_N
506};
507
508static struct platform_device smsc911x_device = {
509 .name = "smsc911x",
510 .id = 0,
511 .num_resources = ARRAY_SIZE(smsc911x_resources),
512 .resource = smsc911x_resources,
513 .dev = {
514 .platform_data = &smsc911x_config
515 }
516};
517
518#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
519 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE) || \
520 defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
521 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
522
523#define QCE_SIZE 0x10000
524#define QCE_0_BASE 0x18500000
525
526#define QCE_HW_KEY_SUPPORT 0
527#define QCE_SHA_HMAC_SUPPORT 0
528#define QCE_SHARE_CE_RESOURCE 2
529#define QCE_CE_SHARED 1
530
531static struct resource qcrypto_resources[] = {
532 [0] = {
533 .start = QCE_0_BASE,
534 .end = QCE_0_BASE + QCE_SIZE - 1,
535 .flags = IORESOURCE_MEM,
536 },
537 [1] = {
538 .name = "crypto_channels",
539 .start = DMOV_CE_IN_CHAN,
540 .end = DMOV_CE_OUT_CHAN,
541 .flags = IORESOURCE_DMA,
542 },
543 [2] = {
544 .name = "crypto_crci_in",
545 .start = DMOV_CE_IN_CRCI,
546 .end = DMOV_CE_IN_CRCI,
547 .flags = IORESOURCE_DMA,
548 },
549 [3] = {
550 .name = "crypto_crci_out",
551 .start = DMOV_CE_OUT_CRCI,
552 .end = DMOV_CE_OUT_CRCI,
553 .flags = IORESOURCE_DMA,
554 },
555 [4] = {
556 .name = "crypto_crci_hash",
557 .start = DMOV_CE_HASH_CRCI,
558 .end = DMOV_CE_HASH_CRCI,
559 .flags = IORESOURCE_DMA,
560 },
561};
562
563static struct resource qcedev_resources[] = {
564 [0] = {
565 .start = QCE_0_BASE,
566 .end = QCE_0_BASE + QCE_SIZE - 1,
567 .flags = IORESOURCE_MEM,
568 },
569 [1] = {
570 .name = "crypto_channels",
571 .start = DMOV_CE_IN_CHAN,
572 .end = DMOV_CE_OUT_CHAN,
573 .flags = IORESOURCE_DMA,
574 },
575 [2] = {
576 .name = "crypto_crci_in",
577 .start = DMOV_CE_IN_CRCI,
578 .end = DMOV_CE_IN_CRCI,
579 .flags = IORESOURCE_DMA,
580 },
581 [3] = {
582 .name = "crypto_crci_out",
583 .start = DMOV_CE_OUT_CRCI,
584 .end = DMOV_CE_OUT_CRCI,
585 .flags = IORESOURCE_DMA,
586 },
587 [4] = {
588 .name = "crypto_crci_hash",
589 .start = DMOV_CE_HASH_CRCI,
590 .end = DMOV_CE_HASH_CRCI,
591 .flags = IORESOURCE_DMA,
592 },
593};
594
595#endif
596
597#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
598 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
599
600static struct msm_ce_hw_support qcrypto_ce_hw_suppport = {
601 .ce_shared = QCE_CE_SHARED,
602 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
603 .hw_key_support = QCE_HW_KEY_SUPPORT,
604 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800605 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700606};
607
608static struct platform_device qcrypto_device = {
609 .name = "qcrypto",
610 .id = 0,
611 .num_resources = ARRAY_SIZE(qcrypto_resources),
612 .resource = qcrypto_resources,
613 .dev = {
614 .coherent_dma_mask = DMA_BIT_MASK(32),
615 .platform_data = &qcrypto_ce_hw_suppport,
616 },
617};
618#endif
619
620#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
621 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
622
623static struct msm_ce_hw_support qcedev_ce_hw_suppport = {
624 .ce_shared = QCE_CE_SHARED,
625 .shared_ce_resource = QCE_SHARE_CE_RESOURCE,
626 .hw_key_support = QCE_HW_KEY_SUPPORT,
627 .sha_hmac = QCE_SHA_HMAC_SUPPORT,
Ramesh Masavarapu49259682011-12-02 14:00:18 -0800628 .bus_scale_table = NULL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700629};
630
631static struct platform_device qcedev_device = {
632 .name = "qce",
633 .id = 0,
634 .num_resources = ARRAY_SIZE(qcedev_resources),
635 .resource = qcedev_resources,
636 .dev = {
637 .coherent_dma_mask = DMA_BIT_MASK(32),
638 .platform_data = &qcedev_ce_hw_suppport,
639 },
640};
641#endif
642
643#if defined(CONFIG_HAPTIC_ISA1200) || \
644 defined(CONFIG_HAPTIC_ISA1200_MODULE)
645
646static const char *vregs_isa1200_name[] = {
647 "8058_s3",
648 "8901_l4",
649};
650
651static const int vregs_isa1200_val[] = {
652 1800000,/* uV */
653 2600000,
654};
655static struct regulator *vregs_isa1200[ARRAY_SIZE(vregs_isa1200_name)];
656static struct msm_xo_voter *xo_handle_a1;
657
658static int isa1200_power(int vreg_on)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800659{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700660 int i, rc = 0;
661
662 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
663 rc = vreg_on ? regulator_enable(vregs_isa1200[i]) :
664 regulator_disable(vregs_isa1200[i]);
665 if (rc < 0) {
666 pr_err("%s: vreg %s %s failed (%d)\n",
667 __func__, vregs_isa1200_name[i],
668 vreg_on ? "enable" : "disable", rc);
669 goto vreg_fail;
670 }
671 }
672
673 rc = vreg_on ? msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_ON) :
674 msm_xo_mode_vote(xo_handle_a1, MSM_XO_MODE_OFF);
675 if (rc < 0) {
676 pr_err("%s: failed to %svote for TCXO A1 buffer%d\n",
677 __func__, vreg_on ? "" : "de-", rc);
678 goto vreg_fail;
679 }
680 return 0;
681
682vreg_fail:
683 while (i--)
684 !vreg_on ? regulator_enable(vregs_isa1200[i]) :
685 regulator_disable(vregs_isa1200[i]);
686 return rc;
Steve Mucklea55df6e2010-01-07 12:43:24 -0800687}
688
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700689static int isa1200_dev_setup(bool enable)
Steve Mucklea55df6e2010-01-07 12:43:24 -0800690{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700691 int i, rc;
Steve Muckle9161d302010-02-11 11:50:40 -0800692
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700693 if (enable == true) {
694 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++) {
695 vregs_isa1200[i] = regulator_get(NULL,
696 vregs_isa1200_name[i]);
697 if (IS_ERR(vregs_isa1200[i])) {
698 pr_err("%s: regulator get of %s failed (%ld)\n",
699 __func__, vregs_isa1200_name[i],
700 PTR_ERR(vregs_isa1200[i]));
701 rc = PTR_ERR(vregs_isa1200[i]);
702 goto vreg_get_fail;
703 }
704 rc = regulator_set_voltage(vregs_isa1200[i],
705 vregs_isa1200_val[i], vregs_isa1200_val[i]);
706 if (rc) {
707 pr_err("%s: regulator_set_voltage(%s) failed\n",
708 __func__, vregs_isa1200_name[i]);
709 goto vreg_get_fail;
710 }
711 }
Steve Muckle9161d302010-02-11 11:50:40 -0800712
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700713 rc = gpio_request(GPIO_HAP_SHIFT_LVL_OE, "haptics_shft_lvl_oe");
714 if (rc) {
715 pr_err("%s: unable to request gpio %d (%d)\n",
716 __func__, GPIO_HAP_SHIFT_LVL_OE, rc);
717 goto vreg_get_fail;
718 }
Steve Muckle9161d302010-02-11 11:50:40 -0800719
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700720 rc = gpio_direction_output(GPIO_HAP_SHIFT_LVL_OE, 1);
721 if (rc) {
722 pr_err("%s: Unable to set direction\n", __func__);;
723 goto free_gpio;
724 }
725
726 xo_handle_a1 = msm_xo_get(MSM_XO_TCXO_A1, "isa1200");
727 if (IS_ERR(xo_handle_a1)) {
728 rc = PTR_ERR(xo_handle_a1);
729 pr_err("%s: failed to get the handle for A1(%d)\n",
730 __func__, rc);
731 goto gpio_set_dir;
732 }
733 } else {
734 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
735 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
736
737 for (i = 0; i < ARRAY_SIZE(vregs_isa1200_name); i++)
738 regulator_put(vregs_isa1200[i]);
739
740 msm_xo_put(xo_handle_a1);
741 }
742
743 return 0;
744gpio_set_dir:
745 gpio_set_value(GPIO_HAP_SHIFT_LVL_OE, 0);
746free_gpio:
747 gpio_free(GPIO_HAP_SHIFT_LVL_OE);
748vreg_get_fail:
749 while (i)
750 regulator_put(vregs_isa1200[--i]);
751 return rc;
752}
753
754#define PMIC_GPIO_HAP_ENABLE 18 /* PMIC GPIO Number 19 */
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530755#define PMIC_GPIO_HAP_LDO_ENABLE 5 /* PMIC GPIO Number 6 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700756static struct isa1200_platform_data isa1200_1_pdata = {
757 .name = "vibrator",
758 .power_on = isa1200_power,
759 .dev_setup = isa1200_dev_setup,
760 /*gpio to enable haptic*/
761 .hap_en_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
Mohan Pallaka4a1160d2011-09-09 15:17:45 +0530762 .hap_len_gpio = PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700763 .max_timeout = 15000,
764 .mode_ctrl = PWM_GEN_MODE,
765 .pwm_fd = {
766 .pwm_div = 256,
767 },
768 .is_erm = false,
769 .smart_en = true,
770 .ext_clk_en = true,
771 .chip_en = 1,
772};
773
774static struct i2c_board_info msm_isa1200_board_info[] = {
775 {
776 I2C_BOARD_INFO("isa1200_1", 0x90>>1),
777 .platform_data = &isa1200_1_pdata,
778 },
779};
780#endif
781
782#if defined(CONFIG_BATTERY_BQ27520) || \
783 defined(CONFIG_BATTERY_BQ27520_MODULE)
784static struct bq27520_platform_data bq27520_pdata = {
785 .name = "fuel-gauge",
786 .vreg_name = "8058_s3",
787 .vreg_value = 1800000,
788 .soc_int = GPIO_BATT_GAUGE_INT_N,
789 .bi_tout = GPIO_CAP_GAUGE_BI_TOUT,
790 .chip_en = GPIO_BATT_GAUGE_EN,
791 .enable_dlog = 0, /* if enable coulomb counter logger */
792};
793
794static struct i2c_board_info msm_bq27520_board_info[] = {
795 {
796 I2C_BOARD_INFO("bq27520", 0xaa>>1),
797 .platform_data = &bq27520_pdata,
798 },
799};
800#endif
801
802static struct msm_pm_platform_data msm_pm_data[MSM_PM_SLEEP_MODE_NR * 2] = {
803 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
804 .idle_supported = 1,
805 .suspend_supported = 1,
806 .idle_enabled = 0,
807 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700808 },
809
810 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
811 .idle_supported = 1,
812 .suspend_supported = 1,
813 .idle_enabled = 0,
814 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700815 },
816
817 [MSM_PM_MODE(0, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
818 .idle_supported = 1,
819 .suspend_supported = 1,
820 .idle_enabled = 1,
821 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700822 },
823
824 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE)] = {
825 .idle_supported = 1,
826 .suspend_supported = 1,
827 .idle_enabled = 0,
828 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700829 },
830
831 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE)] = {
832 .idle_supported = 1,
833 .suspend_supported = 1,
834 .idle_enabled = 0,
835 .suspend_enabled = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700836 },
837
838 [MSM_PM_MODE(1, MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT)] = {
839 .idle_supported = 1,
840 .suspend_supported = 1,
841 .idle_enabled = 1,
842 .suspend_enabled = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700843 },
844};
845
846static struct msm_cpuidle_state msm_cstates[] __initdata = {
847 {0, 0, "C0", "WFI",
848 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
849
850 {0, 1, "C1", "STANDALONE_POWER_COLLAPSE",
851 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
852
853 {0, 2, "C2", "POWER_COLLAPSE",
854 MSM_PM_SLEEP_MODE_POWER_COLLAPSE},
855
856 {1, 0, "C0", "WFI",
857 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT},
858
859 {1, 1, "C1", "STANDALONE_POWER_COLLAPSE",
860 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE},
861};
862
863static struct msm_rpmrs_level msm_rpmrs_levels[] __initdata = {
864 {
865 MSM_PM_SLEEP_MODE_WAIT_FOR_INTERRUPT,
866 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
867 true,
868 1, 8000, 100000, 1,
869 },
870
871 {
872 MSM_PM_SLEEP_MODE_POWER_COLLAPSE_STANDALONE,
873 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
874 true,
875 1500, 5000, 60100000, 3000,
876 },
877
878 {
879 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
880 MSM_RPMRS_LIMITS(ON, ACTIVE, MAX, ACTIVE),
881 false,
882 1800, 5000, 60350000, 3500,
883 },
884 {
885 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
886 MSM_RPMRS_LIMITS(OFF, ACTIVE, MAX, ACTIVE),
887 false,
888 3800, 4500, 65350000, 5500,
889 },
890
891 {
892 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
893 MSM_RPMRS_LIMITS(ON, HSFS_OPEN, MAX, ACTIVE),
894 false,
895 2800, 2500, 66850000, 4800,
896 },
897
898 {
899 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
900 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, MAX, ACTIVE),
901 false,
902 4800, 2000, 71850000, 6800,
903 },
904
905 {
906 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
907 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, ACTIVE, RET_HIGH),
908 false,
909 6800, 500, 75850000, 8800,
910 },
911
912 {
913 MSM_PM_SLEEP_MODE_POWER_COLLAPSE,
914 MSM_RPMRS_LIMITS(OFF, HSFS_OPEN, RET_HIGH, RET_LOW),
915 false,
916 7800, 0, 76350000, 9800,
917 },
918};
919
Praveen Chidambaram78499012011-11-01 17:15:17 -0600920static struct msm_rpmrs_platform_data msm_rpmrs_data __initdata = {
921 .levels = &msm_rpmrs_levels[0],
922 .num_levels = ARRAY_SIZE(msm_rpmrs_levels),
923 .vdd_mem_levels = {
924 [MSM_RPMRS_VDD_MEM_RET_LOW] = 500,
925 [MSM_RPMRS_VDD_MEM_RET_HIGH] = 750,
926 [MSM_RPMRS_VDD_MEM_ACTIVE] = 1000,
927 [MSM_RPMRS_VDD_MEM_MAX] = 1250,
928 },
929 .vdd_dig_levels = {
930 [MSM_RPMRS_VDD_DIG_RET_LOW] = 500,
931 [MSM_RPMRS_VDD_DIG_RET_HIGH] = 750,
932 [MSM_RPMRS_VDD_DIG_ACTIVE] = 1000,
933 [MSM_RPMRS_VDD_DIG_MAX] = 1250,
934 },
935 .vdd_mask = 0xFFF,
936 .rpmrs_target_id = {
937 [MSM_RPMRS_ID_PXO_CLK] = MSM_RPM_ID_PXO_CLK,
938 [MSM_RPMRS_ID_L2_CACHE_CTL] = MSM_RPM_ID_APPS_L2_CACHE_CTL,
939 [MSM_RPMRS_ID_VDD_DIG_0] = MSM_RPM_ID_SMPS1_0,
940 [MSM_RPMRS_ID_VDD_DIG_1] = MSM_RPM_ID_SMPS1_1,
941 [MSM_RPMRS_ID_VDD_MEM_0] = MSM_RPM_ID_SMPS0_0,
942 [MSM_RPMRS_ID_VDD_MEM_1] = MSM_RPM_ID_SMPS0_1,
943 [MSM_RPMRS_ID_RPM_CTL] = MSM_RPM_ID_TRIGGER_SET_FROM,
944 },
945};
946
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -0600947static struct msm_pm_boot_platform_data msm_pm_boot_pdata __initdata = {
948 .mode = MSM_PM_BOOT_CONFIG_TZ,
949};
950
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700951#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
952
953#define ISP1763_INT_GPIO 117
954#define ISP1763_RST_GPIO 152
955static struct resource isp1763_resources[] = {
956 [0] = {
957 .flags = IORESOURCE_MEM,
958 .start = 0x1D000000,
959 .end = 0x1D005FFF, /* 24KB */
960 },
961 [1] = {
962 .flags = IORESOURCE_IRQ,
963 },
964};
965static void __init msm8x60_cfg_isp1763(void)
966{
967 isp1763_resources[1].start = gpio_to_irq(ISP1763_INT_GPIO);
968 isp1763_resources[1].end = gpio_to_irq(ISP1763_INT_GPIO);
969}
970
971static int isp1763_setup_gpio(int enable)
972{
973 int status = 0;
974
975 if (enable) {
976 status = gpio_request(ISP1763_INT_GPIO, "isp1763_usb");
977 if (status) {
978 pr_err("%s:Failed to request GPIO %d\n",
979 __func__, ISP1763_INT_GPIO);
980 return status;
981 }
982 status = gpio_direction_input(ISP1763_INT_GPIO);
983 if (status) {
984 pr_err("%s:Failed to configure GPIO %d\n",
985 __func__, ISP1763_INT_GPIO);
986 goto gpio_free_int;
987 }
988 status = gpio_request(ISP1763_RST_GPIO, "isp1763_usb");
989 if (status) {
990 pr_err("%s:Failed to request GPIO %d\n",
991 __func__, ISP1763_RST_GPIO);
992 goto gpio_free_int;
993 }
994 status = gpio_direction_output(ISP1763_RST_GPIO, 1);
995 if (status) {
996 pr_err("%s:Failed to configure GPIO %d\n",
997 __func__, ISP1763_RST_GPIO);
998 goto gpio_free_rst;
999 }
1000 pr_debug("\nISP GPIO configuration done\n");
1001 return status;
1002 }
1003
1004gpio_free_rst:
1005 gpio_free(ISP1763_RST_GPIO);
1006gpio_free_int:
1007 gpio_free(ISP1763_INT_GPIO);
1008
1009 return status;
1010}
1011static struct isp1763_platform_data isp1763_pdata = {
1012 .reset_gpio = ISP1763_RST_GPIO,
1013 .setup_gpio = isp1763_setup_gpio
1014};
1015
1016static struct platform_device isp1763_device = {
1017 .name = "isp1763_usb",
1018 .num_resources = ARRAY_SIZE(isp1763_resources),
1019 .resource = isp1763_resources,
1020 .dev = {
1021 .platform_data = &isp1763_pdata
1022 }
1023};
1024#endif
1025
Lena Salman57d167e2012-03-21 19:46:38 +02001026#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301027static struct msm_otg_platform_data msm_otg_pdata;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001028static struct regulator *ldo6_3p3;
1029static struct regulator *ldo7_1p8;
1030static struct regulator *vdd_cx;
1031#define PMICID_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 36)
Anji jonnalaae745e92011-11-14 18:34:31 +05301032#define PMIC_ID_GPIO 36
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001033notify_vbus_state notify_vbus_state_func_ptr;
1034static int usb_phy_susp_dig_vol = 750000;
1035static int pmic_id_notif_supported;
1036
1037#ifdef CONFIG_USB_EHCI_MSM_72K
1038#define USB_PMIC_ID_DET_DELAY msecs_to_jiffies(100)
1039struct delayed_work pmic_id_det;
1040
1041static int __init usb_id_pin_rework_setup(char *support)
1042{
1043 if (strncmp(support, "true", 4) == 0)
1044 pmic_id_notif_supported = 1;
1045
1046 return 1;
1047}
1048__setup("usb_id_pin_rework=", usb_id_pin_rework_setup);
1049
1050static void pmic_id_detect(struct work_struct *w)
1051{
1052 int val = gpio_get_value_cansleep(PM8058_GPIO_PM_TO_SYS(36));
1053 pr_debug("%s(): gpio_read_value = %d\n", __func__, val);
1054
1055 if (notify_vbus_state_func_ptr)
1056 (*notify_vbus_state_func_ptr) (val);
1057}
1058
1059static irqreturn_t pmic_id_on_irq(int irq, void *data)
1060{
1061 /*
1062 * Spurious interrupts are observed on pmic gpio line
1063 * even though there is no state change on USB ID. Schedule the
1064 * work to to allow debounce on gpio
Steve Muckle9161d302010-02-11 11:50:40 -08001065 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001066 schedule_delayed_work(&pmic_id_det, USB_PMIC_ID_DET_DELAY);
Steve Muckle9161d302010-02-11 11:50:40 -08001067
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001068 return IRQ_HANDLED;
1069}
1070
Anji jonnalaae745e92011-11-14 18:34:31 +05301071static int msm_hsusb_phy_id_setup_init(int init)
1072{
1073 unsigned ret;
1074
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301075 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
1076 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
1077 .level = PM8901_MPP_DIG_LEVEL_L5,
1078 };
1079
Anji jonnalaae745e92011-11-14 18:34:31 +05301080 if (init) {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301081 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
1082 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1083 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301084 if (ret < 0)
1085 pr_err("%s:MPP2 configuration failed\n", __func__);
1086 } else {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05301087 hsusb_phy_mpp.control = PM8XXX_MPP_DOUT_CTRL_LOW;
1088 ret = pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1),
1089 &hsusb_phy_mpp);
Anji jonnalaae745e92011-11-14 18:34:31 +05301090 if (ret < 0)
1091 pr_err("%s:MPP2 un config failed\n", __func__);
1092 }
1093 return ret;
1094}
1095
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001096static int msm_hsusb_pmic_id_notif_init(void (*callback)(int online), int init)
1097{
1098 unsigned ret = -ENODEV;
1099
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301100 struct pm_gpio pmic_id_cfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301101 .direction = PM_GPIO_DIR_IN,
1102 .pull = PM_GPIO_PULL_UP_1P5,
1103 .function = PM_GPIO_FUNC_NORMAL,
1104 .vin_sel = 2,
1105 .inv_int_pol = 0,
1106 };
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301107 struct pm_gpio pmic_id_uncfg = {
Anji jonnalaae745e92011-11-14 18:34:31 +05301108 .direction = PM_GPIO_DIR_IN,
1109 .pull = PM_GPIO_PULL_NO,
1110 .function = PM_GPIO_FUNC_NORMAL,
1111 .vin_sel = 2,
1112 .inv_int_pol = 0,
1113 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001114 if (!callback)
1115 return -EINVAL;
1116
1117 if (machine_is_msm8x60_fluid())
1118 return -ENOTSUPP;
1119
1120 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 2) {
1121 pr_debug("%s: USB_ID pin is not routed to PMIC"
1122 "on V1 surf/ffa\n", __func__);
1123 return -ENOTSUPP;
1124 }
1125
Manu Gautam62158eb2011-11-24 16:20:46 +05301126 if ((machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa() ||
1127 machine_is_msm8x60_ffa()) && !pmic_id_notif_supported) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001128 pr_debug("%s: USB_ID is not routed to PMIC"
1129 "on V2 ffa\n", __func__);
1130 return -ENOTSUPP;
1131 }
1132
1133 usb_phy_susp_dig_vol = 500000;
1134
1135 if (init) {
1136 notify_vbus_state_func_ptr = callback;
Manu Gautame8420ef2011-11-11 15:37:21 +05301137 INIT_DELAYED_WORK(&pmic_id_det, pmic_id_detect);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301138 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1139 &pmic_id_cfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301140 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301141 pr_err("%s:return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301142 __func__, ret);
1143 return ret;
1144 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001145 ret = request_threaded_irq(PMICID_INT, NULL, pmic_id_on_irq,
1146 (IRQF_TRIGGER_RISING|IRQF_TRIGGER_FALLING),
1147 "msm_otg_id", NULL);
1148 if (ret) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001149 pr_err("%s:pmic_usb_id interrupt registration failed",
1150 __func__);
1151 return ret;
1152 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301153 msm_otg_pdata.pmic_id_irq = PMICID_INT;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001154 } else {
Anji jonnalaae745e92011-11-14 18:34:31 +05301155 usb_phy_susp_dig_vol = 750000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001156 free_irq(PMICID_INT, 0);
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301157 ret = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(PMIC_ID_GPIO),
1158 &pmic_id_uncfg);
Anji jonnalaae745e92011-11-14 18:34:31 +05301159 if (ret) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05301160 pr_err("%s: return val of pm8xxx_gpio_config: %d\n",
Anji jonnalaae745e92011-11-14 18:34:31 +05301161 __func__, ret);
1162 return ret;
1163 }
Anji jonnalaeb9e60d2011-10-05 12:19:46 +05301164 msm_otg_pdata.pmic_id_irq = 0;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001165 cancel_delayed_work_sync(&pmic_id_det);
1166 notify_vbus_state_func_ptr = NULL;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001167 }
1168 return 0;
1169}
1170#endif
1171
1172#define USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL 1000000
1173#define USB_PHY_MAX_VDD_DIG_VOL 1320000
1174static int msm_hsusb_init_vddcx(int init)
1175{
1176 int ret = 0;
1177
1178 if (init) {
1179 vdd_cx = regulator_get(NULL, "8058_s1");
1180 if (IS_ERR(vdd_cx)) {
1181 return PTR_ERR(vdd_cx);
1182 }
1183
1184 ret = regulator_set_voltage(vdd_cx,
1185 USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL,
1186 USB_PHY_MAX_VDD_DIG_VOL);
1187 if (ret) {
1188 pr_err("%s: unable to set the voltage for regulator"
1189 "vdd_cx\n", __func__);
1190 regulator_put(vdd_cx);
1191 return ret;
1192 }
1193
1194 ret = regulator_enable(vdd_cx);
1195 if (ret) {
1196 pr_err("%s: unable to enable regulator"
1197 "vdd_cx\n", __func__);
1198 regulator_put(vdd_cx);
1199 }
1200 } else {
1201 ret = regulator_disable(vdd_cx);
1202 if (ret) {
1203 pr_err("%s: Unable to disable the regulator:"
1204 "vdd_cx\n", __func__);
1205 return ret;
1206 }
1207
1208 regulator_put(vdd_cx);
1209 }
1210
1211 return ret;
1212}
1213
1214static int msm_hsusb_config_vddcx(int high)
1215{
1216 int max_vol = USB_PHY_MAX_VDD_DIG_VOL;
1217 int min_vol;
1218 int ret;
1219
1220 if (high)
1221 min_vol = USB_PHY_OPERATIONAL_MIN_VDD_DIG_VOL;
1222 else
1223 min_vol = usb_phy_susp_dig_vol;
1224
1225 ret = regulator_set_voltage(vdd_cx, min_vol, max_vol);
1226 if (ret) {
1227 pr_err("%s: unable to set the voltage for regulator"
1228 "vdd_cx\n", __func__);
1229 return ret;
1230 }
1231
1232 pr_debug("%s: min_vol:%d max_vol:%d\n", __func__, min_vol, max_vol);
1233
1234 return ret;
1235}
1236
1237#define USB_PHY_3P3_VOL_MIN 3050000 /* uV */
1238#define USB_PHY_3P3_VOL_MAX 3050000 /* uV */
1239#define USB_PHY_3P3_HPM_LOAD 50000 /* uA */
1240#define USB_PHY_3P3_LPM_LOAD 4000 /* uA */
1241
1242#define USB_PHY_1P8_VOL_MIN 1800000 /* uV */
1243#define USB_PHY_1P8_VOL_MAX 1800000 /* uV */
1244#define USB_PHY_1P8_HPM_LOAD 50000 /* uA */
1245#define USB_PHY_1P8_LPM_LOAD 4000 /* uA */
1246static int msm_hsusb_ldo_init(int init)
1247{
1248 int rc = 0;
1249
1250 if (init) {
1251 ldo6_3p3 = regulator_get(NULL, "8058_l6");
1252 if (IS_ERR(ldo6_3p3))
1253 return PTR_ERR(ldo6_3p3);
1254
1255 ldo7_1p8 = regulator_get(NULL, "8058_l7");
1256 if (IS_ERR(ldo7_1p8)) {
1257 rc = PTR_ERR(ldo7_1p8);
1258 goto put_3p3;
1259 }
1260
1261 rc = regulator_set_voltage(ldo6_3p3, USB_PHY_3P3_VOL_MIN,
1262 USB_PHY_3P3_VOL_MAX);
1263 if (rc) {
1264 pr_err("%s: Unable to set voltage level for"
1265 "ldo6_3p3 regulator\n", __func__);
1266 goto put_1p8;
1267 }
1268 rc = regulator_enable(ldo6_3p3);
1269 if (rc) {
1270 pr_err("%s: Unable to enable the regulator:"
1271 "ldo6_3p3\n", __func__);
1272 goto put_1p8;
1273 }
1274 rc = regulator_set_voltage(ldo7_1p8, USB_PHY_1P8_VOL_MIN,
1275 USB_PHY_1P8_VOL_MAX);
1276 if (rc) {
1277 pr_err("%s: Unable to set voltage level for"
1278 "ldo7_1p8 regulator\n", __func__);
1279 goto disable_3p3;
1280 }
1281 rc = regulator_enable(ldo7_1p8);
1282 if (rc) {
1283 pr_err("%s: Unable to enable the regulator:"
1284 "ldo7_1p8\n", __func__);
1285 goto disable_3p3;
1286 }
1287
1288 return 0;
1289 }
1290
1291 regulator_disable(ldo7_1p8);
1292disable_3p3:
1293 regulator_disable(ldo6_3p3);
1294put_1p8:
1295 regulator_put(ldo7_1p8);
1296put_3p3:
1297 regulator_put(ldo6_3p3);
1298 return rc;
1299}
1300
1301static int msm_hsusb_ldo_enable(int on)
1302{
1303 int ret = 0;
1304
1305 if (!ldo7_1p8 || IS_ERR(ldo7_1p8)) {
1306 pr_err("%s: ldo7_1p8 is not initialized\n", __func__);
1307 return -ENODEV;
1308 }
1309
1310 if (!ldo6_3p3 || IS_ERR(ldo6_3p3)) {
1311 pr_err("%s: ldo6_3p3 is not initialized\n", __func__);
1312 return -ENODEV;
1313 }
1314
1315 if (on) {
1316 ret = regulator_set_optimum_mode(ldo7_1p8,
1317 USB_PHY_1P8_HPM_LOAD);
1318 if (ret < 0) {
1319 pr_err("%s: Unable to set HPM of the regulator:"
1320 "ldo7_1p8\n", __func__);
1321 return ret;
1322 }
1323 ret = regulator_set_optimum_mode(ldo6_3p3,
1324 USB_PHY_3P3_HPM_LOAD);
1325 if (ret < 0) {
1326 pr_err("%s: Unable to set HPM of the regulator:"
1327 "ldo6_3p3\n", __func__);
1328 regulator_set_optimum_mode(ldo7_1p8,
1329 USB_PHY_1P8_LPM_LOAD);
1330 return ret;
1331 }
1332 } else {
1333 ret = regulator_set_optimum_mode(ldo7_1p8,
1334 USB_PHY_1P8_LPM_LOAD);
1335 if (ret < 0)
1336 pr_err("%s: Unable to set LPM of the regulator:"
1337 "ldo7_1p8\n", __func__);
1338 ret = regulator_set_optimum_mode(ldo6_3p3,
1339 USB_PHY_3P3_LPM_LOAD);
1340 if (ret < 0)
1341 pr_err("%s: Unable to set LPM of the regulator:"
1342 "ldo6_3p3\n", __func__);
1343 }
1344
1345 pr_debug("reg (%s)\n", on ? "HPM" : "LPM");
1346 return ret < 0 ? ret : 0;
1347 }
1348#endif
1349#ifdef CONFIG_USB_EHCI_MSM_72K
1350#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1351static void msm_hsusb_smb137b_vbus_power(unsigned phy_info, int on)
1352{
1353 static int vbus_is_on;
1354
1355 /* If VBUS is already on (or off), do nothing. */
1356 if (on == vbus_is_on)
1357 return;
1358 smb137b_otg_power(on);
1359 vbus_is_on = on;
1360}
1361#endif
1362static void msm_hsusb_vbus_power(unsigned phy_info, int on)
1363{
1364 static struct regulator *votg_5v_switch;
1365 static struct regulator *ext_5v_reg;
1366 static int vbus_is_on;
1367
1368 /* If VBUS is already on (or off), do nothing. */
1369 if (on == vbus_is_on)
1370 return;
1371
1372 if (!votg_5v_switch) {
1373 votg_5v_switch = regulator_get(NULL, "8901_usb_otg");
1374 if (IS_ERR(votg_5v_switch)) {
1375 pr_err("%s: unable to get votg_5v_switch\n", __func__);
1376 return;
1377 }
1378 }
1379 if (!ext_5v_reg) {
1380 ext_5v_reg = regulator_get(NULL, "8901_mpp0");
1381 if (IS_ERR(ext_5v_reg)) {
1382 pr_err("%s: unable to get ext_5v_reg\n", __func__);
1383 return;
1384 }
1385 }
1386 if (on) {
1387 if (regulator_enable(ext_5v_reg)) {
1388 pr_err("%s: Unable to enable the regulator:"
1389 " ext_5v_reg\n", __func__);
1390 return;
1391 }
1392 if (regulator_enable(votg_5v_switch)) {
1393 pr_err("%s: Unable to enable the regulator:"
1394 " votg_5v_switch\n", __func__);
1395 return;
1396 }
1397 } else {
1398 if (regulator_disable(votg_5v_switch))
1399 pr_err("%s: Unable to enable the regulator:"
1400 " votg_5v_switch\n", __func__);
1401 if (regulator_disable(ext_5v_reg))
1402 pr_err("%s: Unable to enable the regulator:"
1403 " ext_5v_reg\n", __func__);
1404 }
1405
1406 vbus_is_on = on;
1407}
1408
1409static struct msm_usb_host_platform_data msm_usb_host_pdata = {
1410 .phy_info = (USB_PHY_INTEGRATED | USB_PHY_MODEL_45NM),
1411 .power_budget = 390,
1412};
1413#endif
1414
1415#ifdef CONFIG_BATTERY_MSM8X60
1416static int msm_hsusb_pmic_vbus_notif_init(void (*callback)(int online),
1417 int init)
1418{
1419 int ret = -ENOTSUPP;
1420
1421#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
1422 if (machine_is_msm8x60_fluid()) {
1423 if (init)
1424 msm_charger_register_vbus_sn(callback);
1425 else
1426 msm_charger_unregister_vbus_sn(callback);
1427 return 0;
1428 }
1429#endif
1430 /* ID and VBUS lines are connected to pmic on 8660.V2.SURF,
1431 * hence, irrespective of either peripheral only mode or
1432 * OTG (host and peripheral) modes, can depend on pmic for
1433 * vbus notifications
Steve Muckle9161d302010-02-11 11:50:40 -08001434 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001435 if ((SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2)
1436 && (machine_is_msm8x60_surf() ||
1437 pmic_id_notif_supported)) {
1438 if (init)
1439 ret = msm_charger_register_vbus_sn(callback);
1440 else {
1441 msm_charger_unregister_vbus_sn(callback);
1442 ret = 0;
1443 }
1444 } else {
1445#if !defined(CONFIG_USB_EHCI_MSM_72K)
1446 if (init)
1447 ret = msm_charger_register_vbus_sn(callback);
1448 else {
1449 msm_charger_unregister_vbus_sn(callback);
1450 ret = 0;
1451 }
1452#endif
1453 }
1454 return ret;
1455}
1456#endif
1457
Lena Salman57d167e2012-03-21 19:46:38 +02001458#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_MSM_72K)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001459static struct msm_otg_platform_data msm_otg_pdata = {
1460 /* if usb link is in sps there is no need for
1461 * usb pclk as dayatona fabric clock will be
1462 * used instead
1463 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001464 .pemp_level = PRE_EMPHASIS_WITH_20_PERCENT,
1465 .cdr_autoreset = CDR_AUTO_RESET_DISABLE,
1466 .se1_gating = SE1_GATING_DISABLE,
Chandra Devireddyb3fc78c2011-08-30 17:25:55 +05301467 .bam_disable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001468#ifdef CONFIG_USB_EHCI_MSM_72K
1469 .pmic_id_notif_init = msm_hsusb_pmic_id_notif_init,
Anji jonnalaae745e92011-11-14 18:34:31 +05301470 .phy_id_setup_init = msm_hsusb_phy_id_setup_init,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001471#endif
1472#ifdef CONFIG_USB_EHCI_MSM_72K
1473 .vbus_power = msm_hsusb_vbus_power,
1474#endif
1475#ifdef CONFIG_BATTERY_MSM8X60
1476 .pmic_vbus_notif_init = msm_hsusb_pmic_vbus_notif_init,
1477#endif
1478 .ldo_init = msm_hsusb_ldo_init,
1479 .ldo_enable = msm_hsusb_ldo_enable,
1480 .config_vddcx = msm_hsusb_config_vddcx,
1481 .init_vddcx = msm_hsusb_init_vddcx,
1482#ifdef CONFIG_BATTERY_MSM8X60
1483 .chg_vbus_draw = msm_charger_vbus_draw,
1484#endif
1485};
1486#endif
1487
Lena Salman57d167e2012-03-21 19:46:38 +02001488#ifdef CONFIG_USB_MSM_72K
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001489static struct msm_hsusb_gadget_platform_data msm_gadget_pdata = {
1490 .is_phy_status_timer_on = 1,
1491};
1492#endif
1493
1494#ifdef CONFIG_USB_G_ANDROID
1495
1496#define PID_MAGIC_ID 0x71432909
1497#define SERIAL_NUM_MAGIC_ID 0x61945374
1498#define SERIAL_NUMBER_LENGTH 127
1499#define DLOAD_USB_BASE_ADD 0x2A05F0C8
1500
1501struct magic_num_struct {
1502 uint32_t pid;
1503 uint32_t serial_num;
1504};
1505
1506struct dload_struct {
1507 uint32_t reserved1;
1508 uint32_t reserved2;
1509 uint32_t reserved3;
1510 uint16_t reserved4;
1511 uint16_t pid;
1512 char serial_number[SERIAL_NUMBER_LENGTH];
1513 uint16_t reserved5;
1514 struct magic_num_struct
1515 magic_struct;
1516};
1517
1518static int usb_diag_update_pid_and_serial_num(uint32_t pid, const char *snum)
1519{
1520 struct dload_struct __iomem *dload = 0;
1521
1522 dload = ioremap(DLOAD_USB_BASE_ADD, sizeof(*dload));
1523 if (!dload) {
1524 pr_err("%s: cannot remap I/O memory region: %08x\n",
1525 __func__, DLOAD_USB_BASE_ADD);
1526 return -ENXIO;
1527 }
1528
1529 pr_debug("%s: dload:%p pid:%x serial_num:%s\n",
1530 __func__, dload, pid, snum);
1531 /* update pid */
1532 dload->magic_struct.pid = PID_MAGIC_ID;
1533 dload->pid = pid;
1534
1535 /* update serial number */
1536 dload->magic_struct.serial_num = 0;
1537 if (!snum)
1538 return 0;
1539
1540 dload->magic_struct.serial_num = SERIAL_NUM_MAGIC_ID;
1541 strncpy(dload->serial_number, snum, SERIAL_NUMBER_LENGTH);
1542 dload->serial_number[SERIAL_NUMBER_LENGTH - 1] = '\0';
1543
1544 iounmap(dload);
1545
1546 return 0;
1547}
1548
1549static struct android_usb_platform_data android_usb_pdata = {
1550 .update_pid_and_serial_num = usb_diag_update_pid_and_serial_num,
1551};
1552
1553static struct platform_device android_usb_device = {
1554 .name = "android_usb",
1555 .id = -1,
1556 .dev = {
1557 .platform_data = &android_usb_pdata,
1558 },
1559};
1560
1561
1562#endif
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08001563
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001564#ifdef CONFIG_MSM_VPE
1565static struct resource msm_vpe_resources[] = {
1566 {
1567 .start = 0x05300000,
1568 .end = 0x05300000 + SZ_1M - 1,
1569 .flags = IORESOURCE_MEM,
1570 },
1571 {
1572 .start = INT_VPE,
1573 .end = INT_VPE,
1574 .flags = IORESOURCE_IRQ,
1575 },
1576};
1577
1578static struct platform_device msm_vpe_device = {
1579 .name = "msm_vpe",
1580 .id = 0,
1581 .num_resources = ARRAY_SIZE(msm_vpe_resources),
1582 .resource = msm_vpe_resources,
1583};
1584#endif
1585
1586#ifdef CONFIG_MSM_CAMERA
1587#ifdef CONFIG_MSM_CAMERA_FLASH
1588#define VFE_CAMIF_TIMER1_GPIO 29
1589#define VFE_CAMIF_TIMER2_GPIO 30
1590#define VFE_CAMIF_TIMER3_GPIO_INT 31
1591#define FUSION_VFE_CAMIF_TIMER1_GPIO 42
1592static struct msm_camera_sensor_flash_src msm_flash_src = {
1593 .flash_sr_type = MSM_CAMERA_FLASH_SRC_PMIC,
1594 ._fsrc.pmic_src.num_of_src = 2,
1595 ._fsrc.pmic_src.low_current = 100,
1596 ._fsrc.pmic_src.high_current = 300,
1597 ._fsrc.pmic_src.led_src_1 = PMIC8058_ID_FLASH_LED_0,
1598 ._fsrc.pmic_src.led_src_2 = PMIC8058_ID_FLASH_LED_1,
1599 ._fsrc.pmic_src.pmic_set_current = pm8058_set_flash_led_current,
1600};
1601#ifdef CONFIG_IMX074
1602static struct msm_camera_sensor_strobe_flash_data strobe_flash_xenon = {
1603 .flash_trigger = VFE_CAMIF_TIMER2_GPIO,
1604 .flash_charge = VFE_CAMIF_TIMER1_GPIO,
1605 .flash_charge_done = VFE_CAMIF_TIMER3_GPIO_INT,
1606 .flash_recharge_duration = 50000,
1607 .irq = MSM_GPIO_TO_INT(VFE_CAMIF_TIMER3_GPIO_INT),
1608};
1609#endif
1610#endif
1611
1612int msm_cam_gpio_tbl[] = {
1613 32,/*CAMIF_MCLK*/
1614 47,/*CAMIF_I2C_DATA*/
1615 48,/*CAMIF_I2C_CLK*/
1616 105,/*STANDBY*/
1617};
1618
1619enum msm_cam_stat{
1620 MSM_CAM_OFF,
1621 MSM_CAM_ON,
1622};
1623
1624static int config_gpio_table(enum msm_cam_stat stat)
1625{
1626 int rc = 0, i = 0;
1627 if (stat == MSM_CAM_ON) {
1628 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++) {
1629 rc = gpio_request(msm_cam_gpio_tbl[i], "CAM_GPIO");
1630 if (unlikely(rc < 0)) {
1631 pr_err("%s not able to get gpio\n", __func__);
1632 for (i--; i >= 0; i--)
1633 gpio_free(msm_cam_gpio_tbl[i]);
1634 break;
1635 }
1636 }
1637 } else {
1638 for (i = 0; i < ARRAY_SIZE(msm_cam_gpio_tbl); i++)
1639 gpio_free(msm_cam_gpio_tbl[i]);
1640 }
1641 return rc;
1642}
1643
1644static struct msm_camera_sensor_platform_info sensor_board_info = {
1645 .mount_angle = 0
1646};
1647
1648/*external regulator VREG_5V*/
1649static struct regulator *reg_flash_5V;
1650
1651static int config_camera_on_gpios_fluid(void)
1652{
1653 int rc = 0;
1654
1655 reg_flash_5V = regulator_get(NULL, "8901_mpp0");
1656 if (IS_ERR(reg_flash_5V)) {
1657 pr_err("'%s' regulator not found, rc=%ld\n",
1658 "8901_mpp0", IS_ERR(reg_flash_5V));
1659 return -ENODEV;
1660 }
1661
1662 rc = regulator_enable(reg_flash_5V);
1663 if (rc) {
1664 pr_err("'%s' regulator enable failed, rc=%d\n",
1665 "8901_mpp0", rc);
1666 regulator_put(reg_flash_5V);
1667 return rc;
1668 }
1669
1670#ifdef CONFIG_IMX074
1671 sensor_board_info.mount_angle = 90;
1672#endif
1673 rc = config_gpio_table(MSM_CAM_ON);
1674 if (rc < 0) {
1675 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1676 "failed\n", __func__);
1677 return rc;
1678 }
1679
1680 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1681 if (rc < 0) {
1682 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1683 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1684 regulator_disable(reg_flash_5V);
1685 regulator_put(reg_flash_5V);
1686 return rc;
1687 }
1688 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1689 msleep(20);
1690 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
1691
1692
1693 /*Enable LED_FLASH_EN*/
1694 rc = gpio_request(GPIO_LED_FLASH_EN, "LED_FLASH_EN");
1695 if (rc < 0) {
1696 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1697 "failed\n", __func__, GPIO_LED_FLASH_EN);
1698
1699 regulator_disable(reg_flash_5V);
1700 regulator_put(reg_flash_5V);
1701 config_gpio_table(MSM_CAM_OFF);
1702 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1703 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1704 return rc;
1705 }
1706 gpio_direction_output(GPIO_LED_FLASH_EN, 1);
1707 msleep(20);
1708 return rc;
1709}
1710
1711
1712static void config_camera_off_gpios_fluid(void)
1713{
1714 regulator_disable(reg_flash_5V);
1715 regulator_put(reg_flash_5V);
1716
1717 gpio_direction_output(GPIO_LED_FLASH_EN, 0);
1718 gpio_free(GPIO_LED_FLASH_EN);
1719
1720 config_gpio_table(MSM_CAM_OFF);
1721
1722 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1723 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1724}
1725static int config_camera_on_gpios(void)
1726{
1727 int rc = 0;
1728
1729 if (machine_is_msm8x60_fluid())
1730 return config_camera_on_gpios_fluid();
1731
1732 rc = config_gpio_table(MSM_CAM_ON);
1733 if (rc < 0) {
1734 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1735 "failed\n", __func__);
1736 return rc;
1737 }
1738
Jilai Wang971f97f2011-07-13 14:25:25 -04001739 if (!machine_is_msm8x60_dragon()) {
1740 rc = gpio_request(GPIO_EXT_CAMIF_PWR_EN, "CAM_EN");
1741 if (rc < 0) {
1742 config_gpio_table(MSM_CAM_OFF);
1743 pr_err("%s: CAMSENSOR gpio %d request"
1744 "failed\n", __func__, GPIO_EXT_CAMIF_PWR_EN);
1745 return rc;
1746 }
1747 gpio_direction_output(GPIO_EXT_CAMIF_PWR_EN, 0);
1748 msleep(20);
1749 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 1);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001750 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001751
1752#ifdef CONFIG_MSM_CAMERA_FLASH
1753#ifdef CONFIG_IMX074
1754 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
1755 strobe_flash_xenon.flash_charge = FUSION_VFE_CAMIF_TIMER1_GPIO;
1756#endif
1757#endif
1758 return rc;
1759}
1760
1761static void config_camera_off_gpios(void)
1762{
1763 if (machine_is_msm8x60_fluid())
1764 return config_camera_off_gpios_fluid();
1765
1766
1767 config_gpio_table(MSM_CAM_OFF);
1768
Jilai Wang971f97f2011-07-13 14:25:25 -04001769 if (!machine_is_msm8x60_dragon()) {
1770 gpio_set_value_cansleep(GPIO_EXT_CAMIF_PWR_EN, 0);
1771 gpio_free(GPIO_EXT_CAMIF_PWR_EN);
1772 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001773}
1774
1775#ifdef CONFIG_QS_S5K4E1
1776
1777#define QS_CAM_HC37_CAM_PD PM8058_GPIO_PM_TO_SYS(26)
1778
1779static int config_camera_on_gpios_qs_cam_fluid(void)
1780{
1781 int rc = 0;
1782
1783 /* request QS_CAM_HC37_CAM_PD as an output to HC37 ASIC pin CAM_PD */
1784 rc = gpio_request(QS_CAM_HC37_CAM_PD, "QS_CAM_HC37_CAM_PD");
1785 if (rc < 0) {
1786 printk(KERN_ERR "%s: QS_CAM_HC37_CAM_PD gpio %d request"
1787 " failed\n", __func__, QS_CAM_HC37_CAM_PD);
1788 return rc;
1789 }
1790 gpio_direction_output(QS_CAM_HC37_CAM_PD, 0);
1791 msleep(20);
1792 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 1);
1793 msleep(20);
1794
1795 /*
1796 * Set GPIO_AUX_CAM_2P7_EN to 1 on North Expander IO2
1797 * to enable 2.7V power to Camera
1798 */
1799 rc = gpio_request(GPIO_AUX_CAM_2P7_EN, "CAM_2P7_EN");
1800 if (rc < 0) {
1801 printk(KERN_ERR "%s: CAMSENSOR gpio %d request"
1802 " failed\n", __func__, GPIO_AUX_CAM_2P7_EN);
1803 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1804 gpio_free(QS_CAM_HC37_CAM_PD);
1805 return rc;
1806 }
1807 gpio_direction_output(GPIO_AUX_CAM_2P7_EN, 0);
1808 msleep(20);
1809 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 1);
1810 msleep(20);
1811
1812 rc = config_camera_on_gpios_fluid();
1813 if (rc < 0) {
1814 printk(KERN_ERR "%s: config_camera_on_gpios_fluid"
1815 " failed\n", __func__);
1816 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1817 gpio_free(QS_CAM_HC37_CAM_PD);
1818 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1819 gpio_free(GPIO_AUX_CAM_2P7_EN);
1820 return rc;
1821 }
1822 return rc;
1823}
1824
1825static void config_camera_off_gpios_qs_cam_fluid(void)
1826{
1827 /*
1828 * Set GPIO_AUX_CAM_2P7_EN to 0 on North Expander IO2
1829 * to disable 2.7V power to Camera
1830 */
1831 gpio_set_value_cansleep(GPIO_AUX_CAM_2P7_EN, 0);
1832 gpio_free(GPIO_AUX_CAM_2P7_EN);
1833
1834 /* set QS_CAM_HC37_CAM_PD to 0 to power off HC37 ASIC*/
1835 gpio_set_value_cansleep(QS_CAM_HC37_CAM_PD, 0);
1836 gpio_free(QS_CAM_HC37_CAM_PD);
1837
1838 config_camera_off_gpios_fluid();
1839 return;
1840}
1841
1842static int config_camera_on_gpios_qs_cam(void)
1843{
1844 int rc = 0;
1845
1846 if (machine_is_msm8x60_fluid())
1847 return config_camera_on_gpios_qs_cam_fluid();
1848
1849 rc = config_camera_on_gpios();
1850 return rc;
1851}
1852
1853static void config_camera_off_gpios_qs_cam(void)
1854{
1855 if (machine_is_msm8x60_fluid())
1856 return config_camera_off_gpios_qs_cam_fluid();
1857
1858 config_camera_off_gpios();
1859 return;
1860}
1861#endif
1862
1863static int config_camera_on_gpios_web_cam(void)
1864{
1865 int rc = 0;
1866 rc = config_gpio_table(MSM_CAM_ON);
1867 if (rc < 0) {
1868 printk(KERN_ERR "%s: CAMSENSOR gpio table request"
1869 "failed\n", __func__);
1870 return rc;
1871 }
1872
Jilai Wang53d27a82011-07-13 14:32:58 -04001873 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001874 rc = gpio_request(GPIO_WEB_CAMIF_STANDBY, "CAM_EN");
1875 if (rc < 0) {
1876 config_gpio_table(MSM_CAM_OFF);
1877 pr_err(KERN_ERR "%s: CAMSENSOR gpio %d request"
1878 "failed\n", __func__, GPIO_WEB_CAMIF_STANDBY);
1879 return rc;
1880 }
1881 gpio_direction_output(GPIO_WEB_CAMIF_STANDBY, 0);
1882 }
1883 return rc;
1884}
1885
1886static void config_camera_off_gpios_web_cam(void)
1887{
1888 config_gpio_table(MSM_CAM_OFF);
Jilai Wang53d27a82011-07-13 14:32:58 -04001889 if (!(machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon())) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001890 gpio_set_value_cansleep(GPIO_WEB_CAMIF_STANDBY, 1);
1891 gpio_free(GPIO_WEB_CAMIF_STANDBY);
1892 }
1893 return;
1894}
1895
1896#ifdef CONFIG_MSM_BUS_SCALING
1897static struct msm_bus_vectors cam_init_vectors[] = {
1898 {
1899 .src = MSM_BUS_MASTER_VFE,
1900 .dst = MSM_BUS_SLAVE_SMI,
1901 .ab = 0,
1902 .ib = 0,
1903 },
1904 {
1905 .src = MSM_BUS_MASTER_VFE,
1906 .dst = MSM_BUS_SLAVE_EBI_CH0,
1907 .ab = 0,
1908 .ib = 0,
1909 },
1910 {
1911 .src = MSM_BUS_MASTER_VPE,
1912 .dst = MSM_BUS_SLAVE_SMI,
1913 .ab = 0,
1914 .ib = 0,
1915 },
1916 {
1917 .src = MSM_BUS_MASTER_VPE,
1918 .dst = MSM_BUS_SLAVE_EBI_CH0,
1919 .ab = 0,
1920 .ib = 0,
1921 },
1922 {
1923 .src = MSM_BUS_MASTER_JPEG_ENC,
1924 .dst = MSM_BUS_SLAVE_SMI,
1925 .ab = 0,
1926 .ib = 0,
1927 },
1928 {
1929 .src = MSM_BUS_MASTER_JPEG_ENC,
1930 .dst = MSM_BUS_SLAVE_EBI_CH0,
1931 .ab = 0,
1932 .ib = 0,
1933 },
1934};
1935
1936static struct msm_bus_vectors cam_preview_vectors[] = {
1937 {
1938 .src = MSM_BUS_MASTER_VFE,
1939 .dst = MSM_BUS_SLAVE_SMI,
1940 .ab = 0,
1941 .ib = 0,
1942 },
1943 {
1944 .src = MSM_BUS_MASTER_VFE,
1945 .dst = MSM_BUS_SLAVE_EBI_CH0,
1946 .ab = 283115520,
1947 .ib = 452984832,
1948 },
1949 {
1950 .src = MSM_BUS_MASTER_VPE,
1951 .dst = MSM_BUS_SLAVE_SMI,
1952 .ab = 0,
1953 .ib = 0,
1954 },
1955 {
1956 .src = MSM_BUS_MASTER_VPE,
1957 .dst = MSM_BUS_SLAVE_EBI_CH0,
1958 .ab = 0,
1959 .ib = 0,
1960 },
1961 {
1962 .src = MSM_BUS_MASTER_JPEG_ENC,
1963 .dst = MSM_BUS_SLAVE_SMI,
1964 .ab = 0,
1965 .ib = 0,
1966 },
1967 {
1968 .src = MSM_BUS_MASTER_JPEG_ENC,
1969 .dst = MSM_BUS_SLAVE_EBI_CH0,
1970 .ab = 0,
1971 .ib = 0,
1972 },
1973};
1974
1975static struct msm_bus_vectors cam_video_vectors[] = {
1976 {
1977 .src = MSM_BUS_MASTER_VFE,
1978 .dst = MSM_BUS_SLAVE_SMI,
1979 .ab = 283115520,
1980 .ib = 452984832,
1981 },
1982 {
1983 .src = MSM_BUS_MASTER_VFE,
1984 .dst = MSM_BUS_SLAVE_EBI_CH0,
1985 .ab = 283115520,
1986 .ib = 452984832,
1987 },
1988 {
1989 .src = MSM_BUS_MASTER_VPE,
1990 .dst = MSM_BUS_SLAVE_SMI,
1991 .ab = 319610880,
1992 .ib = 511377408,
1993 },
1994 {
1995 .src = MSM_BUS_MASTER_VPE,
1996 .dst = MSM_BUS_SLAVE_EBI_CH0,
1997 .ab = 0,
1998 .ib = 0,
1999 },
2000 {
2001 .src = MSM_BUS_MASTER_JPEG_ENC,
2002 .dst = MSM_BUS_SLAVE_SMI,
2003 .ab = 0,
2004 .ib = 0,
2005 },
2006 {
2007 .src = MSM_BUS_MASTER_JPEG_ENC,
2008 .dst = MSM_BUS_SLAVE_EBI_CH0,
2009 .ab = 0,
2010 .ib = 0,
2011 },
2012};
2013
2014static struct msm_bus_vectors cam_snapshot_vectors[] = {
2015 {
2016 .src = MSM_BUS_MASTER_VFE,
2017 .dst = MSM_BUS_SLAVE_SMI,
2018 .ab = 566231040,
2019 .ib = 905969664,
2020 },
2021 {
2022 .src = MSM_BUS_MASTER_VFE,
2023 .dst = MSM_BUS_SLAVE_EBI_CH0,
2024 .ab = 69984000,
2025 .ib = 111974400,
2026 },
2027 {
2028 .src = MSM_BUS_MASTER_VPE,
2029 .dst = MSM_BUS_SLAVE_SMI,
2030 .ab = 0,
2031 .ib = 0,
2032 },
2033 {
2034 .src = MSM_BUS_MASTER_VPE,
2035 .dst = MSM_BUS_SLAVE_EBI_CH0,
2036 .ab = 0,
2037 .ib = 0,
2038 },
2039 {
2040 .src = MSM_BUS_MASTER_JPEG_ENC,
2041 .dst = MSM_BUS_SLAVE_SMI,
2042 .ab = 320864256,
2043 .ib = 513382810,
2044 },
2045 {
2046 .src = MSM_BUS_MASTER_JPEG_ENC,
2047 .dst = MSM_BUS_SLAVE_EBI_CH0,
2048 .ab = 320864256,
2049 .ib = 513382810,
2050 },
2051};
2052
2053static struct msm_bus_vectors cam_zsl_vectors[] = {
2054 {
2055 .src = MSM_BUS_MASTER_VFE,
2056 .dst = MSM_BUS_SLAVE_SMI,
2057 .ab = 566231040,
2058 .ib = 905969664,
2059 },
2060 {
2061 .src = MSM_BUS_MASTER_VFE,
2062 .dst = MSM_BUS_SLAVE_EBI_CH0,
2063 .ab = 706199040,
2064 .ib = 1129918464,
2065 },
2066 {
2067 .src = MSM_BUS_MASTER_VPE,
2068 .dst = MSM_BUS_SLAVE_SMI,
2069 .ab = 0,
2070 .ib = 0,
2071 },
2072 {
2073 .src = MSM_BUS_MASTER_VPE,
2074 .dst = MSM_BUS_SLAVE_EBI_CH0,
2075 .ab = 0,
2076 .ib = 0,
2077 },
2078 {
2079 .src = MSM_BUS_MASTER_JPEG_ENC,
2080 .dst = MSM_BUS_SLAVE_SMI,
2081 .ab = 320864256,
2082 .ib = 513382810,
2083 },
2084 {
2085 .src = MSM_BUS_MASTER_JPEG_ENC,
2086 .dst = MSM_BUS_SLAVE_EBI_CH0,
2087 .ab = 320864256,
2088 .ib = 513382810,
2089 },
2090};
2091
2092static struct msm_bus_vectors cam_stereo_video_vectors[] = {
2093 {
2094 .src = MSM_BUS_MASTER_VFE,
2095 .dst = MSM_BUS_SLAVE_SMI,
2096 .ab = 212336640,
2097 .ib = 339738624,
2098 },
2099 {
2100 .src = MSM_BUS_MASTER_VFE,
2101 .dst = MSM_BUS_SLAVE_EBI_CH0,
2102 .ab = 25090560,
2103 .ib = 40144896,
2104 },
2105 {
2106 .src = MSM_BUS_MASTER_VPE,
2107 .dst = MSM_BUS_SLAVE_SMI,
2108 .ab = 239708160,
2109 .ib = 383533056,
2110 },
2111 {
2112 .src = MSM_BUS_MASTER_VPE,
2113 .dst = MSM_BUS_SLAVE_EBI_CH0,
2114 .ab = 79902720,
2115 .ib = 127844352,
2116 },
2117 {
2118 .src = MSM_BUS_MASTER_JPEG_ENC,
2119 .dst = MSM_BUS_SLAVE_SMI,
2120 .ab = 0,
2121 .ib = 0,
2122 },
2123 {
2124 .src = MSM_BUS_MASTER_JPEG_ENC,
2125 .dst = MSM_BUS_SLAVE_EBI_CH0,
2126 .ab = 0,
2127 .ib = 0,
2128 },
2129};
2130
2131static struct msm_bus_vectors cam_stereo_snapshot_vectors[] = {
2132 {
2133 .src = MSM_BUS_MASTER_VFE,
2134 .dst = MSM_BUS_SLAVE_SMI,
2135 .ab = 0,
2136 .ib = 0,
2137 },
2138 {
2139 .src = MSM_BUS_MASTER_VFE,
2140 .dst = MSM_BUS_SLAVE_EBI_CH0,
2141 .ab = 300902400,
2142 .ib = 481443840,
2143 },
2144 {
2145 .src = MSM_BUS_MASTER_VPE,
2146 .dst = MSM_BUS_SLAVE_SMI,
2147 .ab = 230307840,
2148 .ib = 368492544,
2149 },
2150 {
2151 .src = MSM_BUS_MASTER_VPE,
2152 .dst = MSM_BUS_SLAVE_EBI_CH0,
2153 .ab = 245113344,
2154 .ib = 392181351,
2155 },
2156 {
2157 .src = MSM_BUS_MASTER_JPEG_ENC,
2158 .dst = MSM_BUS_SLAVE_SMI,
2159 .ab = 106536960,
2160 .ib = 170459136,
2161 },
2162 {
2163 .src = MSM_BUS_MASTER_JPEG_ENC,
2164 .dst = MSM_BUS_SLAVE_EBI_CH0,
2165 .ab = 106536960,
2166 .ib = 170459136,
2167 },
2168};
2169
2170static struct msm_bus_paths cam_bus_client_config[] = {
2171 {
2172 ARRAY_SIZE(cam_init_vectors),
2173 cam_init_vectors,
2174 },
2175 {
2176 ARRAY_SIZE(cam_preview_vectors),
2177 cam_preview_vectors,
2178 },
2179 {
2180 ARRAY_SIZE(cam_video_vectors),
2181 cam_video_vectors,
2182 },
2183 {
2184 ARRAY_SIZE(cam_snapshot_vectors),
2185 cam_snapshot_vectors,
2186 },
2187 {
2188 ARRAY_SIZE(cam_zsl_vectors),
2189 cam_zsl_vectors,
2190 },
2191 {
2192 ARRAY_SIZE(cam_stereo_video_vectors),
2193 cam_stereo_video_vectors,
2194 },
2195 {
2196 ARRAY_SIZE(cam_stereo_snapshot_vectors),
2197 cam_stereo_snapshot_vectors,
2198 },
2199};
2200
2201static struct msm_bus_scale_pdata cam_bus_client_pdata = {
2202 cam_bus_client_config,
2203 ARRAY_SIZE(cam_bus_client_config),
2204 .name = "msm_camera",
2205};
2206#endif
2207
2208struct msm_camera_device_platform_data msm_camera_device_data = {
2209 .camera_gpio_on = config_camera_on_gpios,
2210 .camera_gpio_off = config_camera_off_gpios,
2211 .ioext.csiphy = 0x04800000,
2212 .ioext.csisz = 0x00000400,
2213 .ioext.csiirq = CSI_0_IRQ,
2214 .ioclk.mclk_clk_rate = 24000000,
2215 .ioclk.vfe_clk_rate = 228570000,
2216#ifdef CONFIG_MSM_BUS_SCALING
2217 .cam_bus_scale_table = &cam_bus_client_pdata,
2218#endif
2219};
2220
2221#ifdef CONFIG_QS_S5K4E1
2222struct msm_camera_device_platform_data msm_camera_device_data_qs_cam = {
2223 .camera_gpio_on = config_camera_on_gpios_qs_cam,
2224 .camera_gpio_off = config_camera_off_gpios_qs_cam,
2225 .ioext.csiphy = 0x04800000,
2226 .ioext.csisz = 0x00000400,
2227 .ioext.csiirq = CSI_0_IRQ,
2228 .ioclk.mclk_clk_rate = 24000000,
2229 .ioclk.vfe_clk_rate = 228570000,
2230#ifdef CONFIG_MSM_BUS_SCALING
2231 .cam_bus_scale_table = &cam_bus_client_pdata,
2232#endif
2233};
2234#endif
2235
2236struct msm_camera_device_platform_data msm_camera_device_data_web_cam = {
2237 .camera_gpio_on = config_camera_on_gpios_web_cam,
2238 .camera_gpio_off = config_camera_off_gpios_web_cam,
2239 .ioext.csiphy = 0x04900000,
2240 .ioext.csisz = 0x00000400,
2241 .ioext.csiirq = CSI_1_IRQ,
2242 .ioclk.mclk_clk_rate = 24000000,
2243 .ioclk.vfe_clk_rate = 228570000,
2244#ifdef CONFIG_MSM_BUS_SCALING
2245 .cam_bus_scale_table = &cam_bus_client_pdata,
2246#endif
2247};
2248
2249struct resource msm_camera_resources[] = {
2250 {
2251 .start = 0x04500000,
2252 .end = 0x04500000 + SZ_1M - 1,
2253 .flags = IORESOURCE_MEM,
2254 },
2255 {
2256 .start = VFE_IRQ,
2257 .end = VFE_IRQ,
2258 .flags = IORESOURCE_IRQ,
2259 },
2260};
2261#ifdef CONFIG_MT9E013
2262static struct msm_camera_sensor_platform_info mt9e013_sensor_8660_info = {
2263 .mount_angle = 0
2264};
2265
2266static struct msm_camera_sensor_flash_data flash_mt9e013 = {
2267 .flash_type = MSM_CAMERA_FLASH_LED,
2268 .flash_src = &msm_flash_src
2269};
2270
2271static struct msm_camera_sensor_info msm_camera_sensor_mt9e013_data = {
2272 .sensor_name = "mt9e013",
2273 .sensor_reset = 106,
2274 .sensor_pwd = 85,
2275 .vcm_pwd = 1,
2276 .vcm_enable = 0,
2277 .pdata = &msm_camera_device_data,
2278 .resource = msm_camera_resources,
2279 .num_resources = ARRAY_SIZE(msm_camera_resources),
2280 .flash_data = &flash_mt9e013,
2281 .strobe_flash_data = &strobe_flash_xenon,
2282 .sensor_platform_info = &mt9e013_sensor_8660_info,
2283 .csi_if = 1
2284};
2285struct platform_device msm_camera_sensor_mt9e013 = {
2286 .name = "msm_camera_mt9e013",
2287 .dev = {
2288 .platform_data = &msm_camera_sensor_mt9e013_data,
2289 },
2290};
2291#endif
2292
2293#ifdef CONFIG_IMX074
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302294static struct msm_camera_sensor_platform_info imx074_sensor_board_info = {
2295 .mount_angle = 180
2296};
2297
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002298static struct msm_camera_sensor_flash_data flash_imx074 = {
2299 .flash_type = MSM_CAMERA_FLASH_LED,
2300 .flash_src = &msm_flash_src
2301};
2302
2303static struct msm_camera_sensor_info msm_camera_sensor_imx074_data = {
2304 .sensor_name = "imx074",
2305 .sensor_reset = 106,
2306 .sensor_pwd = 85,
2307 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2308 .vcm_enable = 1,
2309 .pdata = &msm_camera_device_data,
2310 .resource = msm_camera_resources,
2311 .num_resources = ARRAY_SIZE(msm_camera_resources),
2312 .flash_data = &flash_imx074,
2313 .strobe_flash_data = &strobe_flash_xenon,
Roja Rani Yarubandi68ebb4d2011-10-20 10:33:16 +05302314 .sensor_platform_info = &imx074_sensor_board_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002315 .csi_if = 1
2316};
2317struct platform_device msm_camera_sensor_imx074 = {
2318 .name = "msm_camera_imx074",
2319 .dev = {
2320 .platform_data = &msm_camera_sensor_imx074_data,
2321 },
2322};
2323#endif
2324#ifdef CONFIG_WEBCAM_OV9726
2325
2326static struct msm_camera_sensor_platform_info ov9726_sensor_8660_info = {
2327 .mount_angle = 0
2328};
2329
2330static struct msm_camera_sensor_flash_data flash_ov9726 = {
2331 .flash_type = MSM_CAMERA_FLASH_LED,
2332 .flash_src = &msm_flash_src
2333};
2334static struct msm_camera_sensor_info msm_camera_sensor_ov9726_data = {
2335 .sensor_name = "ov9726",
Kevin Chan3382c512011-07-19 21:00:45 -07002336 .sensor_reset_enable = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002337 .sensor_reset = GPIO_FRONT_CAM_RESET_N,
2338 .sensor_pwd = 85,
2339 .vcm_pwd = 1,
2340 .vcm_enable = 0,
2341 .pdata = &msm_camera_device_data_web_cam,
2342 .resource = msm_camera_resources,
2343 .num_resources = ARRAY_SIZE(msm_camera_resources),
2344 .flash_data = &flash_ov9726,
2345 .sensor_platform_info = &ov9726_sensor_8660_info,
2346 .csi_if = 1
2347};
2348struct platform_device msm_camera_sensor_webcam_ov9726 = {
2349 .name = "msm_camera_ov9726",
2350 .dev = {
2351 .platform_data = &msm_camera_sensor_ov9726_data,
2352 },
2353};
2354#endif
2355#ifdef CONFIG_WEBCAM_OV7692
2356static struct msm_camera_sensor_flash_data flash_ov7692 = {
2357 .flash_type = MSM_CAMERA_FLASH_LED,
2358 .flash_src = &msm_flash_src
2359};
2360static struct msm_camera_sensor_info msm_camera_sensor_ov7692_data = {
2361 .sensor_name = "ov7692",
2362 .sensor_reset = GPIO_WEB_CAMIF_RESET_N,
2363 .sensor_pwd = 85,
2364 .vcm_pwd = 1,
2365 .vcm_enable = 0,
2366 .pdata = &msm_camera_device_data_web_cam,
2367 .resource = msm_camera_resources,
2368 .num_resources = ARRAY_SIZE(msm_camera_resources),
2369 .flash_data = &flash_ov7692,
2370 .csi_if = 1
2371};
2372
2373static struct platform_device msm_camera_sensor_webcam_ov7692 = {
2374 .name = "msm_camera_ov7692",
2375 .dev = {
2376 .platform_data = &msm_camera_sensor_ov7692_data,
2377 },
2378};
2379#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002380#ifdef CONFIG_VX6953
2381static struct msm_camera_sensor_platform_info vx6953_sensor_8660_info = {
2382 .mount_angle = 270
2383};
2384
2385static struct msm_camera_sensor_flash_data flash_vx6953 = {
2386 .flash_type = MSM_CAMERA_FLASH_NONE,
2387 .flash_src = &msm_flash_src
2388};
2389
2390static struct msm_camera_sensor_info msm_camera_sensor_vx6953_data = {
2391 .sensor_name = "vx6953",
2392 .sensor_reset = 63,
2393 .sensor_pwd = 63,
2394 .vcm_pwd = GPIO_AUX_CAM_2P7_EN,
2395 .vcm_enable = 1,
2396 .pdata = &msm_camera_device_data,
2397 .resource = msm_camera_resources,
2398 .num_resources = ARRAY_SIZE(msm_camera_resources),
2399 .flash_data = &flash_vx6953,
2400 .sensor_platform_info = &vx6953_sensor_8660_info,
2401 .csi_if = 1
2402};
2403struct platform_device msm_camera_sensor_vx6953 = {
2404 .name = "msm_camera_vx6953",
2405 .dev = {
2406 .platform_data = &msm_camera_sensor_vx6953_data,
2407 },
2408};
2409#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002410#ifdef CONFIG_QS_S5K4E1
2411
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302412static struct msm_camera_sensor_platform_info qs_s5k4e1_sensor_8660_info = {
2413#ifdef CONFIG_FB_MSM_MIPI_NOVATEK_CMD_QHD_PT
2414 .mount_angle = 90
2415#else
2416 .mount_angle = 0
2417#endif
2418};
2419
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002420static char eeprom_data[864];
2421static struct msm_camera_sensor_flash_data flash_qs_s5k4e1 = {
2422 .flash_type = MSM_CAMERA_FLASH_LED,
2423 .flash_src = &msm_flash_src
2424};
2425
2426static struct msm_camera_sensor_info msm_camera_sensor_qs_s5k4e1_data = {
2427 .sensor_name = "qs_s5k4e1",
2428 .sensor_reset = 106,
2429 .sensor_pwd = 85,
2430 .vcm_pwd = 1,
2431 .vcm_enable = 0,
2432 .pdata = &msm_camera_device_data_qs_cam,
2433 .resource = msm_camera_resources,
2434 .num_resources = ARRAY_SIZE(msm_camera_resources),
2435 .flash_data = &flash_qs_s5k4e1,
2436 .strobe_flash_data = &strobe_flash_xenon,
Nishant Pandit613ab7a2011-09-02 03:36:01 +05302437 .sensor_platform_info = &qs_s5k4e1_sensor_8660_info,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002438 .csi_if = 1,
2439 .eeprom_data = eeprom_data,
2440};
2441struct platform_device msm_camera_sensor_qs_s5k4e1 = {
2442 .name = "msm_camera_qs_s5k4e1",
2443 .dev = {
2444 .platform_data = &msm_camera_sensor_qs_s5k4e1_data,
2445 },
2446};
2447#endif
2448static struct i2c_board_info msm_camera_boardinfo[] __initdata = {
2449 #ifdef CONFIG_MT9E013
2450 {
2451 I2C_BOARD_INFO("mt9e013", 0x6C >> 2),
2452 },
2453 #endif
2454 #ifdef CONFIG_IMX074
2455 {
2456 I2C_BOARD_INFO("imx074", 0x1A),
2457 },
2458 #endif
2459 #ifdef CONFIG_WEBCAM_OV7692
2460 {
2461 I2C_BOARD_INFO("ov7692", 0x78),
2462 },
2463 #endif
2464 #ifdef CONFIG_WEBCAM_OV9726
2465 {
2466 I2C_BOARD_INFO("ov9726", 0x10),
2467 },
2468 #endif
2469 #ifdef CONFIG_QS_S5K4E1
2470 {
2471 I2C_BOARD_INFO("qs_s5k4e1", 0x20),
2472 },
2473 #endif
2474};
Jilai Wang971f97f2011-07-13 14:25:25 -04002475
2476static struct i2c_board_info msm_camera_dragon_boardinfo[] __initdata = {
Jilai Wang53d27a82011-07-13 14:32:58 -04002477 #ifdef CONFIG_WEBCAM_OV9726
2478 {
2479 I2C_BOARD_INFO("ov9726", 0x10),
2480 },
2481 #endif
Jilai Wang971f97f2011-07-13 14:25:25 -04002482 #ifdef CONFIG_VX6953
2483 {
2484 I2C_BOARD_INFO("vx6953", 0x20),
2485 },
2486 #endif
2487};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002488#endif
2489
2490#ifdef CONFIG_MSM_GEMINI
2491static struct resource msm_gemini_resources[] = {
2492 {
2493 .start = 0x04600000,
2494 .end = 0x04600000 + SZ_1M - 1,
2495 .flags = IORESOURCE_MEM,
2496 },
2497 {
2498 .start = INT_JPEG,
2499 .end = INT_JPEG,
2500 .flags = IORESOURCE_IRQ,
2501 },
2502};
2503
2504static struct platform_device msm_gemini_device = {
2505 .name = "msm_gemini",
2506 .resource = msm_gemini_resources,
2507 .num_resources = ARRAY_SIZE(msm_gemini_resources),
2508};
2509#endif
2510
2511#ifdef CONFIG_I2C_QUP
2512static void gsbi_qup_i2c_gpio_config(int adap_id, int config_type)
2513{
2514}
2515
2516static struct msm_i2c_platform_data msm_gsbi3_qup_i2c_pdata = {
2517 .clk_freq = 384000,
2518 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002519 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2520};
2521
2522static struct msm_i2c_platform_data msm_gsbi4_qup_i2c_pdata = {
2523 .clk_freq = 100000,
2524 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002525 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2526};
2527
2528static struct msm_i2c_platform_data msm_gsbi7_qup_i2c_pdata = {
2529 .clk_freq = 100000,
2530 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002531 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2532};
2533
2534static struct msm_i2c_platform_data msm_gsbi8_qup_i2c_pdata = {
2535 .clk_freq = 100000,
2536 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002537 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2538};
2539
2540static struct msm_i2c_platform_data msm_gsbi9_qup_i2c_pdata = {
2541 .clk_freq = 100000,
2542 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002543 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2544};
2545
2546static struct msm_i2c_platform_data msm_gsbi12_qup_i2c_pdata = {
2547 .clk_freq = 100000,
2548 .src_clk_rate = 24000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002549 .use_gsbi_shared_mode = 1,
2550 .msm_i2c_config_gpio = gsbi_qup_i2c_gpio_config,
2551};
2552#endif
2553
2554#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
2555static struct msm_spi_platform_data msm_gsbi1_qup_spi_pdata = {
2556 .max_clock_speed = 24000000,
2557};
2558
2559static struct msm_spi_platform_data msm_gsbi10_qup_spi_pdata = {
2560 .max_clock_speed = 24000000,
2561};
2562#endif
2563
2564#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002565/* CODEC/TSSC SSBI */
2566static struct msm_i2c_ssbi_platform_data msm_ssbi3_pdata = {
2567 .controller_type = MSM_SBI_CTRL_SSBI,
2568};
2569#endif
2570
2571#ifdef CONFIG_BATTERY_MSM
2572/* Use basic value for fake MSM battery */
2573static struct msm_psy_batt_pdata msm_psy_batt_data = {
2574 .avail_chg_sources = AC_CHG,
2575};
2576
2577static struct platform_device msm_batt_device = {
2578 .name = "msm-battery",
2579 .id = -1,
2580 .dev.platform_data = &msm_psy_batt_data,
2581};
2582#endif
2583
2584#ifdef CONFIG_FB_MSM_LCDC_DSUB
2585/* VGA = 1440 x 900 x 4(bpp) x 2(pages)
2586 prim = 1024 x 600 x 4(bpp) x 2(pages)
2587 This is the difference. */
2588#define MSM_FB_DSUB_PMEM_ADDER (0xA32000-0x4B0000)
2589#else
2590#define MSM_FB_DSUB_PMEM_ADDER (0)
2591#endif
2592
2593/* Sensors DSPS platform data */
2594#ifdef CONFIG_MSM_DSPS
2595
2596static struct dsps_gpio_info dsps_surf_gpios[] = {
2597 {
2598 .name = "compass_rst_n",
2599 .num = GPIO_COMPASS_RST_N,
2600 .on_val = 1, /* device not in reset */
2601 .off_val = 0, /* device in reset */
2602 },
2603 {
2604 .name = "gpio_r_altimeter_reset_n",
2605 .num = GPIO_R_ALTIMETER_RESET_N,
2606 .on_val = 1, /* device not in reset */
2607 .off_val = 0, /* device in reset */
2608 }
2609};
2610
2611static struct dsps_gpio_info dsps_fluid_gpios[] = {
2612 {
2613 .name = "gpio_n_altimeter_reset_n",
2614 .num = GPIO_N_ALTIMETER_RESET_N,
2615 .on_val = 1, /* device not in reset */
2616 .off_val = 0, /* device in reset */
2617 }
2618};
2619
2620static void __init msm8x60_init_dsps(void)
2621{
2622 struct msm_dsps_platform_data *pdata =
2623 msm_dsps_device.dev.platform_data;
2624 /*
2625 * On Fluid the Compass sensor Chip-Select (CS) is directly connected
2626 * to the power supply and not controled via GPIOs. Fluid uses a
2627 * different IO-Expender (north) than used on surf/ffa.
2628 */
2629 if (machine_is_msm8x60_fluid()) {
2630 /* fluid has different firmware, gpios */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002631 pdata->pil_name = DSPS_PIL_FLUID_NAME;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07002632 msm_pil_dsps.dev.platform_data = DSPS_PIL_FLUID_NAME;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002633 pdata->gpios = dsps_fluid_gpios;
2634 pdata->gpios_num = ARRAY_SIZE(dsps_fluid_gpios);
2635 } else {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002636 pdata->pil_name = DSPS_PIL_GENERIC_NAME;
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07002637 msm_pil_dsps.dev.platform_data = DSPS_PIL_GENERIC_NAME;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002638 pdata->gpios = dsps_surf_gpios;
2639 pdata->gpios_num = ARRAY_SIZE(dsps_surf_gpios);
2640 }
2641
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002642 platform_device_register(&msm_dsps_device);
2643}
2644#endif /* CONFIG_MSM_DSPS */
2645
2646#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302647#define MSM_FB_PRIM_BUF_SIZE \
2648 (roundup((1024 * 600 * 4), 4096) * 3) /* 4 bpp x 3 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002649#else
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302650#define MSM_FB_PRIM_BUF_SIZE \
2651 (roundup((1024 * 600 * 4), 4096) * 2) /* 4 bpp x 2 pages */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002652#endif
2653
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002654#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302655#define MSM_FB_EXT_BUF_SIZE \
2656 (roundup((1920 * 1080 * 2), 4096) * 1) /* 2 bpp x 1 page */
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002657#elif defined(CONFIG_FB_MSM_TVOUT)
Padmanabhan Komanduruede0a632012-01-25 12:01:28 +05302658#define MSM_FB_EXT_BUF_SIZE \
2659 (roundup((720 * 576 * 2), 4096) * 2) /* 2 bpp x 2 pages */
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002660#else
2661#define MSM_FB_EXT_BUFT_SIZE 0
2662#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002663
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002664/* Note: must be multiple of 4096 */
2665#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE + \
kuogee hsiehc9a2e6d2011-09-12 15:27:01 -07002666 MSM_FB_DSUB_PMEM_ADDER, 4096)
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002667
2668#define MSM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
2669#define MSM_HDMI_PRIM_PMEM_SF_SIZE 0x4000000 /* 64 Mbytes */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002670
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002671#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002672unsigned char hdmi_is_primary = 1;
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002673#else
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002674unsigned char hdmi_is_primary;
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07002675#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002676
Huaibin Yanga5419422011-12-08 23:52:10 -08002677#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
2678#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
2679#else
2680#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
2681#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
2682
2683#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
2684#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
2685#else
2686#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
2687#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
2688
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002689#define MSM_PMEM_KERNEL_EBI1_SIZE 0x600000
2690#define MSM_PMEM_ADSP_SIZE 0x2000000
Ben Romberger09e462d2011-08-09 15:24:37 -07002691#define MSM_PMEM_AUDIO_SIZE 0x28B000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002692
2693#define MSM_SMI_BASE 0x38000000
2694#define MSM_SMI_SIZE 0x4000000
2695
2696#define KERNEL_SMI_BASE (MSM_SMI_BASE)
Maheshwar Ajjac60c0462011-11-29 17:46:57 -08002697#define KERNEL_SMI_SIZE 0x600000
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002698
2699#define USER_SMI_BASE (KERNEL_SMI_BASE + KERNEL_SMI_SIZE)
2700#define USER_SMI_SIZE (MSM_SMI_SIZE - KERNEL_SMI_SIZE)
2701#define MSM_PMEM_SMIPOOL_SIZE USER_SMI_SIZE
2702
Naseer Ahmed51860b02012-02-07 18:53:29 +05302703#define MSM_ION_SF_SIZE 0x4000000 /* 64MB */
Olav Hauganb5be7992011-11-18 14:29:02 -08002704#define MSM_ION_CAMERA_SIZE MSM_PMEM_ADSP_SIZE
Olav Haugan42ebe712012-01-10 16:30:58 -08002705#define MSM_ION_MM_FW_SIZE 0x200000 /* (2MB) */
2706#define MSM_ION_MM_SIZE 0x3600000 /* (54MB) */
Olav Hauganb5be7992011-11-18 14:29:02 -08002707#define MSM_ION_MFC_SIZE SZ_8K
2708#define MSM_ION_WB_SIZE 0x600000 /* 6MB */
Olav Haugan424ff492012-03-13 11:41:23 -07002709#define MSM_ION_QSECOM_SIZE 0x600000 /* (6MB) */
Olav Haugan3a55e322012-01-23 14:24:01 -08002710#define MSM_ION_AUDIO_SIZE MSM_PMEM_AUDIO_SIZE
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002711
2712#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Olav Haugan6ab47252012-02-15 14:46:49 -08002713#define MSM_ION_HEAP_NUM 9
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08002714#define MSM_HDMI_PRIM_ION_SF_SIZE MSM_HDMI_PRIM_PMEM_SF_SIZE
2715static unsigned msm_ion_sf_size = MSM_ION_SF_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002716#else
Olav Hauganb5be7992011-11-18 14:29:02 -08002717#define MSM_ION_HEAP_NUM 1
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002718#endif
2719
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002720static unsigned fb_size;
2721static int __init fb_size_setup(char *p)
2722{
2723 fb_size = memparse(p, NULL);
2724 return 0;
2725}
2726early_param("fb_size", fb_size_setup);
2727
2728static unsigned pmem_kernel_ebi1_size = MSM_PMEM_KERNEL_EBI1_SIZE;
2729static int __init pmem_kernel_ebi1_size_setup(char *p)
2730{
2731 pmem_kernel_ebi1_size = memparse(p, NULL);
2732 return 0;
2733}
2734early_param("pmem_kernel_ebi1_size", pmem_kernel_ebi1_size_setup);
2735
2736#ifdef CONFIG_ANDROID_PMEM
2737static unsigned pmem_sf_size = MSM_PMEM_SF_SIZE;
2738static int __init pmem_sf_size_setup(char *p)
2739{
2740 pmem_sf_size = memparse(p, NULL);
2741 return 0;
2742}
2743early_param("pmem_sf_size", pmem_sf_size_setup);
2744
2745static unsigned pmem_adsp_size = MSM_PMEM_ADSP_SIZE;
2746
2747static int __init pmem_adsp_size_setup(char *p)
2748{
2749 pmem_adsp_size = memparse(p, NULL);
2750 return 0;
2751}
2752early_param("pmem_adsp_size", pmem_adsp_size_setup);
2753
2754static unsigned pmem_audio_size = MSM_PMEM_AUDIO_SIZE;
2755
2756static int __init pmem_audio_size_setup(char *p)
2757{
2758 pmem_audio_size = memparse(p, NULL);
2759 return 0;
2760}
2761early_param("pmem_audio_size", pmem_audio_size_setup);
2762#endif
2763
2764static struct resource msm_fb_resources[] = {
2765 {
2766 .flags = IORESOURCE_DMA,
2767 }
2768};
2769
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07002770static void set_mdp_clocks_for_wuxga(void);
2771
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002772static int msm_fb_detect_panel(const char *name)
2773{
2774 if (machine_is_msm8x60_fluid()) {
2775 uint32_t soc_platform_version = socinfo_get_platform_version();
2776 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
2777#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
2778 if (!strncmp(name, LCDC_SAMSUNG_OLED_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002779 strnlen(LCDC_SAMSUNG_OLED_PANEL_NAME,
2780 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002781 return 0;
2782#endif
2783 } else { /*P3 and up use AUO panel */
2784#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
2785 if (!strncmp(name, LCDC_AUO_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002786 strnlen(LCDC_AUO_PANEL_NAME,
2787 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002788 return 0;
2789#endif
2790 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002791#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
2792 } else if machine_is_msm8x60_dragon() {
2793 if (!strncmp(name, LCDC_NT35582_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002794 strnlen(LCDC_NT35582_PANEL_NAME,
2795 PANEL_NAME_MAX_LEN)))
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04002796 return 0;
2797#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002798 } else {
2799 if (!strncmp(name, LCDC_SAMSUNG_WSVGA_PANEL_NAME,
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002800 strnlen(LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2801 PANEL_NAME_MAX_LEN)))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002802 return 0;
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002803
2804#if !defined(CONFIG_FB_MSM_LCDC_AUTO_DETECT) && \
2805 !defined(CONFIG_FB_MSM_MIPI_PANEL_AUTO_DETECT) && \
2806 !defined(CONFIG_FB_MSM_LCDC_MIPI_PANEL_AUTO_DETECT)
2807 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2808 strnlen(MIPI_VIDEO_TOSHIBA_WVGA_PANEL_NAME,
2809 PANEL_NAME_MAX_LEN)))
2810 return 0;
2811
2812 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2813 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
2814 PANEL_NAME_MAX_LEN)))
2815 return 0;
2816
2817 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2818 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
2819 PANEL_NAME_MAX_LEN)))
2820 return 0;
2821#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002822 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002823
2824 if (!strncmp(name, HDMI_PANEL_NAME,
2825 strnlen(HDMI_PANEL_NAME,
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07002826 PANEL_NAME_MAX_LEN))) {
2827 if (hdmi_is_primary)
2828 set_mdp_clocks_for_wuxga();
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002829 return 0;
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07002830 }
Ravishangar Kalyanam61a7bd12011-07-28 16:48:36 -07002831
2832 if (!strncmp(name, TVOUT_PANEL_NAME,
2833 strnlen(TVOUT_PANEL_NAME,
2834 PANEL_NAME_MAX_LEN)))
2835 return 0;
2836
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002837 pr_warning("%s: not supported '%s'", __func__, name);
2838 return -ENODEV;
2839}
2840
2841static struct msm_fb_platform_data msm_fb_pdata = {
2842 .detect_client = msm_fb_detect_panel,
2843};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002844
2845static struct platform_device msm_fb_device = {
2846 .name = "msm_fb",
2847 .id = 0,
2848 .num_resources = ARRAY_SIZE(msm_fb_resources),
2849 .resource = msm_fb_resources,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002850 .dev.platform_data = &msm_fb_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002851};
2852
2853#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002854#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002855static struct android_pmem_platform_data android_pmem_pdata = {
2856 .name = "pmem",
2857 .allocator_type = PMEM_ALLOCATORTYPE_ALLORNOTHING,
2858 .cached = 1,
2859 .memory_type = MEMTYPE_EBI1,
2860};
2861
2862static struct platform_device android_pmem_device = {
2863 .name = "android_pmem",
2864 .id = 0,
2865 .dev = {.platform_data = &android_pmem_pdata},
2866};
2867
2868static struct android_pmem_platform_data android_pmem_adsp_pdata = {
2869 .name = "pmem_adsp",
2870 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2871 .cached = 0,
2872 .memory_type = MEMTYPE_EBI1,
2873};
2874
2875static struct platform_device android_pmem_adsp_device = {
2876 .name = "android_pmem",
2877 .id = 2,
2878 .dev = { .platform_data = &android_pmem_adsp_pdata },
2879};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002880#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002881static struct android_pmem_platform_data android_pmem_audio_pdata = {
2882 .name = "pmem_audio",
2883 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2884 .cached = 0,
2885 .memory_type = MEMTYPE_EBI1,
2886};
2887
2888static struct platform_device android_pmem_audio_device = {
2889 .name = "android_pmem",
2890 .id = 4,
2891 .dev = { .platform_data = &android_pmem_audio_pdata },
2892};
2893
Laura Abbott1e36a022011-06-22 17:08:13 -07002894#define PMEM_BUS_WIDTH(_bw) \
2895 { \
2896 .vectors = &(struct msm_bus_vectors){ \
2897 .src = MSM_BUS_MASTER_AMPSS_M0, \
2898 .dst = MSM_BUS_SLAVE_SMI, \
2899 .ib = (_bw), \
2900 .ab = 0, \
2901 }, \
2902 .num_paths = 1, \
2903 }
Olav Hauganee0f7802011-12-19 13:28:57 -08002904
2905static struct msm_bus_paths mem_smi_table[] = {
Laura Abbott1e36a022011-06-22 17:08:13 -07002906 [0] = PMEM_BUS_WIDTH(0), /* Off */
2907 [1] = PMEM_BUS_WIDTH(1), /* On */
2908};
2909
2910static struct msm_bus_scale_pdata smi_client_pdata = {
Olav Hauganee0f7802011-12-19 13:28:57 -08002911 .usecase = mem_smi_table,
2912 .num_usecases = ARRAY_SIZE(mem_smi_table),
2913 .name = "mem_smi",
Laura Abbott1e36a022011-06-22 17:08:13 -07002914};
2915
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002916int request_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002917{
2918 int bus_id = (int) data;
2919
2920 msm_bus_scale_client_update_request(bus_id, 1);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002921 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002922}
2923
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002924int release_smi_region(void *data)
Laura Abbott1e36a022011-06-22 17:08:13 -07002925{
2926 int bus_id = (int) data;
2927
2928 msm_bus_scale_client_update_request(bus_id, 0);
Laura Abbott72ae4bf2011-12-14 14:01:43 -08002929 return 0;
Laura Abbott1e36a022011-06-22 17:08:13 -07002930}
2931
Alex Bird199980e2011-10-21 11:29:27 -07002932void *setup_smi_region(void)
Laura Abbott1e36a022011-06-22 17:08:13 -07002933{
2934 return (void *)msm_bus_scale_register_client(&smi_client_pdata);
2935}
Olav Hauganee0f7802011-12-19 13:28:57 -08002936#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002937static struct android_pmem_platform_data android_pmem_smipool_pdata = {
2938 .name = "pmem_smipool",
2939 .allocator_type = PMEM_ALLOCATORTYPE_BITMAP,
2940 .cached = 0,
2941 .memory_type = MEMTYPE_SMI,
Alex Bird199980e2011-10-21 11:29:27 -07002942 .request_region = request_smi_region,
2943 .release_region = release_smi_region,
2944 .setup_region = setup_smi_region,
Laura Abbott1e36a022011-06-22 17:08:13 -07002945 .map_on_demand = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002946};
2947static struct platform_device android_pmem_smipool_device = {
2948 .name = "android_pmem",
2949 .id = 7,
2950 .dev = { .platform_data = &android_pmem_smipool_pdata },
2951};
Laura Abbott63cfd7e2011-10-10 18:21:01 -07002952#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07002953#endif
2954
2955#define GPIO_DONGLE_PWR_EN 258
2956static void setup_display_power(void);
2957static int lcdc_vga_enabled;
2958static int vga_enable_request(int enable)
2959{
2960 if (enable)
2961 lcdc_vga_enabled = 1;
2962 else
2963 lcdc_vga_enabled = 0;
2964 setup_display_power();
2965
2966 return 0;
2967}
2968
2969#define GPIO_BACKLIGHT_PWM0 0
2970#define GPIO_BACKLIGHT_PWM1 1
2971
2972static int pmic_backlight_gpio[2]
2973 = { GPIO_BACKLIGHT_PWM0, GPIO_BACKLIGHT_PWM1 };
2974static struct msm_panel_common_pdata lcdc_samsung_panel_data = {
2975 .gpio_num = pmic_backlight_gpio, /* two LPG CHANNELS for backlight */
2976 .vga_switch = vga_enable_request,
2977};
2978
2979static struct platform_device lcdc_samsung_panel_device = {
2980 .name = LCDC_SAMSUNG_WSVGA_PANEL_NAME,
2981 .id = 0,
2982 .dev = {
2983 .platform_data = &lcdc_samsung_panel_data,
2984 }
2985};
2986#if (!defined(CONFIG_SPI_QUP)) && \
2987 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
2988 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA))
2989
2990static int lcdc_spi_gpio_array_num[] = {
2991 LCDC_SPI_GPIO_CLK,
2992 LCDC_SPI_GPIO_CS,
2993 LCDC_SPI_GPIO_MOSI,
2994};
2995
2996static uint32_t lcdc_spi_gpio_config_data[] = {
2997 GPIO_CFG(LCDC_SPI_GPIO_CLK, 0,
2998 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
2999 GPIO_CFG(LCDC_SPI_GPIO_CS, 0,
3000 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
3001 GPIO_CFG(LCDC_SPI_GPIO_MOSI, 0,
3002 GPIO_CFG_OUTPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
3003};
3004
3005static void lcdc_config_spi_gpios(int enable)
3006{
3007 int n;
3008 for (n = 0; n < ARRAY_SIZE(lcdc_spi_gpio_config_data); ++n)
3009 gpio_tlmm_config(lcdc_spi_gpio_config_data[n], 0);
3010}
3011#endif
3012
3013#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
3014#ifdef CONFIG_SPI_QUP
3015static struct spi_board_info lcdc_samsung_spi_board_info[] __initdata = {
3016 {
3017 .modalias = LCDC_SAMSUNG_SPI_DEVICE_NAME,
3018 .mode = SPI_MODE_3,
3019 .bus_num = 1,
3020 .chip_select = 0,
3021 .max_speed_hz = 10800000,
3022 }
3023};
3024#endif /* CONFIG_SPI_QUP */
3025
3026static struct msm_panel_common_pdata lcdc_samsung_oled_panel_data = {
3027#ifndef CONFIG_SPI_QUP
3028 .panel_config_gpio = lcdc_config_spi_gpios,
3029 .gpio_num = lcdc_spi_gpio_array_num,
3030#endif
3031};
3032
3033static struct platform_device lcdc_samsung_oled_panel_device = {
3034 .name = LCDC_SAMSUNG_OLED_PANEL_NAME,
3035 .id = 0,
3036 .dev.platform_data = &lcdc_samsung_oled_panel_data,
3037};
3038#endif /*CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT */
3039
3040#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
3041#ifdef CONFIG_SPI_QUP
3042static struct spi_board_info lcdc_auo_spi_board_info[] __initdata = {
3043 {
3044 .modalias = LCDC_AUO_SPI_DEVICE_NAME,
3045 .mode = SPI_MODE_3,
3046 .bus_num = 1,
3047 .chip_select = 0,
3048 .max_speed_hz = 10800000,
3049 }
3050};
3051#endif
3052
3053static struct msm_panel_common_pdata lcdc_auo_wvga_panel_data = {
3054#ifndef CONFIG_SPI_QUP
3055 .panel_config_gpio = lcdc_config_spi_gpios,
3056 .gpio_num = lcdc_spi_gpio_array_num,
3057#endif
3058};
3059
3060static struct platform_device lcdc_auo_wvga_panel_device = {
3061 .name = LCDC_AUO_PANEL_NAME,
3062 .id = 0,
3063 .dev.platform_data = &lcdc_auo_wvga_panel_data,
3064};
3065#endif /*CONFIG_FB_MSM_LCDC_AUO_WVGA*/
3066
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04003067#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
3068
3069#define GPIO_NT35582_RESET 94
3070#define GPIO_NT35582_BL_EN_HW_PIN 24
3071#define GPIO_NT35582_BL_EN \
3072 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1)
3073
3074static int lcdc_nt35582_pmic_gpio[] = {GPIO_NT35582_BL_EN };
3075
3076static struct msm_panel_common_pdata lcdc_nt35582_panel_data = {
3077 .gpio_num = lcdc_nt35582_pmic_gpio,
3078};
3079
3080static struct platform_device lcdc_nt35582_panel_device = {
3081 .name = LCDC_NT35582_PANEL_NAME,
3082 .id = 0,
3083 .dev = {
3084 .platform_data = &lcdc_nt35582_panel_data,
3085 }
3086};
3087
3088static struct spi_board_info lcdc_nt35582_spi_board_info[] __initdata = {
3089 {
3090 .modalias = "lcdc_nt35582_spi",
3091 .mode = SPI_MODE_0,
3092 .bus_num = 0,
3093 .chip_select = 0,
3094 .max_speed_hz = 1100000,
3095 }
3096};
3097#endif
3098
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003099#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
3100static struct resource hdmi_msm_resources[] = {
3101 {
3102 .name = "hdmi_msm_qfprom_addr",
3103 .start = 0x00700000,
3104 .end = 0x007060FF,
3105 .flags = IORESOURCE_MEM,
3106 },
3107 {
3108 .name = "hdmi_msm_hdmi_addr",
3109 .start = 0x04A00000,
3110 .end = 0x04A00FFF,
3111 .flags = IORESOURCE_MEM,
3112 },
3113 {
3114 .name = "hdmi_msm_irq",
3115 .start = HDMI_IRQ,
3116 .end = HDMI_IRQ,
3117 .flags = IORESOURCE_IRQ,
3118 },
3119};
3120
3121static int hdmi_enable_5v(int on);
3122static int hdmi_core_power(int on, int show);
3123static int hdmi_cec_power(int on);
3124
3125static struct msm_hdmi_platform_data hdmi_msm_data = {
3126 .irq = HDMI_IRQ,
3127 .enable_5v = hdmi_enable_5v,
3128 .core_power = hdmi_core_power,
3129 .cec_power = hdmi_cec_power,
3130};
3131
3132static struct platform_device hdmi_msm_device = {
3133 .name = "hdmi_msm",
3134 .id = 0,
3135 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
3136 .resource = hdmi_msm_resources,
3137 .dev.platform_data = &hdmi_msm_data,
3138};
3139#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
3140
3141#ifdef CONFIG_FB_MSM_MIPI_DSI
3142static struct platform_device mipi_dsi_toshiba_panel_device = {
3143 .name = "mipi_toshiba",
3144 .id = 0,
3145};
3146
3147#define FPGA_3D_GPIO_CONFIG_ADDR 0x1D00017A
3148
Nagamalleswararao Ganjieac5dfa2011-07-23 17:31:16 -07003149static struct mipi_dsi_panel_platform_data novatek_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003150 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
Chandan Uddaraju83eac3c2011-09-11 18:32:23 -07003151 .fpga_ctrl_mode = FPGA_EBI2_INTF,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003152};
3153
3154static struct platform_device mipi_dsi_novatek_panel_device = {
3155 .name = "mipi_novatek",
3156 .id = 0,
3157 .dev = {
3158 .platform_data = &novatek_pdata,
3159 }
3160};
3161#endif
3162
3163static void __init msm8x60_allocate_memory_regions(void)
3164{
3165 void *addr;
3166 unsigned long size;
3167
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08003168 if (hdmi_is_primary)
3169 size = roundup((1920 * 1088 * 4 * 2), 4096);
3170 else
3171 size = MSM_FB_SIZE;
3172
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003173 addr = alloc_bootmem_align(size, 0x1000);
3174 msm_fb_resources[0].start = __pa(addr);
3175 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
3176 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
3177 size, addr, __pa(addr));
3178
3179}
3180
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08003181void __init msm8x60_set_display_params(char *prim_panel, char *ext_panel)
3182{
3183 if (strnlen(prim_panel, PANEL_NAME_MAX_LEN)) {
3184 strlcpy(msm_fb_pdata.prim_panel_name, prim_panel,
3185 PANEL_NAME_MAX_LEN);
3186 pr_debug("msm_fb_pdata.prim_panel_name %s\n",
3187 msm_fb_pdata.prim_panel_name);
3188
3189 if (!strncmp((char *)msm_fb_pdata.prim_panel_name,
3190 HDMI_PANEL_NAME, strnlen(HDMI_PANEL_NAME,
3191 PANEL_NAME_MAX_LEN))) {
3192 pr_debug("HDMI is the primary display by"
3193 " boot parameter\n");
3194 hdmi_is_primary = 1;
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07003195 set_mdp_clocks_for_wuxga();
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08003196 }
3197 }
3198 if (strnlen(ext_panel, PANEL_NAME_MAX_LEN)) {
3199 strlcpy(msm_fb_pdata.ext_panel_name, ext_panel,
3200 PANEL_NAME_MAX_LEN);
3201 pr_debug("msm_fb_pdata.ext_panel_name %s\n",
3202 msm_fb_pdata.ext_panel_name);
3203 }
3204}
3205
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003206#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
3207 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
3208/*virtual key support */
3209static ssize_t tma300_vkeys_show(struct kobject *kobj,
3210 struct kobj_attribute *attr, char *buf)
3211{
3212 return sprintf(buf,
3213 __stringify(EV_KEY) ":" __stringify(KEY_BACK) ":60:900:90:120"
3214 ":" __stringify(EV_KEY) ":" __stringify(KEY_MENU) ":180:900:90:120"
3215 ":" __stringify(EV_KEY) ":" __stringify(KEY_HOME) ":300:900:90:120"
3216 ":" __stringify(EV_KEY) ":" __stringify(KEY_SEARCH) ":420:900:90:120"
3217 "\n");
3218}
3219
3220static struct kobj_attribute tma300_vkeys_attr = {
3221 .attr = {
3222 .mode = S_IRUGO,
3223 },
3224 .show = &tma300_vkeys_show,
3225};
3226
3227static struct attribute *tma300_properties_attrs[] = {
3228 &tma300_vkeys_attr.attr,
3229 NULL
3230};
3231
3232static struct attribute_group tma300_properties_attr_group = {
3233 .attrs = tma300_properties_attrs,
3234};
3235
3236static struct kobject *properties_kobj;
3237
3238
3239
3240#define CYTTSP_TS_GPIO_IRQ 61
3241static int cyttsp_platform_init(struct i2c_client *client)
3242{
3243 int rc = -EINVAL;
3244 struct regulator *pm8058_l5 = NULL, *pm8058_s3;
3245
3246 if (machine_is_msm8x60_fluid()) {
3247 pm8058_l5 = regulator_get(NULL, "8058_l5");
3248 if (IS_ERR(pm8058_l5)) {
3249 pr_err("%s: regulator get of 8058_l5 failed (%ld)\n",
3250 __func__, PTR_ERR(pm8058_l5));
3251 rc = PTR_ERR(pm8058_l5);
3252 return rc;
3253 }
3254 rc = regulator_set_voltage(pm8058_l5, 2850000, 2850000);
3255 if (rc) {
3256 pr_err("%s: regulator_set_voltage of 8058_l5 failed(%d)\n",
3257 __func__, rc);
3258 goto reg_l5_put;
3259 }
3260
3261 rc = regulator_enable(pm8058_l5);
3262 if (rc) {
3263 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3264 __func__, rc);
3265 goto reg_l5_put;
3266 }
3267 }
3268 /* vote for s3 to enable i2c communication lines */
3269 pm8058_s3 = regulator_get(NULL, "8058_s3");
3270 if (IS_ERR(pm8058_s3)) {
3271 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3272 __func__, PTR_ERR(pm8058_s3));
3273 rc = PTR_ERR(pm8058_s3);
3274 goto reg_l5_disable;
3275 }
3276
3277 rc = regulator_set_voltage(pm8058_s3, 1800000, 1800000);
3278 if (rc) {
3279 pr_err("%s: regulator_set_voltage() = %d\n",
3280 __func__, rc);
3281 goto reg_s3_put;
3282 }
3283
3284 rc = regulator_enable(pm8058_s3);
3285 if (rc) {
3286 pr_err("%s: regulator_enable of 8058_l5 failed(%d)\n",
3287 __func__, rc);
3288 goto reg_s3_put;
3289 }
3290
3291 /* wait for vregs to stabilize */
3292 usleep_range(10000, 10000);
3293
3294 /* check this device active by reading first byte/register */
3295 rc = i2c_smbus_read_byte_data(client, 0x01);
3296 if (rc < 0) {
3297 pr_err("%s: i2c sanity check failed\n", __func__);
3298 goto reg_s3_disable;
3299 }
3300
3301 /* virtual keys */
3302 if (machine_is_msm8x60_fluid()) {
3303 tma300_vkeys_attr.attr.name = "virtualkeys.cyttsp-i2c";
3304 properties_kobj = kobject_create_and_add("board_properties",
3305 NULL);
3306 if (properties_kobj)
3307 rc = sysfs_create_group(properties_kobj,
3308 &tma300_properties_attr_group);
3309 if (!properties_kobj || rc)
3310 pr_err("%s: failed to create board_properties\n",
3311 __func__);
3312 }
3313 return CY_OK;
3314
3315reg_s3_disable:
3316 regulator_disable(pm8058_s3);
3317reg_s3_put:
3318 regulator_put(pm8058_s3);
3319reg_l5_disable:
3320 if (machine_is_msm8x60_fluid())
3321 regulator_disable(pm8058_l5);
3322reg_l5_put:
3323 if (machine_is_msm8x60_fluid())
3324 regulator_put(pm8058_l5);
3325 return rc;
3326}
3327
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303328/* TODO: Put the regulator to LPM / HPM in suspend/resume*/
3329static int cyttsp_platform_suspend(struct i2c_client *client)
3330{
3331 msleep(20);
3332
3333 return CY_OK;
3334}
3335
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003336static int cyttsp_platform_resume(struct i2c_client *client)
3337{
3338 /* add any special code to strobe a wakeup pin or chip reset */
3339 msleep(10);
3340
3341 return CY_OK;
3342}
3343
3344static struct cyttsp_platform_data cyttsp_fluid_pdata = {
3345 .flags = 0x04,
3346 .gen = CY_GEN3, /* or */
3347 .use_st = CY_USE_ST,
3348 .use_mt = CY_USE_MT,
3349 .use_hndshk = CY_SEND_HNDSHK,
3350 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303351 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003352 .use_gestures = CY_USE_GESTURES,
3353 /* activate up to 4 groups
3354 * and set active distance
3355 */
3356 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3357 CY_GEST_GRP3 | CY_GEST_GRP4 |
3358 CY_ACT_DIST,
3359 /* change act_intrvl to customize the Active power state
3360 * scanning/processing refresh interval for Operating mode
3361 */
3362 .act_intrvl = CY_ACT_INTRVL_DFLT,
3363 /* change tch_tmout to customize the touch timeout for the
3364 * Active power state for Operating mode
3365 */
3366 .tch_tmout = CY_TCH_TMOUT_DFLT,
3367 /* change lp_intrvl to customize the Low Power power state
3368 * scanning/processing refresh interval for Operating mode
3369 */
3370 .lp_intrvl = CY_LP_INTRVL_DFLT,
3371 .sleep_gpio = -1,
3372 .resout_gpio = -1,
3373 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3374 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303375 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003376 .init = cyttsp_platform_init,
3377};
3378
3379static struct cyttsp_platform_data cyttsp_tmg240_pdata = {
3380 .panel_maxx = 1083,
3381 .panel_maxy = 659,
3382 .disp_minx = 30,
3383 .disp_maxx = 1053,
3384 .disp_miny = 30,
3385 .disp_maxy = 629,
3386 .correct_fw_ver = 8,
3387 .fw_fname = "cyttsp_8660_ffa.hex",
3388 .flags = 0x00,
3389 .gen = CY_GEN2, /* or */
3390 .use_st = CY_USE_ST,
3391 .use_mt = CY_USE_MT,
3392 .use_hndshk = CY_SEND_HNDSHK,
3393 .use_trk_id = CY_USE_TRACKING_ID,
Anirudh Ghayal15187772011-06-22 17:39:41 +05303394 .use_sleep = CY_USE_DEEP_SLEEP_SEL | CY_USE_LOW_POWER_SEL,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003395 .use_gestures = CY_USE_GESTURES,
3396 /* activate up to 4 groups
3397 * and set active distance
3398 */
3399 .gest_set = CY_GEST_GRP1 | CY_GEST_GRP2 |
3400 CY_GEST_GRP3 | CY_GEST_GRP4 |
3401 CY_ACT_DIST,
3402 /* change act_intrvl to customize the Active power state
3403 * scanning/processing refresh interval for Operating mode
3404 */
3405 .act_intrvl = CY_ACT_INTRVL_DFLT,
3406 /* change tch_tmout to customize the touch timeout for the
3407 * Active power state for Operating mode
3408 */
3409 .tch_tmout = CY_TCH_TMOUT_DFLT,
3410 /* change lp_intrvl to customize the Low Power power state
3411 * scanning/processing refresh interval for Operating mode
3412 */
3413 .lp_intrvl = CY_LP_INTRVL_DFLT,
3414 .sleep_gpio = -1,
3415 .resout_gpio = -1,
3416 .irq_gpio = CYTTSP_TS_GPIO_IRQ,
3417 .resume = cyttsp_platform_resume,
Anirudh Ghayalf9929b12011-09-07 15:57:36 +05303418 .suspend = cyttsp_platform_suspend,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003419 .init = cyttsp_platform_init,
Mohan Pallaka1ea7d8a2011-08-18 15:06:00 +05303420 .disable_ghost_det = true,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003421};
3422static void cyttsp_set_params(void)
3423{
3424 if (SOCINFO_VERSION_MAJOR(socinfo_get_platform_version()) < 3) {
3425 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p2.hex";
3426 cyttsp_fluid_pdata.panel_maxx = 539;
3427 cyttsp_fluid_pdata.panel_maxy = 994;
3428 cyttsp_fluid_pdata.disp_minx = 30;
3429 cyttsp_fluid_pdata.disp_maxx = 509;
3430 cyttsp_fluid_pdata.disp_miny = 60;
3431 cyttsp_fluid_pdata.disp_maxy = 859;
3432 cyttsp_fluid_pdata.correct_fw_ver = 4;
3433 } else {
3434 cyttsp_fluid_pdata.fw_fname = "cyttsp_8660_fluid_p3.hex";
3435 cyttsp_fluid_pdata.panel_maxx = 550;
3436 cyttsp_fluid_pdata.panel_maxy = 1013;
3437 cyttsp_fluid_pdata.disp_minx = 35;
3438 cyttsp_fluid_pdata.disp_maxx = 515;
3439 cyttsp_fluid_pdata.disp_miny = 69;
3440 cyttsp_fluid_pdata.disp_maxy = 869;
3441 cyttsp_fluid_pdata.correct_fw_ver = 5;
3442 }
3443
3444}
3445
3446static struct i2c_board_info cyttsp_fluid_info[] __initdata = {
3447 {
3448 I2C_BOARD_INFO(CY_I2C_NAME, 0x24),
3449 .platform_data = &cyttsp_fluid_pdata,
3450#ifndef CY_USE_TIMER
3451 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3452#endif /* CY_USE_TIMER */
3453 },
3454};
3455
3456static struct i2c_board_info cyttsp_ffa_info[] __initdata = {
3457 {
3458 I2C_BOARD_INFO(CY_I2C_NAME, 0x3b),
3459 .platform_data = &cyttsp_tmg240_pdata,
3460#ifndef CY_USE_TIMER
3461 .irq = MSM_GPIO_TO_INT(CYTTSP_TS_GPIO_IRQ),
3462#endif /* CY_USE_TIMER */
3463 },
3464};
3465#endif
3466
3467static struct regulator *vreg_tmg200;
3468
3469#define TS_PEN_IRQ_GPIO 61
3470static int tmg200_power(int vreg_on)
3471{
3472 int rc = -EINVAL;
3473
3474 if (!vreg_tmg200) {
3475 printk(KERN_ERR "%s: regulator 8058_s3 not found (%d)\n",
3476 __func__, rc);
3477 return rc;
3478 }
3479
3480 rc = vreg_on ? regulator_enable(vreg_tmg200) :
3481 regulator_disable(vreg_tmg200);
3482 if (rc < 0)
3483 printk(KERN_ERR "%s: vreg 8058_s3 %s failed (%d)\n",
3484 __func__, vreg_on ? "enable" : "disable", rc);
3485
3486 /* wait for vregs to stabilize */
Amy Maloche12b5d4e2011-08-03 15:42:28 -07003487 msleep(20);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003488
3489 return rc;
3490}
3491
3492static int tmg200_dev_setup(bool enable)
3493{
3494 int rc;
3495
3496 if (enable) {
3497 vreg_tmg200 = regulator_get(NULL, "8058_s3");
3498 if (IS_ERR(vreg_tmg200)) {
3499 pr_err("%s: regulator get of 8058_s3 failed (%ld)\n",
3500 __func__, PTR_ERR(vreg_tmg200));
3501 rc = PTR_ERR(vreg_tmg200);
3502 return rc;
3503 }
3504
3505 rc = regulator_set_voltage(vreg_tmg200, 1800000, 1800000);
3506 if (rc) {
3507 pr_err("%s: regulator_set_voltage() = %d\n",
3508 __func__, rc);
3509 goto reg_put;
3510 }
3511 } else {
3512 /* put voltage sources */
3513 regulator_put(vreg_tmg200);
3514 }
3515 return 0;
3516reg_put:
3517 regulator_put(vreg_tmg200);
3518 return rc;
3519}
3520
3521static struct cy8c_ts_platform_data cy8ctmg200_pdata = {
3522 .ts_name = "msm_tmg200_ts",
3523 .dis_min_x = 0,
3524 .dis_max_x = 1023,
3525 .dis_min_y = 0,
3526 .dis_max_y = 599,
3527 .min_tid = 0,
3528 .max_tid = 255,
3529 .min_touch = 0,
3530 .max_touch = 255,
3531 .min_width = 0,
3532 .max_width = 255,
3533 .power_on = tmg200_power,
3534 .dev_setup = tmg200_dev_setup,
3535 .nfingers = 2,
3536 .irq_gpio = TS_PEN_IRQ_GPIO,
3537 .resout_gpio = GPIO_CAP_TS_RESOUT_N,
3538};
3539
3540static struct i2c_board_info cy8ctmg200_board_info[] = {
3541 {
3542 I2C_BOARD_INFO("cy8ctmg200", 0x2),
3543 .platform_data = &cy8ctmg200_pdata,
3544 }
3545};
3546
Zhang Chang Ken211df572011-07-05 19:16:39 -04003547static struct regulator *vreg_tma340;
3548
3549static int tma340_power(int vreg_on)
3550{
3551 int rc = -EINVAL;
3552
3553 if (!vreg_tma340) {
3554 pr_err("%s: regulator 8901_l2 not found (%d)\n",
3555 __func__, rc);
3556 return rc;
3557 }
3558
3559 rc = vreg_on ? regulator_enable(vreg_tma340) :
3560 regulator_disable(vreg_tma340);
3561 if (rc < 0)
3562 pr_err("%s: vreg 8901_l2 %s failed (%d)\n",
3563 __func__, vreg_on ? "enable" : "disable", rc);
3564
3565 /* wait for vregs to stabilize */
Amy Malocheb5c67e8d2011-08-18 16:39:35 -07003566 msleep(100);
Zhang Chang Ken211df572011-07-05 19:16:39 -04003567
3568 return rc;
3569}
3570
3571static struct kobject *tma340_prop_kobj;
3572
3573static int tma340_dragon_dev_setup(bool enable)
3574{
3575 int rc;
3576
3577 if (enable) {
3578 vreg_tma340 = regulator_get(NULL, "8901_l2");
3579 if (IS_ERR(vreg_tma340)) {
3580 pr_err("%s: regulator get of 8901_l2 failed (%ld)\n",
3581 __func__, PTR_ERR(vreg_tma340));
3582 rc = PTR_ERR(vreg_tma340);
3583 return rc;
3584 }
3585
3586 rc = regulator_set_voltage(vreg_tma340, 3300000, 3300000);
3587 if (rc) {
3588 pr_err("%s: regulator_set_voltage() = %d\n",
3589 __func__, rc);
3590 goto reg_put;
3591 }
3592 tma300_vkeys_attr.attr.name = "virtualkeys.cy8ctma340";
3593 tma340_prop_kobj = kobject_create_and_add("board_properties",
3594 NULL);
3595 if (tma340_prop_kobj) {
3596 rc = sysfs_create_group(tma340_prop_kobj,
3597 &tma300_properties_attr_group);
3598 if (rc) {
3599 kobject_put(tma340_prop_kobj);
3600 pr_err("%s: failed to create board_properties\n",
3601 __func__);
3602 goto reg_put;
3603 }
3604 }
3605
3606 } else {
3607 /* put voltage sources */
3608 regulator_put(vreg_tma340);
3609 /* destroy virtual keys */
3610 if (tma340_prop_kobj) {
3611 sysfs_remove_group(tma340_prop_kobj,
3612 &tma300_properties_attr_group);
3613 kobject_put(tma340_prop_kobj);
3614 }
3615 }
3616 return 0;
3617reg_put:
3618 regulator_put(vreg_tma340);
3619 return rc;
3620}
3621
3622
3623static struct cy8c_ts_platform_data cy8ctma340_dragon_pdata = {
3624 .ts_name = "cy8ctma340",
3625 .dis_min_x = 0,
3626 .dis_max_x = 479,
3627 .dis_min_y = 0,
3628 .dis_max_y = 799,
3629 .min_tid = 0,
3630 .max_tid = 255,
3631 .min_touch = 0,
3632 .max_touch = 255,
3633 .min_width = 0,
3634 .max_width = 255,
3635 .power_on = tma340_power,
3636 .dev_setup = tma340_dragon_dev_setup,
3637 .nfingers = 2,
3638 .irq_gpio = TS_PEN_IRQ_GPIO,
3639 .resout_gpio = -1,
3640};
3641
3642static struct i2c_board_info cy8ctma340_dragon_board_info[] = {
3643 {
3644 I2C_BOARD_INFO("cy8ctma340", 0x24),
3645 .platform_data = &cy8ctma340_dragon_pdata,
3646 }
3647};
3648
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003649#ifdef CONFIG_SERIAL_MSM_HS
3650static int configure_uart_gpios(int on)
3651{
3652 int ret = 0, i;
3653 int uart_gpios[] = {53, 54, 55, 56};
3654 for (i = 0; i < ARRAY_SIZE(uart_gpios); i++) {
3655 if (on) {
3656 ret = msm_gpiomux_get(uart_gpios[i]);
3657 if (unlikely(ret))
3658 break;
3659 } else {
3660 ret = msm_gpiomux_put(uart_gpios[i]);
3661 if (unlikely(ret))
3662 return ret;
3663 }
3664 }
3665 if (ret)
3666 for (; i >= 0; i--)
3667 msm_gpiomux_put(uart_gpios[i]);
3668 return ret;
3669}
3670static struct msm_serial_hs_platform_data msm_uart_dm1_pdata = {
3671 .inject_rx_on_wakeup = 1,
3672 .rx_to_inject = 0xFD,
3673 .gpio_config = configure_uart_gpios,
3674};
3675#endif
3676
3677
3678#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
3679
3680static struct gpio_led gpio_exp_leds_config[] = {
3681 {
3682 .name = "left_led1:green",
3683 .gpio = GPIO_LEFT_LED_1,
3684 .active_low = 1,
3685 .retain_state_suspended = 0,
3686 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3687 },
3688 {
3689 .name = "left_led2:red",
3690 .gpio = GPIO_LEFT_LED_2,
3691 .active_low = 1,
3692 .retain_state_suspended = 0,
3693 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3694 },
3695 {
3696 .name = "left_led3:green",
3697 .gpio = GPIO_LEFT_LED_3,
3698 .active_low = 1,
3699 .retain_state_suspended = 0,
3700 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3701 },
3702 {
3703 .name = "wlan_led:orange",
3704 .gpio = GPIO_LEFT_LED_WLAN,
3705 .active_low = 1,
3706 .retain_state_suspended = 0,
3707 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3708 },
3709 {
3710 .name = "left_led5:green",
3711 .gpio = GPIO_LEFT_LED_5,
3712 .active_low = 1,
3713 .retain_state_suspended = 0,
3714 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3715 },
3716 {
3717 .name = "right_led1:green",
3718 .gpio = GPIO_RIGHT_LED_1,
3719 .active_low = 1,
3720 .retain_state_suspended = 0,
3721 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3722 },
3723 {
3724 .name = "right_led2:red",
3725 .gpio = GPIO_RIGHT_LED_2,
3726 .active_low = 1,
3727 .retain_state_suspended = 0,
3728 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3729 },
3730 {
3731 .name = "right_led3:green",
3732 .gpio = GPIO_RIGHT_LED_3,
3733 .active_low = 1,
3734 .retain_state_suspended = 0,
3735 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3736 },
3737 {
3738 .name = "bt_led:blue",
3739 .gpio = GPIO_RIGHT_LED_BT,
3740 .active_low = 1,
3741 .retain_state_suspended = 0,
3742 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3743 },
3744 {
3745 .name = "right_led5:green",
3746 .gpio = GPIO_RIGHT_LED_5,
3747 .active_low = 1,
3748 .retain_state_suspended = 0,
3749 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3750 },
3751};
3752
3753static struct gpio_led_platform_data gpio_leds_pdata = {
3754 .num_leds = ARRAY_SIZE(gpio_exp_leds_config),
3755 .leds = gpio_exp_leds_config,
3756};
3757
3758static struct platform_device gpio_leds = {
3759 .name = "leds-gpio",
3760 .id = -1,
3761 .dev = {
3762 .platform_data = &gpio_leds_pdata,
3763 },
3764};
3765
3766static struct gpio_led fluid_gpio_leds[] = {
3767 {
3768 .name = "dual_led:green",
3769 .gpio = GPIO_LED1_GREEN_N,
3770 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3771 .active_low = 1,
3772 .retain_state_suspended = 0,
3773 },
3774 {
3775 .name = "dual_led:red",
3776 .gpio = GPIO_LED2_RED_N,
3777 .default_state = LEDS_GPIO_DEFSTATE_OFF,
3778 .active_low = 1,
3779 .retain_state_suspended = 0,
3780 },
3781};
3782
3783static struct gpio_led_platform_data gpio_led_pdata = {
3784 .leds = fluid_gpio_leds,
3785 .num_leds = ARRAY_SIZE(fluid_gpio_leds),
3786};
3787
3788static struct platform_device fluid_leds_gpio = {
3789 .name = "leds-gpio",
3790 .id = -1,
3791 .dev = {
3792 .platform_data = &gpio_led_pdata,
3793 },
3794};
3795
3796#endif
3797
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003798#ifdef CONFIG_BATTERY_MSM8X60
3799static struct msm_charger_platform_data msm_charger_data = {
3800 .safety_time = 180,
3801 .update_time = 1,
3802 .max_voltage = 4200,
3803 .min_voltage = 3200,
3804};
3805
3806static struct platform_device msm_charger_device = {
3807 .name = "msm-charger",
3808 .id = -1,
3809 .dev = {
3810 .platform_data = &msm_charger_data,
3811 }
3812};
3813#endif
3814
3815/*
3816 * Consumer specific regulator names:
3817 * regulator name consumer dev_name
3818 */
3819static struct regulator_consumer_supply vreg_consumers_PM8058_L0[] = {
3820 REGULATOR_SUPPLY("8058_l0", NULL),
3821};
3822static struct regulator_consumer_supply vreg_consumers_PM8058_L1[] = {
3823 REGULATOR_SUPPLY("8058_l1", NULL),
3824};
3825static struct regulator_consumer_supply vreg_consumers_PM8058_L2[] = {
3826 REGULATOR_SUPPLY("8058_l2", NULL),
3827};
3828static struct regulator_consumer_supply vreg_consumers_PM8058_L3[] = {
3829 REGULATOR_SUPPLY("8058_l3", NULL),
3830};
3831static struct regulator_consumer_supply vreg_consumers_PM8058_L4[] = {
3832 REGULATOR_SUPPLY("8058_l4", NULL),
3833};
3834static struct regulator_consumer_supply vreg_consumers_PM8058_L5[] = {
3835 REGULATOR_SUPPLY("8058_l5", NULL),
3836};
3837static struct regulator_consumer_supply vreg_consumers_PM8058_L6[] = {
3838 REGULATOR_SUPPLY("8058_l6", NULL),
3839};
3840static struct regulator_consumer_supply vreg_consumers_PM8058_L7[] = {
3841 REGULATOR_SUPPLY("8058_l7", NULL),
3842};
3843static struct regulator_consumer_supply vreg_consumers_PM8058_L8[] = {
3844 REGULATOR_SUPPLY("8058_l8", NULL),
3845};
3846static struct regulator_consumer_supply vreg_consumers_PM8058_L9[] = {
3847 REGULATOR_SUPPLY("8058_l9", NULL),
3848};
3849static struct regulator_consumer_supply vreg_consumers_PM8058_L10[] = {
3850 REGULATOR_SUPPLY("8058_l10", NULL),
3851};
3852static struct regulator_consumer_supply vreg_consumers_PM8058_L11[] = {
3853 REGULATOR_SUPPLY("8058_l11", NULL),
3854};
3855static struct regulator_consumer_supply vreg_consumers_PM8058_L12[] = {
3856 REGULATOR_SUPPLY("8058_l12", NULL),
3857};
3858static struct regulator_consumer_supply vreg_consumers_PM8058_L13[] = {
3859 REGULATOR_SUPPLY("8058_l13", NULL),
3860};
3861static struct regulator_consumer_supply vreg_consumers_PM8058_L14[] = {
3862 REGULATOR_SUPPLY("8058_l14", NULL),
3863};
3864static struct regulator_consumer_supply vreg_consumers_PM8058_L15[] = {
3865 REGULATOR_SUPPLY("8058_l15", NULL),
3866};
3867static struct regulator_consumer_supply vreg_consumers_PM8058_L16[] = {
3868 REGULATOR_SUPPLY("8058_l16", NULL),
3869};
3870static struct regulator_consumer_supply vreg_consumers_PM8058_L17[] = {
3871 REGULATOR_SUPPLY("8058_l17", NULL),
3872};
3873static struct regulator_consumer_supply vreg_consumers_PM8058_L18[] = {
3874 REGULATOR_SUPPLY("8058_l18", NULL),
3875};
3876static struct regulator_consumer_supply vreg_consumers_PM8058_L19[] = {
3877 REGULATOR_SUPPLY("8058_l19", NULL),
3878};
3879static struct regulator_consumer_supply vreg_consumers_PM8058_L20[] = {
3880 REGULATOR_SUPPLY("8058_l20", NULL),
3881};
3882static struct regulator_consumer_supply vreg_consumers_PM8058_L21[] = {
3883 REGULATOR_SUPPLY("8058_l21", NULL),
3884};
3885static struct regulator_consumer_supply vreg_consumers_PM8058_L22[] = {
3886 REGULATOR_SUPPLY("8058_l22", NULL),
3887};
3888static struct regulator_consumer_supply vreg_consumers_PM8058_L23[] = {
3889 REGULATOR_SUPPLY("8058_l23", NULL),
3890};
3891static struct regulator_consumer_supply vreg_consumers_PM8058_L24[] = {
3892 REGULATOR_SUPPLY("8058_l24", NULL),
3893};
3894static struct regulator_consumer_supply vreg_consumers_PM8058_L25[] = {
3895 REGULATOR_SUPPLY("8058_l25", NULL),
3896};
3897static struct regulator_consumer_supply vreg_consumers_PM8058_S0[] = {
3898 REGULATOR_SUPPLY("8058_s0", NULL),
3899};
3900static struct regulator_consumer_supply vreg_consumers_PM8058_S1[] = {
3901 REGULATOR_SUPPLY("8058_s1", NULL),
3902};
3903static struct regulator_consumer_supply vreg_consumers_PM8058_S2[] = {
3904 REGULATOR_SUPPLY("8058_s2", NULL),
3905};
3906static struct regulator_consumer_supply vreg_consumers_PM8058_S3[] = {
3907 REGULATOR_SUPPLY("8058_s3", NULL),
3908};
3909static struct regulator_consumer_supply vreg_consumers_PM8058_S4[] = {
3910 REGULATOR_SUPPLY("8058_s4", NULL),
3911};
3912static struct regulator_consumer_supply vreg_consumers_PM8058_LVS0[] = {
3913 REGULATOR_SUPPLY("8058_lvs0", NULL),
3914};
3915static struct regulator_consumer_supply vreg_consumers_PM8058_LVS1[] = {
3916 REGULATOR_SUPPLY("8058_lvs1", NULL),
3917};
3918static struct regulator_consumer_supply vreg_consumers_PM8058_NCP[] = {
3919 REGULATOR_SUPPLY("8058_ncp", NULL),
3920};
3921
3922static struct regulator_consumer_supply vreg_consumers_PM8901_L0[] = {
3923 REGULATOR_SUPPLY("8901_l0", NULL),
3924};
3925static struct regulator_consumer_supply vreg_consumers_PM8901_L1[] = {
3926 REGULATOR_SUPPLY("8901_l1", NULL),
3927};
3928static struct regulator_consumer_supply vreg_consumers_PM8901_L2[] = {
3929 REGULATOR_SUPPLY("8901_l2", NULL),
3930};
3931static struct regulator_consumer_supply vreg_consumers_PM8901_L3[] = {
3932 REGULATOR_SUPPLY("8901_l3", NULL),
3933};
3934static struct regulator_consumer_supply vreg_consumers_PM8901_L4[] = {
3935 REGULATOR_SUPPLY("8901_l4", NULL),
3936};
3937static struct regulator_consumer_supply vreg_consumers_PM8901_L5[] = {
3938 REGULATOR_SUPPLY("8901_l5", NULL),
3939};
3940static struct regulator_consumer_supply vreg_consumers_PM8901_L6[] = {
3941 REGULATOR_SUPPLY("8901_l6", NULL),
3942};
3943static struct regulator_consumer_supply vreg_consumers_PM8901_S2[] = {
3944 REGULATOR_SUPPLY("8901_s2", NULL),
3945};
3946static struct regulator_consumer_supply vreg_consumers_PM8901_S3[] = {
3947 REGULATOR_SUPPLY("8901_s3", NULL),
3948};
3949static struct regulator_consumer_supply vreg_consumers_PM8901_S4[] = {
3950 REGULATOR_SUPPLY("8901_s4", NULL),
3951};
3952static struct regulator_consumer_supply vreg_consumers_PM8901_LVS0[] = {
3953 REGULATOR_SUPPLY("8901_lvs0", NULL),
3954};
3955static struct regulator_consumer_supply vreg_consumers_PM8901_LVS1[] = {
3956 REGULATOR_SUPPLY("8901_lvs1", NULL),
3957};
3958static struct regulator_consumer_supply vreg_consumers_PM8901_LVS2[] = {
3959 REGULATOR_SUPPLY("8901_lvs2", NULL),
3960};
3961static struct regulator_consumer_supply vreg_consumers_PM8901_LVS3[] = {
3962 REGULATOR_SUPPLY("8901_lvs3", NULL),
3963};
3964static struct regulator_consumer_supply vreg_consumers_PM8901_MVS0[] = {
3965 REGULATOR_SUPPLY("8901_mvs0", NULL),
3966};
3967
David Collins6f032ba2011-08-31 14:08:15 -07003968/* Pin control regulators */
3969static struct regulator_consumer_supply vreg_consumers_PM8058_L8_PC[] = {
3970 REGULATOR_SUPPLY("8058_l8_pc", NULL),
3971};
3972static struct regulator_consumer_supply vreg_consumers_PM8058_L20_PC[] = {
3973 REGULATOR_SUPPLY("8058_l20_pc", NULL),
3974};
3975static struct regulator_consumer_supply vreg_consumers_PM8058_L21_PC[] = {
3976 REGULATOR_SUPPLY("8058_l21_pc", NULL),
3977};
3978static struct regulator_consumer_supply vreg_consumers_PM8058_S2_PC[] = {
3979 REGULATOR_SUPPLY("8058_s2_pc", NULL),
3980};
3981static struct regulator_consumer_supply vreg_consumers_PM8901_L0_PC[] = {
3982 REGULATOR_SUPPLY("8901_l0_pc", NULL),
3983};
3984static struct regulator_consumer_supply vreg_consumers_PM8901_S4_PC[] = {
3985 REGULATOR_SUPPLY("8901_s4_pc", NULL),
3986};
3987
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003988#define RPM_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
3989 _default_uV, _peak_uA, _avg_uA, _pull_down, _pin_ctrl, \
David Collins15789042012-03-19 10:44:36 -07003990 _freq, _pin_fn, _force_mode, _sleep_set_force_mode, \
3991 _state, _sleep_selectable, _always_on) \
David Collins6f032ba2011-08-31 14:08:15 -07003992 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07003993 .init_data = { \
3994 .constraints = { \
David Collins6f032ba2011-08-31 14:08:15 -07003995 .valid_modes_mask = _modes, \
3996 .valid_ops_mask = _ops, \
3997 .min_uV = _min_uV, \
3998 .max_uV = _max_uV, \
3999 .input_uV = _min_uV, \
4000 .apply_uV = _apply_uV, \
4001 .always_on = _always_on, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004002 }, \
David Collins6f032ba2011-08-31 14:08:15 -07004003 .consumer_supplies = vreg_consumers_##_id, \
4004 .num_consumer_supplies = \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004005 ARRAY_SIZE(vreg_consumers_##_id), \
4006 }, \
David Collins6f032ba2011-08-31 14:08:15 -07004007 .id = RPM_VREG_ID_##_id, \
4008 .default_uV = _default_uV, \
4009 .peak_uA = _peak_uA, \
4010 .avg_uA = _avg_uA, \
4011 .pull_down_enable = _pull_down, \
4012 .pin_ctrl = _pin_ctrl, \
4013 .freq = RPM_VREG_FREQ_##_freq, \
4014 .pin_fn = _pin_fn, \
4015 .force_mode = _force_mode, \
David Collins15789042012-03-19 10:44:36 -07004016 .sleep_set_force_mode = _sleep_set_force_mode, \
David Collins6f032ba2011-08-31 14:08:15 -07004017 .state = _state, \
4018 .sleep_selectable = _sleep_selectable, \
4019 }
4020
4021/* Pin control initialization */
4022#define RPM_PC(_id, _always_on, _pin_fn, _pin_ctrl) \
4023 { \
4024 .init_data = { \
4025 .constraints = { \
4026 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
4027 .always_on = _always_on, \
4028 }, \
4029 .num_consumer_supplies = \
4030 ARRAY_SIZE(vreg_consumers_##_id##_PC), \
4031 .consumer_supplies = vreg_consumers_##_id##_PC, \
4032 }, \
4033 .id = RPM_VREG_ID_##_id##_PC, \
4034 .pin_fn = RPM_VREG_PIN_FN_8660_##_pin_fn, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004035 .pin_ctrl = _pin_ctrl, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004036 }
4037
4038/*
4039 * The default LPM/HPM state of an RPM controlled regulator can be controlled
4040 * via the peak_uA value specified in the table below. If the value is less
4041 * than the high power min threshold for the regulator, then the regulator will
4042 * be set to LPM. Otherwise, it will be set to HPM.
4043 *
4044 * This value can be further overridden by specifying an initial mode via
4045 * .init_data.constraints.initial_mode.
4046 */
4047
David Collins6f032ba2011-08-31 14:08:15 -07004048#define RPM_LDO(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4049 _init_peak_uA) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004050 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4051 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4052 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4053 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4054 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004055 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4056 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004057 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004058 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004059 _sleep_selectable, _always_on)
4060
David Collins6f032ba2011-08-31 14:08:15 -07004061#define RPM_SMPS(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV, \
4062 _init_peak_uA, _freq) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004063 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_FAST | \
4064 REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE | \
4065 REGULATOR_MODE_STANDBY, REGULATOR_CHANGE_VOLTAGE | \
4066 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE | \
4067 REGULATOR_CHANGE_DRMS, 0, _min_uV, _init_peak_uA, \
David Collins6f032ba2011-08-31 14:08:15 -07004068 _init_peak_uA, _pd, RPM_VREG_PIN_CTRL_NONE, _freq, \
4069 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004070 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004071 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4072 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004073
David Collins6f032ba2011-08-31 14:08:15 -07004074#define RPM_VS(_id, _always_on, _pd, _sleep_selectable) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004075 RPM_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL | REGULATOR_MODE_IDLE, \
4076 REGULATOR_CHANGE_STATUS | REGULATOR_CHANGE_MODE, 0, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004077 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4078 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004079 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004080 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4081 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004082
David Collins6f032ba2011-08-31 14:08:15 -07004083#define RPM_NCP(_id, _always_on, _pd, _sleep_selectable, _min_uV, _max_uV) \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004084 RPM_VREG_INIT(_id, _min_uV, _max_uV, REGULATOR_MODE_NORMAL, \
4085 REGULATOR_CHANGE_VOLTAGE | REGULATOR_CHANGE_STATUS, 0, \
David Collins6f032ba2011-08-31 14:08:15 -07004086 _min_uV, 1000, 1000, _pd, RPM_VREG_PIN_CTRL_NONE, NONE, \
4087 RPM_VREG_PIN_FN_8660_ENABLE, \
David Collins15789042012-03-19 10:44:36 -07004088 RPM_VREG_FORCE_MODE_8660_NONE, \
David Collins6f032ba2011-08-31 14:08:15 -07004089 RPM_VREG_FORCE_MODE_8660_NONE, RPM_VREG_STATE_OFF, \
4090 _sleep_selectable, _always_on)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004091
David Collins6f032ba2011-08-31 14:08:15 -07004092#define LDO50HMIN RPM_VREG_8660_LDO_50_HPM_MIN_LOAD
4093#define LDO150HMIN RPM_VREG_8660_LDO_150_HPM_MIN_LOAD
4094#define LDO300HMIN RPM_VREG_8660_LDO_300_HPM_MIN_LOAD
4095#define SMPS_HMIN RPM_VREG_8660_SMPS_HPM_MIN_LOAD
4096#define FTS_HMIN RPM_VREG_8660_FTSMPS_HPM_MIN_LOAD
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004097
David Collins6f032ba2011-08-31 14:08:15 -07004098/* RPM early regulator constraints */
4099static struct rpm_regulator_init_data rpm_regulator_early_init_data[] = {
4100 /* ID a_on pd ss min_uV max_uV init_ip freq */
4101 RPM_SMPS(PM8058_S0, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
4102 RPM_SMPS(PM8058_S1, 0, 1, 1, 500000, 1250000, SMPS_HMIN, 1p60),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004103};
4104
David Collins6f032ba2011-08-31 14:08:15 -07004105/* RPM regulator constraints */
4106static struct rpm_regulator_init_data rpm_regulator_init_data[] = {
4107 /* ID a_on pd ss min_uV max_uV init_ip */
4108 RPM_LDO(PM8058_L0, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4109 RPM_LDO(PM8058_L1, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4110 RPM_LDO(PM8058_L2, 0, 1, 0, 1800000, 2600000, LDO300HMIN),
4111 RPM_LDO(PM8058_L3, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4112 RPM_LDO(PM8058_L4, 0, 1, 0, 2850000, 2850000, LDO50HMIN),
4113 RPM_LDO(PM8058_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4114 RPM_LDO(PM8058_L6, 0, 1, 0, 3000000, 3600000, LDO50HMIN),
4115 RPM_LDO(PM8058_L7, 0, 1, 0, 1800000, 1800000, LDO50HMIN),
4116 RPM_LDO(PM8058_L8, 0, 1, 0, 2900000, 3050000, LDO300HMIN),
4117 RPM_LDO(PM8058_L9, 0, 1, 0, 1800000, 1800000, LDO300HMIN),
4118 RPM_LDO(PM8058_L10, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4119 RPM_LDO(PM8058_L11, 0, 1, 0, 1500000, 1500000, LDO150HMIN),
4120 RPM_LDO(PM8058_L12, 0, 1, 0, 2900000, 2900000, LDO150HMIN),
4121 RPM_LDO(PM8058_L13, 0, 1, 0, 2050000, 2050000, LDO300HMIN),
4122 RPM_LDO(PM8058_L14, 0, 0, 0, 2850000, 2850000, LDO300HMIN),
4123 RPM_LDO(PM8058_L15, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4124 RPM_LDO(PM8058_L16, 1, 1, 0, 1800000, 1800000, LDO300HMIN),
4125 RPM_LDO(PM8058_L17, 0, 1, 0, 2600000, 2600000, LDO150HMIN),
4126 RPM_LDO(PM8058_L18, 0, 1, 0, 2200000, 2200000, LDO150HMIN),
4127 RPM_LDO(PM8058_L19, 0, 1, 0, 2500000, 2500000, LDO150HMIN),
4128 RPM_LDO(PM8058_L20, 0, 1, 0, 1800000, 1800000, LDO150HMIN),
4129 RPM_LDO(PM8058_L21, 1, 1, 0, 1200000, 1200000, LDO150HMIN),
4130 RPM_LDO(PM8058_L22, 0, 1, 0, 1150000, 1150000, LDO300HMIN),
4131 RPM_LDO(PM8058_L23, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4132 RPM_LDO(PM8058_L24, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
4133 RPM_LDO(PM8058_L25, 0, 1, 0, 1200000, 1200000, LDO150HMIN),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004134
David Collins6f032ba2011-08-31 14:08:15 -07004135 /* ID a_on pd ss min_uV max_uV init_ip freq */
4136 RPM_SMPS(PM8058_S2, 0, 1, 1, 1200000, 1400000, SMPS_HMIN, 1p60),
4137 RPM_SMPS(PM8058_S3, 1, 1, 0, 1800000, 1800000, SMPS_HMIN, 1p60),
4138 RPM_SMPS(PM8058_S4, 1, 1, 0, 2200000, 2200000, SMPS_HMIN, 1p60),
4139
4140 /* ID a_on pd ss */
4141 RPM_VS(PM8058_LVS0, 0, 1, 0),
4142 RPM_VS(PM8058_LVS1, 0, 1, 0),
4143
4144 /* ID a_on pd ss min_uV max_uV */
4145 RPM_NCP(PM8058_NCP, 0, 1, 0, 1800000, 1800000),
4146
4147 /* ID a_on pd ss min_uV max_uV init_ip */
4148 RPM_LDO(PM8901_L0, 0, 1, 0, 1200000, 1200000, LDO300HMIN),
4149 RPM_LDO(PM8901_L1, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4150 RPM_LDO(PM8901_L2, 0, 1, 0, 2850000, 3300000, LDO300HMIN),
4151 RPM_LDO(PM8901_L3, 0, 1, 0, 3300000, 3300000, LDO300HMIN),
4152 RPM_LDO(PM8901_L4, 0, 1, 0, 2600000, 2600000, LDO300HMIN),
4153 RPM_LDO(PM8901_L5, 0, 1, 0, 2850000, 2850000, LDO300HMIN),
4154 RPM_LDO(PM8901_L6, 0, 1, 0, 2200000, 2200000, LDO300HMIN),
4155
4156 /* ID a_on pd ss min_uV max_uV init_ip freq */
4157 RPM_SMPS(PM8901_S2, 0, 1, 0, 1300000, 1300000, FTS_HMIN, 1p60),
4158 RPM_SMPS(PM8901_S3, 0, 1, 0, 1100000, 1100000, FTS_HMIN, 1p60),
4159 RPM_SMPS(PM8901_S4, 0, 1, 0, 1225000, 1225000, FTS_HMIN, 1p60),
4160
4161 /* ID a_on pd ss */
4162 RPM_VS(PM8901_LVS0, 1, 1, 0),
4163 RPM_VS(PM8901_LVS1, 0, 1, 0),
4164 RPM_VS(PM8901_LVS2, 0, 1, 0),
4165 RPM_VS(PM8901_LVS3, 0, 1, 0),
4166 RPM_VS(PM8901_MVS0, 0, 1, 0),
4167
4168 /* ID a_on pin_func pin_ctrl */
4169 RPM_PC(PM8058_L8, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4170 RPM_PC(PM8058_L20, 0, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4171 RPM_PC(PM8058_L21, 1, SLEEP_B, RPM_VREG_PIN_CTRL_NONE),
4172 RPM_PC(PM8058_S2, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8058_A0),
4173 RPM_PC(PM8901_L0, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4174 RPM_PC(PM8901_S4, 0, ENABLE, RPM_VREG_PIN_CTRL_PM8901_A0),
4175};
4176
4177static struct rpm_regulator_platform_data rpm_regulator_early_pdata = {
4178 .init_data = rpm_regulator_early_init_data,
4179 .num_regulators = ARRAY_SIZE(rpm_regulator_early_init_data),
4180 .version = RPM_VREG_VERSION_8660,
4181 .vreg_id_vdd_mem = RPM_VREG_ID_PM8058_S0,
4182 .vreg_id_vdd_dig = RPM_VREG_ID_PM8058_S1,
4183};
4184
4185static struct rpm_regulator_platform_data rpm_regulator_pdata = {
4186 .init_data = rpm_regulator_init_data,
4187 .num_regulators = ARRAY_SIZE(rpm_regulator_init_data),
4188 .version = RPM_VREG_VERSION_8660,
4189};
4190
4191static struct platform_device rpm_regulator_early_device = {
4192 .name = "rpm-regulator",
4193 .id = 0,
4194 .dev = {
4195 .platform_data = &rpm_regulator_early_pdata,
4196 },
4197};
4198
4199static struct platform_device rpm_regulator_device = {
4200 .name = "rpm-regulator",
4201 .id = 1,
4202 .dev = {
4203 .platform_data = &rpm_regulator_pdata,
4204 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004205};
4206
4207static struct platform_device *early_regulators[] __initdata = {
4208 &msm_device_saw_s0,
4209 &msm_device_saw_s1,
David Collins6f032ba2011-08-31 14:08:15 -07004210 &rpm_regulator_early_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004211};
4212
4213static struct platform_device *early_devices[] __initdata = {
4214#ifdef CONFIG_MSM_BUS_SCALING
4215 &msm_bus_apps_fabric,
4216 &msm_bus_sys_fabric,
4217 &msm_bus_mm_fabric,
4218 &msm_bus_sys_fpb,
4219 &msm_bus_cpss_fpb,
4220#endif
4221 &msm_device_dmov_adm0,
4222 &msm_device_dmov_adm1,
4223};
4224
4225#if (defined(CONFIG_MARIMBA_CORE)) && \
4226 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
4227
4228static int bluetooth_power(int);
4229static struct platform_device msm_bt_power_device = {
4230 .name = "bt_power",
4231 .id = -1,
4232 .dev = {
4233 .platform_data = &bluetooth_power,
4234 },
4235};
4236#endif
4237
4238static struct platform_device msm_tsens_device = {
4239 .name = "tsens-tm",
4240 .id = -1,
4241};
4242
4243static struct platform_device *rumi_sim_devices[] __initdata = {
4244 &smc91x_device,
4245 &msm_device_uart_dm12,
4246#ifdef CONFIG_I2C_QUP
4247 &msm_gsbi3_qup_i2c_device,
4248 &msm_gsbi4_qup_i2c_device,
4249 &msm_gsbi7_qup_i2c_device,
4250 &msm_gsbi8_qup_i2c_device,
4251 &msm_gsbi9_qup_i2c_device,
4252 &msm_gsbi12_qup_i2c_device,
4253#endif
4254#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004255 &msm_device_ssbi3,
4256#endif
4257#ifdef CONFIG_ANDROID_PMEM
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004258#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004259 &android_pmem_device,
4260 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004261 &android_pmem_smipool_device,
4262#endif
Laura Abbottdf8b8a82011-11-02 23:13:45 -07004263 &android_pmem_audio_device,
4264#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004265#ifdef CONFIG_MSM_ROTATOR
4266 &msm_rotator_device,
4267#endif
4268 &msm_fb_device,
4269 &msm_kgsl_3d0,
4270 &msm_kgsl_2d0,
4271 &msm_kgsl_2d1,
4272 &lcdc_samsung_panel_device,
4273#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
4274 &hdmi_msm_device,
4275#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
4276#ifdef CONFIG_MSM_CAMERA
4277#ifdef CONFIG_MT9E013
4278 &msm_camera_sensor_mt9e013,
4279#endif
4280#ifdef CONFIG_IMX074
4281 &msm_camera_sensor_imx074,
4282#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04004283#ifdef CONFIG_VX6953
4284 &msm_camera_sensor_vx6953,
4285#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004286#ifdef CONFIG_WEBCAM_OV7692
4287 &msm_camera_sensor_webcam_ov7692,
4288#endif
4289#ifdef CONFIG_WEBCAM_OV9726
4290 &msm_camera_sensor_webcam_ov9726,
4291#endif
4292#ifdef CONFIG_QS_S5K4E1
4293 &msm_camera_sensor_qs_s5k4e1,
4294#endif
4295#endif
4296#ifdef CONFIG_MSM_GEMINI
4297 &msm_gemini_device,
4298#endif
4299#ifdef CONFIG_MSM_VPE
4300 &msm_vpe_device,
4301#endif
4302 &msm_device_vidc,
4303};
4304
4305#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
4306enum {
4307 SX150X_CORE,
4308 SX150X_DOCKING,
4309 SX150X_SURF,
4310 SX150X_LEFT_FHA,
4311 SX150X_RIGHT_FHA,
4312 SX150X_SOUTH,
4313 SX150X_NORTH,
4314 SX150X_CORE_FLUID,
4315};
4316
4317static struct sx150x_platform_data sx150x_data[] __initdata = {
4318 [SX150X_CORE] = {
4319 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4320 .oscio_is_gpo = false,
4321 .io_pullup_ena = 0x0c08,
4322 .io_pulldn_ena = 0x4060,
4323 .io_open_drain_ena = 0x000c,
4324 .io_polarity = 0,
4325 .irq_summary = -1, /* see fixup_i2c_configs() */
4326 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4327 },
4328 [SX150X_DOCKING] = {
4329 .gpio_base = GPIO_DOCKING_EXPANDER_BASE,
4330 .oscio_is_gpo = false,
4331 .io_pullup_ena = 0x5e06,
4332 .io_pulldn_ena = 0x81b8,
4333 .io_open_drain_ena = 0,
4334 .io_polarity = 0,
4335 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4336 UI_INT2_N),
4337 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4338 GPIO_DOCKING_EXPANDER_BASE -
4339 GPIO_EXPANDER_GPIO_BASE,
4340 },
4341 [SX150X_SURF] = {
4342 .gpio_base = GPIO_SURF_EXPANDER_BASE,
4343 .oscio_is_gpo = false,
4344 .io_pullup_ena = 0,
4345 .io_pulldn_ena = 0,
4346 .io_open_drain_ena = 0,
4347 .io_polarity = 0,
4348 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4349 UI_INT1_N),
4350 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4351 GPIO_SURF_EXPANDER_BASE -
4352 GPIO_EXPANDER_GPIO_BASE,
4353 },
4354 [SX150X_LEFT_FHA] = {
4355 .gpio_base = GPIO_LEFT_KB_EXPANDER_BASE,
4356 .oscio_is_gpo = false,
4357 .io_pullup_ena = 0,
4358 .io_pulldn_ena = 0x40,
4359 .io_open_drain_ena = 0,
4360 .io_polarity = 0,
4361 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4362 UI_INT3_N),
4363 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4364 GPIO_LEFT_KB_EXPANDER_BASE -
4365 GPIO_EXPANDER_GPIO_BASE,
4366 },
4367 [SX150X_RIGHT_FHA] = {
4368 .gpio_base = GPIO_RIGHT_KB_EXPANDER_BASE,
4369 .oscio_is_gpo = true,
4370 .io_pullup_ena = 0,
4371 .io_pulldn_ena = 0,
4372 .io_open_drain_ena = 0,
4373 .io_polarity = 0,
4374 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
4375 UI_INT3_N),
4376 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4377 GPIO_RIGHT_KB_EXPANDER_BASE -
4378 GPIO_EXPANDER_GPIO_BASE,
4379 },
4380 [SX150X_SOUTH] = {
4381 .gpio_base = GPIO_SOUTH_EXPANDER_BASE,
4382 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4383 GPIO_SOUTH_EXPANDER_BASE -
4384 GPIO_EXPANDER_GPIO_BASE,
4385 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4386 },
4387 [SX150X_NORTH] = {
4388 .gpio_base = GPIO_NORTH_EXPANDER_BASE,
4389 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4390 GPIO_NORTH_EXPANDER_BASE -
4391 GPIO_EXPANDER_GPIO_BASE,
4392 .irq_summary = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT3_N),
4393 .oscio_is_gpo = true,
4394 .io_open_drain_ena = 0x30,
4395 },
4396 [SX150X_CORE_FLUID] = {
4397 .gpio_base = GPIO_CORE_EXPANDER_BASE,
4398 .oscio_is_gpo = false,
4399 .io_pullup_ena = 0x0408,
4400 .io_pulldn_ena = 0x4060,
4401 .io_open_drain_ena = 0x0008,
4402 .io_polarity = 0,
4403 .irq_summary = -1, /* see fixup_i2c_configs() */
4404 .irq_base = GPIO_EXPANDER_IRQ_BASE,
4405 },
4406};
4407
4408#ifdef CONFIG_SENSORS_MSM_ADC
4409/* Configuration of EPM expander is done when client
4410 * request an adc read
4411 */
4412static struct sx150x_platform_data sx150x_epmdata = {
4413 .gpio_base = GPIO_EPM_EXPANDER_BASE,
4414 .irq_base = GPIO_EXPANDER_IRQ_BASE +
4415 GPIO_EPM_EXPANDER_BASE -
4416 GPIO_EXPANDER_GPIO_BASE,
4417 .irq_summary = -1,
4418};
4419#endif
4420
4421/* sx150x_low_power_cfg
4422 *
4423 * This data and init function are used to put unused gpio-expander output
4424 * lines into their low-power states at boot. The init
4425 * function must be deferred until a later init stage because the i2c
4426 * gpio expander drivers do not probe until after they are registered
4427 * (see register_i2c_devices) and the work-queues for those registrations
4428 * are processed. Because these lines are unused, there is no risk of
4429 * competing with a device driver for the gpio.
4430 *
4431 * gpio lines whose low-power states are input are naturally in their low-
4432 * power configurations once probed, see the platform data structures above.
4433 */
4434struct sx150x_low_power_cfg {
4435 unsigned gpio;
4436 unsigned val;
4437};
4438
4439static struct sx150x_low_power_cfg
4440common_sx150x_lp_cfgs[] __initdata = {
4441 {GPIO_WLAN_DEEP_SLEEP_N, 0},
4442 {GPIO_EXT_GPS_LNA_EN, 0},
4443 {GPIO_MSM_WAKES_BT, 0},
4444 {GPIO_USB_UICC_EN, 0},
4445 {GPIO_BATT_GAUGE_EN, 0},
4446};
4447
4448static struct sx150x_low_power_cfg
4449surf_ffa_sx150x_lp_cfgs[] __initdata = {
4450 {GPIO_MIPI_DSI_RST_N, 0},
4451 {GPIO_DONGLE_PWR_EN, 0},
4452 {GPIO_CAP_TS_SLEEP, 1},
4453 {GPIO_WEB_CAMIF_RESET_N, 0},
4454};
4455
4456static void __init
4457cfg_gpio_low_power(struct sx150x_low_power_cfg *cfgs, unsigned nelems)
4458{
4459 unsigned n;
4460 int rc;
4461
4462 for (n = 0; n < nelems; ++n) {
4463 rc = gpio_request(cfgs[n].gpio, NULL);
4464 if (!rc) {
4465 rc = gpio_direction_output(cfgs[n].gpio, cfgs[n].val);
4466 gpio_free(cfgs[n].gpio);
4467 }
4468
4469 if (rc) {
4470 printk(KERN_NOTICE "%s: failed to sleep gpio %d: %d\n",
4471 __func__, cfgs[n].gpio, rc);
4472 }
Steve Muckle9161d302010-02-11 11:50:40 -08004473 }
Steve Mucklea55df6e2010-01-07 12:43:24 -08004474}
4475
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004476static int __init cfg_sx150xs_low_power(void)
Steve Mucklea55df6e2010-01-07 12:43:24 -08004477{
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004478 cfg_gpio_low_power(common_sx150x_lp_cfgs,
4479 ARRAY_SIZE(common_sx150x_lp_cfgs));
4480 if (!machine_is_msm8x60_fluid())
4481 cfg_gpio_low_power(surf_ffa_sx150x_lp_cfgs,
4482 ARRAY_SIZE(surf_ffa_sx150x_lp_cfgs));
4483 return 0;
4484}
4485module_init(cfg_sx150xs_low_power);
4486
4487#ifdef CONFIG_I2C
4488static struct i2c_board_info core_expander_i2c_info[] __initdata = {
4489 {
4490 I2C_BOARD_INFO("sx1509q", 0x3e),
4491 .platform_data = &sx150x_data[SX150X_CORE]
4492 },
4493};
4494
4495static struct i2c_board_info docking_expander_i2c_info[] __initdata = {
4496 {
4497 I2C_BOARD_INFO("sx1509q", 0x3f),
4498 .platform_data = &sx150x_data[SX150X_DOCKING]
4499 },
4500};
4501
4502static struct i2c_board_info surf_expanders_i2c_info[] __initdata = {
4503 {
4504 I2C_BOARD_INFO("sx1509q", 0x70),
4505 .platform_data = &sx150x_data[SX150X_SURF]
4506 }
4507};
4508
4509static struct i2c_board_info fha_expanders_i2c_info[] __initdata = {
4510 {
4511 I2C_BOARD_INFO("sx1508q", 0x21),
4512 .platform_data = &sx150x_data[SX150X_LEFT_FHA]
4513 },
4514 {
4515 I2C_BOARD_INFO("sx1508q", 0x22),
4516 .platform_data = &sx150x_data[SX150X_RIGHT_FHA]
4517 }
4518};
4519
4520static struct i2c_board_info fluid_expanders_i2c_info[] __initdata = {
4521 {
4522 I2C_BOARD_INFO("sx1508q", 0x23),
4523 .platform_data = &sx150x_data[SX150X_SOUTH]
4524 },
4525 {
4526 I2C_BOARD_INFO("sx1508q", 0x20),
4527 .platform_data = &sx150x_data[SX150X_NORTH]
4528 }
4529};
4530
4531static struct i2c_board_info fluid_core_expander_i2c_info[] __initdata = {
4532 {
4533 I2C_BOARD_INFO("sx1509q", 0x3e),
4534 .platform_data = &sx150x_data[SX150X_CORE_FLUID]
4535 },
4536};
4537
4538#ifdef CONFIG_SENSORS_MSM_ADC
4539static struct i2c_board_info fluid_expanders_i2c_epm_info[] = {
4540 {
4541 I2C_BOARD_INFO("sx1509q", 0x3e),
4542 .platform_data = &sx150x_epmdata
4543 },
4544};
4545#endif
4546#endif
4547#endif
4548
4549#ifdef CONFIG_SENSORS_MSM_ADC
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004550
4551static struct adc_access_fn xoadc_fn = {
4552 pm8058_xoadc_select_chan_and_start_conv,
4553 pm8058_xoadc_read_adc_code,
4554 pm8058_xoadc_get_properties,
4555 pm8058_xoadc_slot_request,
4556 pm8058_xoadc_restore_slot,
4557 pm8058_xoadc_calibrate,
4558};
4559
4560#if defined(CONFIG_I2C) && \
4561 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4562static struct regulator *vreg_adc_epm1;
4563
4564static struct i2c_client *epm_expander_i2c_register_board(void)
4565
4566{
4567 struct i2c_adapter *i2c_adap;
4568 struct i2c_client *client = NULL;
4569 i2c_adap = i2c_get_adapter(0x0);
4570
4571 if (i2c_adap == NULL)
4572 printk(KERN_ERR "\nepm_expander_i2c_adapter is NULL\n");
4573
4574 if (i2c_adap != NULL)
4575 client = i2c_new_device(i2c_adap,
4576 &fluid_expanders_i2c_epm_info[0]);
4577 return client;
4578
4579}
4580
4581static unsigned int msm_adc_gpio_configure_expander_enable(void)
4582{
4583 int rc = 0;
4584 static struct i2c_client *epm_i2c_client;
4585
4586 printk(KERN_DEBUG "Enter msm_adc_gpio_configure_expander_enable\n");
4587
4588 vreg_adc_epm1 = regulator_get(NULL, "8058_s3");
4589
4590 if (IS_ERR(vreg_adc_epm1)) {
4591 printk(KERN_ERR "%s: Unable to get 8058_s3\n", __func__);
4592 return 0;
4593 }
4594
4595 rc = regulator_set_voltage(vreg_adc_epm1, 1800000, 1800000);
4596 if (rc)
4597 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4598 "regulator set voltage failed\n");
4599
4600 rc = regulator_enable(vreg_adc_epm1);
4601 if (rc) {
4602 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4603 "Error while enabling regulator for epm s3 %d\n", rc);
4604 return rc;
4605 }
4606
4607 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Start"
4608 " setting the value of the EPM 3.3, 5v and lvlsft\n");
4609
4610 msleep(1000);
4611
4612 rc = gpio_request(GPIO_EPM_5V_BOOST_EN, "boost_epm_5v");
4613 if (!rc) {
4614 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4615 "Configure 5v boost\n");
4616 gpio_direction_output(GPIO_EPM_5V_BOOST_EN, 1);
4617 } else {
4618 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4619 "Error for epm 5v boost en\n");
4620 goto exit_vreg_epm;
4621 }
4622
4623 msleep(500);
4624
4625 rc = gpio_request(GPIO_EPM_3_3V_EN, "epm_3_3v");
4626 if (!rc) {
4627 gpio_direction_output(GPIO_EPM_3_3V_EN, 1);
4628 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4629 "Configure epm 3.3v\n");
4630 } else {
4631 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4632 "Error for gpio 3.3ven\n");
4633 goto exit_vreg_epm;
4634 }
4635 msleep(500);
4636
4637 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4638 "Trying to request EPM LVLSFT_EN\n");
4639 rc = gpio_request(GPIO_EPM_LVLSFT_EN, "lvsft_en");
4640 if (!rc) {
4641 gpio_direction_output(GPIO_EPM_LVLSFT_EN, 1);
4642 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: "
4643 "Configure the lvlsft\n");
4644 } else {
4645 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: "
4646 "Error for epm lvlsft_en\n");
4647 goto exit_vreg_epm;
4648 }
4649
4650 msleep(500);
4651
4652 if (!epm_i2c_client)
4653 epm_i2c_client = epm_expander_i2c_register_board();
4654
4655 rc = gpio_request(GPIO_PWR_MON_ENABLE, "pwr_mon_enable");
4656 if (!rc)
4657 rc = gpio_direction_output(GPIO_PWR_MON_ENABLE, 1);
4658 if (rc) {
4659 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4660 ": GPIO PWR MON Enable issue\n");
4661 goto exit_vreg_epm;
4662 }
4663
4664 msleep(1000);
4665
4666 rc = gpio_request(GPIO_ADC1_PWDN_N, "adc1_pwdn");
4667 if (!rc) {
4668 rc = gpio_direction_output(GPIO_ADC1_PWDN_N, 1);
4669 if (rc) {
4670 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4671 ": ADC1_PWDN error direction out\n");
4672 goto exit_vreg_epm;
4673 }
4674 }
4675
4676 msleep(100);
4677
4678 rc = gpio_request(GPIO_ADC2_PWDN_N, "adc2_pwdn");
4679 if (!rc) {
4680 rc = gpio_direction_output(GPIO_ADC2_PWDN_N, 1);
4681 if (rc) {
4682 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4683 ": ADC2_PWD error direction out\n");
4684 goto exit_vreg_epm;
4685 }
4686 }
4687
4688 msleep(1000);
4689
4690 rc = gpio_request(GPIO_PWR_MON_START, "pwr_mon_start");
4691 if (!rc) {
4692 rc = gpio_direction_output(GPIO_PWR_MON_START, 0);
4693 if (rc) {
4694 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4695 "Gpio request problem %d\n", rc);
4696 goto exit_vreg_epm;
4697 }
4698 }
4699
4700 rc = gpio_request(GPIO_EPM_SPI_ADC1_CS_N, "spi_adc1_cs");
4701 if (!rc) {
4702 rc = gpio_direction_output(GPIO_EPM_SPI_ADC1_CS_N, 0);
4703 if (rc) {
4704 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4705 ": EPM_SPI_ADC1_CS_N error\n");
4706 goto exit_vreg_epm;
4707 }
4708 }
4709
4710 rc = gpio_request(GPIO_EPM_SPI_ADC2_CS_N, "spi_adc2_cs");
4711 if (!rc) {
4712 rc = gpio_direction_output(GPIO_EPM_SPI_ADC2_CS_N, 0);
4713 if (rc) {
4714 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4715 ": EPM_SPI_ADC2_Cs_N error\n");
4716 goto exit_vreg_epm;
4717 }
4718 }
4719
4720 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_enable: Set "
4721 "the power monitor reset for epm\n");
4722
4723 rc = gpio_request(GPIO_PWR_MON_RESET_N, "pwr_mon_reset_n");
4724 if (!rc) {
4725 gpio_direction_output(GPIO_PWR_MON_RESET_N, 0);
4726 if (rc) {
4727 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable"
4728 ": Error in the power mon reset\n");
4729 goto exit_vreg_epm;
4730 }
4731 }
4732
4733 msleep(1000);
4734
4735 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 1);
4736
4737 msleep(500);
4738
4739 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4740
4741 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4742
4743 return rc;
4744
4745exit_vreg_epm:
4746 regulator_disable(vreg_adc_epm1);
4747
4748 printk(KERN_ERR "msm_adc_gpio_configure_expander_enable: Exit."
4749 " rc = %d.\n", rc);
4750 return rc;
4751};
4752
4753static unsigned int msm_adc_gpio_configure_expander_disable(void)
4754{
4755 int rc = 0;
4756
4757 gpio_set_value_cansleep(GPIO_PWR_MON_RESET_N, 0);
4758 gpio_free(GPIO_PWR_MON_RESET_N);
4759
4760 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4761 gpio_free(GPIO_EPM_SPI_ADC1_CS_N);
4762
4763 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4764 gpio_free(GPIO_EPM_SPI_ADC2_CS_N);
4765
4766 gpio_set_value_cansleep(GPIO_PWR_MON_START, 0);
4767 gpio_free(GPIO_PWR_MON_START);
4768
4769 gpio_direction_output(GPIO_ADC1_PWDN_N, 0);
4770 gpio_free(GPIO_ADC1_PWDN_N);
4771
4772 gpio_direction_output(GPIO_ADC2_PWDN_N, 0);
4773 gpio_free(GPIO_ADC2_PWDN_N);
4774
4775 gpio_set_value_cansleep(GPIO_PWR_MON_ENABLE, 0);
4776 gpio_free(GPIO_PWR_MON_ENABLE);
4777
4778 gpio_set_value_cansleep(GPIO_EPM_LVLSFT_EN, 0);
4779 gpio_free(GPIO_EPM_LVLSFT_EN);
4780
4781 gpio_set_value_cansleep(GPIO_EPM_5V_BOOST_EN, 0);
4782 gpio_free(GPIO_EPM_5V_BOOST_EN);
4783
4784 gpio_set_value_cansleep(GPIO_EPM_3_3V_EN, 0);
4785 gpio_free(GPIO_EPM_3_3V_EN);
4786
4787 rc = regulator_disable(vreg_adc_epm1);
4788 if (rc)
4789 printk(KERN_DEBUG "msm_adc_gpio_configure_expander_disable: "
4790 "Error while enabling regulator for epm s3 %d\n", rc);
4791 regulator_put(vreg_adc_epm1);
4792
4793 printk(KERN_DEBUG "Exi msm_adc_gpio_configure_expander_disable\n");
4794 return rc;
4795};
4796
4797unsigned int msm_adc_gpio_expander_enable(int cs_enable)
4798{
4799 int rc = 0;
4800
4801 printk(KERN_DEBUG "msm_adc_gpio_expander_enable: cs_enable = %d",
4802 cs_enable);
4803
4804 if (cs_enable < 16) {
4805 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 0);
4806 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4807 } else {
4808 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 0);
4809 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4810 }
4811 return rc;
4812};
4813
4814unsigned int msm_adc_gpio_expander_disable(int cs_disable)
4815{
4816 int rc = 0;
4817
4818 printk(KERN_DEBUG "Enter msm_adc_gpio_expander_disable.\n");
4819
4820 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC1_CS_N, 1);
4821
4822 gpio_set_value_cansleep(GPIO_EPM_SPI_ADC2_CS_N, 1);
4823
4824 return rc;
4825};
4826#endif
4827
4828static struct msm_adc_channels msm_adc_channels_data[] = {
4829 {"vbatt", CHANNEL_ADC_VBATT, 0, &xoadc_fn, CHAN_PATH_TYPE2,
4830 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4831 {"vcoin", CHANNEL_ADC_VCOIN, 0, &xoadc_fn, CHAN_PATH_TYPE1,
4832 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4833 {"vcharger_channel", CHANNEL_ADC_VCHG, 0, &xoadc_fn, CHAN_PATH_TYPE3,
4834 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE4, scale_default},
4835 {"charger_current_monitor", CHANNEL_ADC_CHG_MONITOR, 0, &xoadc_fn,
4836 CHAN_PATH_TYPE4,
4837 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4838 {"vph_pwr", CHANNEL_ADC_VPH_PWR, 0, &xoadc_fn, CHAN_PATH_TYPE5,
4839 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4840 {"usb_vbus", CHANNEL_ADC_USB_VBUS, 0, &xoadc_fn, CHAN_PATH_TYPE11,
4841 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE3, scale_default},
4842 {"pmic_therm", CHANNEL_ADC_DIE_TEMP, 0, &xoadc_fn, CHAN_PATH_TYPE12,
4843 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_pmic_therm},
4844 {"pmic_therm_4K", CHANNEL_ADC_DIE_TEMP_4K, 0, &xoadc_fn,
4845 CHAN_PATH_TYPE12,
4846 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE7, scale_pmic_therm},
4847 {"xo_therm", CHANNEL_ADC_XOTHERM, 0, &xoadc_fn, CHAN_PATH_TYPE_NONE,
4848 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE5, tdkntcgtherm},
4849 {"xo_therm_4K", CHANNEL_ADC_XOTHERM_4K, 0, &xoadc_fn,
4850 CHAN_PATH_TYPE_NONE,
4851 ADC_CONFIG_TYPE1, ADC_CALIB_CONFIG_TYPE6, tdkntcgtherm},
4852 {"hdset_detect", CHANNEL_ADC_HDSET, 0, &xoadc_fn, CHAN_PATH_TYPE6,
4853 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1, scale_default},
4854 {"chg_batt_amon", CHANNEL_ADC_BATT_AMON, 0, &xoadc_fn, CHAN_PATH_TYPE10,
4855 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE1,
4856 scale_xtern_chgr_cur},
4857 {"msm_therm", CHANNEL_ADC_MSM_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE8,
4858 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_msm_therm},
4859 {"batt_therm", CHANNEL_ADC_BATT_THERM, 0, &xoadc_fn, CHAN_PATH_TYPE7,
4860 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_batt_therm},
4861 {"batt_id", CHANNEL_ADC_BATT_ID, 0, &xoadc_fn, CHAN_PATH_TYPE9,
4862 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4863 {"ref_625mv", CHANNEL_ADC_625_REF, 0, &xoadc_fn, CHAN_PATH_TYPE15,
4864 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4865 {"ref_1250mv", CHANNEL_ADC_1250_REF, 0, &xoadc_fn, CHAN_PATH_TYPE13,
4866 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4867 {"ref_325mv", CHANNEL_ADC_325_REF, 0, &xoadc_fn, CHAN_PATH_TYPE14,
4868 ADC_CONFIG_TYPE2, ADC_CALIB_CONFIG_TYPE2, scale_default},
4869};
4870
4871static char *msm_adc_fluid_device_names[] = {
4872 "ADS_ADC1",
4873 "ADS_ADC2",
4874};
4875
4876static struct msm_adc_platform_data msm_adc_pdata = {
4877 .channel = msm_adc_channels_data,
4878 .num_chan_supported = ARRAY_SIZE(msm_adc_channels_data),
4879#if defined(CONFIG_I2C) && \
4880 (defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE))
4881 .adc_gpio_enable = msm_adc_gpio_expander_enable,
4882 .adc_gpio_disable = msm_adc_gpio_expander_disable,
4883 .adc_fluid_enable = msm_adc_gpio_configure_expander_enable,
4884 .adc_fluid_disable = msm_adc_gpio_configure_expander_disable,
4885#endif
4886};
4887
4888static struct platform_device msm_adc_device = {
4889 .name = "msm_adc",
4890 .id = -1,
4891 .dev = {
4892 .platform_data = &msm_adc_pdata,
4893 },
4894};
4895
4896static void pmic8058_xoadc_mpp_config(void)
4897{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304898 int rc, i;
4899 struct pm8xxx_mpp_init_info xoadc_mpps[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304900 PM8058_MPP_INIT(XOADC_MPP_3, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304901 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304902 PM8058_MPP_INIT(XOADC_MPP_5, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH9,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304903 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304904 PM8058_MPP_INIT(XOADC_MPP_7, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH6,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304905 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304906 PM8058_MPP_INIT(XOADC_MPP_8, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH8,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304907 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304908 PM8058_MPP_INIT(XOADC_MPP_10, A_INPUT, PM8XXX_MPP_AIN_AMUX_CH7,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304909 AOUT_CTRL_DISABLE),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05304910 PM8901_MPP_INIT(XOADC_MPP_4, D_OUTPUT, PM8901_MPP_DIG_LEVEL_S4,
4911 DOUT_CTRL_LOW),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304912 };
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004913
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304914 for (i = 0; i < ARRAY_SIZE(xoadc_mpps); i++) {
4915 rc = pm8xxx_mpp_config(xoadc_mpps[i].mpp,
4916 &xoadc_mpps[i].config);
4917 if (rc) {
4918 pr_err("%s: Config MPP %d of PM8058 failed\n",
4919 __func__, xoadc_mpps[i].mpp);
4920 }
4921 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004922}
4923
4924static struct regulator *vreg_ldo18_adc;
4925
4926static int pmic8058_xoadc_vreg_config(int on)
4927{
4928 int rc;
4929
4930 if (on) {
4931 rc = regulator_enable(vreg_ldo18_adc);
4932 if (rc)
4933 pr_err("%s: Enable of regulator ldo18_adc "
4934 "failed\n", __func__);
4935 } else {
4936 rc = regulator_disable(vreg_ldo18_adc);
4937 if (rc)
4938 pr_err("%s: Disable of regulator ldo18_adc "
4939 "failed\n", __func__);
4940 }
4941
4942 return rc;
4943}
4944
4945static int pmic8058_xoadc_vreg_setup(void)
4946{
4947 int rc;
4948
4949 vreg_ldo18_adc = regulator_get(NULL, "8058_l18");
4950 if (IS_ERR(vreg_ldo18_adc)) {
4951 printk(KERN_ERR "%s: vreg get failed (%ld)\n",
4952 __func__, PTR_ERR(vreg_ldo18_adc));
4953 rc = PTR_ERR(vreg_ldo18_adc);
4954 goto fail;
4955 }
4956
4957 rc = regulator_set_voltage(vreg_ldo18_adc, 2200000, 2200000);
4958 if (rc) {
4959 pr_err("%s: unable to set ldo18 voltage to 2.2V\n", __func__);
4960 goto fail;
4961 }
4962
4963 return rc;
4964fail:
4965 regulator_put(vreg_ldo18_adc);
4966 return rc;
4967}
4968
4969static void pmic8058_xoadc_vreg_shutdown(void)
4970{
4971 regulator_put(vreg_ldo18_adc);
4972}
4973
4974/* usec. For this ADC,
4975 * this time represents clk rate @ txco w/ 1024 decimation ratio.
4976 * Each channel has different configuration, thus at the time of starting
4977 * the conversion, xoadc will return actual conversion time
4978 * */
4979static struct adc_properties pm8058_xoadc_data = {
4980 .adc_reference = 2200, /* milli-voltage for this adc */
4981 .bitresolution = 15,
4982 .bipolar = 0,
4983 .conversiontime = 54,
4984};
4985
Anirudh Ghayalc2019332011-11-12 06:29:10 +05304986static struct xoadc_platform_data pm8058_xoadc_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07004987 .xoadc_prop = &pm8058_xoadc_data,
4988 .xoadc_mpp_config = pmic8058_xoadc_mpp_config,
4989 .xoadc_vreg_set = pmic8058_xoadc_vreg_config,
4990 .xoadc_num = XOADC_PMIC_0,
4991 .xoadc_vreg_setup = pmic8058_xoadc_vreg_setup,
4992 .xoadc_vreg_shutdown = pmic8058_xoadc_vreg_shutdown,
4993};
4994#endif
4995
4996#ifdef CONFIG_MSM_SDIO_AL
4997
4998static unsigned mdm2ap_status = 140;
4999
5000static int configure_mdm2ap_status(int on)
5001{
5002 int ret = 0;
5003 if (on)
5004 ret = msm_gpiomux_get(mdm2ap_status);
5005 else
5006 ret = msm_gpiomux_put(mdm2ap_status);
5007
5008 if (ret)
5009 pr_err("%s: mdm2ap_status config failed, on = %d\n", __func__,
5010 on);
5011
5012 return ret;
5013}
5014
5015
5016static int get_mdm2ap_status(void)
5017{
5018 return gpio_get_value(mdm2ap_status);
5019}
5020
5021static struct sdio_al_platform_data sdio_al_pdata = {
5022 .config_mdm2ap_status = configure_mdm2ap_status,
5023 .get_mdm2ap_status = get_mdm2ap_status,
5024 .allow_sdioc_version_major_2 = 0,
Konstantin Dorfmanee2e3082011-08-16 15:12:01 +03005025 .peer_sdioc_version_minor = 0x0202,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005026 .peer_sdioc_version_major = 0x0004,
5027 .peer_sdioc_boot_version_minor = 0x0001,
5028 .peer_sdioc_boot_version_major = 0x0003
5029};
5030
5031struct platform_device msm_device_sdio_al = {
5032 .name = "msm_sdio_al",
5033 .id = -1,
5034 .dev = {
Maya Erez6862b142011-08-22 09:07:07 +03005035 .parent = &msm_charm_modem.dev,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005036 .platform_data = &sdio_al_pdata,
5037 },
5038};
5039
5040#endif /* CONFIG_MSM_SDIO_AL */
5041
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305042#define GPIO_VREG_ID_EXT_5V 0
5043
5044static struct regulator_consumer_supply vreg_consumers_EXT_5V[] = {
5045 REGULATOR_SUPPLY("ext_5v", NULL),
5046 REGULATOR_SUPPLY("8901_mpp0", NULL),
5047};
5048
5049#define GPIO_VREG_INIT(_id, _reg_name, _gpio_label, _gpio, _active_low) \
5050 [GPIO_VREG_ID_##_id] = { \
5051 .init_data = { \
5052 .constraints = { \
5053 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
5054 }, \
5055 .num_consumer_supplies = \
5056 ARRAY_SIZE(vreg_consumers_##_id), \
5057 .consumer_supplies = vreg_consumers_##_id, \
5058 }, \
5059 .regulator_name = _reg_name, \
5060 .active_low = _active_low, \
5061 .gpio_label = _gpio_label, \
5062 .gpio = _gpio, \
5063 }
5064
5065/* GPIO regulator constraints */
5066static struct gpio_regulator_platform_data msm_gpio_regulator_pdata[] = {
5067 GPIO_VREG_INIT(EXT_5V, "ext_5v", "ext_5v_en",
5068 PM8901_MPP_PM_TO_SYS(0), 0),
5069};
5070
5071/* GPIO regulator */
5072static struct platform_device msm8x60_8901_mpp_vreg __devinitdata = {
5073 .name = GPIO_REGULATOR_DEV_NAME,
5074 .id = PM8901_MPP_PM_TO_SYS(0),
5075 .dev = {
5076 .platform_data =
5077 &msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V],
5078 },
5079};
5080
5081static void __init pm8901_vreg_mpp0_init(void)
5082{
5083 int rc;
5084
5085 struct pm8xxx_mpp_init_info pm8901_vreg_mpp0 = {
5086 .mpp = PM8901_MPP_PM_TO_SYS(0),
5087 .config = {
5088 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
5089 .level = PM8901_MPP_DIG_LEVEL_VPH,
5090 },
5091 };
5092
5093 /*
5094 * Set PMIC 8901 MPP0 active_high to 0 for surf and charm_surf. This
5095 * implies that the regulator connected to MPP0 is enabled when
5096 * MPP0 is low.
5097 */
5098 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion()) {
5099 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 1;
5100 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_HIGH;
5101 } else {
5102 msm_gpio_regulator_pdata[GPIO_VREG_ID_EXT_5V].active_low = 0;
5103 pm8901_vreg_mpp0.config.control = PM8XXX_MPP_DOUT_CTRL_LOW;
5104 }
5105
5106 rc = pm8xxx_mpp_config(pm8901_vreg_mpp0.mpp, &pm8901_vreg_mpp0.config);
5107 if (rc)
5108 pr_err("%s: pm8xxx_mpp_config: rc=%d\n", __func__, rc);
5109}
5110
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005111static struct platform_device *charm_devices[] __initdata = {
5112 &msm_charm_modem,
5113#ifdef CONFIG_MSM_SDIO_AL
5114 &msm_device_sdio_al,
5115#endif
5116};
5117
Lei Zhou338cab82011-08-19 13:38:17 -04005118#ifdef CONFIG_SND_SOC_MSM8660_APQ
5119static struct platform_device *dragon_alsa_devices[] __initdata = {
5120 &msm_pcm,
5121 &msm_pcm_routing,
5122 &msm_cpudai0,
5123 &msm_cpudai1,
5124 &msm_cpudai_hdmi_rx,
5125 &msm_cpudai_bt_rx,
5126 &msm_cpudai_bt_tx,
5127 &msm_cpudai_fm_rx,
5128 &msm_cpudai_fm_tx,
5129 &msm_cpu_fe,
5130 &msm_stub_codec,
5131 &msm_lpa_pcm,
5132};
5133#endif
5134
5135static struct platform_device *asoc_devices[] __initdata = {
5136 &asoc_msm_pcm,
5137 &asoc_msm_dai0,
5138 &asoc_msm_dai1,
5139};
5140
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005141static struct platform_device *surf_devices[] __initdata = {
5142 &msm_device_smd,
5143 &msm_device_uart_dm12,
Stephen Boyd3acc9e42011-09-28 16:46:40 -07005144 &msm_pil_q6v3,
Stephen Boyd4eb885b2011-09-29 01:16:03 -07005145 &msm_pil_modem,
Stephen Boydd89eebe2011-09-28 23:28:11 -07005146 &msm_pil_tzapps,
Stephen Boyd25c4a0b2011-09-20 00:12:36 -07005147 &msm_pil_dsps,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005148#ifdef CONFIG_I2C_QUP
5149 &msm_gsbi3_qup_i2c_device,
5150 &msm_gsbi4_qup_i2c_device,
5151 &msm_gsbi7_qup_i2c_device,
5152 &msm_gsbi8_qup_i2c_device,
5153 &msm_gsbi9_qup_i2c_device,
5154 &msm_gsbi12_qup_i2c_device,
5155#endif
5156#ifdef CONFIG_SERIAL_MSM_HS
5157 &msm_device_uart_dm1,
5158#endif
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305159#ifdef CONFIG_MSM_SSBI
5160 &msm_device_ssbi_pmic1,
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05305161 &msm_device_ssbi_pmic2,
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05305162#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005163#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005164 &msm_device_ssbi3,
5165#endif
5166#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
5167 &isp1763_device,
5168#endif
5169
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005170#if defined (CONFIG_MSM_8x60_VOIP)
5171 &asoc_msm_mvs,
5172 &asoc_mvs_dai0,
5173 &asoc_mvs_dai1,
5174#endif
Lei Zhou338cab82011-08-19 13:38:17 -04005175
Lena Salman57d167e2012-03-21 19:46:38 +02005176#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005177 &msm_device_otg,
5178#endif
Lena Salman57d167e2012-03-21 19:46:38 +02005179#ifdef CONFIG_USB_MSM_72K
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005180 &msm_device_gadget_peripheral,
5181#endif
5182#ifdef CONFIG_USB_G_ANDROID
5183 &android_usb_device,
5184#endif
5185#ifdef CONFIG_BATTERY_MSM
5186 &msm_batt_device,
5187#endif
5188#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005189#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005190 &android_pmem_device,
5191 &android_pmem_adsp_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005192 &android_pmem_smipool_device,
5193#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005194 &android_pmem_audio_device,
5195#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005196#ifdef CONFIG_MSM_ROTATOR
5197 &msm_rotator_device,
5198#endif
5199 &msm_fb_device,
5200 &msm_kgsl_3d0,
5201 &msm_kgsl_2d0,
5202 &msm_kgsl_2d1,
5203 &lcdc_samsung_panel_device,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005204#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5205 &lcdc_nt35582_panel_device,
5206#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005207#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
5208 &lcdc_samsung_oled_panel_device,
5209#endif
5210#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
5211 &lcdc_auo_wvga_panel_device,
5212#endif
5213#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
5214 &hdmi_msm_device,
5215#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
5216#ifdef CONFIG_FB_MSM_MIPI_DSI
5217 &mipi_dsi_toshiba_panel_device,
5218 &mipi_dsi_novatek_panel_device,
5219#endif
5220#ifdef CONFIG_MSM_CAMERA
5221#ifdef CONFIG_MT9E013
5222 &msm_camera_sensor_mt9e013,
5223#endif
5224#ifdef CONFIG_IMX074
5225 &msm_camera_sensor_imx074,
5226#endif
5227#ifdef CONFIG_WEBCAM_OV7692
5228 &msm_camera_sensor_webcam_ov7692,
5229#endif
5230#ifdef CONFIG_WEBCAM_OV9726
5231 &msm_camera_sensor_webcam_ov9726,
5232#endif
5233#ifdef CONFIG_QS_S5K4E1
5234 &msm_camera_sensor_qs_s5k4e1,
5235#endif
Jilai Wang971f97f2011-07-13 14:25:25 -04005236#ifdef CONFIG_VX6953
5237 &msm_camera_sensor_vx6953,
5238#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005239#endif
5240#ifdef CONFIG_MSM_GEMINI
5241 &msm_gemini_device,
5242#endif
5243#ifdef CONFIG_MSM_VPE
5244 &msm_vpe_device,
5245#endif
5246
5247#if defined(CONFIG_MSM_RPM_LOG) || defined(CONFIG_MSM_RPM_LOG_MODULE)
Praveen Chidambaram78499012011-11-01 17:15:17 -06005248 &msm8660_rpm_log_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005249#endif
5250#if defined(CONFIG_MSM_RPM_STATS_LOG)
Praveen Chidambaram78499012011-11-01 17:15:17 -06005251 &msm8660_rpm_stat_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005252#endif
5253 &msm_device_vidc,
5254#if (defined(CONFIG_MARIMBA_CORE)) && \
5255 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
5256 &msm_bt_power_device,
5257#endif
5258#ifdef CONFIG_SENSORS_MSM_ADC
5259 &msm_adc_device,
5260#endif
David Collins6f032ba2011-08-31 14:08:15 -07005261 &rpm_regulator_device,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005262
5263#if defined(CONFIG_CRYPTO_DEV_QCRYPTO) || \
5264 defined(CONFIG_CRYPTO_DEV_QCRYPTO_MODULE)
5265 &qcrypto_device,
5266#endif
5267
5268#if defined(CONFIG_CRYPTO_DEV_QCEDEV) || \
5269 defined(CONFIG_CRYPTO_DEV_QCEDEV_MODULE)
5270 &qcedev_device,
5271#endif
5272
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005273
5274#if defined(CONFIG_TSIF) || defined(CONFIG_TSIF_MODULE)
5275#ifdef CONFIG_MSM_USE_TSIF1
5276 &msm_device_tsif[1],
5277#else
5278 &msm_device_tsif[0],
5279#endif /* CONFIG_MSM_USE_TSIF1 */
5280#endif /* CONFIG_TSIF */
5281
5282#ifdef CONFIG_HW_RANDOM_MSM
5283 &msm_device_rng,
5284#endif
5285
5286 &msm_tsens_device,
Praveen Chidambaram78499012011-11-01 17:15:17 -06005287 &msm8660_rpm_device,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005288#ifdef CONFIG_ION_MSM
5289 &ion_dev,
5290#endif
Jeff Ohlstein7e668552011-10-06 16:17:25 -07005291 &msm8660_device_watchdog,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005292};
5293
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005294#ifdef CONFIG_ION_MSM
Olav Haugan0703dbf2011-12-19 17:53:38 -08005295#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5296static struct ion_cp_heap_pdata cp_mm_ion_pdata = {
5297 .permission_type = IPT_TYPE_MM_CARVEOUT,
Olav Haugan42ebe712012-01-10 16:30:58 -08005298 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005299 .request_region = request_smi_region,
5300 .release_region = release_smi_region,
5301 .setup_region = setup_smi_region,
5302};
5303
5304static struct ion_cp_heap_pdata cp_mfc_ion_pdata = {
5305 .permission_type = IPT_TYPE_MFC_SHAREDMEM,
Olav Haugan42ebe712012-01-10 16:30:58 -08005306 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005307 .request_region = request_smi_region,
5308 .release_region = release_smi_region,
5309 .setup_region = setup_smi_region,
5310};
5311
5312static struct ion_cp_heap_pdata cp_wb_ion_pdata = {
5313 .permission_type = IPT_TYPE_MDP_WRITEBACK,
Olav Haugan42ebe712012-01-10 16:30:58 -08005314 .align = PAGE_SIZE,
5315};
5316
5317static struct ion_co_heap_pdata fw_co_ion_pdata = {
5318 .adjacent_mem_id = ION_CP_MM_HEAP_ID,
5319 .align = SZ_128K,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005320};
5321
5322static struct ion_co_heap_pdata co_ion_pdata = {
Olav Haugan42ebe712012-01-10 16:30:58 -08005323 .adjacent_mem_id = INVALID_HEAP_ID,
5324 .align = PAGE_SIZE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005325};
5326#endif
Olav Haugan9cdfc2f2012-02-15 09:52:57 -08005327
5328/**
5329 * These heaps are listed in the order they will be allocated. Due to
5330 * video hardware restrictions and content protection the FW heap has to
5331 * be allocated adjacent (below) the MM heap and the MFC heap has to be
5332 * allocated after the MM heap to ensure MFC heap is not more than 256MB
5333 * away from the base address of the FW heap.
5334 * However, the order of FW heap and MM heap doesn't matter since these
5335 * two heaps are taken care of by separate code to ensure they are adjacent
5336 * to each other.
5337 * Don't swap the order unless you know what you are doing!
5338 */
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005339static struct ion_platform_data ion_pdata = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005340 .nr = MSM_ION_HEAP_NUM,
5341 .heaps = {
5342 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005343 .id = ION_SYSTEM_HEAP_ID,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005344 .type = ION_HEAP_TYPE_SYSTEM,
5345 .name = ION_VMALLOC_HEAP_NAME,
5346 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005347#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
5348 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005349 .id = ION_CP_MM_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005350 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005351 .name = ION_MM_HEAP_NAME,
5352 .size = MSM_ION_MM_SIZE,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005353 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005354 .extra_data = (void *) &cp_mm_ion_pdata,
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005355 },
Olav Hauganb5be7992011-11-18 14:29:02 -08005356 {
Olav Haugan42ebe712012-01-10 16:30:58 -08005357 .id = ION_MM_FIRMWARE_HEAP_ID,
5358 .type = ION_HEAP_TYPE_CARVEOUT,
5359 .name = ION_MM_FIRMWARE_HEAP_NAME,
5360 .size = MSM_ION_MM_FW_SIZE,
5361 .memory_type = ION_SMI_TYPE,
5362 .extra_data = (void *) &fw_co_ion_pdata,
5363 },
5364 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005365 .id = ION_CP_MFC_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005366 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005367 .name = ION_MFC_HEAP_NAME,
5368 .size = MSM_ION_MFC_SIZE,
5369 .memory_type = ION_SMI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005370 .extra_data = (void *) &cp_mfc_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005371 },
5372 {
Olav Haugan9cdfc2f2012-02-15 09:52:57 -08005373 .id = ION_SF_HEAP_ID,
5374 .type = ION_HEAP_TYPE_CARVEOUT,
5375 .name = ION_SF_HEAP_NAME,
5376 .size = MSM_ION_SF_SIZE,
5377 .memory_type = ION_EBI_TYPE,
5378 .extra_data = (void *)&co_ion_pdata,
5379 },
5380 {
5381 .id = ION_CAMERA_HEAP_ID,
5382 .type = ION_HEAP_TYPE_CARVEOUT,
5383 .name = ION_CAMERA_HEAP_NAME,
5384 .size = MSM_ION_CAMERA_SIZE,
5385 .memory_type = ION_EBI_TYPE,
5386 .extra_data = &co_ion_pdata,
5387 },
5388 {
Olav Hauganb5be7992011-11-18 14:29:02 -08005389 .id = ION_CP_WB_HEAP_ID,
Olav Haugan0a852512012-01-09 10:20:55 -08005390 .type = ION_HEAP_TYPE_CP,
Olav Hauganb5be7992011-11-18 14:29:02 -08005391 .name = ION_WB_HEAP_NAME,
5392 .size = MSM_ION_WB_SIZE,
5393 .memory_type = ION_EBI_TYPE,
Olav Haugan0703dbf2011-12-19 17:53:38 -08005394 .extra_data = (void *) &cp_wb_ion_pdata,
Olav Hauganb5be7992011-11-18 14:29:02 -08005395 },
Olav Haugan3a55e322012-01-23 14:24:01 -08005396 {
Olav Haugan6ab47252012-02-15 14:46:49 -08005397 .id = ION_QSECOM_HEAP_ID,
5398 .type = ION_HEAP_TYPE_CARVEOUT,
5399 .name = ION_QSECOM_HEAP_NAME,
5400 .size = MSM_ION_QSECOM_SIZE,
5401 .memory_type = ION_EBI_TYPE,
5402 .extra_data = (void *) &co_ion_pdata,
5403 },
5404 {
Olav Haugan3a55e322012-01-23 14:24:01 -08005405 .id = ION_AUDIO_HEAP_ID,
5406 .type = ION_HEAP_TYPE_CARVEOUT,
5407 .name = ION_AUDIO_HEAP_NAME,
5408 .size = MSM_ION_AUDIO_SIZE,
5409 .memory_type = ION_EBI_TYPE,
5410 .extra_data = (void *)&co_ion_pdata,
5411 },
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005412#endif
5413 }
5414};
5415
Stepan Moskovchenkofc70d902011-11-30 12:39:36 -08005416static struct platform_device ion_dev = {
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005417 .name = "ion-msm",
5418 .id = 1,
5419 .dev = { .platform_data = &ion_pdata },
5420};
5421#endif
5422
5423
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005424static struct memtype_reserve msm8x60_reserve_table[] __initdata = {
5425 /* Kernel SMI memory pool for video core, used for firmware */
5426 /* and encoder, decoder scratch buffers */
5427 /* Kernel SMI memory pool should always precede the user space */
5428 /* SMI memory pool, as the video core will use offset address */
5429 /* from the Firmware base */
5430 [MEMTYPE_SMI_KERNEL] = {
5431 .start = KERNEL_SMI_BASE,
5432 .limit = KERNEL_SMI_SIZE,
5433 .size = KERNEL_SMI_SIZE,
5434 .flags = MEMTYPE_FLAGS_FIXED,
5435 },
5436 /* User space SMI memory pool for video core */
5437 /* used for encoder, decoder input & output buffers */
5438 [MEMTYPE_SMI] = {
5439 .start = USER_SMI_BASE,
5440 .limit = USER_SMI_SIZE,
5441 .flags = MEMTYPE_FLAGS_FIXED,
5442 },
5443 [MEMTYPE_EBI0] = {
5444 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5445 },
5446 [MEMTYPE_EBI1] = {
5447 .flags = MEMTYPE_FLAGS_1M_ALIGN,
5448 },
5449};
5450
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005451static void reserve_ion_memory(void)
5452{
5453#if defined(CONFIG_ION_MSM) && defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005454 unsigned int i;
5455
5456 if (hdmi_is_primary) {
5457 msm_ion_sf_size = MSM_HDMI_PRIM_ION_SF_SIZE;
5458 for (i = 0; i < ion_pdata.nr; i++) {
5459 if (ion_pdata.heaps[i].id == ION_SF_HEAP_ID) {
5460 ion_pdata.heaps[i].size = msm_ion_sf_size;
5461 pr_debug("msm_ion_sf_size 0x%x\n",
5462 msm_ion_sf_size);
5463 break;
5464 }
5465 }
5466 }
5467
5468 msm8x60_reserve_table[MEMTYPE_EBI1].size += msm_ion_sf_size;
Olav Haugan42ebe712012-01-10 16:30:58 -08005469 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_FW_SIZE;
Olav Hauganb5be7992011-11-18 14:29:02 -08005470 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MM_SIZE;
5471 msm8x60_reserve_table[MEMTYPE_SMI].size += MSM_ION_MFC_SIZE;
5472 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_CAMERA_SIZE;
5473 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_WB_SIZE;
Olav Haugan3a55e322012-01-23 14:24:01 -08005474 msm8x60_reserve_table[MEMTYPE_EBI1].size += MSM_ION_AUDIO_SIZE;
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005475#endif
5476}
5477
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005478static void __init size_pmem_devices(void)
5479{
5480#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005481#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005482 android_pmem_adsp_pdata.size = pmem_adsp_size;
5483 android_pmem_smipool_pdata.size = MSM_PMEM_SMIPOOL_SIZE;
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005484
5485 if (hdmi_is_primary)
5486 pmem_sf_size = MSM_HDMI_PRIM_PMEM_SF_SIZE;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005487 android_pmem_pdata.size = pmem_sf_size;
5488#endif
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005489 android_pmem_audio_pdata.size = MSM_PMEM_AUDIO_SIZE;
5490#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005491}
5492
5493static void __init reserve_memory_for(struct android_pmem_platform_data *p)
5494{
5495 msm8x60_reserve_table[p->memory_type].size += p->size;
5496}
5497
5498static void __init reserve_pmem_memory(void)
5499{
5500#ifdef CONFIG_ANDROID_PMEM
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005501#ifndef CONFIG_MSM_MULTIMEDIA_USE_ION
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005502 reserve_memory_for(&android_pmem_adsp_pdata);
5503 reserve_memory_for(&android_pmem_smipool_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005504 reserve_memory_for(&android_pmem_pdata);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005505#endif
5506 reserve_memory_for(&android_pmem_audio_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005507 msm8x60_reserve_table[MEMTYPE_EBI1].size += pmem_kernel_ebi1_size;
5508#endif
5509}
5510
Huaibin Yanga5419422011-12-08 23:52:10 -08005511static void __init reserve_mdp_memory(void);
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005512
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005513static void __init msm8x60_calculate_reserve_sizes(void)
5514{
5515 size_pmem_devices();
5516 reserve_pmem_memory();
Laura Abbott63cfd7e2011-10-10 18:21:01 -07005517 reserve_ion_memory();
Huaibin Yanga5419422011-12-08 23:52:10 -08005518 reserve_mdp_memory();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005519}
5520
5521static int msm8x60_paddr_to_memtype(unsigned int paddr)
5522{
5523 if (paddr >= 0x40000000 && paddr < 0x60000000)
5524 return MEMTYPE_EBI1;
5525 if (paddr >= 0x38000000 && paddr < 0x40000000)
5526 return MEMTYPE_SMI;
5527 return MEMTYPE_NONE;
5528}
5529
5530static struct reserve_info msm8x60_reserve_info __initdata = {
5531 .memtype_reserve_table = msm8x60_reserve_table,
5532 .calculate_reserve_sizes = msm8x60_calculate_reserve_sizes,
5533 .paddr_to_memtype = msm8x60_paddr_to_memtype,
5534};
5535
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005536static char prim_panel_name[PANEL_NAME_MAX_LEN];
5537static char ext_panel_name[PANEL_NAME_MAX_LEN];
5538static int __init prim_display_setup(char *param)
5539{
5540 if (strnlen(param, PANEL_NAME_MAX_LEN))
5541 strlcpy(prim_panel_name, param, PANEL_NAME_MAX_LEN);
5542 return 0;
5543}
5544early_param("prim_display", prim_display_setup);
5545
5546static int __init ext_display_setup(char *param)
5547{
5548 if (strnlen(param, PANEL_NAME_MAX_LEN))
5549 strlcpy(ext_panel_name, param, PANEL_NAME_MAX_LEN);
5550 return 0;
5551}
5552early_param("ext_display", ext_display_setup);
5553
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005554static void __init msm8x60_reserve(void)
5555{
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08005556 msm8x60_set_display_params(prim_panel_name, ext_panel_name);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005557 reserve_info = &msm8x60_reserve_info;
5558 msm_reserve();
5559}
5560
5561#define EXT_CHG_VALID_MPP 10
5562#define EXT_CHG_VALID_MPP_2 11
5563
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305564static struct pm8xxx_mpp_init_info isl_mpp[] = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305565 PM8058_MPP_INIT(EXT_CHG_VALID_MPP, D_INPUT,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305566 PM8058_MPP_DIG_LEVEL_S3, DIN_TO_INT),
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05305567 PM8058_MPP_INIT(EXT_CHG_VALID_MPP_2, D_BI_DIR,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305568 PM8058_MPP_DIG_LEVEL_S3, BI_PULLUP_10KOHM),
5569};
5570
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005571#ifdef CONFIG_ISL9519_CHARGER
5572static int isl_detection_setup(void)
5573{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305574 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005575
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305576 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5577 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5578 &isl_mpp[i].config);
5579 if (ret) {
5580 pr_err("%s: Config MPP %d of PM8058 failed\n",
5581 __func__, isl_mpp[i].mpp);
5582 return ret;
5583 }
5584 }
5585
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005586 return ret;
5587}
5588
5589static struct isl_platform_data isl_data __initdata = {
5590 .chgcurrent = 700,
5591 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5592 .chg_detection_config = isl_detection_setup,
5593 .max_system_voltage = 4200,
5594 .min_system_voltage = 3200,
5595 .term_current = 120,
5596 .input_current = 2048,
5597};
5598
5599static struct i2c_board_info isl_charger_i2c_info[] __initdata = {
5600 {
5601 I2C_BOARD_INFO("isl9519q", 0x9),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305602 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005603 .platform_data = &isl_data,
5604 },
5605};
5606#endif
5607
5608#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
5609static int smb137b_detection_setup(void)
5610{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305611 int ret = 0, i;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005612
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305613 for (i = 0; i < ARRAY_SIZE(isl_mpp); i++) {
5614 ret = pm8xxx_mpp_config(isl_mpp[i].mpp,
5615 &isl_mpp[i].config);
5616 if (ret) {
5617 pr_err("%s: Config MPP %d of PM8058 failed\n",
5618 __func__, isl_mpp[i].mpp);
5619 return ret;
5620 }
5621 }
5622
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005623 return ret;
5624}
5625
5626static struct smb137b_platform_data smb137b_data __initdata = {
5627 .chg_detection_config = smb137b_detection_setup,
5628 .valid_n_gpio = PM8058_MPP_PM_TO_SYS(10),
5629 .batt_mah_rating = 950,
5630};
5631
5632static struct i2c_board_info smb137b_charger_i2c_info[] __initdata = {
5633 {
5634 I2C_BOARD_INFO("smb137b", 0x08),
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305635 .irq = PM8058_IRQ_BASE + PM8058_CBLPWR_IRQ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005636 .platform_data = &smb137b_data,
5637 },
5638};
5639#endif
5640
5641#ifdef CONFIG_PMIC8058
5642#define PMIC_GPIO_SDC3_DET 22
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305643#define PMIC_GPIO_TOUCH_DISC_INTR 5
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005644
5645static int pm8058_gpios_init(void)
5646{
5647 int i;
5648 int rc;
5649 struct pm8058_gpio_cfg {
5650 int gpio;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305651 struct pm_gpio cfg;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005652 };
5653
5654 struct pm8058_gpio_cfg gpio_cfgs[] = {
5655 { /* FFA ethernet */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305656 PM8058_GPIO_PM_TO_SYS(6),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005657 {
5658 .direction = PM_GPIO_DIR_IN,
5659 .pull = PM_GPIO_PULL_DN,
5660 .vin_sel = 2,
5661 .function = PM_GPIO_FUNC_NORMAL,
5662 .inv_int_pol = 0,
5663 },
5664 },
5665#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
5666 {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305667 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005668 {
5669 .direction = PM_GPIO_DIR_IN,
5670 .pull = PM_GPIO_PULL_UP_30,
5671 .vin_sel = 2,
5672 .function = PM_GPIO_FUNC_NORMAL,
5673 .inv_int_pol = 0,
5674 },
5675 },
5676#endif
5677 { /* core&surf gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305678 PM8058_GPIO_PM_TO_SYS(UI_INT1_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005679 {
5680 .direction = PM_GPIO_DIR_IN,
5681 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305682 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005683 .function = PM_GPIO_FUNC_NORMAL,
5684 .inv_int_pol = 0,
5685 },
5686 },
5687 { /* docking gpio expander */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305688 PM8058_GPIO_PM_TO_SYS(UI_INT2_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005689 {
5690 .direction = PM_GPIO_DIR_IN,
5691 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305692 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005693 .function = PM_GPIO_FUNC_NORMAL,
5694 .inv_int_pol = 0,
5695 },
5696 },
5697 { /* FHA/keypad gpio expanders */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305698 PM8058_GPIO_PM_TO_SYS(UI_INT3_N),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005699 {
5700 .direction = PM_GPIO_DIR_IN,
5701 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305702 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005703 .function = PM_GPIO_FUNC_NORMAL,
5704 .inv_int_pol = 0,
5705 },
5706 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005707 { /* Timpani Reset */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305708 PM8058_GPIO_PM_TO_SYS(20),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005709 {
5710 .direction = PM_GPIO_DIR_OUT,
5711 .output_value = 1,
5712 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5713 .pull = PM_GPIO_PULL_DN,
5714 .out_strength = PM_GPIO_STRENGTH_HIGH,
5715 .function = PM_GPIO_FUNC_NORMAL,
5716 .vin_sel = 2,
5717 .inv_int_pol = 0,
5718 }
5719 },
5720 { /* PMIC ID interrupt */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305721 PM8058_GPIO_PM_TO_SYS(36),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005722 {
5723 .direction = PM_GPIO_DIR_IN,
Anji jonnalaae745e92011-11-14 18:34:31 +05305724 .pull = PM_GPIO_PULL_NO,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005725 .function = PM_GPIO_FUNC_NORMAL,
5726 .vin_sel = 2,
5727 .inv_int_pol = 0,
5728 }
5729 },
5730 };
5731
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305732#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5733 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305734 struct pm_gpio touchdisc_intr_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305735 .direction = PM_GPIO_DIR_IN,
5736 .pull = PM_GPIO_PULL_UP_1P5,
5737 .vin_sel = 2,
5738 .function = PM_GPIO_FUNC_NORMAL,
5739 };
5740#endif
5741
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005742#if defined(CONFIG_HAPTIC_ISA1200) || \
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305743 defined(CONFIG_HAPTIC_ISA1200_MODULE)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305744 struct pm_gpio en_hap_gpio_cfg = {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305745 .direction = PM_GPIO_DIR_OUT,
5746 .pull = PM_GPIO_PULL_NO,
5747 .out_strength = PM_GPIO_STRENGTH_HIGH,
5748 .function = PM_GPIO_FUNC_NORMAL,
5749 .inv_int_pol = 0,
5750 .vin_sel = 2,
5751 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5752 .output_value = 0,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005753 };
5754#endif
5755
5756#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5757 struct pm8058_gpio_cfg line_in_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305758 PM8058_GPIO_PM_TO_SYS(18),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005759 {
5760 .direction = PM_GPIO_DIR_IN,
5761 .pull = PM_GPIO_PULL_UP_1P5,
5762 .vin_sel = 2,
5763 .function = PM_GPIO_FUNC_NORMAL,
5764 .inv_int_pol = 0,
5765 }
5766 };
5767#endif
5768
5769#if defined(CONFIG_QS_S5K4E1)
5770 {
5771 struct pm8058_gpio_cfg qs_hc37_cam_pd_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305772 PM8058_GPIO_PM_TO_SYS(26),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005773 {
5774 .direction = PM_GPIO_DIR_OUT,
5775 .output_value = 0,
5776 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5777 .pull = PM_GPIO_PULL_DN,
5778 .out_strength = PM_GPIO_STRENGTH_HIGH,
5779 .function = PM_GPIO_FUNC_NORMAL,
5780 .vin_sel = 2,
5781 .inv_int_pol = 0,
5782 }
5783 };
5784#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005785#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5786 struct pm8058_gpio_cfg pmic_lcdc_nt35582_gpio_cfg = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305787 PM8058_GPIO_PM_TO_SYS(GPIO_NT35582_BL_EN_HW_PIN - 1),
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005788 {
5789 .direction = PM_GPIO_DIR_OUT,
5790 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
5791 .output_value = 1,
5792 .pull = PM_GPIO_PULL_UP_30,
5793 /* 2.9V PM_GPIO_VIN_L2, which gives 2.6V */
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305794 .vin_sel = PM8058_GPIO_VIN_L5,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005795 .out_strength = PM_GPIO_STRENGTH_HIGH,
5796 .function = PM_GPIO_FUNC_NORMAL,
5797 .inv_int_pol = 0,
5798 }
5799 };
5800#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005801#if defined(CONFIG_HAPTIC_ISA1200) || \
5802 defined(CONFIG_HAPTIC_ISA1200_MODULE)
5803 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305804 rc = pm8xxx_gpio_config(
5805 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_ENABLE),
5806 &en_hap_gpio_cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005807 if (rc < 0) {
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305808 pr_err("%s: pmic haptics gpio config failed\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005809 __func__);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305810 }
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305811 rc = pm8xxx_gpio_config(
5812 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_HAP_LDO_ENABLE),
5813 &en_hap_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305814 if (rc < 0) {
5815 pr_err("%s: pmic haptics ldo gpio config failed\n",
5816 __func__);
5817 }
5818
5819 }
5820#endif
5821
5822#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
5823 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
5824 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
5825 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305826 rc = pm8xxx_gpio_config(
5827 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_TOUCH_DISC_INTR),
5828 &touchdisc_intr_gpio_cfg);
Mohan Pallaka4a1160d2011-09-09 15:17:45 +05305829 if (rc < 0) {
5830 pr_err("%s: Touchdisc interrupt gpio config failed\n",
5831 __func__);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005832 }
5833 }
5834#endif
5835
5836#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
5837 /* Line_in only for 8660 ffa & surf */
5838 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_surf() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04005839 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005840 machine_is_msm8x60_fusn_ffa()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305841 rc = pm8xxx_gpio_config(line_in_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005842 &line_in_gpio_cfg.cfg);
5843 if (rc < 0) {
5844 pr_err("%s pmic line_in gpio config failed\n",
5845 __func__);
5846 return rc;
5847 }
5848 }
5849#endif
5850
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005851#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
5852 if (machine_is_msm8x60_dragon()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305853 rc = pm8xxx_gpio_config(pmic_lcdc_nt35582_gpio_cfg.gpio,
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04005854 &pmic_lcdc_nt35582_gpio_cfg.cfg);
5855 if (rc < 0) {
5856 pr_err("%s pmic gpio config failed\n", __func__);
5857 return rc;
5858 }
5859 }
5860#endif
5861
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005862#if defined(CONFIG_QS_S5K4E1)
5863 /* qs_cam_hc37_cam_pd only for 8660 fluid qs camera*/
5864 if (machine_is_msm8x60_fluid()) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305865 rc = pm8xxx_gpio_config(qs_hc37_cam_pd_gpio_cfg.gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005866 &qs_hc37_cam_pd_gpio_cfg.cfg);
5867 if (rc < 0) {
5868 pr_err("%s pmic qs_hc37_cam_pd gpio config failed\n",
5869 __func__);
5870 return rc;
5871 }
5872 }
5873 }
5874#endif
5875
5876 for (i = 0; i < ARRAY_SIZE(gpio_cfgs); ++i) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305877 rc = pm8xxx_gpio_config(gpio_cfgs[i].gpio,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005878 &gpio_cfgs[i].cfg);
5879 if (rc < 0) {
5880 pr_err("%s pmic gpio config failed\n",
5881 __func__);
5882 return rc;
5883 }
5884 }
5885
5886 return 0;
5887}
5888
5889static const unsigned int ffa_keymap[] = {
5890 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5891 KEY(0, 1, KEY_UP), /* NAV - UP */
5892 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5893 KEY(0, 3, KEY_VOLUMEUP), /* Shuttle SW_UP */
5894
5895 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5896 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5897 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5898 KEY(1, 3, KEY_VOLUMEDOWN),
5899
5900 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5901
5902 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5903 KEY(4, 1, KEY_UP), /* USER_UP */
5904 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5905 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
5906 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
5907
5908 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
5909 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
5910 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
5911 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
5912 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
5913};
5914
Zhang Chang Ken683be172011-08-10 17:45:34 -04005915static const unsigned int dragon_keymap[] = {
5916 KEY(0, 0, KEY_MENU),
5917 KEY(0, 2, KEY_1),
5918 KEY(0, 3, KEY_4),
5919 KEY(0, 4, KEY_7),
5920
5921 KEY(1, 0, KEY_UP),
5922 KEY(1, 1, KEY_LEFT),
5923 KEY(1, 2, KEY_DOWN),
5924 KEY(1, 3, KEY_5),
5925 KEY(1, 4, KEY_8),
5926
5927 KEY(2, 0, KEY_HOME),
5928 KEY(2, 1, KEY_REPLY),
5929 KEY(2, 2, KEY_2),
5930 KEY(2, 3, KEY_6),
5931 KEY(2, 4, KEY_0),
5932
5933 KEY(3, 0, KEY_VOLUMEUP),
5934 KEY(3, 1, KEY_RIGHT),
5935 KEY(3, 2, KEY_3),
5936 KEY(3, 3, KEY_9),
5937 KEY(3, 4, KEY_SWITCHVIDEOMODE),
5938
5939 KEY(4, 0, KEY_VOLUMEDOWN),
5940 KEY(4, 1, KEY_BACK),
5941 KEY(4, 2, KEY_CAMERA),
5942 KEY(4, 3, KEY_KBDILLUMTOGGLE),
5943};
5944
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005945static struct matrix_keymap_data ffa_keymap_data = {
5946 .keymap_size = ARRAY_SIZE(ffa_keymap),
5947 .keymap = ffa_keymap,
5948};
5949
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305950static struct pm8xxx_keypad_platform_data ffa_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005951 .input_name = "ffa-keypad",
5952 .input_phys_device = "ffa-keypad/input0",
5953 .num_rows = 6,
5954 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305955 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5956 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5957 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005958 .scan_delay_ms = 32,
5959 .row_hold_ns = 91500,
5960 .wakeup = 1,
5961 .keymap_data = &ffa_keymap_data,
5962};
5963
Zhang Chang Ken683be172011-08-10 17:45:34 -04005964static struct matrix_keymap_data dragon_keymap_data = {
5965 .keymap_size = ARRAY_SIZE(dragon_keymap),
5966 .keymap = dragon_keymap,
5967};
5968
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305969static struct pm8xxx_keypad_platform_data dragon_keypad_data = {
Zhang Chang Ken683be172011-08-10 17:45:34 -04005970 .input_name = "dragon-keypad",
5971 .input_phys_device = "dragon-keypad/input0",
5972 .num_rows = 6,
5973 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305974 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
5975 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
5976 .debounce_ms = 15,
Zhang Chang Ken683be172011-08-10 17:45:34 -04005977 .scan_delay_ms = 32,
5978 .row_hold_ns = 91500,
5979 .wakeup = 1,
5980 .keymap_data = &dragon_keymap_data,
5981};
Anirudh Ghayalc2019332011-11-12 06:29:10 +05305982
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07005983static const unsigned int fluid_keymap[] = {
5984 KEY(0, 0, KEY_FN_F1), /* LS - PUSH1 */
5985 KEY(0, 1, KEY_UP), /* NAV - UP */
5986 KEY(0, 2, KEY_LEFT), /* NAV - LEFT */
5987 KEY(0, 3, KEY_VOLUMEDOWN), /* Shuttle SW_UP */
5988
5989 KEY(1, 0, KEY_FN_F2), /* LS - PUSH2 */
5990 KEY(1, 1, KEY_RIGHT), /* NAV - RIGHT */
5991 KEY(1, 2, KEY_DOWN), /* NAV - DOWN */
5992 KEY(1, 3, KEY_VOLUMEUP),
5993
5994 KEY(2, 3, KEY_ENTER), /* SW_PUSH key */
5995
5996 KEY(4, 0, KEY_CAMERA_FOCUS), /* RS - PUSH1 */
5997 KEY(4, 1, KEY_UP), /* USER_UP */
5998 KEY(4, 2, KEY_LEFT), /* USER_LEFT */
5999 KEY(4, 3, KEY_HOME), /* Right switch: MIC Bd */
6000 KEY(4, 4, KEY_FN_F3), /* Reserved MIC */
6001
Jilai Wang9a895102011-07-12 14:00:35 -04006002 KEY(5, 0, KEY_CAMERA), /* RS - PUSH2 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006003 KEY(5, 1, KEY_RIGHT), /* USER_RIGHT */
6004 KEY(5, 2, KEY_DOWN), /* USER_DOWN */
6005 KEY(5, 3, KEY_BACK), /* Left switch: MIC */
6006 KEY(5, 4, KEY_MENU), /* Center switch: MIC */
6007};
6008
6009static struct matrix_keymap_data fluid_keymap_data = {
6010 .keymap_size = ARRAY_SIZE(fluid_keymap),
6011 .keymap = fluid_keymap,
6012};
6013
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306014static struct pm8xxx_keypad_platform_data fluid_keypad_data = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006015 .input_name = "fluid-keypad",
6016 .input_phys_device = "fluid-keypad/input0",
6017 .num_rows = 6,
6018 .num_cols = 5,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306019 .rows_gpio_start = PM8058_GPIO_PM_TO_SYS(8),
6020 .cols_gpio_start = PM8058_GPIO_PM_TO_SYS(0),
6021 .debounce_ms = 15,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006022 .scan_delay_ms = 32,
6023 .row_hold_ns = 91500,
6024 .wakeup = 1,
6025 .keymap_data = &fluid_keymap_data,
6026};
6027
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306028static struct pm8xxx_vibrator_platform_data pm8058_vib_pdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006029 .initial_vibrate_ms = 500,
6030 .level_mV = 3000,
6031 .max_timeout_ms = 15000,
6032};
6033
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306034static struct pm8xxx_rtc_platform_data pm8058_rtc_pdata = {
6035 .rtc_write_enable = false,
6036 .rtc_alarm_powerup = false,
6037};
6038
6039static struct pm8xxx_pwrkey_platform_data pm8058_pwrkey_pdata = {
6040 .pull_up = 1,
Jing Lineecdc062011-11-17 09:47:09 -08006041 .kpd_trigger_delay_us = 15625,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306042 .wakeup = 1,
6043};
6044
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006045#define PM8058_LINE_IN_DET_GPIO PM8058_GPIO_PM_TO_SYS(18)
6046
6047static struct othc_accessory_info othc_accessories[] = {
6048 {
6049 .accessory = OTHC_SVIDEO_OUT,
6050 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT
6051 | OTHC_ADC_DETECT,
6052 .key_code = SW_VIDEOOUT_INSERT,
6053 .enabled = false,
6054 .adc_thres = {
6055 .min_threshold = 20,
6056 .max_threshold = 40,
6057 },
6058 },
6059 {
6060 .accessory = OTHC_ANC_HEADPHONE,
6061 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT |
6062 OTHC_SWITCH_DETECT,
6063 .gpio = PM8058_LINE_IN_DET_GPIO,
6064 .active_low = 1,
6065 .key_code = SW_HEADPHONE_INSERT,
6066 .enabled = true,
6067 },
6068 {
6069 .accessory = OTHC_ANC_HEADSET,
6070 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_GPIO_DETECT,
6071 .gpio = PM8058_LINE_IN_DET_GPIO,
6072 .active_low = 1,
6073 .key_code = SW_HEADPHONE_INSERT,
6074 .enabled = true,
6075 },
6076 {
6077 .accessory = OTHC_HEADPHONE,
6078 .detect_flags = OTHC_MICBIAS_DETECT | OTHC_SWITCH_DETECT,
6079 .key_code = SW_HEADPHONE_INSERT,
6080 .enabled = true,
6081 },
6082 {
6083 .accessory = OTHC_MICROPHONE,
6084 .detect_flags = OTHC_GPIO_DETECT,
6085 .gpio = PM8058_LINE_IN_DET_GPIO,
6086 .active_low = 1,
6087 .key_code = SW_MICROPHONE_INSERT,
6088 .enabled = true,
6089 },
6090 {
6091 .accessory = OTHC_HEADSET,
6092 .detect_flags = OTHC_MICBIAS_DETECT,
6093 .key_code = SW_HEADPHONE_INSERT,
6094 .enabled = true,
6095 },
6096};
6097
6098static struct othc_switch_info switch_info[] = {
6099 {
6100 .min_adc_threshold = 0,
6101 .max_adc_threshold = 100,
6102 .key_code = KEY_PLAYPAUSE,
6103 },
6104 {
6105 .min_adc_threshold = 100,
6106 .max_adc_threshold = 200,
6107 .key_code = KEY_REWIND,
6108 },
6109 {
6110 .min_adc_threshold = 200,
6111 .max_adc_threshold = 500,
6112 .key_code = KEY_FASTFORWARD,
6113 },
6114};
6115
6116static struct othc_n_switch_config switch_config = {
6117 .voltage_settling_time_ms = 0,
6118 .num_adc_samples = 3,
6119 .adc_channel = CHANNEL_ADC_HDSET,
6120 .switch_info = switch_info,
6121 .num_keys = ARRAY_SIZE(switch_info),
6122 .default_sw_en = true,
6123 .default_sw_idx = 0,
6124};
6125
6126static struct hsed_bias_config hsed_bias_config = {
6127 /* HSED mic bias config info */
6128 .othc_headset = OTHC_HEADSET_NO,
6129 .othc_lowcurr_thresh_uA = 100,
6130 .othc_highcurr_thresh_uA = 600,
6131 .othc_hyst_prediv_us = 7800,
6132 .othc_period_clkdiv_us = 62500,
6133 .othc_hyst_clk_us = 121000,
6134 .othc_period_clk_us = 312500,
6135 .othc_wakeup = 1,
6136};
6137
6138static struct othc_hsed_config hsed_config_1 = {
6139 .hsed_bias_config = &hsed_bias_config,
6140 /*
6141 * The detection delay and switch reporting delay are
6142 * required to encounter a hardware bug (spurious switch
6143 * interrupts on slow insertion/removal of the headset).
6144 * This will introduce a delay in reporting the accessory
6145 * insertion and removal to the userspace.
6146 */
6147 .detection_delay_ms = 1500,
6148 /* Switch info */
6149 .switch_debounce_ms = 1500,
6150 .othc_support_n_switch = false,
6151 .switch_config = &switch_config,
6152 .ir_gpio = -1,
6153 /* Accessory info */
6154 .accessories_support = true,
6155 .accessories = othc_accessories,
6156 .othc_num_accessories = ARRAY_SIZE(othc_accessories),
6157};
6158
6159static struct othc_regulator_config othc_reg = {
6160 .regulator = "8058_l5",
6161 .max_uV = 2850000,
6162 .min_uV = 2850000,
6163};
6164
6165/* MIC_BIAS0 is configured as normal MIC BIAS */
6166static struct pmic8058_othc_config_pdata othc_config_pdata_0 = {
6167 .micbias_select = OTHC_MICBIAS_0,
6168 .micbias_capability = OTHC_MICBIAS,
6169 .micbias_enable = OTHC_SIGNAL_OFF,
6170 .micbias_regulator = &othc_reg,
6171};
6172
6173/* MIC_BIAS1 is configured as HSED_BIAS for OTHC */
6174static struct pmic8058_othc_config_pdata othc_config_pdata_1 = {
6175 .micbias_select = OTHC_MICBIAS_1,
6176 .micbias_capability = OTHC_MICBIAS_HSED,
6177 .micbias_enable = OTHC_SIGNAL_PWM_TCXO,
6178 .micbias_regulator = &othc_reg,
6179 .hsed_config = &hsed_config_1,
6180 .hsed_name = "8660_handset",
6181};
6182
6183/* MIC_BIAS2 is configured as normal MIC BIAS */
6184static struct pmic8058_othc_config_pdata othc_config_pdata_2 = {
6185 .micbias_select = OTHC_MICBIAS_2,
6186 .micbias_capability = OTHC_MICBIAS,
6187 .micbias_enable = OTHC_SIGNAL_OFF,
6188 .micbias_regulator = &othc_reg,
6189};
6190
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006191
6192static void __init msm8x60_init_pm8058_othc(void)
6193{
6194 int i;
6195
6196 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 ||
6197 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
6198 machine_is_msm8x60_fusn_ffa()) {
6199 /* 3-switch headset supported only by V2 FFA and FLUID */
6200 hsed_config_1.accessories_adc_support = true,
6201 /* ADC based accessory detection works only on V2 and FLUID */
6202 hsed_config_1.accessories_adc_channel = CHANNEL_ADC_HDSET,
6203 hsed_config_1.othc_support_n_switch = true;
6204 }
6205
6206 /* IR GPIO is absent on FLUID */
6207 if (machine_is_msm8x60_fluid())
6208 hsed_config_1.ir_gpio = -1;
6209
6210 for (i = 0; i < ARRAY_SIZE(othc_accessories); i++) {
6211 if (machine_is_msm8x60_fluid()) {
6212 switch (othc_accessories[i].accessory) {
6213 case OTHC_ANC_HEADPHONE:
6214 case OTHC_ANC_HEADSET:
6215 othc_accessories[i].gpio = GPIO_HEADSET_DET_N;
6216 break;
6217 case OTHC_MICROPHONE:
6218 othc_accessories[i].enabled = false;
6219 break;
6220 case OTHC_SVIDEO_OUT:
6221 othc_accessories[i].enabled = true;
6222 hsed_config_1.video_out_gpio = GPIO_HS_SW_DIR;
6223 break;
6224 }
6225 }
6226 }
6227}
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006228
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006229
6230static int pm8058_pwm_config(struct pwm_device *pwm, int ch, int on)
6231{
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306232 struct pm_gpio pwm_gpio_config = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006233 .direction = PM_GPIO_DIR_OUT,
6234 .output_buffer = PM_GPIO_OUT_BUF_CMOS,
6235 .output_value = 0,
6236 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306237 .vin_sel = PM8058_GPIO_VIN_VPH,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006238 .out_strength = PM_GPIO_STRENGTH_HIGH,
6239 .function = PM_GPIO_FUNC_2,
6240 };
6241
6242 int rc = -EINVAL;
6243 int id, mode, max_mA;
6244
6245 id = mode = max_mA = 0;
6246 switch (ch) {
6247 case 0:
6248 case 1:
6249 case 2:
6250 if (on) {
6251 id = 24 + ch;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306252 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(id - 1),
6253 &pwm_gpio_config);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006254 if (rc)
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306255 pr_err("%s: pm8xxx_gpio_config(%d): rc=%d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006256 __func__, id, rc);
6257 }
6258 break;
6259
6260 case 6:
6261 id = PM_PWM_LED_FLASH;
6262 mode = PM_PWM_CONF_PWM1;
6263 max_mA = 300;
6264 break;
6265
6266 case 7:
6267 id = PM_PWM_LED_FLASH1;
6268 mode = PM_PWM_CONF_PWM1;
6269 max_mA = 300;
6270 break;
6271
6272 default:
6273 break;
6274 }
6275
6276 if (ch >= 6 && ch <= 7) {
6277 if (!on) {
6278 mode = PM_PWM_CONF_NONE;
6279 max_mA = 0;
6280 }
6281 rc = pm8058_pwm_config_led(pwm, id, mode, max_mA);
6282 if (rc)
6283 pr_err("%s: pm8058_pwm_config_led(ch=%d): rc=%d\n",
6284 __func__, ch, rc);
6285 }
6286 return rc;
6287
6288}
6289
6290static struct pm8058_pwm_pdata pm8058_pwm_data = {
6291 .config = pm8058_pwm_config,
6292};
6293
6294#define PM8058_GPIO_INT 88
6295
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006296static struct pmic8058_led pmic8058_flash_leds[] = {
6297 [0] = {
6298 .name = "camera:flash0",
6299 .max_brightness = 15,
6300 .id = PMIC8058_ID_FLASH_LED_0,
6301 },
6302 [1] = {
6303 .name = "camera:flash1",
6304 .max_brightness = 15,
6305 .id = PMIC8058_ID_FLASH_LED_1,
6306 },
6307};
6308
6309static struct pmic8058_leds_platform_data pm8058_flash_leds_data = {
6310 .num_leds = ARRAY_SIZE(pmic8058_flash_leds),
6311 .leds = pmic8058_flash_leds,
6312};
6313
Terence Hampsonc0b6dfb2011-07-15 11:07:17 -04006314static struct pmic8058_led pmic8058_dragon_leds[] = {
6315 [0] = {
6316 /* RED */
6317 .name = "led_drv0",
6318 .max_brightness = 15,
6319 .id = PMIC8058_ID_LED_0,
6320 },/* 300 mA flash led0 drv sink */
6321 [1] = {
6322 /* Yellow */
6323 .name = "led_drv1",
6324 .max_brightness = 15,
6325 .id = PMIC8058_ID_LED_1,
6326 },/* 300 mA flash led0 drv sink */
6327 [2] = {
6328 /* Green */
6329 .name = "led_drv2",
6330 .max_brightness = 15,
6331 .id = PMIC8058_ID_LED_2,
6332 },/* 300 mA flash led0 drv sink */
6333 [3] = {
6334 .name = "led_psensor",
6335 .max_brightness = 15,
6336 .id = PMIC8058_ID_LED_KB_LIGHT,
6337 },/* 300 mA flash led0 drv sink */
6338};
6339
6340static struct pmic8058_leds_platform_data pm8058_dragon_leds_data = {
6341 .num_leds = ARRAY_SIZE(pmic8058_dragon_leds),
6342 .leds = pmic8058_dragon_leds,
6343};
6344
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006345static struct pmic8058_led pmic8058_fluid_flash_leds[] = {
6346 [0] = {
6347 .name = "led:drv0",
6348 .max_brightness = 15,
6349 .id = PMIC8058_ID_FLASH_LED_0,
6350 },/* 300 mA flash led0 drv sink */
6351 [1] = {
6352 .name = "led:drv1",
6353 .max_brightness = 15,
6354 .id = PMIC8058_ID_FLASH_LED_1,
6355 },/* 300 mA flash led1 sink */
6356 [2] = {
6357 .name = "led:drv2",
6358 .max_brightness = 20,
6359 .id = PMIC8058_ID_LED_0,
6360 },/* 40 mA led0 sink */
6361 [3] = {
6362 .name = "keypad:drv",
6363 .max_brightness = 15,
6364 .id = PMIC8058_ID_LED_KB_LIGHT,
6365 },/* 300 mA keypad drv sink */
6366};
6367
6368static struct pmic8058_leds_platform_data pm8058_fluid_flash_leds_data = {
6369 .num_leds = ARRAY_SIZE(pmic8058_fluid_flash_leds),
6370 .leds = pmic8058_fluid_flash_leds,
6371};
6372
Terence Hampson90508a92011-08-09 10:40:08 -04006373static struct pmic8058_charger_data pmic8058_charger_dragon = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306374 .charger_data_valid = true,
Terence Hampson90508a92011-08-09 10:40:08 -04006375 .max_source_current = 1800,
6376 .charger_type = CHG_TYPE_AC,
6377};
6378
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306379static struct pmic8058_charger_data pmic8058_charger_ffa_surf = {
6380 .charger_data_valid = false,
6381};
6382
6383static struct pm8xxx_misc_platform_data pm8058_misc_pdata = {
6384 .priority = 0,
6385};
6386
6387static struct pm8xxx_irq_platform_data pm8058_irq_pdata = {
6388 .irq_base = PM8058_IRQ_BASE,
6389 .devirq = MSM_GPIO_TO_INT(PM8058_GPIO_INT),
6390 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6391};
6392
6393static struct pm8xxx_gpio_platform_data pm8058_gpio_pdata = {
6394 .gpio_base = PM8058_GPIO_PM_TO_SYS(0),
6395};
6396
6397static struct pm8xxx_mpp_platform_data pm8058_mpp_pdata = {
6398 .mpp_base = PM8058_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006399};
6400
6401static struct pm8058_platform_data pm8058_platform_data = {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05306402 .irq_pdata = &pm8058_irq_pdata,
6403 .gpio_pdata = &pm8058_gpio_pdata,
6404 .mpp_pdata = &pm8058_mpp_pdata,
6405 .rtc_pdata = &pm8058_rtc_pdata,
6406 .pwrkey_pdata = &pm8058_pwrkey_pdata,
6407 .othc0_pdata = &othc_config_pdata_0,
6408 .othc1_pdata = &othc_config_pdata_1,
6409 .othc2_pdata = &othc_config_pdata_2,
6410 .pwm_pdata = &pm8058_pwm_data,
6411 .misc_pdata = &pm8058_misc_pdata,
6412#ifdef CONFIG_SENSORS_MSM_ADC
6413 .xoadc_pdata = &pm8058_xoadc_pdata,
6414#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006415};
6416
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05306417#ifdef CONFIG_MSM_SSBI
6418static struct msm_ssbi_platform_data msm8x60_ssbi_pm8058_pdata __devinitdata = {
6419 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6420 .slave = {
6421 .name = "pm8058-core",
6422 .platform_data = &pm8058_platform_data,
6423 },
6424};
6425#endif
6426#endif /* CONFIG_PMIC8058 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006427
6428#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
6429 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
6430#define TDISC_I2C_SLAVE_ADDR 0x67
6431#define PMIC_GPIO_TDISC PM8058_GPIO_PM_TO_SYS(5)
6432#define TDISC_INT PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 5)
6433
6434static const char *vregs_tdisc_name[] = {
6435 "8058_l5",
6436 "8058_s3",
6437};
6438
6439static const int vregs_tdisc_val[] = {
6440 2850000,/* uV */
6441 1800000,
6442};
6443static struct regulator *vregs_tdisc[ARRAY_SIZE(vregs_tdisc_name)];
6444
6445static int tdisc_shinetsu_setup(void)
6446{
6447 int rc, i;
6448
6449 rc = gpio_request(PMIC_GPIO_TDISC, "tdisc_interrupt");
6450 if (rc) {
6451 pr_err("%s: gpio_request failed for PMIC_GPIO_TDISC\n",
6452 __func__);
6453 return rc;
6454 }
6455
6456 rc = gpio_request(GPIO_JOYSTICK_EN, "tdisc_oe");
6457 if (rc) {
6458 pr_err("%s: gpio_request failed for GPIO_JOYSTICK_EN\n",
6459 __func__);
6460 goto fail_gpio_oe;
6461 }
6462
6463 rc = gpio_direction_output(GPIO_JOYSTICK_EN, 1);
6464 if (rc) {
6465 pr_err("%s: gpio_direction_output failed for GPIO_JOYSTICK_EN\n",
6466 __func__);
6467 gpio_free(GPIO_JOYSTICK_EN);
6468 goto fail_gpio_oe;
6469 }
6470
6471 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6472 vregs_tdisc[i] = regulator_get(NULL, vregs_tdisc_name[i]);
6473 if (IS_ERR(vregs_tdisc[i])) {
6474 printk(KERN_ERR "%s: regulator get %s failed (%ld)\n",
6475 __func__, vregs_tdisc_name[i],
6476 PTR_ERR(vregs_tdisc[i]));
6477 rc = PTR_ERR(vregs_tdisc[i]);
6478 goto vreg_get_fail;
6479 }
6480
6481 rc = regulator_set_voltage(vregs_tdisc[i],
6482 vregs_tdisc_val[i], vregs_tdisc_val[i]);
6483 if (rc) {
6484 printk(KERN_ERR "%s: regulator_set_voltage() = %d\n",
6485 __func__, rc);
6486 goto vreg_set_voltage_fail;
6487 }
6488 }
6489
6490 return rc;
6491vreg_set_voltage_fail:
6492 i++;
6493vreg_get_fail:
6494 while (i)
6495 regulator_put(vregs_tdisc[--i]);
6496fail_gpio_oe:
6497 gpio_free(PMIC_GPIO_TDISC);
6498 return rc;
6499}
6500
6501static void tdisc_shinetsu_release(void)
6502{
6503 int i;
6504
6505 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++)
6506 regulator_put(vregs_tdisc[i]);
6507
6508 gpio_free(PMIC_GPIO_TDISC);
6509 gpio_free(GPIO_JOYSTICK_EN);
6510}
6511
6512static int tdisc_shinetsu_enable(void)
6513{
6514 int i, rc = -EINVAL;
6515
6516 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6517 rc = regulator_enable(vregs_tdisc[i]);
6518 if (rc < 0) {
6519 printk(KERN_ERR "%s: vreg %s enable failed (%d)\n",
6520 __func__, vregs_tdisc_name[i], rc);
6521 goto vreg_fail;
6522 }
6523 }
6524
6525 /* Enable the OE (output enable) gpio */
6526 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 1);
6527 /* voltage and gpio stabilization delay */
6528 msleep(50);
6529
6530 return 0;
6531vreg_fail:
6532 while (i)
6533 regulator_disable(vregs_tdisc[--i]);
6534 return rc;
6535}
6536
6537static int tdisc_shinetsu_disable(void)
6538{
6539 int i, rc;
6540
6541 for (i = 0; i < ARRAY_SIZE(vregs_tdisc_name); i++) {
6542 rc = regulator_disable(vregs_tdisc[i]);
6543 if (rc < 0) {
6544 printk(KERN_ERR "%s: vreg %s disable failed (%d)\n",
6545 __func__, vregs_tdisc_name[i], rc);
6546 goto tdisc_reg_fail;
6547 }
6548 }
6549
6550 /* Disable the OE (output enable) gpio */
6551 gpio_set_value_cansleep(GPIO_JOYSTICK_EN, 0);
6552
6553 return 0;
6554
6555tdisc_reg_fail:
6556 while (i)
6557 regulator_enable(vregs_tdisc[--i]);
6558 return rc;
6559}
6560
6561static struct tdisc_abs_values tdisc_abs = {
6562 .x_max = 32,
6563 .y_max = 32,
6564 .x_min = -32,
6565 .y_min = -32,
6566 .pressure_max = 32,
6567 .pressure_min = 0,
6568};
6569
6570static struct tdisc_platform_data tdisc_data = {
6571 .tdisc_setup = tdisc_shinetsu_setup,
6572 .tdisc_release = tdisc_shinetsu_release,
6573 .tdisc_enable = tdisc_shinetsu_enable,
6574 .tdisc_disable = tdisc_shinetsu_disable,
6575 .tdisc_wakeup = 0,
6576 .tdisc_gpio = PMIC_GPIO_TDISC,
6577 .tdisc_report_keys = true,
6578 .tdisc_report_relative = true,
6579 .tdisc_report_absolute = false,
6580 .tdisc_report_wheel = false,
6581 .tdisc_reverse_x = false,
6582 .tdisc_reverse_y = true,
6583 .tdisc_abs = &tdisc_abs,
6584};
6585
6586static struct i2c_board_info msm_i2c_gsbi3_tdisc_info[] = {
6587 {
6588 I2C_BOARD_INFO("vtd518", TDISC_I2C_SLAVE_ADDR),
6589 .irq = TDISC_INT,
6590 .platform_data = &tdisc_data,
6591 },
6592};
6593#endif
6594
6595#define PM_GPIO_CDC_RST_N 20
6596#define GPIO_CDC_RST_N PM8058_GPIO_PM_TO_SYS(PM_GPIO_CDC_RST_N)
6597
6598static struct regulator *vreg_timpani_1;
6599static struct regulator *vreg_timpani_2;
6600
6601static unsigned int msm_timpani_setup_power(void)
6602{
6603 int rc;
6604
6605 vreg_timpani_1 = regulator_get(NULL, "8058_l0");
6606 if (IS_ERR(vreg_timpani_1)) {
6607 pr_err("%s: Unable to get 8058_l0\n", __func__);
6608 return -ENODEV;
6609 }
6610
6611 vreg_timpani_2 = regulator_get(NULL, "8058_s3");
6612 if (IS_ERR(vreg_timpani_2)) {
6613 pr_err("%s: Unable to get 8058_s3\n", __func__);
6614 regulator_put(vreg_timpani_1);
6615 return -ENODEV;
6616 }
6617
6618 rc = regulator_set_voltage(vreg_timpani_1, 1200000, 1200000);
6619 if (rc) {
6620 pr_err("%s: unable to set L0 voltage to 1.2V\n", __func__);
6621 goto fail;
6622 }
6623
6624 rc = regulator_set_voltage(vreg_timpani_2, 1800000, 1800000);
6625 if (rc) {
6626 pr_err("%s: unable to set S3 voltage to 1.8V\n", __func__);
6627 goto fail;
6628 }
6629
6630 rc = regulator_enable(vreg_timpani_1);
6631 if (rc) {
6632 pr_err("%s: Enable regulator 8058_l0 failed\n", __func__);
6633 goto fail;
6634 }
6635
6636 /* The settings for LDO0 should be set such that
6637 * it doesn't require to reset the timpani. */
6638 rc = regulator_set_optimum_mode(vreg_timpani_1, 5000);
6639 if (rc < 0) {
6640 pr_err("Timpani regulator optimum mode setting failed\n");
6641 goto fail;
6642 }
6643
6644 rc = regulator_enable(vreg_timpani_2);
6645 if (rc) {
6646 pr_err("%s: Enable regulator 8058_s3 failed\n", __func__);
6647 regulator_disable(vreg_timpani_1);
6648 goto fail;
6649 }
6650
6651 rc = gpio_request(GPIO_CDC_RST_N, "CDC_RST_N");
6652 if (rc) {
6653 pr_err("%s: GPIO Request %d failed\n", __func__,
6654 GPIO_CDC_RST_N);
6655 regulator_disable(vreg_timpani_1);
6656 regulator_disable(vreg_timpani_2);
6657 goto fail;
6658 } else {
6659 gpio_direction_output(GPIO_CDC_RST_N, 1);
6660 usleep_range(1000, 1050);
6661 gpio_direction_output(GPIO_CDC_RST_N, 0);
6662 usleep_range(1000, 1050);
6663 gpio_direction_output(GPIO_CDC_RST_N, 1);
6664 gpio_free(GPIO_CDC_RST_N);
6665 }
6666 return rc;
6667
6668fail:
6669 regulator_put(vreg_timpani_1);
6670 regulator_put(vreg_timpani_2);
6671 return rc;
6672}
6673
6674static void msm_timpani_shutdown_power(void)
6675{
6676 int rc;
6677
6678 rc = regulator_disable(vreg_timpani_1);
6679 if (rc)
6680 pr_err("%s: Disable regulator 8058_l0 failed\n", __func__);
6681
6682 regulator_put(vreg_timpani_1);
6683
6684 rc = regulator_disable(vreg_timpani_2);
6685 if (rc)
6686 pr_err("%s: Disable regulator 8058_s3 failed\n", __func__);
6687
6688 regulator_put(vreg_timpani_2);
6689}
6690
6691/* Power analog function of codec */
6692static struct regulator *vreg_timpani_cdc_apwr;
6693static int msm_timpani_codec_power(int vreg_on)
6694{
6695 int rc = 0;
6696
6697 if (!vreg_timpani_cdc_apwr) {
6698
6699 vreg_timpani_cdc_apwr = regulator_get(NULL, "8058_s4");
6700
6701 if (IS_ERR(vreg_timpani_cdc_apwr)) {
6702 pr_err("%s: vreg_get failed (%ld)\n",
6703 __func__, PTR_ERR(vreg_timpani_cdc_apwr));
6704 rc = PTR_ERR(vreg_timpani_cdc_apwr);
6705 return rc;
6706 }
6707 }
6708
6709 if (vreg_on) {
6710
6711 rc = regulator_set_voltage(vreg_timpani_cdc_apwr,
6712 2200000, 2200000);
6713 if (rc) {
6714 pr_err("%s: unable to set 8058_s4 voltage to 2.2 V\n",
6715 __func__);
6716 goto vreg_fail;
6717 }
6718
6719 rc = regulator_enable(vreg_timpani_cdc_apwr);
6720 if (rc) {
6721 pr_err("%s: vreg_enable failed %d\n", __func__, rc);
6722 goto vreg_fail;
6723 }
6724 } else {
6725 rc = regulator_disable(vreg_timpani_cdc_apwr);
6726 if (rc) {
6727 pr_err("%s: vreg_disable failed %d\n",
6728 __func__, rc);
6729 goto vreg_fail;
6730 }
6731 }
6732
6733 return 0;
6734
6735vreg_fail:
6736 regulator_put(vreg_timpani_cdc_apwr);
6737 vreg_timpani_cdc_apwr = NULL;
6738 return rc;
6739}
6740
6741static struct marimba_codec_platform_data timpani_codec_pdata = {
6742 .marimba_codec_power = msm_timpani_codec_power,
6743};
6744
6745#define TIMPANI_SLAVE_ID_CDC_ADDR 0X77
6746#define TIMPANI_SLAVE_ID_QMEMBIST_ADDR 0X66
6747
6748static struct marimba_platform_data timpani_pdata = {
6749 .slave_id[MARIMBA_SLAVE_ID_CDC] = TIMPANI_SLAVE_ID_CDC_ADDR,
6750 .slave_id[MARIMBA_SLAVE_ID_QMEMBIST] = TIMPANI_SLAVE_ID_QMEMBIST_ADDR,
6751 .marimba_setup = msm_timpani_setup_power,
6752 .marimba_shutdown = msm_timpani_shutdown_power,
6753 .codec = &timpani_codec_pdata,
6754 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
6755};
6756
6757#define TIMPANI_I2C_SLAVE_ADDR 0xD
6758
6759static struct i2c_board_info msm_i2c_gsbi7_timpani_info[] = {
6760 {
6761 I2C_BOARD_INFO("timpani", TIMPANI_I2C_SLAVE_ADDR),
6762 .platform_data = &timpani_pdata,
6763 },
6764};
6765
Lei Zhou338cab82011-08-19 13:38:17 -04006766#ifdef CONFIG_SND_SOC_WM8903
6767static struct wm8903_platform_data wm8903_pdata = {
6768 .gpio_cfg[2] = 0x3A8,
6769};
6770
6771#define WM8903_I2C_SLAVE_ADDR 0x34
6772static struct i2c_board_info wm8903_codec_i2c_info[] = {
6773 {
6774 I2C_BOARD_INFO("wm8903", WM8903_I2C_SLAVE_ADDR >> 1),
6775 .platform_data = &wm8903_pdata,
6776 },
6777};
6778#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006779#ifdef CONFIG_PMIC8901
6780
6781#define PM8901_GPIO_INT 91
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006782/*
6783 * Consumer specific regulator names:
6784 * regulator name consumer dev_name
6785 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006786static struct regulator_consumer_supply vreg_consumers_8901_USB_OTG[] = {
6787 REGULATOR_SUPPLY("8901_usb_otg", NULL),
6788};
6789static struct regulator_consumer_supply vreg_consumers_8901_HDMI_MVS[] = {
6790 REGULATOR_SUPPLY("8901_hdmi_mvs", NULL),
6791};
6792
6793#define PM8901_VREG_INIT(_id, _min_uV, _max_uV, _modes, _ops, _apply_uV, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306794 _always_on) \
6795 { \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006796 .init_data = { \
6797 .constraints = { \
6798 .valid_modes_mask = _modes, \
6799 .valid_ops_mask = _ops, \
6800 .min_uV = _min_uV, \
6801 .max_uV = _max_uV, \
6802 .input_uV = _min_uV, \
6803 .apply_uV = _apply_uV, \
6804 .always_on = _always_on, \
6805 }, \
6806 .consumer_supplies = vreg_consumers_8901_##_id, \
6807 .num_consumer_supplies = \
6808 ARRAY_SIZE(vreg_consumers_8901_##_id), \
6809 }, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306810 .id = PM8901_VREG_ID_##_id, \
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006811 }
6812
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006813#define PM8901_VREG_INIT_VS(_id) \
6814 PM8901_VREG_INIT(_id, 0, 0, REGULATOR_MODE_NORMAL, \
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306815 REGULATOR_CHANGE_STATUS, 0, 0)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006816
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306817static struct pm8901_vreg_pdata pm8901_vreg_init[] = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006818 PM8901_VREG_INIT_VS(USB_OTG),
6819 PM8901_VREG_INIT_VS(HDMI_MVS),
6820};
6821
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306822static struct pm8xxx_misc_platform_data pm8901_misc_pdata = {
6823 .priority = 1,
6824};
6825
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306826static struct pm8xxx_irq_platform_data pm8901_irq_pdata = {
6827 .irq_base = PM8901_IRQ_BASE,
6828 .devirq = MSM_GPIO_TO_INT(PM8901_GPIO_INT),
6829 .irq_trigger_flag = IRQF_TRIGGER_LOW,
6830};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006831
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306832static struct pm8xxx_mpp_platform_data pm8901_mpp_pdata = {
6833 .mpp_base = PM8901_MPP_PM_TO_SYS(0),
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006834};
6835
6836static struct pm8901_platform_data pm8901_platform_data = {
Anirudh Ghayal9f77e962011-12-06 12:38:21 +05306837 .irq_pdata = &pm8901_irq_pdata,
6838 .mpp_pdata = &pm8901_mpp_pdata,
6839 .regulator_pdatas = pm8901_vreg_init,
6840 .num_regulators = ARRAY_SIZE(pm8901_vreg_init),
Anirudh Ghayalb6c98092011-12-13 14:06:48 +05306841 .misc_pdata = &pm8901_misc_pdata,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006842};
6843
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05306844static struct msm_ssbi_platform_data msm8x60_ssbi_pm8901_pdata __devinitdata = {
6845 .controller_type = MSM_SBI_CTRL_PMIC_ARBITER,
6846 .slave = {
6847 .name = "pm8901-core",
6848 .platform_data = &pm8901_platform_data,
6849 },
6850};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006851#endif /* CONFIG_PMIC8901 */
6852
6853#if defined(CONFIG_MARIMBA_CORE) && (defined(CONFIG_GPIO_SX150X) \
6854 || defined(CONFIG_GPIO_SX150X_MODULE))
6855
6856static struct regulator *vreg_bahama;
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006857static int msm_bahama_sys_rst = GPIO_MS_SYS_RESET_N;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006858
6859struct bahama_config_register{
6860 u8 reg;
6861 u8 value;
6862 u8 mask;
6863};
6864
6865enum version{
6866 VER_1_0,
6867 VER_2_0,
6868 VER_UNSUPPORTED = 0xFF
6869};
6870
6871static u8 read_bahama_ver(void)
6872{
6873 int rc;
6874 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6875 u8 bahama_version;
6876
6877 rc = marimba_read_bit_mask(&config, 0x00, &bahama_version, 1, 0x1F);
6878 if (rc < 0) {
6879 printk(KERN_ERR
6880 "%s: version read failed: %d\n",
6881 __func__, rc);
6882 return VER_UNSUPPORTED;
6883 } else {
6884 printk(KERN_INFO
6885 "%s: version read got: 0x%x\n",
6886 __func__, bahama_version);
6887 }
6888
6889 switch (bahama_version) {
6890 case 0x08: /* varient of bahama v1 */
6891 case 0x10:
6892 case 0x00:
6893 return VER_1_0;
6894 case 0x09: /* variant of bahama v2 */
6895 return VER_2_0;
6896 default:
6897 return VER_UNSUPPORTED;
6898 }
6899}
6900
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006901static int msm_bahama_setup_power_enable;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006902static unsigned int msm_bahama_setup_power(void)
6903{
6904 int rc = 0;
6905 const char *msm_bahama_regulator = "8058_s3";
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006906
6907 if (machine_is_msm8x60_dragon())
6908 msm_bahama_sys_rst = GPIO_CDC_RST_N;
6909
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006910 vreg_bahama = regulator_get(NULL, msm_bahama_regulator);
6911
6912 if (IS_ERR(vreg_bahama)) {
6913 rc = PTR_ERR(vreg_bahama);
6914 pr_err("%s: regulator_get %s = %d\n", __func__,
6915 msm_bahama_regulator, rc);
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006916 return rc;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006917 }
6918
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006919 rc = regulator_set_voltage(vreg_bahama, 1800000, 1800000);
6920 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006921 pr_err("%s: regulator_set_voltage %s = %d\n", __func__,
6922 msm_bahama_regulator, rc);
6923 goto unget;
6924 }
6925
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006926 rc = regulator_enable(vreg_bahama);
6927 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006928 pr_err("%s: regulator_enable %s = %d\n", __func__,
6929 msm_bahama_regulator, rc);
6930 goto unget;
6931 }
6932
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006933 rc = gpio_request(msm_bahama_sys_rst, "bahama sys_rst_n");
6934 if (rc) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006935 pr_err("%s: gpio_request %d = %d\n", __func__,
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04006936 msm_bahama_sys_rst, rc);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006937 goto unenable;
6938 }
6939
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006940 gpio_direction_output(msm_bahama_sys_rst, 0);
6941 usleep_range(1000, 1050);
6942 gpio_set_value_cansleep(msm_bahama_sys_rst, 1);
6943 usleep_range(1000, 1050);
6944 msm_bahama_setup_power_enable = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006945 return rc;
6946
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006947unenable:
6948 regulator_disable(vreg_bahama);
6949unget:
6950 regulator_put(vreg_bahama);
6951 return rc;
6952};
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006953
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006954static unsigned int msm_bahama_shutdown_power(int value)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006955{
Siddartha Mohanadoss7e8e9dd2011-09-27 19:04:58 -07006956 if (msm_bahama_setup_power_enable) {
6957 gpio_set_value_cansleep(msm_bahama_sys_rst, 0);
6958 gpio_free(msm_bahama_sys_rst);
6959 regulator_disable(vreg_bahama);
6960 regulator_put(vreg_bahama);
6961 msm_bahama_setup_power_enable = 0;
6962 }
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07006963
6964 return 0;
6965};
6966
6967static unsigned int msm_bahama_core_config(int type)
6968{
6969 int rc = 0;
6970
6971 if (type == BAHAMA_ID) {
6972
6973 int i;
6974 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA };
6975
6976 const struct bahama_config_register v20_init[] = {
6977 /* reg, value, mask */
6978 { 0xF4, 0x84, 0xFF }, /* AREG */
6979 { 0xF0, 0x04, 0xFF } /* DREG */
6980 };
6981
6982 if (read_bahama_ver() == VER_2_0) {
6983 for (i = 0; i < ARRAY_SIZE(v20_init); i++) {
6984 u8 value = v20_init[i].value;
6985 rc = marimba_write_bit_mask(&config,
6986 v20_init[i].reg,
6987 &value,
6988 sizeof(v20_init[i].value),
6989 v20_init[i].mask);
6990 if (rc < 0) {
6991 printk(KERN_ERR
6992 "%s: reg %d write failed: %d\n",
6993 __func__, v20_init[i].reg, rc);
6994 return rc;
6995 }
6996 printk(KERN_INFO "%s: reg 0x%02x value 0x%02x"
6997 " mask 0x%02x\n",
6998 __func__, v20_init[i].reg,
6999 v20_init[i].value, v20_init[i].mask);
7000 }
7001 }
7002 }
7003 printk(KERN_INFO "core type: %d\n", type);
7004
7005 return rc;
7006}
7007
7008static struct regulator *fm_regulator_s3;
7009static struct msm_xo_voter *fm_clock;
7010
7011static int fm_radio_setup(struct marimba_fm_platform_data *pdata)
7012{
7013 int rc = 0;
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307014 struct pm_gpio cfg = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007015 .direction = PM_GPIO_DIR_IN,
7016 .pull = PM_GPIO_PULL_NO,
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307017 .vin_sel = PM8058_GPIO_VIN_S3,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007018 .function = PM_GPIO_FUNC_NORMAL,
7019 .inv_int_pol = 0,
7020 };
7021
7022 if (!fm_regulator_s3) {
7023 fm_regulator_s3 = regulator_get(NULL, "8058_s3");
7024 if (IS_ERR(fm_regulator_s3)) {
7025 rc = PTR_ERR(fm_regulator_s3);
7026 printk(KERN_ERR "%s: regulator get s3 (%d)\n",
7027 __func__, rc);
7028 goto out;
7029 }
7030 }
7031
7032
7033 rc = regulator_set_voltage(fm_regulator_s3, 1800000, 1800000);
7034 if (rc < 0) {
7035 printk(KERN_ERR "%s: regulator set voltage failed (%d)\n",
7036 __func__, rc);
7037 goto fm_fail_put;
7038 }
7039
7040 rc = regulator_enable(fm_regulator_s3);
7041 if (rc < 0) {
7042 printk(KERN_ERR "%s: regulator s3 enable failed (%d)\n",
7043 __func__, rc);
7044 goto fm_fail_put;
7045 }
7046
7047 /*Vote for XO clock*/
7048 fm_clock = msm_xo_get(MSM_XO_TCXO_D0, "fm_power");
7049
7050 if (IS_ERR(fm_clock)) {
7051 rc = PTR_ERR(fm_clock);
7052 printk(KERN_ERR "%s: Couldn't get TCXO_D0 vote for FM (%d)\n",
7053 __func__, rc);
7054 goto fm_fail_switch;
7055 }
7056
7057 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_ON);
7058 if (rc < 0) {
7059 printk(KERN_ERR "%s: Failed to vote for TCX0_D0 ON (%d)\n",
7060 __func__, rc);
7061 goto fm_fail_vote;
7062 }
7063
7064 /*GPIO 18 on PMIC is FM_IRQ*/
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307065 rc = pm8xxx_gpio_config(PM8058_GPIO_PM_TO_SYS(FM_GPIO), &cfg);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007066 if (rc) {
Anirudh Ghayalc2019332011-11-12 06:29:10 +05307067 printk(KERN_ERR "%s: return val of pm8xxx_gpio_config: %d\n",
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007068 __func__, rc);
7069 goto fm_fail_clock;
7070 }
7071 goto out;
7072
7073fm_fail_clock:
7074 msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
7075fm_fail_vote:
7076 msm_xo_put(fm_clock);
7077fm_fail_switch:
7078 regulator_disable(fm_regulator_s3);
7079fm_fail_put:
7080 regulator_put(fm_regulator_s3);
7081out:
7082 return rc;
7083};
7084
7085static void fm_radio_shutdown(struct marimba_fm_platform_data *pdata)
7086{
7087 int rc = 0;
7088 if (fm_regulator_s3 != NULL) {
7089 rc = regulator_disable(fm_regulator_s3);
7090 if (rc < 0) {
7091 printk(KERN_ERR "%s: regulator s3 disable (%d)\n",
7092 __func__, rc);
7093 }
7094 regulator_put(fm_regulator_s3);
7095 fm_regulator_s3 = NULL;
7096 }
7097 printk(KERN_ERR "%s: Voting off for XO", __func__);
7098
7099 if (fm_clock != NULL) {
7100 rc = msm_xo_mode_vote(fm_clock, MSM_XO_MODE_OFF);
7101 if (rc < 0) {
7102 printk(KERN_ERR "%s: Voting off XO clock (%d)\n",
7103 __func__, rc);
7104 }
7105 msm_xo_put(fm_clock);
7106 }
7107 printk(KERN_ERR "%s: coming out of fm_radio_shutdown", __func__);
7108}
7109
7110/* Slave id address for FM/CDC/QMEMBIST
7111 * Values can be programmed using Marimba slave id 0
7112 * should there be a conflict with other I2C devices
7113 * */
7114#define BAHAMA_SLAVE_ID_FM_ADDR 0x2A
7115#define BAHAMA_SLAVE_ID_QMEMBIST_ADDR 0x7B
7116
7117static struct marimba_fm_platform_data marimba_fm_pdata = {
7118 .fm_setup = fm_radio_setup,
7119 .fm_shutdown = fm_radio_shutdown,
7120 .irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE, FM_GPIO),
7121 .is_fm_soc_i2s_master = false,
7122 .config_i2s_gpio = NULL,
7123};
7124
7125/*
7126Just initializing the BAHAMA related slave
7127*/
7128static struct marimba_platform_data marimba_pdata = {
7129 .slave_id[SLAVE_ID_BAHAMA_FM] = BAHAMA_SLAVE_ID_FM_ADDR,
7130 .slave_id[SLAVE_ID_BAHAMA_QMEMBIST] = BAHAMA_SLAVE_ID_QMEMBIST_ADDR,
7131 .bahama_setup = msm_bahama_setup_power,
7132 .bahama_shutdown = msm_bahama_shutdown_power,
7133 .bahama_core_config = msm_bahama_core_config,
7134 .fm = &marimba_fm_pdata,
7135 .tsadc_ssbi_adap = MARIMBA_SSBI_ADAP,
7136};
7137
7138
7139static struct i2c_board_info msm_marimba_board_info[] = {
7140 {
7141 I2C_BOARD_INFO("marimba", 0xc),
7142 .platform_data = &marimba_pdata,
7143 }
7144};
7145#endif /* CONFIG_MAIMBA_CORE */
7146
7147#ifdef CONFIG_I2C
7148#define I2C_SURF 1
7149#define I2C_FFA (1 << 1)
7150#define I2C_RUMI (1 << 2)
7151#define I2C_SIM (1 << 3)
7152#define I2C_FLUID (1 << 4)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007153#define I2C_DRAGON (1 << 5)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007154
7155struct i2c_registry {
7156 u8 machs;
7157 int bus;
7158 struct i2c_board_info *info;
7159 int len;
7160};
7161
7162static struct i2c_registry msm8x60_i2c_devices[] __initdata = {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007163#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7164 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007165 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007166 MSM_GSBI8_QUP_I2C_BUS_ID,
7167 core_expander_i2c_info,
7168 ARRAY_SIZE(core_expander_i2c_info),
7169 },
7170 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007171 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007172 MSM_GSBI8_QUP_I2C_BUS_ID,
7173 docking_expander_i2c_info,
7174 ARRAY_SIZE(docking_expander_i2c_info),
7175 },
7176 {
7177 I2C_SURF,
7178 MSM_GSBI8_QUP_I2C_BUS_ID,
7179 surf_expanders_i2c_info,
7180 ARRAY_SIZE(surf_expanders_i2c_info),
7181 },
7182 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007183 I2C_SURF | I2C_FFA | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007184 MSM_GSBI3_QUP_I2C_BUS_ID,
7185 fha_expanders_i2c_info,
7186 ARRAY_SIZE(fha_expanders_i2c_info),
7187 },
7188 {
7189 I2C_FLUID,
7190 MSM_GSBI3_QUP_I2C_BUS_ID,
7191 fluid_expanders_i2c_info,
7192 ARRAY_SIZE(fluid_expanders_i2c_info),
7193 },
7194 {
7195 I2C_FLUID,
7196 MSM_GSBI8_QUP_I2C_BUS_ID,
7197 fluid_core_expander_i2c_info,
7198 ARRAY_SIZE(fluid_core_expander_i2c_info),
7199 },
7200#endif
7201#if defined(CONFIG_TOUCHDISC_VTD518_SHINETSU) || \
7202 defined(CONFIG_TOUCHDISC_VTD518_SHINETSU_MODULE)
7203 {
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007204 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007205 MSM_GSBI3_QUP_I2C_BUS_ID,
7206 msm_i2c_gsbi3_tdisc_info,
7207 ARRAY_SIZE(msm_i2c_gsbi3_tdisc_info),
7208 },
7209#endif
7210 {
Zhang Chang Ken211df572011-07-05 19:16:39 -04007211 I2C_SURF | I2C_FFA | I2C_FLUID,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007212 MSM_GSBI3_QUP_I2C_BUS_ID,
7213 cy8ctmg200_board_info,
7214 ARRAY_SIZE(cy8ctmg200_board_info),
7215 },
Zhang Chang Ken211df572011-07-05 19:16:39 -04007216 {
7217 I2C_DRAGON,
7218 MSM_GSBI3_QUP_I2C_BUS_ID,
7219 cy8ctma340_dragon_board_info,
7220 ARRAY_SIZE(cy8ctma340_dragon_board_info),
7221 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007222#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
7223 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
7224 {
7225 I2C_FLUID,
7226 MSM_GSBI3_QUP_I2C_BUS_ID,
7227 cyttsp_fluid_info,
7228 ARRAY_SIZE(cyttsp_fluid_info),
7229 },
7230 {
7231 I2C_FFA | I2C_SURF,
7232 MSM_GSBI3_QUP_I2C_BUS_ID,
7233 cyttsp_ffa_info,
7234 ARRAY_SIZE(cyttsp_ffa_info),
7235 },
7236#endif
7237#ifdef CONFIG_MSM_CAMERA
Jilai Wang971f97f2011-07-13 14:25:25 -04007238 {
7239 I2C_SURF | I2C_FFA | I2C_FLUID ,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007240 MSM_GSBI4_QUP_I2C_BUS_ID,
7241 msm_camera_boardinfo,
7242 ARRAY_SIZE(msm_camera_boardinfo),
7243 },
Jilai Wang971f97f2011-07-13 14:25:25 -04007244 {
7245 I2C_DRAGON,
7246 MSM_GSBI4_QUP_I2C_BUS_ID,
7247 msm_camera_dragon_boardinfo,
7248 ARRAY_SIZE(msm_camera_dragon_boardinfo),
7249 },
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007250#endif
7251 {
7252 I2C_SURF | I2C_FFA | I2C_FLUID,
7253 MSM_GSBI7_QUP_I2C_BUS_ID,
7254 msm_i2c_gsbi7_timpani_info,
7255 ARRAY_SIZE(msm_i2c_gsbi7_timpani_info),
7256 },
7257#if defined(CONFIG_MARIMBA_CORE)
7258 {
Zhang Chang Kene1fd3da2011-08-10 08:25:57 -04007259 I2C_SURF | I2C_FFA | I2C_FLUID | I2C_DRAGON,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007260 MSM_GSBI7_QUP_I2C_BUS_ID,
7261 msm_marimba_board_info,
7262 ARRAY_SIZE(msm_marimba_board_info),
7263 },
7264#endif /* CONFIG_MARIMBA_CORE */
7265#ifdef CONFIG_ISL9519_CHARGER
7266 {
7267 I2C_SURF | I2C_FFA,
7268 MSM_GSBI8_QUP_I2C_BUS_ID,
7269 isl_charger_i2c_info,
7270 ARRAY_SIZE(isl_charger_i2c_info),
7271 },
7272#endif
7273#if defined(CONFIG_HAPTIC_ISA1200) || \
7274 defined(CONFIG_HAPTIC_ISA1200_MODULE)
7275 {
7276 I2C_FLUID,
7277 MSM_GSBI8_QUP_I2C_BUS_ID,
7278 msm_isa1200_board_info,
7279 ARRAY_SIZE(msm_isa1200_board_info),
7280 },
7281#endif
7282#if defined(CONFIG_SMB137B_CHARGER) || defined(CONFIG_SMB137B_CHARGER_MODULE)
7283 {
7284 I2C_FLUID,
7285 MSM_GSBI8_QUP_I2C_BUS_ID,
7286 smb137b_charger_i2c_info,
7287 ARRAY_SIZE(smb137b_charger_i2c_info),
7288 },
7289#endif
7290#if defined(CONFIG_BATTERY_BQ27520) || \
7291 defined(CONFIG_BATTERY_BQ27520_MODULE)
7292 {
7293 I2C_FLUID,
7294 MSM_GSBI8_QUP_I2C_BUS_ID,
7295 msm_bq27520_board_info,
7296 ARRAY_SIZE(msm_bq27520_board_info),
7297 },
7298#endif
Lei Zhou338cab82011-08-19 13:38:17 -04007299#if defined(CONFIG_SND_SOC_WM8903) || defined(CONFIG_SND_SOC_WM8903_MODULE)
7300 {
7301 I2C_DRAGON,
7302 MSM_GSBI8_QUP_I2C_BUS_ID,
7303 wm8903_codec_i2c_info,
7304 ARRAY_SIZE(wm8903_codec_i2c_info),
7305 },
7306#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007307};
7308#endif /* CONFIG_I2C */
7309
7310static void fixup_i2c_configs(void)
7311{
7312#ifdef CONFIG_I2C
7313#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
7314 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7315 sx150x_data[SX150X_CORE].irq_summary =
7316 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT2_N);
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007317 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
7318 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007319 sx150x_data[SX150X_CORE].irq_summary =
7320 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7321 else if (machine_is_msm8x60_fluid())
7322 sx150x_data[SX150X_CORE_FLUID].irq_summary =
7323 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, UI_INT1_N);
7324#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007325#endif
7326}
7327
7328static void register_i2c_devices(void)
7329{
7330#ifdef CONFIG_I2C
7331 u8 mach_mask = 0;
7332 int i;
7333
7334 /* Build the matching 'supported_machs' bitmask */
7335 if (machine_is_msm8x60_surf() || machine_is_msm8x60_fusion())
7336 mach_mask = I2C_SURF;
7337 else if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
7338 mach_mask = I2C_FFA;
7339 else if (machine_is_msm8x60_rumi3())
7340 mach_mask = I2C_RUMI;
7341 else if (machine_is_msm8x60_sim())
7342 mach_mask = I2C_SIM;
7343 else if (machine_is_msm8x60_fluid())
7344 mach_mask = I2C_FLUID;
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007345 else if (machine_is_msm8x60_dragon())
7346 mach_mask = I2C_DRAGON;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007347 else
7348 pr_err("unmatched machine ID in register_i2c_devices\n");
7349
7350 /* Run the array and install devices as appropriate */
7351 for (i = 0; i < ARRAY_SIZE(msm8x60_i2c_devices); ++i) {
7352 if (msm8x60_i2c_devices[i].machs & mach_mask)
7353 i2c_register_board_info(msm8x60_i2c_devices[i].bus,
7354 msm8x60_i2c_devices[i].info,
7355 msm8x60_i2c_devices[i].len);
7356 }
7357#endif
7358}
7359
7360static void __init msm8x60_init_uart12dm(void)
7361{
7362#if !defined(CONFIG_USB_PEHCI_HCD) && !defined(CONFIG_USB_PEHCI_HCD_MODULE)
7363 /* 0x1D000000 now belongs to EBI2:CS3 i.e. USB ISP Controller */
7364 void *fpga_mem = ioremap_nocache(0x1D000000, SZ_4K);
7365
7366 if (!fpga_mem)
7367 pr_err("%s(): Error getting memory\n", __func__);
7368
7369 /* Advanced mode */
7370 writew(0xFFFF, fpga_mem + 0x15C);
7371 /* FPGA_UART_SEL */
7372 writew(0, fpga_mem + 0x172);
7373 /* FPGA_GPIO_CONFIG_117 */
7374 writew(1, fpga_mem + 0xEA);
7375 /* FPGA_GPIO_CONFIG_118 */
7376 writew(1, fpga_mem + 0xEC);
7377 mb();
7378 iounmap(fpga_mem);
7379#endif
7380}
7381
7382#define MSM_GSBI9_PHYS 0x19900000
7383#define GSBI_DUAL_MODE_CODE 0x60
7384
7385static void __init msm8x60_init_buses(void)
7386{
7387#ifdef CONFIG_I2C_QUP
7388 void *gsbi_mem = ioremap_nocache(0x19C00000, 4);
7389 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI12 */
7390 writel_relaxed(0x6 << 4, gsbi_mem);
7391 /* Ensure protocol code is written before proceeding further */
7392 mb();
7393 iounmap(gsbi_mem);
7394
7395 msm_gsbi3_qup_i2c_device.dev.platform_data = &msm_gsbi3_qup_i2c_pdata;
7396 msm_gsbi4_qup_i2c_device.dev.platform_data = &msm_gsbi4_qup_i2c_pdata;
7397 msm_gsbi7_qup_i2c_device.dev.platform_data = &msm_gsbi7_qup_i2c_pdata;
7398 msm_gsbi8_qup_i2c_device.dev.platform_data = &msm_gsbi8_qup_i2c_pdata;
7399
7400#ifdef CONFIG_MSM_GSBI9_UART
7401 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7402 /* Setting protocol code to 0x60 for dual UART/I2C in GSBI9 */
7403 gsbi_mem = ioremap_nocache(MSM_GSBI9_PHYS, 4);
7404 writel_relaxed(GSBI_DUAL_MODE_CODE, gsbi_mem);
7405 iounmap(gsbi_mem);
7406 msm_gsbi9_qup_i2c_pdata.use_gsbi_shared_mode = 1;
7407 }
7408#endif
7409 msm_gsbi9_qup_i2c_device.dev.platform_data = &msm_gsbi9_qup_i2c_pdata;
7410 msm_gsbi12_qup_i2c_device.dev.platform_data = &msm_gsbi12_qup_i2c_pdata;
7411#endif
7412#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7413 msm_gsbi1_qup_spi_device.dev.platform_data = &msm_gsbi1_qup_spi_pdata;
7414#endif
7415#ifdef CONFIG_I2C_SSBI
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007416 msm_device_ssbi3.dev.platform_data = &msm_ssbi3_pdata;
7417#endif
7418
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307419#ifdef CONFIG_MSM_SSBI
7420 msm_device_ssbi_pmic1.dev.platform_data =
7421 &msm8x60_ssbi_pm8058_pdata;
Anirudh Ghayalc49157f2011-11-09 14:49:59 +05307422 msm_device_ssbi_pmic2.dev.platform_data =
7423 &msm8x60_ssbi_pm8901_pdata;
Anirudh Ghayal9d9cdc22011-10-10 17:17:07 +05307424#endif
7425
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007426 if (machine_is_msm8x60_fluid()) {
7427#if (defined(CONFIG_USB_EHCI_MSM_72K) && \
7428 (defined(CONFIG_SMB137B_CHARGER) || \
7429 defined(CONFIG_SMB137B_CHARGER_MODULE)))
7430 msm_otg_pdata.vbus_power = msm_hsusb_smb137b_vbus_power;
7431#endif
7432#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
7433 msm_gsbi10_qup_spi_device.dev.platform_data =
7434 &msm_gsbi10_qup_spi_pdata;
7435#endif
7436 }
7437
Lena Salman57d167e2012-03-21 19:46:38 +02007438#if defined(CONFIG_USB_MSM_72K) || defined(CONFIG_USB_EHCI_HCD)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007439 /*
7440 * We can not put USB regulators (8058_l6 and 8058_l7) in LPM
7441 * when we depend on USB PHY for VBUS/ID notifications. VBUS
7442 * and ID notifications are available only on V2 surf and FFA
7443 * with a hardware workaround.
7444 */
7445 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2 &&
7446 (machine_is_msm8x60_surf() ||
7447 (machine_is_msm8x60_ffa() &&
7448 pmic_id_notif_supported)))
7449 msm_otg_pdata.phy_can_powercollapse = 1;
7450 msm_device_otg.dev.platform_data = &msm_otg_pdata;
7451#endif
7452
Lena Salman57d167e2012-03-21 19:46:38 +02007453#ifdef CONFIG_USB_MSM_72K
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007454 msm_device_gadget_peripheral.dev.platform_data = &msm_gadget_pdata;
7455#endif
7456
7457#ifdef CONFIG_SERIAL_MSM_HS
7458 msm_uart_dm1_pdata.wakeup_irq = gpio_to_irq(54); /* GSBI6(2) */
7459 msm_device_uart_dm1.dev.platform_data = &msm_uart_dm1_pdata;
7460#endif
7461#ifdef CONFIG_MSM_GSBI9_UART
7462 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
7463 msm_device_uart_gsbi9 = msm_add_gsbi9_uart();
7464 if (IS_ERR(msm_device_uart_gsbi9))
7465 pr_err("%s(): Failed to create uart gsbi9 device\n",
7466 __func__);
7467 }
7468#endif
7469
7470#ifdef CONFIG_MSM_BUS_SCALING
7471
7472 /* RPM calls are only enabled on V2 */
7473 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) == 2) {
7474 msm_bus_apps_fabric_pdata.rpm_enabled = 1;
7475 msm_bus_sys_fabric_pdata.rpm_enabled = 1;
7476 msm_bus_mm_fabric_pdata.rpm_enabled = 1;
7477 msm_bus_sys_fpb_pdata.rpm_enabled = 1;
7478 msm_bus_cpss_fpb_pdata.rpm_enabled = 1;
7479 }
7480
7481 msm_bus_apps_fabric.dev.platform_data = &msm_bus_apps_fabric_pdata;
7482 msm_bus_sys_fabric.dev.platform_data = &msm_bus_sys_fabric_pdata;
7483 msm_bus_mm_fabric.dev.platform_data = &msm_bus_mm_fabric_pdata;
7484 msm_bus_sys_fpb.dev.platform_data = &msm_bus_sys_fpb_pdata;
7485 msm_bus_cpss_fpb.dev.platform_data = &msm_bus_cpss_fpb_pdata;
7486#endif
7487}
7488
7489static void __init msm8x60_map_io(void)
7490{
7491 msm_shared_ram_phys = MSM_SHARED_RAM_PHYS;
7492 msm_map_msm8x60_io();
Jeff Ohlstein3a77f9f2011-09-06 14:50:20 -07007493
7494 if (socinfo_init() < 0)
7495 pr_err("socinfo_init() failed!\n");
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007496}
7497
7498/*
7499 * Most segments of the EBI2 bus are disabled by default.
7500 */
7501static void __init msm8x60_init_ebi2(void)
7502{
7503 uint32_t ebi2_cfg;
7504 void *ebi2_cfg_ptr;
Terence Hampsonb36a38c2011-09-19 19:10:40 -04007505 struct clk *mem_clk = clk_get_sys("msm_ebi2", "mem_clk");
7506
7507 if (IS_ERR(mem_clk)) {
7508 pr_err("%s: clk_get_sys(%s,%s), failed", __func__,
7509 "msm_ebi2", "mem_clk");
7510 return;
7511 }
7512 clk_enable(mem_clk);
7513 clk_put(mem_clk);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007514
7515 ebi2_cfg_ptr = ioremap_nocache(0x1a100000, sizeof(uint32_t));
7516 if (ebi2_cfg_ptr != 0) {
7517 ebi2_cfg = readl_relaxed(ebi2_cfg_ptr);
7518
7519 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007520 machine_is_msm8x60_fluid() ||
7521 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007522 ebi2_cfg |= (1 << 4) | (1 << 5); /* CS2, CS3 */
7523 else if (machine_is_msm8x60_sim())
7524 ebi2_cfg |= (1 << 4); /* CS2 */
7525 else if (machine_is_msm8x60_rumi3())
7526 ebi2_cfg |= (1 << 5); /* CS3 */
7527
7528 writel_relaxed(ebi2_cfg, ebi2_cfg_ptr);
7529 iounmap(ebi2_cfg_ptr);
7530 }
7531
7532 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -04007533 machine_is_msm8x60_fluid() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007534 ebi2_cfg_ptr = ioremap_nocache(0x1a110000, SZ_4K);
7535 if (ebi2_cfg_ptr != 0) {
7536 /* EBI2_XMEM_CFG:PWRSAVE_MODE off */
7537 writel_relaxed(0UL, ebi2_cfg_ptr);
7538
7539 /* CS2: Delay 9 cycles (140ns@64MHz) between SMSC
7540 * LAN9221 Ethernet controller reads and writes.
7541 * The lowest 4 bits are the read delay, the next
7542 * 4 are the write delay. */
7543 writel_relaxed(0x031F1C99, ebi2_cfg_ptr + 0x10);
7544#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
7545 /*
7546 * RECOVERY=5, HOLD_WR=1
7547 * INIT_LATENCY_WR=1, INIT_LATENCY_RD=1
7548 * WAIT_WR=1, WAIT_RD=2
7549 */
7550 writel_relaxed(0x51010112, ebi2_cfg_ptr + 0x14);
7551 /*
7552 * HOLD_RD=1
7553 * ADV_OE_RECOVERY=0, ADDR_HOLD_ENA=1
7554 */
7555 writel_relaxed(0x01000020, ebi2_cfg_ptr + 0x34);
7556#else
7557 /* EBI2 CS3 muxed address/data,
7558 * two cyc addr enable */
7559 writel_relaxed(0xA3030020, ebi2_cfg_ptr + 0x34);
7560
7561#endif
7562 iounmap(ebi2_cfg_ptr);
7563 }
7564 }
7565}
7566
7567static void __init msm8x60_configure_smc91x(void)
7568{
7569 if (machine_is_msm8x60_sim()) {
7570
7571 smc91x_resources[0].start = 0x1b800300;
7572 smc91x_resources[0].end = 0x1b8003ff;
7573
7574 smc91x_resources[1].start = (NR_MSM_IRQS + 40);
7575 smc91x_resources[1].end = (NR_MSM_IRQS + 40);
7576
7577 } else if (machine_is_msm8x60_rumi3()) {
7578
7579 smc91x_resources[0].start = 0x1d000300;
7580 smc91x_resources[0].end = 0x1d0003ff;
7581
7582 smc91x_resources[1].start = TLMM_MSM_DIR_CONN_IRQ_0;
7583 smc91x_resources[1].end = TLMM_MSM_DIR_CONN_IRQ_0;
7584 }
7585}
7586
7587static void __init msm8x60_init_tlmm(void)
7588{
7589 if (machine_is_msm8x60_rumi3())
7590 msm_gpio_install_direct_irq(0, 0, 1);
7591}
7592
7593#if (defined(CONFIG_MMC_MSM_SDC1_SUPPORT)\
7594 || defined(CONFIG_MMC_MSM_SDC2_SUPPORT)\
7595 || defined(CONFIG_MMC_MSM_SDC3_SUPPORT)\
7596 || defined(CONFIG_MMC_MSM_SDC4_SUPPORT)\
7597 || defined(CONFIG_MMC_MSM_SDC5_SUPPORT))
7598
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007599/* 8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007600#define MAX_SDCC_CONTROLLER 5
7601
7602struct msm_sdcc_gpio {
7603 /* maximum 10 GPIOs per SDCC controller */
7604 s16 no;
7605 /* name of this GPIO */
7606 const char *name;
7607 bool always_on;
7608 bool is_enabled;
7609};
7610
7611#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7612static struct msm_sdcc_gpio sdc1_gpio_cfg[] = {
7613 {159, "sdc1_dat_0"},
7614 {160, "sdc1_dat_1"},
7615 {161, "sdc1_dat_2"},
7616 {162, "sdc1_dat_3"},
7617#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
7618 {163, "sdc1_dat_4"},
7619 {164, "sdc1_dat_5"},
7620 {165, "sdc1_dat_6"},
7621 {166, "sdc1_dat_7"},
7622#endif
7623 {167, "sdc1_clk"},
7624 {168, "sdc1_cmd"}
7625};
7626#endif
7627
7628#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7629static struct msm_sdcc_gpio sdc2_gpio_cfg[] = {
7630 {143, "sdc2_dat_0"},
7631 {144, "sdc2_dat_1", 1},
7632 {145, "sdc2_dat_2"},
7633 {146, "sdc2_dat_3"},
7634#ifdef CONFIG_MMC_MSM_SDC2_8_BIT_SUPPORT
7635 {147, "sdc2_dat_4"},
7636 {148, "sdc2_dat_5"},
7637 {149, "sdc2_dat_6"},
7638 {150, "sdc2_dat_7"},
7639#endif
7640 {151, "sdc2_cmd"},
7641 {152, "sdc2_clk", 1}
7642};
7643#endif
7644
7645#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7646static struct msm_sdcc_gpio sdc5_gpio_cfg[] = {
7647 {95, "sdc5_cmd"},
7648 {96, "sdc5_dat_3"},
7649 {97, "sdc5_clk", 1},
7650 {98, "sdc5_dat_2"},
7651 {99, "sdc5_dat_1", 1},
7652 {100, "sdc5_dat_0"}
7653};
7654#endif
7655
7656struct msm_sdcc_pad_pull_cfg {
7657 enum msm_tlmm_pull_tgt pull;
7658 u32 pull_val;
7659};
7660
7661struct msm_sdcc_pad_drv_cfg {
7662 enum msm_tlmm_hdrive_tgt drv;
7663 u32 drv_val;
7664};
7665
7666#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7667static struct msm_sdcc_pad_drv_cfg sdc3_pad_on_drv_cfg[] = {
7668 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_8MA},
7669 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_8MA},
7670 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_8MA}
7671};
7672
7673static struct msm_sdcc_pad_pull_cfg sdc3_pad_on_pull_cfg[] = {
7674 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_UP},
7675 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_UP}
7676};
7677
7678static struct msm_sdcc_pad_drv_cfg sdc3_pad_off_drv_cfg[] = {
7679 {TLMM_HDRV_SDC3_CLK, GPIO_CFG_2MA},
7680 {TLMM_HDRV_SDC3_CMD, GPIO_CFG_2MA},
7681 {TLMM_HDRV_SDC3_DATA, GPIO_CFG_2MA}
7682};
7683
7684static struct msm_sdcc_pad_pull_cfg sdc3_pad_off_pull_cfg[] = {
7685 {TLMM_PULL_SDC3_CMD, GPIO_CFG_PULL_DOWN},
7686 {TLMM_PULL_SDC3_DATA, GPIO_CFG_PULL_DOWN}
7687};
7688#endif
7689
7690#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7691static struct msm_sdcc_pad_drv_cfg sdc4_pad_on_drv_cfg[] = {
7692 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_8MA},
7693 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_8MA},
7694 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_8MA}
7695};
7696
7697static struct msm_sdcc_pad_pull_cfg sdc4_pad_on_pull_cfg[] = {
7698 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_UP},
7699 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_UP}
7700};
7701
7702static struct msm_sdcc_pad_drv_cfg sdc4_pad_off_drv_cfg[] = {
7703 {TLMM_HDRV_SDC4_CLK, GPIO_CFG_2MA},
7704 {TLMM_HDRV_SDC4_CMD, GPIO_CFG_2MA},
7705 {TLMM_HDRV_SDC4_DATA, GPIO_CFG_2MA}
7706};
7707
7708static struct msm_sdcc_pad_pull_cfg sdc4_pad_off_pull_cfg[] = {
7709 {TLMM_PULL_SDC4_CMD, GPIO_CFG_PULL_DOWN},
7710 {TLMM_PULL_SDC4_DATA, GPIO_CFG_PULL_DOWN}
7711};
7712#endif
7713
7714struct msm_sdcc_pin_cfg {
7715 /*
7716 * = 1 if controller pins are using gpios
7717 * = 0 if controller has dedicated MSM pins
7718 */
7719 u8 is_gpio;
7720 u8 cfg_sts;
7721 u8 gpio_data_size;
7722 struct msm_sdcc_gpio *gpio_data;
7723 struct msm_sdcc_pad_drv_cfg *pad_drv_on_data;
7724 struct msm_sdcc_pad_drv_cfg *pad_drv_off_data;
7725 struct msm_sdcc_pad_pull_cfg *pad_pull_on_data;
7726 struct msm_sdcc_pad_pull_cfg *pad_pull_off_data;
7727 u8 pad_drv_data_size;
7728 u8 pad_pull_data_size;
7729 u8 sdio_lpm_gpio_cfg;
7730};
7731
7732
7733static struct msm_sdcc_pin_cfg sdcc_pin_cfg_data[MAX_SDCC_CONTROLLER] = {
7734#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
7735 [0] = {
7736 .is_gpio = 1,
7737 .gpio_data_size = ARRAY_SIZE(sdc1_gpio_cfg),
7738 .gpio_data = sdc1_gpio_cfg
7739 },
7740#endif
7741#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
7742 [1] = {
7743 .is_gpio = 1,
7744 .gpio_data_size = ARRAY_SIZE(sdc2_gpio_cfg),
7745 .gpio_data = sdc2_gpio_cfg
7746 },
7747#endif
7748#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
7749 [2] = {
7750 .is_gpio = 0,
7751 .pad_drv_on_data = sdc3_pad_on_drv_cfg,
7752 .pad_drv_off_data = sdc3_pad_off_drv_cfg,
7753 .pad_pull_on_data = sdc3_pad_on_pull_cfg,
7754 .pad_pull_off_data = sdc3_pad_off_pull_cfg,
7755 .pad_drv_data_size = ARRAY_SIZE(sdc3_pad_on_drv_cfg),
7756 .pad_pull_data_size = ARRAY_SIZE(sdc3_pad_on_pull_cfg)
7757 },
7758#endif
7759#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
7760 [3] = {
7761 .is_gpio = 0,
7762 .pad_drv_on_data = sdc4_pad_on_drv_cfg,
7763 .pad_drv_off_data = sdc4_pad_off_drv_cfg,
7764 .pad_pull_on_data = sdc4_pad_on_pull_cfg,
7765 .pad_pull_off_data = sdc4_pad_off_pull_cfg,
7766 .pad_drv_data_size = ARRAY_SIZE(sdc4_pad_on_drv_cfg),
7767 .pad_pull_data_size = ARRAY_SIZE(sdc4_pad_on_pull_cfg)
7768 },
7769#endif
7770#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
7771 [4] = {
7772 .is_gpio = 1,
7773 .gpio_data_size = ARRAY_SIZE(sdc5_gpio_cfg),
7774 .gpio_data = sdc5_gpio_cfg
7775 }
7776#endif
7777};
7778
7779static int msm_sdcc_setup_gpio(int dev_id, unsigned int enable)
7780{
7781 int rc = 0;
7782 struct msm_sdcc_pin_cfg *curr;
7783 int n;
7784
7785 curr = &sdcc_pin_cfg_data[dev_id - 1];
7786 if (!curr->gpio_data)
7787 goto out;
7788
7789 for (n = 0; n < curr->gpio_data_size; n++) {
7790 if (enable) {
7791
7792 if (curr->gpio_data[n].always_on &&
7793 curr->gpio_data[n].is_enabled)
7794 continue;
7795 pr_debug("%s: enable: %s\n", __func__,
7796 curr->gpio_data[n].name);
7797 rc = gpio_request(curr->gpio_data[n].no,
7798 curr->gpio_data[n].name);
7799 if (rc) {
7800 pr_err("%s: gpio_request(%d, %s)"
7801 "failed", __func__,
7802 curr->gpio_data[n].no,
7803 curr->gpio_data[n].name);
7804 goto free_gpios;
7805 }
7806 /* set direction as output for all GPIOs */
7807 rc = gpio_direction_output(
7808 curr->gpio_data[n].no, 1);
7809 if (rc) {
7810 pr_err("%s: gpio_direction_output"
7811 "(%d, 1) failed\n", __func__,
7812 curr->gpio_data[n].no);
7813 goto free_gpios;
7814 }
7815 curr->gpio_data[n].is_enabled = 1;
7816 } else {
7817 /*
7818 * now free this GPIO which will put GPIO
7819 * in low power mode and will also put GPIO
7820 * in input mode
7821 */
7822 if (curr->gpio_data[n].always_on)
7823 continue;
7824 pr_debug("%s: disable: %s\n", __func__,
7825 curr->gpio_data[n].name);
7826 gpio_free(curr->gpio_data[n].no);
7827 curr->gpio_data[n].is_enabled = 0;
7828 }
7829 }
7830 curr->cfg_sts = enable;
7831 goto out;
7832
7833free_gpios:
7834 for (; n >= 0; n--)
7835 gpio_free(curr->gpio_data[n].no);
7836out:
7837 return rc;
7838}
7839
7840static int msm_sdcc_setup_pad(int dev_id, unsigned int enable)
7841{
7842 int rc = 0;
7843 struct msm_sdcc_pin_cfg *curr;
7844 int n;
7845
7846 curr = &sdcc_pin_cfg_data[dev_id - 1];
7847 if (!curr->pad_drv_on_data || !curr->pad_pull_on_data)
7848 goto out;
7849
7850 if (enable) {
7851 /*
7852 * set up the normal driver strength and
7853 * pull config for pads
7854 */
7855 for (n = 0; n < curr->pad_drv_data_size; n++) {
7856 if (curr->sdio_lpm_gpio_cfg) {
7857 if (curr->pad_drv_on_data[n].drv ==
7858 TLMM_HDRV_SDC4_DATA)
7859 continue;
7860 }
7861 msm_tlmm_set_hdrive(curr->pad_drv_on_data[n].drv,
7862 curr->pad_drv_on_data[n].drv_val);
7863 }
7864 for (n = 0; n < curr->pad_pull_data_size; n++) {
7865 if (curr->sdio_lpm_gpio_cfg) {
7866 if (curr->pad_pull_on_data[n].pull ==
7867 TLMM_PULL_SDC4_DATA)
7868 continue;
7869 }
7870 msm_tlmm_set_pull(curr->pad_pull_on_data[n].pull,
7871 curr->pad_pull_on_data[n].pull_val);
7872 }
7873 } else {
7874 /* set the low power config for pads */
7875 for (n = 0; n < curr->pad_drv_data_size; n++) {
7876 if (curr->sdio_lpm_gpio_cfg) {
7877 if (curr->pad_drv_off_data[n].drv ==
7878 TLMM_HDRV_SDC4_DATA)
7879 continue;
7880 }
7881 msm_tlmm_set_hdrive(
7882 curr->pad_drv_off_data[n].drv,
7883 curr->pad_drv_off_data[n].drv_val);
7884 }
7885 for (n = 0; n < curr->pad_pull_data_size; n++) {
7886 if (curr->sdio_lpm_gpio_cfg) {
7887 if (curr->pad_pull_off_data[n].pull ==
7888 TLMM_PULL_SDC4_DATA)
7889 continue;
7890 }
7891 msm_tlmm_set_pull(
7892 curr->pad_pull_off_data[n].pull,
7893 curr->pad_pull_off_data[n].pull_val);
7894 }
7895 }
7896 curr->cfg_sts = enable;
7897out:
7898 return rc;
7899}
7900
7901struct sdcc_reg {
7902 /* VDD/VCC/VCCQ regulator name on PMIC8058/PMIC8089*/
7903 const char *reg_name;
7904 /*
7905 * is set voltage supported for this regulator?
7906 * 0 = not supported, 1 = supported
7907 */
7908 unsigned char set_voltage_sup;
7909 /* voltage level to be set */
7910 unsigned int level;
7911 /* VDD/VCC/VCCQ voltage regulator handle */
7912 struct regulator *reg;
7913 /* is this regulator enabled? */
7914 bool enabled;
7915 /* is this regulator needs to be always on? */
7916 bool always_on;
7917 /* is operating power mode setting required for this regulator? */
7918 bool op_pwr_mode_sup;
7919 /* Load values for low power and high power mode */
7920 unsigned int lpm_uA;
7921 unsigned int hpm_uA;
7922};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007923/* all SDCC controllers require VDD/VCC voltage */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007924static struct sdcc_reg sdcc_vdd_reg_data[MAX_SDCC_CONTROLLER];
7925/* only SDCC1 requires VCCQ voltage */
7926static struct sdcc_reg sdcc_vccq_reg_data[1];
7927/* all SDCC controllers may require voting for VDD PAD voltage */
7928static struct sdcc_reg sdcc_vddp_reg_data[MAX_SDCC_CONTROLLER];
7929
7930struct sdcc_reg_data {
7931 struct sdcc_reg *vdd_data; /* keeps VDD/VCC regulator info */
7932 struct sdcc_reg *vccq_data; /* keeps VCCQ regulator info */
7933 struct sdcc_reg *vddp_data; /* keeps VDD Pad regulator info */
7934 unsigned char sts; /* regulator enable/disable status */
7935};
Stepan Moskovchenko73b943b2011-10-31 22:43:00 -07007936/* msm8x60 has 5 SDCC controllers */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07007937static struct sdcc_reg_data sdcc_vreg_data[MAX_SDCC_CONTROLLER];
7938
7939static int msm_sdcc_vreg_init_reg(struct sdcc_reg *vreg)
7940{
7941 int rc = 0;
7942
7943 /* Get the regulator handle */
7944 vreg->reg = regulator_get(NULL, vreg->reg_name);
7945 if (IS_ERR(vreg->reg)) {
7946 rc = PTR_ERR(vreg->reg);
7947 pr_err("%s: regulator_get(%s) failed. rc=%d\n",
7948 __func__, vreg->reg_name, rc);
7949 goto out;
7950 }
7951
7952 /* Set the voltage level if required */
7953 if (vreg->set_voltage_sup) {
7954 rc = regulator_set_voltage(vreg->reg, vreg->level,
7955 vreg->level);
7956 if (rc) {
7957 pr_err("%s: regulator_set_voltage(%s) failed rc=%d\n",
7958 __func__, vreg->reg_name, rc);
7959 goto vreg_put;
7960 }
7961 }
7962 goto out;
7963
7964vreg_put:
7965 regulator_put(vreg->reg);
7966out:
7967 return rc;
7968}
7969
7970static inline void msm_sdcc_vreg_deinit_reg(struct sdcc_reg *vreg)
7971{
7972 regulator_put(vreg->reg);
7973}
7974
7975/* this init function should be called only once for each SDCC */
7976static int msm_sdcc_vreg_init(int dev_id, unsigned char init)
7977{
7978 int rc = 0;
7979 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
7980 struct sdcc_reg_data *curr;
7981
7982 curr = &sdcc_vreg_data[dev_id - 1];
7983 curr_vdd_reg = curr->vdd_data;
7984 curr_vccq_reg = curr->vccq_data;
7985 curr_vddp_reg = curr->vddp_data;
7986
7987 if (init) {
7988 /*
7989 * get the regulator handle from voltage regulator framework
7990 * and then try to set the voltage level for the regulator
7991 */
7992 if (curr_vdd_reg) {
7993 rc = msm_sdcc_vreg_init_reg(curr_vdd_reg);
7994 if (rc)
7995 goto out;
7996 }
7997 if (curr_vccq_reg) {
7998 rc = msm_sdcc_vreg_init_reg(curr_vccq_reg);
7999 if (rc)
8000 goto vdd_reg_deinit;
8001 }
8002 if (curr_vddp_reg) {
8003 rc = msm_sdcc_vreg_init_reg(curr_vddp_reg);
8004 if (rc)
8005 goto vccq_reg_deinit;
8006 }
8007 goto out;
8008 } else
8009 /* deregister with all regulators from regulator framework */
8010 goto vddp_reg_deinit;
8011
8012vddp_reg_deinit:
8013 if (curr_vddp_reg)
8014 msm_sdcc_vreg_deinit_reg(curr_vddp_reg);
8015vccq_reg_deinit:
8016 if (curr_vccq_reg)
8017 msm_sdcc_vreg_deinit_reg(curr_vccq_reg);
8018vdd_reg_deinit:
8019 if (curr_vdd_reg)
8020 msm_sdcc_vreg_deinit_reg(curr_vdd_reg);
8021out:
8022 return rc;
8023}
8024
8025static int msm_sdcc_vreg_enable(struct sdcc_reg *vreg)
8026{
8027 int rc;
8028
8029 if (!vreg->enabled) {
8030 rc = regulator_enable(vreg->reg);
8031 if (rc) {
8032 pr_err("%s: regulator_enable(%s) failed. rc=%d\n",
8033 __func__, vreg->reg_name, rc);
8034 goto out;
8035 }
8036 vreg->enabled = 1;
8037 }
8038
8039 /* Put always_on regulator in HPM (high power mode) */
8040 if (vreg->always_on && vreg->op_pwr_mode_sup) {
8041 rc = regulator_set_optimum_mode(vreg->reg, vreg->hpm_uA);
8042 if (rc < 0) {
8043 pr_err("%s: reg=%s: HPM setting failed"
8044 " hpm_uA=%d, rc=%d\n",
8045 __func__, vreg->reg_name,
8046 vreg->hpm_uA, rc);
8047 goto vreg_disable;
8048 }
8049 rc = 0;
8050 }
8051 goto out;
8052
8053vreg_disable:
8054 regulator_disable(vreg->reg);
8055 vreg->enabled = 0;
8056out:
8057 return rc;
8058}
8059
8060static int msm_sdcc_vreg_disable(struct sdcc_reg *vreg)
8061{
8062 int rc;
8063
8064 /* Never disable always_on regulator */
8065 if (!vreg->always_on) {
8066 rc = regulator_disable(vreg->reg);
8067 if (rc) {
8068 pr_err("%s: regulator_disable(%s) failed. rc=%d\n",
8069 __func__, vreg->reg_name, rc);
8070 goto out;
8071 }
8072 vreg->enabled = 0;
8073 }
8074
8075 /* Put always_on regulator in LPM (low power mode) */
8076 if (vreg->always_on && vreg->op_pwr_mode_sup) {
8077 rc = regulator_set_optimum_mode(vreg->reg, vreg->lpm_uA);
8078 if (rc < 0) {
8079 pr_err("%s: reg=%s: LPM setting failed"
8080 " lpm_uA=%d, rc=%d\n",
8081 __func__,
8082 vreg->reg_name,
8083 vreg->lpm_uA, rc);
8084 goto out;
8085 }
8086 rc = 0;
8087 }
8088
8089out:
8090 return rc;
8091}
8092
8093static int msm_sdcc_setup_vreg(int dev_id, unsigned char enable)
8094{
8095 int rc = 0;
8096 struct sdcc_reg *curr_vdd_reg, *curr_vccq_reg, *curr_vddp_reg;
8097 struct sdcc_reg_data *curr;
8098
8099 curr = &sdcc_vreg_data[dev_id - 1];
8100 curr_vdd_reg = curr->vdd_data;
8101 curr_vccq_reg = curr->vccq_data;
8102 curr_vddp_reg = curr->vddp_data;
8103
8104 /* check if regulators are initialized or not? */
8105 if ((curr_vdd_reg && !curr_vdd_reg->reg) ||
8106 (curr_vccq_reg && !curr_vccq_reg->reg) ||
8107 (curr_vddp_reg && !curr_vddp_reg->reg)) {
8108 /* initialize voltage regulators required for this SDCC */
8109 rc = msm_sdcc_vreg_init(dev_id, 1);
8110 if (rc) {
8111 pr_err("%s: regulator init failed = %d\n",
8112 __func__, rc);
8113 goto out;
8114 }
8115 }
8116
8117 if (curr->sts == enable)
8118 goto out;
8119
8120 if (curr_vdd_reg) {
8121 if (enable)
8122 rc = msm_sdcc_vreg_enable(curr_vdd_reg);
8123 else
8124 rc = msm_sdcc_vreg_disable(curr_vdd_reg);
8125 if (rc)
8126 goto out;
8127 }
8128
8129 if (curr_vccq_reg) {
8130 if (enable)
8131 rc = msm_sdcc_vreg_enable(curr_vccq_reg);
8132 else
8133 rc = msm_sdcc_vreg_disable(curr_vccq_reg);
8134 if (rc)
8135 goto out;
8136 }
8137
8138 if (curr_vddp_reg) {
8139 if (enable)
8140 rc = msm_sdcc_vreg_enable(curr_vddp_reg);
8141 else
8142 rc = msm_sdcc_vreg_disable(curr_vddp_reg);
8143 if (rc)
8144 goto out;
8145 }
8146 curr->sts = enable;
8147
8148out:
8149 return rc;
8150}
8151
8152static u32 msm_sdcc_setup_power(struct device *dv, unsigned int vdd)
8153{
8154 u32 rc_pin_cfg = 0;
8155 u32 rc_vreg_cfg = 0;
8156 u32 rc = 0;
8157 struct platform_device *pdev;
8158 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8159
8160 pdev = container_of(dv, struct platform_device, dev);
8161
8162 /* setup gpio/pad */
8163 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8164 if (curr_pin_cfg->cfg_sts == !!vdd)
8165 goto setup_vreg;
8166
8167 if (curr_pin_cfg->is_gpio)
8168 rc_pin_cfg = msm_sdcc_setup_gpio(pdev->id, !!vdd);
8169 else
8170 rc_pin_cfg = msm_sdcc_setup_pad(pdev->id, !!vdd);
8171
8172setup_vreg:
8173 /* setup voltage regulators */
8174 rc_vreg_cfg = msm_sdcc_setup_vreg(pdev->id, !!vdd);
8175
8176 if (rc_pin_cfg || rc_vreg_cfg)
8177 rc = rc_pin_cfg ? rc_pin_cfg : rc_vreg_cfg;
8178
8179 return rc;
8180}
8181
8182static void msm_sdcc_sdio_lpm_gpio(struct device *dv, unsigned int active)
8183{
8184 struct msm_sdcc_pin_cfg *curr_pin_cfg;
8185 struct platform_device *pdev;
8186
8187 pdev = container_of(dv, struct platform_device, dev);
8188 /* setup gpio/pad */
8189 curr_pin_cfg = &sdcc_pin_cfg_data[pdev->id - 1];
8190
8191 if (curr_pin_cfg->cfg_sts == active)
8192 return;
8193
8194 curr_pin_cfg->sdio_lpm_gpio_cfg = 1;
8195 if (curr_pin_cfg->is_gpio)
8196 msm_sdcc_setup_gpio(pdev->id, active);
8197 else
8198 msm_sdcc_setup_pad(pdev->id, active);
8199 curr_pin_cfg->sdio_lpm_gpio_cfg = 0;
8200}
8201
8202static int msm_sdc3_get_wpswitch(struct device *dev)
8203{
8204 struct platform_device *pdev;
8205 int status;
8206 pdev = container_of(dev, struct platform_device, dev);
8207
8208 status = gpio_request(GPIO_SDC_WP, "SD_WP_Switch");
8209 if (status) {
8210 pr_err("%s:Failed to request GPIO %d\n",
8211 __func__, GPIO_SDC_WP);
8212 } else {
8213 status = gpio_direction_input(GPIO_SDC_WP);
8214 if (!status) {
8215 status = gpio_get_value_cansleep(GPIO_SDC_WP);
8216 pr_info("%s: WP Status for Slot %d = %d\n",
8217 __func__, pdev->id, status);
8218 }
8219 gpio_free(GPIO_SDC_WP);
8220 }
8221 return status;
8222}
8223
8224#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8225int sdc5_register_status_notify(void (*callback)(int, void *),
8226 void *dev_id)
8227{
8228 sdc5_status_notify_cb = callback;
8229 sdc5_status_notify_cb_devid = dev_id;
8230 return 0;
8231}
8232#endif
8233
8234#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8235int sdc2_register_status_notify(void (*callback)(int, void *),
8236 void *dev_id)
8237{
8238 sdc2_status_notify_cb = callback;
8239 sdc2_status_notify_cb_devid = dev_id;
8240 return 0;
8241}
8242#endif
8243
8244/* Interrupt handler for SDC2 and SDC5 detection
8245 * This function uses dual-edge interrputs settings in order
8246 * to get SDIO detection when the GPIO is rising and SDIO removal
8247 * when the GPIO is falling */
8248static irqreturn_t msm8x60_multi_sdio_slot_status_irq(int irq, void *dev_id)
8249{
8250 int status;
8251
8252 if (!machine_is_msm8x60_fusion() &&
8253 !machine_is_msm8x60_fusn_ffa())
8254 return IRQ_NONE;
8255
8256 status = gpio_get_value(MDM2AP_SYNC);
8257 pr_info("%s: MDM2AP_SYNC Status = %d\n",
8258 __func__, status);
8259
8260#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8261 if (sdc2_status_notify_cb) {
8262 pr_info("%s: calling sdc2_status_notify_cb\n", __func__);
8263 sdc2_status_notify_cb(status,
8264 sdc2_status_notify_cb_devid);
8265 }
8266#endif
8267
8268#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8269 if (sdc5_status_notify_cb) {
8270 pr_info("%s: calling sdc5_status_notify_cb\n", __func__);
8271 sdc5_status_notify_cb(status,
8272 sdc5_status_notify_cb_devid);
8273 }
8274#endif
8275 return IRQ_HANDLED;
8276}
8277
8278static int msm8x60_multi_sdio_init(void)
8279{
8280 int ret, irq_num;
8281
8282 if (!machine_is_msm8x60_fusion() &&
8283 !machine_is_msm8x60_fusn_ffa())
8284 return 0;
8285
8286 ret = msm_gpiomux_get(MDM2AP_SYNC);
8287 if (ret) {
8288 pr_err("%s:Failed to request GPIO %d, ret=%d\n",
8289 __func__, MDM2AP_SYNC, ret);
8290 return ret;
8291 }
8292
8293 irq_num = gpio_to_irq(MDM2AP_SYNC);
8294
8295 ret = request_irq(irq_num,
8296 msm8x60_multi_sdio_slot_status_irq,
8297 IRQ_TYPE_EDGE_BOTH,
8298 "sdio_multidetection", NULL);
8299
8300 if (ret) {
8301 pr_err("%s:Failed to request irq, ret=%d\n",
8302 __func__, ret);
8303 return ret;
8304 }
8305
8306 return ret;
8307}
8308
8309#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8310#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8311static unsigned int msm8x60_sdcc_slot_status(struct device *dev)
8312{
8313 int status;
8314
8315 status = gpio_request(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)
8316 , "SD_HW_Detect");
8317 if (status) {
8318 pr_err("%s:Failed to request GPIO %d\n", __func__,
8319 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8320 } else {
8321 status = gpio_direction_input(
8322 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8323 if (!status)
8324 status = !(gpio_get_value_cansleep(
8325 PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1)));
8326 gpio_free(PM8058_GPIO_PM_TO_SYS(PMIC_GPIO_SDC3_DET - 1));
8327 }
8328 return (unsigned int) status;
8329}
8330#endif
8331#endif
8332
8333#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8334static int msm_sdcc_cfg_mpm_sdiowakeup(struct device *dev, unsigned mode)
8335{
8336 struct platform_device *pdev;
8337 enum msm_mpm_pin pin;
8338 int ret = 0;
8339
8340 pdev = container_of(dev, struct platform_device, dev);
8341
8342 /* Only SDCC4 slot connected to WLAN chip has wakeup capability */
8343 if (pdev->id == 4)
8344 pin = MSM_MPM_PIN_SDC4_DAT1;
8345 else
8346 return -EINVAL;
8347
8348 switch (mode) {
8349 case SDC_DAT1_DISABLE:
8350 ret = msm_mpm_enable_pin(pin, 0);
8351 break;
8352 case SDC_DAT1_ENABLE:
8353 ret = msm_mpm_set_pin_type(pin, IRQ_TYPE_LEVEL_LOW);
8354 ret = msm_mpm_enable_pin(pin, 1);
8355 break;
8356 case SDC_DAT1_ENWAKE:
8357 ret = msm_mpm_set_pin_wake(pin, 1);
8358 break;
8359 case SDC_DAT1_DISWAKE:
8360 ret = msm_mpm_set_pin_wake(pin, 0);
8361 break;
8362 default:
8363 ret = -EINVAL;
8364 break;
8365 }
8366 return ret;
8367}
8368#endif
8369#endif
8370
8371#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8372static struct mmc_platform_data msm8x60_sdc1_data = {
8373 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8374 .translate_vdd = msm_sdcc_setup_power,
8375#ifdef CONFIG_MMC_MSM_SDC1_8_BIT_SUPPORT
8376 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8377#else
8378 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8379#endif
8380 .msmsdcc_fmin = 400000,
8381 .msmsdcc_fmid = 24000000,
8382 .msmsdcc_fmax = 48000000,
8383 .nonremovable = 1,
8384 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008385};
8386#endif
8387
8388#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8389static struct mmc_platform_data msm8x60_sdc2_data = {
8390 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8391 .translate_vdd = msm_sdcc_setup_power,
8392 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8393 .mmc_bus_width = MMC_CAP_8_BIT_DATA,
8394 .msmsdcc_fmin = 400000,
8395 .msmsdcc_fmid = 24000000,
8396 .msmsdcc_fmax = 48000000,
8397 .nonremovable = 0,
8398 .pclk_src_dfab = 1,
8399 .register_status_notify = sdc2_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008400#ifdef CONFIG_MSM_SDIO_AL
8401 .is_sdio_al_client = 1,
8402#endif
8403};
8404#endif
8405
8406#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8407static struct mmc_platform_data msm8x60_sdc3_data = {
8408 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8409 .translate_vdd = msm_sdcc_setup_power,
8410 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8411 .wpswitch = msm_sdc3_get_wpswitch,
8412#ifdef CONFIG_MMC_MSM_CARD_HW_DETECTION
8413 .status = msm8x60_sdcc_slot_status,
8414 .status_irq = PM8058_GPIO_IRQ(PM8058_IRQ_BASE,
8415 PMIC_GPIO_SDC3_DET - 1),
8416 .irq_flags = IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
8417#endif
8418 .msmsdcc_fmin = 400000,
8419 .msmsdcc_fmid = 24000000,
8420 .msmsdcc_fmax = 48000000,
8421 .nonremovable = 0,
8422 .pclk_src_dfab = 1,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008423};
8424#endif
8425
8426#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8427static struct mmc_platform_data msm8x60_sdc4_data = {
8428 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
8429 .translate_vdd = msm_sdcc_setup_power,
8430 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8431 .msmsdcc_fmin = 400000,
8432 .msmsdcc_fmid = 24000000,
8433 .msmsdcc_fmax = 48000000,
8434 .nonremovable = 0,
8435 .pclk_src_dfab = 1,
8436 .cfg_mpm_sdiowakeup = msm_sdcc_cfg_mpm_sdiowakeup,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008437};
8438#endif
8439
8440#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8441static struct mmc_platform_data msm8x60_sdc5_data = {
8442 .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29 | MMC_VDD_165_195,
8443 .translate_vdd = msm_sdcc_setup_power,
8444 .sdio_lpm_gpio_setup = msm_sdcc_sdio_lpm_gpio,
8445 .mmc_bus_width = MMC_CAP_4_BIT_DATA,
8446 .msmsdcc_fmin = 400000,
8447 .msmsdcc_fmid = 24000000,
8448 .msmsdcc_fmax = 48000000,
8449 .nonremovable = 0,
8450 .pclk_src_dfab = 1,
8451 .register_status_notify = sdc5_register_status_notify,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008452#ifdef CONFIG_MSM_SDIO_AL
8453 .is_sdio_al_client = 1,
8454#endif
8455};
8456#endif
8457
8458static void __init msm8x60_init_mmc(void)
8459{
8460#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
8461 /* SDCC1 : eMMC card connected */
8462 sdcc_vreg_data[0].vdd_data = &sdcc_vdd_reg_data[0];
8463 sdcc_vreg_data[0].vdd_data->reg_name = "8901_l5";
8464 sdcc_vreg_data[0].vdd_data->set_voltage_sup = 1;
8465 sdcc_vreg_data[0].vdd_data->level = 2850000;
Subhash Jadavania8482a32011-08-08 11:01:44 +05308466 sdcc_vreg_data[0].vdd_data->always_on = 1;
8467 sdcc_vreg_data[0].vdd_data->op_pwr_mode_sup = 1;
8468 sdcc_vreg_data[0].vdd_data->lpm_uA = 9000;
8469 sdcc_vreg_data[0].vdd_data->hpm_uA = 200000;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008470
8471 sdcc_vreg_data[0].vccq_data = &sdcc_vccq_reg_data[0];
8472 sdcc_vreg_data[0].vccq_data->reg_name = "8901_lvs0";
8473 sdcc_vreg_data[0].vccq_data->set_voltage_sup = 0;
8474 sdcc_vreg_data[0].vccq_data->always_on = 1;
8475
8476 msm_add_sdcc(1, &msm8x60_sdc1_data);
8477#endif
8478#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
8479 /*
8480 * MDM SDIO client is connected to SDC2 on charm SURF/FFA
8481 * and no card is connected on 8660 SURF/FFA/FLUID.
8482 */
8483 sdcc_vreg_data[1].vdd_data = &sdcc_vdd_reg_data[1];
8484 sdcc_vreg_data[1].vdd_data->reg_name = "8058_s3";
8485 sdcc_vreg_data[1].vdd_data->set_voltage_sup = 1;
8486 sdcc_vreg_data[1].vdd_data->level = 1800000;
8487
8488 sdcc_vreg_data[1].vccq_data = NULL;
8489
8490 if (machine_is_msm8x60_fusion())
8491 msm8x60_sdc2_data.msmsdcc_fmax = 24000000;
8492 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8493#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8494 msm8x60_sdc2_data.sdiowakeup_irq = gpio_to_irq(144);
8495 msm_sdcc_setup_gpio(2, 1);
8496#endif
8497 msm_add_sdcc(2, &msm8x60_sdc2_data);
8498 }
8499#endif
8500#ifdef CONFIG_MMC_MSM_SDC3_SUPPORT
8501 /* SDCC3 : External card slot connected */
8502 sdcc_vreg_data[2].vdd_data = &sdcc_vdd_reg_data[2];
8503 sdcc_vreg_data[2].vdd_data->reg_name = "8058_l14";
8504 sdcc_vreg_data[2].vdd_data->set_voltage_sup = 1;
8505 sdcc_vreg_data[2].vdd_data->level = 2850000;
8506 sdcc_vreg_data[2].vdd_data->always_on = 1;
8507 sdcc_vreg_data[2].vdd_data->op_pwr_mode_sup = 1;
8508 sdcc_vreg_data[2].vdd_data->lpm_uA = 9000;
8509 sdcc_vreg_data[2].vdd_data->hpm_uA = 200000;
8510
8511 sdcc_vreg_data[2].vccq_data = NULL;
8512
8513 sdcc_vreg_data[2].vddp_data = &sdcc_vddp_reg_data[2];
8514 sdcc_vreg_data[2].vddp_data->reg_name = "8058_l5";
8515 sdcc_vreg_data[2].vddp_data->set_voltage_sup = 1;
8516 sdcc_vreg_data[2].vddp_data->level = 2850000;
8517 sdcc_vreg_data[2].vddp_data->always_on = 1;
8518 sdcc_vreg_data[2].vddp_data->op_pwr_mode_sup = 1;
8519 /* Sleep current required is ~300 uA. But min. RPM
8520 * vote can be in terms of mA (min. 1 mA).
8521 * So let's vote for 2 mA during sleep.
8522 */
8523 sdcc_vreg_data[2].vddp_data->lpm_uA = 2000;
8524 /* Max. Active current required is 16 mA */
8525 sdcc_vreg_data[2].vddp_data->hpm_uA = 16000;
8526
8527 if (machine_is_msm8x60_fluid())
8528 msm8x60_sdc3_data.wpswitch = NULL;
8529 msm_add_sdcc(3, &msm8x60_sdc3_data);
8530#endif
8531#ifdef CONFIG_MMC_MSM_SDC4_SUPPORT
8532 /* SDCC4 : WLAN WCN1314 chip is connected */
8533 sdcc_vreg_data[3].vdd_data = &sdcc_vdd_reg_data[3];
8534 sdcc_vreg_data[3].vdd_data->reg_name = "8058_s3";
8535 sdcc_vreg_data[3].vdd_data->set_voltage_sup = 1;
8536 sdcc_vreg_data[3].vdd_data->level = 1800000;
8537
8538 sdcc_vreg_data[3].vccq_data = NULL;
8539
8540 msm_add_sdcc(4, &msm8x60_sdc4_data);
8541#endif
8542#ifdef CONFIG_MMC_MSM_SDC5_SUPPORT
8543 /*
8544 * MDM SDIO client is connected to SDC5 on charm SURF/FFA
8545 * and no card is connected on 8660 SURF/FFA/FLUID.
8546 */
8547 sdcc_vreg_data[4].vdd_data = &sdcc_vdd_reg_data[4];
8548 sdcc_vreg_data[4].vdd_data->reg_name = "8058_s3";
8549 sdcc_vreg_data[4].vdd_data->set_voltage_sup = 1;
8550 sdcc_vreg_data[4].vdd_data->level = 1800000;
8551
8552 sdcc_vreg_data[4].vccq_data = NULL;
8553
8554 if (machine_is_msm8x60_fusion())
8555 msm8x60_sdc5_data.msmsdcc_fmax = 24000000;
8556 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8557#ifdef CONFIG_MMC_MSM_SDIO_SUPPORT
8558 msm8x60_sdc5_data.sdiowakeup_irq = gpio_to_irq(99);
8559 msm_sdcc_setup_gpio(5, 1);
8560#endif
8561 msm_add_sdcc(5, &msm8x60_sdc5_data);
8562 }
8563#endif
8564}
8565
8566#if !defined(CONFIG_GPIO_SX150X) && !defined(CONFIG_GPIO_SX150X_MODULE)
8567static inline void display_common_power(int on) {}
8568#else
8569
8570#define _GET_REGULATOR(var, name) do { \
8571 if (var == NULL) { \
8572 var = regulator_get(NULL, name); \
8573 if (IS_ERR(var)) { \
8574 pr_err("'%s' regulator not found, rc=%ld\n", \
8575 name, PTR_ERR(var)); \
8576 var = NULL; \
8577 } \
8578 } \
8579} while (0)
8580
8581static int dsub_regulator(int on)
8582{
8583 static struct regulator *dsub_reg;
8584 static struct regulator *mpp0_reg;
8585 static int dsub_reg_enabled;
8586 int rc = 0;
8587
8588 _GET_REGULATOR(dsub_reg, "8901_l3");
8589 if (IS_ERR(dsub_reg)) {
8590 printk(KERN_ERR "%s: failed to get reg 8901_l3 err=%ld",
8591 __func__, PTR_ERR(dsub_reg));
8592 return PTR_ERR(dsub_reg);
8593 }
8594
8595 _GET_REGULATOR(mpp0_reg, "8901_mpp0");
8596 if (IS_ERR(mpp0_reg)) {
8597 printk(KERN_ERR "%s: failed to get reg 8901_mpp0 err=%ld",
8598 __func__, PTR_ERR(mpp0_reg));
8599 return PTR_ERR(mpp0_reg);
8600 }
8601
8602 if (on && !dsub_reg_enabled) {
8603 rc = regulator_set_voltage(dsub_reg, 3300000, 3300000);
8604 if (rc) {
8605 printk(KERN_ERR "%s: failed to set reg 8901_l3 voltage"
8606 " err=%d", __func__, rc);
8607 goto dsub_regulator_err;
8608 }
8609 rc = regulator_enable(dsub_reg);
8610 if (rc) {
8611 printk(KERN_ERR "%s: failed to enable reg 8901_l3"
8612 " err=%d", __func__, rc);
8613 goto dsub_regulator_err;
8614 }
8615 rc = regulator_enable(mpp0_reg);
8616 if (rc) {
8617 printk(KERN_ERR "%s: failed to enable reg 8901_mpp0"
8618 " err=%d", __func__, rc);
8619 goto dsub_regulator_err;
8620 }
8621 dsub_reg_enabled = 1;
8622 } else if (!on && dsub_reg_enabled) {
8623 rc = regulator_disable(dsub_reg);
8624 if (rc)
8625 printk(KERN_WARNING "%s: failed to disable reg 8901_l3"
8626 " err=%d", __func__, rc);
8627 rc = regulator_disable(mpp0_reg);
8628 if (rc)
8629 printk(KERN_WARNING "%s: failed to disable reg "
8630 "8901_mpp0 err=%d", __func__, rc);
8631 dsub_reg_enabled = 0;
8632 }
8633
8634 return rc;
8635
8636dsub_regulator_err:
8637 regulator_put(mpp0_reg);
8638 regulator_put(dsub_reg);
8639 return rc;
8640}
8641
8642static int display_power_on;
8643static void setup_display_power(void)
8644{
8645 if (display_power_on)
8646 if (lcdc_vga_enabled) {
8647 dsub_regulator(1);
8648 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8649 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8650 if (machine_is_msm8x60_ffa() ||
8651 machine_is_msm8x60_fusn_ffa())
8652 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 1);
8653 } else {
8654 dsub_regulator(0);
8655 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 1);
8656 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 1);
8657 if (machine_is_msm8x60_ffa() ||
8658 machine_is_msm8x60_fusn_ffa())
8659 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8660 }
8661 else {
8662 dsub_regulator(0);
8663 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa())
8664 gpio_set_value_cansleep(GPIO_DONGLE_PWR_EN, 0);
8665 /* BACKLIGHT */
8666 gpio_set_value_cansleep(GPIO_BACKLIGHT_EN, 0);
8667 /* LVDS */
8668 gpio_set_value_cansleep(GPIO_LVDS_SHUTDOWN_N, 0);
8669 }
8670}
8671
8672#define _GET_REGULATOR(var, name) do { \
8673 if (var == NULL) { \
8674 var = regulator_get(NULL, name); \
8675 if (IS_ERR(var)) { \
8676 pr_err("'%s' regulator not found, rc=%ld\n", \
8677 name, PTR_ERR(var)); \
8678 var = NULL; \
8679 } \
8680 } \
8681} while (0)
8682
8683#define GPIO_RESX_N (GPIO_EXPANDER_GPIO_BASE + 2)
8684
8685static void display_common_power(int on)
8686{
8687 int rc;
8688 static struct regulator *display_reg;
8689
8690 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
8691 machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa()) {
8692 if (on) {
8693 /* LVDS */
8694 _GET_REGULATOR(display_reg, "8901_l2");
8695 if (!display_reg)
8696 return;
8697 rc = regulator_set_voltage(display_reg,
8698 3300000, 3300000);
8699 if (rc)
8700 goto out;
8701 rc = regulator_enable(display_reg);
8702 if (rc)
8703 goto out;
8704 rc = gpio_request(GPIO_LVDS_SHUTDOWN_N,
8705 "LVDS_STDN_OUT_N");
8706 if (rc) {
8707 printk(KERN_ERR "%s: LVDS gpio %d request"
8708 "failed\n", __func__,
8709 GPIO_LVDS_SHUTDOWN_N);
8710 goto out2;
8711 }
8712
8713 /* BACKLIGHT */
8714 rc = gpio_request(GPIO_BACKLIGHT_EN, "BACKLIGHT_EN");
8715 if (rc) {
8716 printk(KERN_ERR "%s: BACKLIGHT gpio %d request"
8717 "failed\n", __func__,
8718 GPIO_BACKLIGHT_EN);
8719 goto out3;
8720 }
8721
8722 if (machine_is_msm8x60_ffa() ||
8723 machine_is_msm8x60_fusn_ffa()) {
8724 rc = gpio_request(GPIO_DONGLE_PWR_EN,
8725 "DONGLE_PWR_EN");
8726 if (rc) {
8727 printk(KERN_ERR "%s: DONGLE_PWR_EN gpio"
8728 " %d request failed\n", __func__,
8729 GPIO_DONGLE_PWR_EN);
8730 goto out4;
8731 }
8732 }
8733
8734 gpio_direction_output(GPIO_LVDS_SHUTDOWN_N, 0);
8735 gpio_direction_output(GPIO_BACKLIGHT_EN, 0);
8736 if (machine_is_msm8x60_ffa() ||
8737 machine_is_msm8x60_fusn_ffa())
8738 gpio_direction_output(GPIO_DONGLE_PWR_EN, 0);
8739 mdelay(20);
8740 display_power_on = 1;
8741 setup_display_power();
8742 } else {
8743 if (display_power_on) {
8744 display_power_on = 0;
8745 setup_display_power();
8746 mdelay(20);
8747 if (machine_is_msm8x60_ffa() ||
8748 machine_is_msm8x60_fusn_ffa())
8749 gpio_free(GPIO_DONGLE_PWR_EN);
8750 goto out4;
8751 }
8752 }
8753 }
8754#if defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
8755 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA)
8756 else if (machine_is_msm8x60_fluid()) {
8757 static struct regulator *fluid_reg;
8758 static struct regulator *fluid_reg2;
8759
8760 if (on) {
8761 _GET_REGULATOR(fluid_reg, "8901_l2");
8762 if (!fluid_reg)
8763 return;
8764 _GET_REGULATOR(fluid_reg2, "8058_s3");
8765 if (!fluid_reg2) {
8766 regulator_put(fluid_reg);
8767 return;
8768 }
8769 rc = gpio_request(GPIO_RESX_N, "RESX_N");
8770 if (rc) {
8771 regulator_put(fluid_reg2);
8772 regulator_put(fluid_reg);
8773 return;
8774 }
8775 regulator_set_voltage(fluid_reg, 2850000, 2850000);
8776 regulator_set_voltage(fluid_reg2, 1800000, 1800000);
8777 regulator_enable(fluid_reg);
8778 regulator_enable(fluid_reg2);
8779 msleep(20);
8780 gpio_direction_output(GPIO_RESX_N, 0);
8781 udelay(10);
8782 gpio_set_value_cansleep(GPIO_RESX_N, 1);
8783 display_power_on = 1;
8784 setup_display_power();
8785 } else {
8786 gpio_set_value_cansleep(GPIO_RESX_N, 0);
8787 gpio_free(GPIO_RESX_N);
8788 msleep(20);
8789 regulator_disable(fluid_reg2);
8790 regulator_disable(fluid_reg);
8791 regulator_put(fluid_reg2);
8792 regulator_put(fluid_reg);
8793 display_power_on = 0;
8794 setup_display_power();
8795 fluid_reg = NULL;
8796 fluid_reg2 = NULL;
8797 }
8798 }
8799#endif
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -04008800#if defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA)
8801 else if (machine_is_msm8x60_dragon()) {
8802 static struct regulator *dragon_reg;
8803 static struct regulator *dragon_reg2;
8804
8805 if (on) {
8806 _GET_REGULATOR(dragon_reg, "8901_l2");
8807 if (!dragon_reg)
8808 return;
8809 _GET_REGULATOR(dragon_reg2, "8058_l16");
8810 if (!dragon_reg2) {
8811 regulator_put(dragon_reg);
8812 dragon_reg = NULL;
8813 return;
8814 }
8815
8816 rc = gpio_request(GPIO_NT35582_BL_EN, "lcdc_bl_en");
8817 if (rc) {
8818 pr_err("%s: gpio %d request failed with rc=%d\n",
8819 __func__, GPIO_NT35582_BL_EN, rc);
8820 regulator_put(dragon_reg);
8821 regulator_put(dragon_reg2);
8822 dragon_reg = NULL;
8823 dragon_reg2 = NULL;
8824 return;
8825 }
8826
8827 if (gpio_tlmm_config(GPIO_CFG(GPIO_NT35582_RESET, 0,
8828 GPIO_CFG_OUTPUT, GPIO_CFG_PULL_DOWN,
8829 GPIO_CFG_16MA), GPIO_CFG_ENABLE)) {
8830 pr_err("%s: config gpio '%d' failed!\n",
8831 __func__, GPIO_NT35582_RESET);
8832 gpio_free(GPIO_NT35582_BL_EN);
8833 regulator_put(dragon_reg);
8834 regulator_put(dragon_reg2);
8835 dragon_reg = NULL;
8836 dragon_reg2 = NULL;
8837 return;
8838 }
8839
8840 rc = gpio_request(GPIO_NT35582_RESET, "lcdc_reset");
8841 if (rc) {
8842 pr_err("%s: unable to request gpio %d (rc=%d)\n",
8843 __func__, GPIO_NT35582_RESET, rc);
8844 gpio_free(GPIO_NT35582_BL_EN);
8845 regulator_put(dragon_reg);
8846 regulator_put(dragon_reg2);
8847 dragon_reg = NULL;
8848 dragon_reg2 = NULL;
8849 return;
8850 }
8851
8852 regulator_set_voltage(dragon_reg, 3300000, 3300000);
8853 regulator_set_voltage(dragon_reg2, 1800000, 1800000);
8854 regulator_enable(dragon_reg);
8855 regulator_enable(dragon_reg2);
8856 msleep(20);
8857
8858 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8859 msleep(20);
8860 gpio_set_value_cansleep(GPIO_NT35582_RESET, 0);
8861 msleep(20);
8862 gpio_set_value_cansleep(GPIO_NT35582_RESET, 1);
8863 msleep(50);
8864
8865 gpio_set_value_cansleep(GPIO_NT35582_BL_EN, 1);
8866
8867 display_power_on = 1;
8868 } else if ((dragon_reg != NULL) && (dragon_reg2 != NULL)) {
8869 gpio_free(GPIO_NT35582_RESET);
8870 gpio_free(GPIO_NT35582_BL_EN);
8871 regulator_disable(dragon_reg2);
8872 regulator_disable(dragon_reg);
8873 regulator_put(dragon_reg2);
8874 regulator_put(dragon_reg);
8875 display_power_on = 0;
8876 dragon_reg = NULL;
8877 dragon_reg2 = NULL;
8878 }
8879 }
8880#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07008881 return;
8882
8883out4:
8884 gpio_free(GPIO_BACKLIGHT_EN);
8885out3:
8886 gpio_free(GPIO_LVDS_SHUTDOWN_N);
8887out2:
8888 regulator_disable(display_reg);
8889out:
8890 regulator_put(display_reg);
8891 display_reg = NULL;
8892}
8893#undef _GET_REGULATOR
8894#endif
8895
8896static int mipi_dsi_panel_power(int on);
8897
8898#define LCDC_NUM_GPIO 28
8899#define LCDC_GPIO_START 0
8900
8901static void lcdc_samsung_panel_power(int on)
8902{
8903 int n, ret = 0;
8904
8905 display_common_power(on);
8906
8907 for (n = 0; n < LCDC_NUM_GPIO; n++) {
8908 if (on) {
8909 ret = gpio_request(LCDC_GPIO_START + n, "LCDC_GPIO");
8910 if (unlikely(ret)) {
8911 pr_err("%s not able to get gpio\n", __func__);
8912 break;
8913 }
8914 } else
8915 gpio_free(LCDC_GPIO_START + n);
8916 }
8917
8918 if (ret) {
8919 for (n--; n >= 0; n--)
8920 gpio_free(LCDC_GPIO_START + n);
8921 }
8922
8923 mipi_dsi_panel_power(0); /* set 8058_ldo0 to LPM */
8924}
8925
8926#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
8927#define _GET_REGULATOR(var, name) do { \
8928 var = regulator_get(NULL, name); \
8929 if (IS_ERR(var)) { \
8930 pr_err("'%s' regulator not found, rc=%ld\n", \
8931 name, IS_ERR(var)); \
8932 var = NULL; \
8933 return -ENODEV; \
8934 } \
8935} while (0)
8936
8937static int hdmi_enable_5v(int on)
8938{
8939 static struct regulator *reg_8901_hdmi_mvs; /* HDMI_5V */
8940 static struct regulator *reg_8901_mpp0; /* External 5V */
8941 static int prev_on;
8942 int rc;
8943
8944 if (on == prev_on)
8945 return 0;
8946
8947 if (!reg_8901_hdmi_mvs)
8948 _GET_REGULATOR(reg_8901_hdmi_mvs, "8901_hdmi_mvs");
8949 if (!reg_8901_mpp0)
8950 _GET_REGULATOR(reg_8901_mpp0, "8901_mpp0");
8951
8952 if (on) {
8953 rc = regulator_enable(reg_8901_mpp0);
8954 if (rc) {
8955 pr_err("'%s' regulator enable failed, rc=%d\n",
8956 "reg_8901_mpp0", rc);
8957 return rc;
8958 }
8959 rc = regulator_enable(reg_8901_hdmi_mvs);
8960 if (rc) {
8961 pr_err("'%s' regulator enable failed, rc=%d\n",
8962 "8901_hdmi_mvs", rc);
8963 return rc;
8964 }
8965 pr_info("%s(on): success\n", __func__);
8966 } else {
8967 rc = regulator_disable(reg_8901_hdmi_mvs);
8968 if (rc)
8969 pr_warning("'%s' regulator disable failed, rc=%d\n",
8970 "8901_hdmi_mvs", rc);
8971 rc = regulator_disable(reg_8901_mpp0);
8972 if (rc)
8973 pr_warning("'%s' regulator disable failed, rc=%d\n",
8974 "reg_8901_mpp0", rc);
8975 pr_info("%s(off): success\n", __func__);
8976 }
8977
8978 prev_on = on;
8979
8980 return 0;
8981}
8982
8983static int hdmi_core_power(int on, int show)
8984{
8985 static struct regulator *reg_8058_l16; /* VDD_HDMI */
8986 static int prev_on;
8987 int rc;
8988
8989 if (on == prev_on)
8990 return 0;
8991
8992 if (!reg_8058_l16)
8993 _GET_REGULATOR(reg_8058_l16, "8058_l16");
8994
8995 if (on) {
8996 rc = regulator_set_voltage(reg_8058_l16, 1800000, 1800000);
8997 if (!rc)
8998 rc = regulator_enable(reg_8058_l16);
8999 if (rc) {
9000 pr_err("'%s' regulator enable failed, rc=%d\n",
9001 "8058_l16", rc);
9002 return rc;
9003 }
9004 rc = gpio_request(170, "HDMI_DDC_CLK");
9005 if (rc) {
9006 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
9007 "HDMI_DDC_CLK", 170, rc);
9008 goto error1;
9009 }
9010 rc = gpio_request(171, "HDMI_DDC_DATA");
9011 if (rc) {
9012 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
9013 "HDMI_DDC_DATA", 171, rc);
9014 goto error2;
9015 }
9016 rc = gpio_request(172, "HDMI_HPD");
9017 if (rc) {
9018 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
9019 "HDMI_HPD", 172, rc);
9020 goto error3;
9021 }
9022 pr_info("%s(on): success\n", __func__);
9023 } else {
9024 gpio_free(170);
9025 gpio_free(171);
9026 gpio_free(172);
9027 rc = regulator_disable(reg_8058_l16);
9028 if (rc)
9029 pr_warning("'%s' regulator disable failed, rc=%d\n",
9030 "8058_l16", rc);
9031 pr_info("%s(off): success\n", __func__);
9032 }
9033
9034 prev_on = on;
9035
9036 return 0;
9037
9038error3:
9039 gpio_free(171);
9040error2:
9041 gpio_free(170);
9042error1:
9043 regulator_disable(reg_8058_l16);
9044 return rc;
9045}
9046
9047static int hdmi_cec_power(int on)
9048{
9049 static struct regulator *reg_8901_l3; /* HDMI_CEC */
9050 static int prev_on;
9051 int rc;
9052
9053 if (on == prev_on)
9054 return 0;
9055
9056 if (!reg_8901_l3)
9057 _GET_REGULATOR(reg_8901_l3, "8901_l3");
9058
9059 if (on) {
9060 rc = regulator_set_voltage(reg_8901_l3, 3300000, 3300000);
9061 if (!rc)
9062 rc = regulator_enable(reg_8901_l3);
9063 if (rc) {
9064 pr_err("'%s' regulator enable failed, rc=%d\n",
9065 "8901_l3", rc);
9066 return rc;
9067 }
9068 rc = gpio_request(169, "HDMI_CEC_VAR");
9069 if (rc) {
9070 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
9071 "HDMI_CEC_VAR", 169, rc);
9072 goto error;
9073 }
9074 pr_info("%s(on): success\n", __func__);
9075 } else {
9076 gpio_free(169);
9077 rc = regulator_disable(reg_8901_l3);
9078 if (rc)
9079 pr_warning("'%s' regulator disable failed, rc=%d\n",
9080 "8901_l3", rc);
9081 pr_info("%s(off): success\n", __func__);
9082 }
9083
9084 prev_on = on;
9085
9086 return 0;
9087error:
9088 regulator_disable(reg_8901_l3);
9089 return rc;
9090}
9091
9092#undef _GET_REGULATOR
9093
9094#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
9095
9096static int lcdc_panel_power(int on)
9097{
9098 int flag_on = !!on;
9099 static int lcdc_power_save_on;
9100
9101 if (lcdc_power_save_on == flag_on)
9102 return 0;
9103
9104 lcdc_power_save_on = flag_on;
9105
9106 lcdc_samsung_panel_power(on);
9107
9108 return 0;
9109}
9110
9111#ifdef CONFIG_MSM_BUS_SCALING
Nagamalleswararao Ganji5fabbd62011-11-06 23:10:43 -08009112
9113static struct msm_bus_vectors rotator_init_vectors[] = {
9114 {
9115 .src = MSM_BUS_MASTER_ROTATOR,
9116 .dst = MSM_BUS_SLAVE_SMI,
9117 .ab = 0,
9118 .ib = 0,
9119 },
9120 {
9121 .src = MSM_BUS_MASTER_ROTATOR,
9122 .dst = MSM_BUS_SLAVE_EBI_CH0,
9123 .ab = 0,
9124 .ib = 0,
9125 },
9126};
9127
9128static struct msm_bus_vectors rotator_ui_vectors[] = {
9129 {
9130 .src = MSM_BUS_MASTER_ROTATOR,
9131 .dst = MSM_BUS_SLAVE_SMI,
9132 .ab = 0,
9133 .ib = 0,
9134 },
9135 {
9136 .src = MSM_BUS_MASTER_ROTATOR,
9137 .dst = MSM_BUS_SLAVE_EBI_CH0,
9138 .ab = (1024 * 600 * 4 * 2 * 60),
9139 .ib = (1024 * 600 * 4 * 2 * 60 * 1.5),
9140 },
9141};
9142
9143static struct msm_bus_vectors rotator_vga_vectors[] = {
9144 {
9145 .src = MSM_BUS_MASTER_ROTATOR,
9146 .dst = MSM_BUS_SLAVE_SMI,
9147 .ab = (640 * 480 * 2 * 2 * 30),
9148 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9149 },
9150 {
9151 .src = MSM_BUS_MASTER_ROTATOR,
9152 .dst = MSM_BUS_SLAVE_EBI_CH0,
9153 .ab = (640 * 480 * 2 * 2 * 30),
9154 .ib = (640 * 480 * 2 * 2 * 30 * 1.5),
9155 },
9156};
9157
9158static struct msm_bus_vectors rotator_720p_vectors[] = {
9159 {
9160 .src = MSM_BUS_MASTER_ROTATOR,
9161 .dst = MSM_BUS_SLAVE_SMI,
9162 .ab = (1280 * 736 * 2 * 2 * 30),
9163 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9164 },
9165 {
9166 .src = MSM_BUS_MASTER_ROTATOR,
9167 .dst = MSM_BUS_SLAVE_EBI_CH0,
9168 .ab = (1280 * 736 * 2 * 2 * 30),
9169 .ib = (1280 * 736 * 2 * 2 * 30 * 1.5),
9170 },
9171};
9172
9173static struct msm_bus_vectors rotator_1080p_vectors[] = {
9174 {
9175 .src = MSM_BUS_MASTER_ROTATOR,
9176 .dst = MSM_BUS_SLAVE_SMI,
9177 .ab = (1920 * 1088 * 2 * 2 * 30),
9178 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9179 },
9180 {
9181 .src = MSM_BUS_MASTER_ROTATOR,
9182 .dst = MSM_BUS_SLAVE_EBI_CH0,
9183 .ab = (1920 * 1088 * 2 * 2 * 30),
9184 .ib = (1920 * 1088 * 2 * 2 * 30 * 1.5),
9185 },
9186};
9187
9188static struct msm_bus_paths rotator_bus_scale_usecases[] = {
9189 {
9190 ARRAY_SIZE(rotator_init_vectors),
9191 rotator_init_vectors,
9192 },
9193 {
9194 ARRAY_SIZE(rotator_ui_vectors),
9195 rotator_ui_vectors,
9196 },
9197 {
9198 ARRAY_SIZE(rotator_vga_vectors),
9199 rotator_vga_vectors,
9200 },
9201 {
9202 ARRAY_SIZE(rotator_720p_vectors),
9203 rotator_720p_vectors,
9204 },
9205 {
9206 ARRAY_SIZE(rotator_1080p_vectors),
9207 rotator_1080p_vectors,
9208 },
9209};
9210
9211struct msm_bus_scale_pdata rotator_bus_scale_pdata = {
9212 rotator_bus_scale_usecases,
9213 ARRAY_SIZE(rotator_bus_scale_usecases),
9214 .name = "rotator",
9215};
9216
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009217static struct msm_bus_vectors mdp_init_vectors[] = {
9218 /* For now, 0th array entry is reserved.
9219 * Please leave 0 as is and don't use it
9220 */
9221 {
9222 .src = MSM_BUS_MASTER_MDP_PORT0,
9223 .dst = MSM_BUS_SLAVE_SMI,
9224 .ab = 0,
9225 .ib = 0,
9226 },
9227 /* Master and slaves can be from different fabrics */
9228 {
9229 .src = MSM_BUS_MASTER_MDP_PORT0,
9230 .dst = MSM_BUS_SLAVE_EBI_CH0,
9231 .ab = 0,
9232 .ib = 0,
9233 },
9234};
9235
Ravishangar Kalyanam75f37322011-10-14 12:15:40 -07009236#ifdef CONFIG_FB_MSM_LCDC_DSUB
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009237static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9238 /* Default case static display/UI/2d/3d if FB SMI */
9239 {
9240 .src = MSM_BUS_MASTER_MDP_PORT0,
9241 .dst = MSM_BUS_SLAVE_SMI,
9242 .ab = 388800000,
9243 .ib = 486000000,
9244 },
9245 /* Master and slaves can be from different fabrics */
9246 {
9247 .src = MSM_BUS_MASTER_MDP_PORT0,
9248 .dst = MSM_BUS_SLAVE_EBI_CH0,
9249 .ab = 0,
9250 .ib = 0,
9251 },
9252};
9253
9254static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9255 /* Default case static display/UI/2d/3d if FB SMI */
9256 {
9257 .src = MSM_BUS_MASTER_MDP_PORT0,
9258 .dst = MSM_BUS_SLAVE_SMI,
9259 .ab = 0,
9260 .ib = 0,
9261 },
9262 /* Master and slaves can be from different fabrics */
9263 {
9264 .src = MSM_BUS_MASTER_MDP_PORT0,
9265 .dst = MSM_BUS_SLAVE_EBI_CH0,
9266 .ab = 388800000,
9267 .ib = 486000000 * 2,
9268 },
9269};
9270static struct msm_bus_vectors mdp_vga_vectors[] = {
9271 /* VGA and less video */
9272 {
9273 .src = MSM_BUS_MASTER_MDP_PORT0,
9274 .dst = MSM_BUS_SLAVE_SMI,
9275 .ab = 458092800,
9276 .ib = 572616000,
9277 },
9278 {
9279 .src = MSM_BUS_MASTER_MDP_PORT0,
9280 .dst = MSM_BUS_SLAVE_EBI_CH0,
9281 .ab = 458092800,
9282 .ib = 572616000 * 2,
9283 },
9284};
9285static struct msm_bus_vectors mdp_720p_vectors[] = {
9286 /* 720p and less video */
9287 {
9288 .src = MSM_BUS_MASTER_MDP_PORT0,
9289 .dst = MSM_BUS_SLAVE_SMI,
9290 .ab = 471744000,
9291 .ib = 589680000,
9292 },
9293 /* Master and slaves can be from different fabrics */
9294 {
9295 .src = MSM_BUS_MASTER_MDP_PORT0,
9296 .dst = MSM_BUS_SLAVE_EBI_CH0,
9297 .ab = 471744000,
9298 .ib = 589680000 * 2,
9299 },
9300};
9301
9302static struct msm_bus_vectors mdp_1080p_vectors[] = {
9303 /* 1080p and less video */
9304 {
9305 .src = MSM_BUS_MASTER_MDP_PORT0,
9306 .dst = MSM_BUS_SLAVE_SMI,
9307 .ab = 575424000,
9308 .ib = 719280000,
9309 },
9310 /* Master and slaves can be from different fabrics */
9311 {
9312 .src = MSM_BUS_MASTER_MDP_PORT0,
9313 .dst = MSM_BUS_SLAVE_EBI_CH0,
9314 .ab = 575424000,
9315 .ib = 719280000 * 2,
9316 },
9317};
9318
9319#else
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009320static struct msm_bus_vectors mdp_sd_smi_vectors[] = {
9321 /* Default case static display/UI/2d/3d if FB SMI */
9322 {
9323 .src = MSM_BUS_MASTER_MDP_PORT0,
9324 .dst = MSM_BUS_SLAVE_SMI,
9325 .ab = 175110000,
9326 .ib = 218887500,
9327 },
9328 /* Master and slaves can be from different fabrics */
9329 {
9330 .src = MSM_BUS_MASTER_MDP_PORT0,
9331 .dst = MSM_BUS_SLAVE_EBI_CH0,
9332 .ab = 0,
9333 .ib = 0,
9334 },
9335};
9336
9337static struct msm_bus_vectors mdp_sd_ebi_vectors[] = {
9338 /* Default case static display/UI/2d/3d if FB SMI */
9339 {
9340 .src = MSM_BUS_MASTER_MDP_PORT0,
9341 .dst = MSM_BUS_SLAVE_SMI,
9342 .ab = 0,
9343 .ib = 0,
9344 },
9345 /* Master and slaves can be from different fabrics */
9346 {
9347 .src = MSM_BUS_MASTER_MDP_PORT0,
9348 .dst = MSM_BUS_SLAVE_EBI_CH0,
9349 .ab = 216000000,
9350 .ib = 270000000 * 2,
9351 },
9352};
9353static struct msm_bus_vectors mdp_vga_vectors[] = {
9354 /* VGA and less video */
9355 {
9356 .src = MSM_BUS_MASTER_MDP_PORT0,
9357 .dst = MSM_BUS_SLAVE_SMI,
9358 .ab = 216000000,
9359 .ib = 270000000,
9360 },
9361 {
9362 .src = MSM_BUS_MASTER_MDP_PORT0,
9363 .dst = MSM_BUS_SLAVE_EBI_CH0,
9364 .ab = 216000000,
9365 .ib = 270000000 * 2,
9366 },
9367};
9368
9369static struct msm_bus_vectors mdp_720p_vectors[] = {
9370 /* 720p and less video */
9371 {
9372 .src = MSM_BUS_MASTER_MDP_PORT0,
9373 .dst = MSM_BUS_SLAVE_SMI,
9374 .ab = 230400000,
9375 .ib = 288000000,
9376 },
9377 /* Master and slaves can be from different fabrics */
9378 {
9379 .src = MSM_BUS_MASTER_MDP_PORT0,
9380 .dst = MSM_BUS_SLAVE_EBI_CH0,
9381 .ab = 230400000,
9382 .ib = 288000000 * 2,
9383 },
9384};
9385
9386static struct msm_bus_vectors mdp_1080p_vectors[] = {
9387 /* 1080p and less video */
9388 {
9389 .src = MSM_BUS_MASTER_MDP_PORT0,
9390 .dst = MSM_BUS_SLAVE_SMI,
9391 .ab = 334080000,
9392 .ib = 417600000,
9393 },
9394 /* Master and slaves can be from different fabrics */
9395 {
9396 .src = MSM_BUS_MASTER_MDP_PORT0,
9397 .dst = MSM_BUS_SLAVE_EBI_CH0,
9398 .ab = 334080000,
Ravishangar Kalyanam731beb92011-07-07 18:27:32 -07009399 .ib = 550000000 * 2,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009400 },
9401};
9402
9403#endif
9404static struct msm_bus_paths mdp_bus_scale_usecases[] = {
9405 {
9406 ARRAY_SIZE(mdp_init_vectors),
9407 mdp_init_vectors,
9408 },
9409 {
9410 ARRAY_SIZE(mdp_sd_smi_vectors),
9411 mdp_sd_smi_vectors,
9412 },
9413 {
9414 ARRAY_SIZE(mdp_sd_ebi_vectors),
9415 mdp_sd_ebi_vectors,
9416 },
9417 {
9418 ARRAY_SIZE(mdp_vga_vectors),
9419 mdp_vga_vectors,
9420 },
9421 {
9422 ARRAY_SIZE(mdp_720p_vectors),
9423 mdp_720p_vectors,
9424 },
9425 {
9426 ARRAY_SIZE(mdp_1080p_vectors),
9427 mdp_1080p_vectors,
9428 },
9429};
9430static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
9431 mdp_bus_scale_usecases,
9432 ARRAY_SIZE(mdp_bus_scale_usecases),
9433 .name = "mdp",
9434};
9435
9436#endif
9437#ifdef CONFIG_MSM_BUS_SCALING
9438static struct msm_bus_vectors dtv_bus_init_vectors[] = {
9439 /* For now, 0th array entry is reserved.
9440 * Please leave 0 as is and don't use it
9441 */
9442 {
9443 .src = MSM_BUS_MASTER_MDP_PORT0,
9444 .dst = MSM_BUS_SLAVE_SMI,
9445 .ab = 0,
9446 .ib = 0,
9447 },
9448 /* Master and slaves can be from different fabrics */
9449 {
9450 .src = MSM_BUS_MASTER_MDP_PORT0,
9451 .dst = MSM_BUS_SLAVE_EBI_CH0,
9452 .ab = 0,
9453 .ib = 0,
9454 },
9455};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009456
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009457static struct msm_bus_vectors dtv_bus_def_vectors[] = {
9458 /* For now, 0th array entry is reserved.
9459 * Please leave 0 as is and don't use it
9460 */
9461 {
9462 .src = MSM_BUS_MASTER_MDP_PORT0,
9463 .dst = MSM_BUS_SLAVE_SMI,
9464 .ab = 566092800,
9465 .ib = 707616000,
9466 },
9467 /* Master and slaves can be from different fabrics */
9468 {
9469 .src = MSM_BUS_MASTER_MDP_PORT0,
9470 .dst = MSM_BUS_SLAVE_EBI_CH0,
9471 .ab = 566092800,
9472 .ib = 707616000,
9473 },
9474};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009475
9476static struct msm_bus_vectors dtv_bus_hdmi_prim_vectors[] = {
9477 /* For now, 0th array entry is reserved.
9478 * Please leave 0 as is and don't use it
9479 */
9480 {
9481 .src = MSM_BUS_MASTER_MDP_PORT0,
9482 .dst = MSM_BUS_SLAVE_SMI,
9483 .ab = 2000000000,
9484 .ib = 2000000000,
9485 },
9486 /* Master and slaves can be from different fabrics */
9487 {
9488 .src = MSM_BUS_MASTER_MDP_PORT0,
9489 .dst = MSM_BUS_SLAVE_EBI_CH0,
9490 .ab = 2000000000,
9491 .ib = 2000000000,
9492 },
9493};
9494
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009495static struct msm_bus_paths dtv_bus_scale_usecases[] = {
9496 {
9497 ARRAY_SIZE(dtv_bus_init_vectors),
9498 dtv_bus_init_vectors,
9499 },
9500 {
9501 ARRAY_SIZE(dtv_bus_def_vectors),
9502 dtv_bus_def_vectors,
9503 },
9504};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009505
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009506static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
9507 dtv_bus_scale_usecases,
9508 ARRAY_SIZE(dtv_bus_scale_usecases),
9509 .name = "dtv",
9510};
9511
9512static struct lcdc_platform_data dtv_pdata = {
9513 .bus_scale_table = &dtv_bus_scale_pdata,
9514};
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009515
9516static struct msm_bus_paths dtv_hdmi_prim_bus_scale_usecases[] = {
9517 {
9518 ARRAY_SIZE(dtv_bus_init_vectors),
9519 dtv_bus_init_vectors,
9520 },
9521 {
9522 ARRAY_SIZE(dtv_bus_hdmi_prim_vectors),
9523 dtv_bus_hdmi_prim_vectors,
9524 },
9525};
9526
9527static struct msm_bus_scale_pdata dtv_hdmi_prim_bus_scale_pdata = {
9528 dtv_hdmi_prim_bus_scale_usecases,
9529 ARRAY_SIZE(dtv_hdmi_prim_bus_scale_usecases),
9530 .name = "dtv",
9531};
9532
9533static struct lcdc_platform_data dtv_hdmi_prim_pdata = {
9534 .bus_scale_table = &dtv_hdmi_prim_bus_scale_pdata,
9535};
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009536#endif
9537
9538
9539static struct lcdc_platform_data lcdc_pdata = {
9540 .lcdc_power_save = lcdc_panel_power,
9541};
9542
9543
9544#define MDP_VSYNC_GPIO 28
9545
9546/*
9547 * MIPI_DSI only use 8058_LDO0 which need always on
9548 * therefore it need to be put at low power mode if
9549 * it was not used instead of turn it off.
9550 */
9551static int mipi_dsi_panel_power(int on)
9552{
9553 int flag_on = !!on;
9554 static int mipi_dsi_power_save_on;
9555 static struct regulator *ldo0;
9556 int rc = 0;
9557
9558 if (mipi_dsi_power_save_on == flag_on)
9559 return 0;
9560
9561 mipi_dsi_power_save_on = flag_on;
9562
9563 if (ldo0 == NULL) { /* init */
9564 ldo0 = regulator_get(NULL, "8058_l0");
9565 if (IS_ERR(ldo0)) {
9566 pr_debug("%s: LDO0 failed\n", __func__);
9567 rc = PTR_ERR(ldo0);
9568 return rc;
9569 }
9570
9571 rc = regulator_set_voltage(ldo0, 1200000, 1200000);
9572 if (rc)
9573 goto out;
9574
9575 rc = regulator_enable(ldo0);
9576 if (rc)
9577 goto out;
9578 }
9579
9580 if (on) {
9581 /* set ldo0 to HPM */
9582 rc = regulator_set_optimum_mode(ldo0, 100000);
9583 if (rc < 0)
9584 goto out;
9585 } else {
9586 /* set ldo0 to LPM */
Padmanabhan Komanduru0b478ff2011-11-22 19:15:40 +05309587 rc = regulator_set_optimum_mode(ldo0, 1000);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009588 if (rc < 0)
9589 goto out;
9590 }
9591
9592 return 0;
9593out:
9594 regulator_disable(ldo0);
9595 regulator_put(ldo0);
9596 ldo0 = NULL;
9597 return rc;
9598}
9599
9600static struct mipi_dsi_platform_data mipi_dsi_pdata = {
9601 .vsync_gpio = MDP_VSYNC_GPIO,
9602 .dsi_power_save = mipi_dsi_panel_power,
9603};
9604
9605#ifdef CONFIG_FB_MSM_TVOUT
9606static struct regulator *reg_8058_l13;
9607
9608static int atv_dac_power(int on)
9609{
9610 int rc = 0;
9611 #define _GET_REGULATOR(var, name) do { \
9612 var = regulator_get(NULL, name); \
9613 if (IS_ERR(var)) { \
9614 pr_info("'%s' regulator not found, rc=%ld\n", \
9615 name, IS_ERR(var)); \
9616 var = NULL; \
9617 return -ENODEV; \
9618 } \
9619 } while (0)
9620
9621 if (!reg_8058_l13)
9622 _GET_REGULATOR(reg_8058_l13, "8058_l13");
9623 #undef _GET_REGULATOR
9624
9625 if (on) {
9626 rc = regulator_set_voltage(reg_8058_l13, 2050000, 2050000);
9627 if (rc) {
9628 pr_info("%s: '%s' regulator set voltage failed,\
9629 rc=%d\n", __func__, "8058_l13", rc);
9630 return rc;
9631 }
9632
9633 rc = regulator_enable(reg_8058_l13);
9634 if (rc) {
9635 pr_err("%s: '%s' regulator enable failed,\
9636 rc=%d\n", __func__, "8058_l13", rc);
9637 return rc;
9638 }
9639 } else {
9640 rc = regulator_force_disable(reg_8058_l13);
9641 if (rc)
9642 pr_warning("%s: '%s' regulator disable failed, rc=%d\n",
9643 __func__, "8058_l13", rc);
9644 }
9645 return rc;
9646
9647}
9648#endif
9649
9650#ifdef CONFIG_FB_MSM_MIPI_DSI
9651int mdp_core_clk_rate_table[] = {
9652 85330000,
Huaibin Yang1f180ee2012-01-30 16:23:06 -08009653 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009654 160000000,
9655 200000000,
9656};
9657#else
9658int mdp_core_clk_rate_table[] = {
9659 59080000,
Huaibin Yang1f180ee2012-01-30 16:23:06 -08009660 128000000,
kuogee hsieh26791a92011-08-01 18:35:58 -07009661 128000000,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009662 200000000,
9663};
9664#endif
9665
9666static struct msm_panel_common_pdata mdp_pdata = {
9667 .gpio = MDP_VSYNC_GPIO,
9668 .mdp_core_clk_rate = 59080000,
9669 .mdp_core_clk_table = mdp_core_clk_rate_table,
9670 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
9671#ifdef CONFIG_MSM_BUS_SCALING
9672 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
9673#endif
9674 .mdp_rev = MDP_REV_41,
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009675#ifdef CONFIG_MSM_MULTIMEDIA_USE_ION
Ravishangar Kalyanama3b168b2012-03-26 11:13:11 -07009676 .mem_hid = BIT(ION_CP_WB_HEAP_ID),
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009677#else
9678 .mem_hid = MEMTYPE_EBI1,
9679#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009680};
9681
Huaibin Yanga5419422011-12-08 23:52:10 -08009682static void __init reserve_mdp_memory(void)
9683{
Nagamalleswararao Ganji937a1192011-12-07 19:00:52 -08009684 mdp_pdata.ov0_wb_size = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
9685 mdp_pdata.ov1_wb_size = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
9686#if defined(CONFIG_ANDROID_PMEM) && !defined(CONFIG_MSM_MULTIMEDIA_USE_ION)
9687 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9688 mdp_pdata.ov0_wb_size;
9689 msm8x60_reserve_table[mdp_pdata.mem_hid].size +=
9690 mdp_pdata.ov1_wb_size;
9691#endif
Huaibin Yanga5419422011-12-08 23:52:10 -08009692}
9693
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009694#ifdef CONFIG_FB_MSM_TVOUT
9695
9696#ifdef CONFIG_MSM_BUS_SCALING
9697static struct msm_bus_vectors atv_bus_init_vectors[] = {
9698 /* For now, 0th array entry is reserved.
9699 * Please leave 0 as is and don't use it
9700 */
9701 {
9702 .src = MSM_BUS_MASTER_MDP_PORT0,
9703 .dst = MSM_BUS_SLAVE_SMI,
9704 .ab = 0,
9705 .ib = 0,
9706 },
9707 /* Master and slaves can be from different fabrics */
9708 {
9709 .src = MSM_BUS_MASTER_MDP_PORT0,
9710 .dst = MSM_BUS_SLAVE_EBI_CH0,
9711 .ab = 0,
9712 .ib = 0,
9713 },
9714};
9715static struct msm_bus_vectors atv_bus_def_vectors[] = {
9716 /* For now, 0th array entry is reserved.
9717 * Please leave 0 as is and don't use it
9718 */
9719 {
9720 .src = MSM_BUS_MASTER_MDP_PORT0,
9721 .dst = MSM_BUS_SLAVE_SMI,
9722 .ab = 236390400,
9723 .ib = 265939200,
9724 },
9725 /* Master and slaves can be from different fabrics */
9726 {
9727 .src = MSM_BUS_MASTER_MDP_PORT0,
9728 .dst = MSM_BUS_SLAVE_EBI_CH0,
9729 .ab = 236390400,
9730 .ib = 265939200,
9731 },
9732};
9733static struct msm_bus_paths atv_bus_scale_usecases[] = {
9734 {
9735 ARRAY_SIZE(atv_bus_init_vectors),
9736 atv_bus_init_vectors,
9737 },
9738 {
9739 ARRAY_SIZE(atv_bus_def_vectors),
9740 atv_bus_def_vectors,
9741 },
9742};
9743static struct msm_bus_scale_pdata atv_bus_scale_pdata = {
9744 atv_bus_scale_usecases,
9745 ARRAY_SIZE(atv_bus_scale_usecases),
9746 .name = "atv",
9747};
9748#endif
9749
9750static struct tvenc_platform_data atv_pdata = {
9751 .poll = 0,
9752 .pm_vid_en = atv_dac_power,
9753#ifdef CONFIG_MSM_BUS_SCALING
9754 .bus_scale_table = &atv_bus_scale_pdata,
9755#endif
9756};
9757#endif
9758
9759static void __init msm_fb_add_devices(void)
9760{
9761#ifdef CONFIG_FB_MSM_LCDC_DSUB
9762 mdp_pdata.mdp_core_clk_table = NULL;
9763 mdp_pdata.num_mdp_clk = 0;
9764 mdp_pdata.mdp_core_clk_rate = 200000000;
9765#endif
9766 if (machine_is_msm8x60_rumi3())
9767 msm_fb_register_device("mdp", NULL);
9768 else
9769 msm_fb_register_device("mdp", &mdp_pdata);
9770
9771 msm_fb_register_device("lcdc", &lcdc_pdata);
9772 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
9773#ifdef CONFIG_MSM_BUS_SCALING
Ravishangar Kalyanam8c79ead2011-12-02 21:05:01 -08009774 if (hdmi_is_primary)
9775 msm_fb_register_device("dtv", &dtv_hdmi_prim_pdata);
9776 else
9777 msm_fb_register_device("dtv", &dtv_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009778#endif
9779#ifdef CONFIG_FB_MSM_TVOUT
9780 msm_fb_register_device("tvenc", &atv_pdata);
9781 msm_fb_register_device("tvout_device", NULL);
9782#endif
9783}
9784
Ravishangar Kalyanam5f0c6412012-03-15 17:24:11 -07009785/**
9786 * Set MDP clocks to high frequency to avoid underflow when
9787 * using high resolution 1200x1920 WUXGA/HDMI as primary panels
9788 */
9789static void set_mdp_clocks_for_wuxga(void)
9790{
9791 int i;
9792
9793 mdp_sd_smi_vectors[0].ab = 2000000000;
9794 mdp_sd_smi_vectors[0].ib = 2000000000;
9795 mdp_sd_smi_vectors[1].ab = 2000000000;
9796 mdp_sd_smi_vectors[1].ib = 2000000000;
9797
9798 mdp_sd_ebi_vectors[0].ab = 2000000000;
9799 mdp_sd_ebi_vectors[0].ib = 2000000000;
9800 mdp_sd_ebi_vectors[1].ab = 2000000000;
9801 mdp_sd_ebi_vectors[1].ib = 2000000000;
9802
9803 mdp_vga_vectors[0].ab = 2000000000;
9804 mdp_vga_vectors[0].ib = 2000000000;
9805 mdp_vga_vectors[1].ab = 2000000000;
9806 mdp_vga_vectors[1].ib = 2000000000;
9807
9808 mdp_720p_vectors[0].ab = 2000000000;
9809 mdp_720p_vectors[0].ib = 2000000000;
9810 mdp_720p_vectors[1].ab = 2000000000;
9811 mdp_720p_vectors[1].ib = 2000000000;
9812
9813 mdp_1080p_vectors[0].ab = 2000000000;
9814 mdp_1080p_vectors[0].ib = 2000000000;
9815 mdp_1080p_vectors[1].ab = 2000000000;
9816 mdp_1080p_vectors[1].ib = 2000000000;
9817
9818 mdp_pdata.mdp_core_clk_rate = 200000000;
9819
9820 for (i = 0; i < ARRAY_SIZE(mdp_core_clk_rate_table); i++)
9821 mdp_core_clk_rate_table[i] = 200000000;
9822}
9823
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07009824#if (defined(CONFIG_MARIMBA_CORE)) && \
9825 (defined(CONFIG_MSM_BT_POWER) || defined(CONFIG_MSM_BT_POWER_MODULE))
9826
9827static const struct {
9828 char *name;
9829 int vmin;
9830 int vmax;
9831} bt_regs_info[] = {
9832 { "8058_s3", 1800000, 1800000 },
9833 { "8058_s2", 1300000, 1300000 },
9834 { "8058_l8", 2900000, 3050000 },
9835};
9836
9837static struct {
9838 bool enabled;
9839} bt_regs_status[] = {
9840 { false },
9841 { false },
9842 { false },
9843};
9844static struct regulator *bt_regs[ARRAY_SIZE(bt_regs_info)];
9845
9846static int bahama_bt(int on)
9847{
9848 int rc;
9849 int i;
9850 struct marimba config = { .mod_id = SLAVE_ID_BAHAMA};
9851
9852 struct bahama_variant_register {
9853 const size_t size;
9854 const struct bahama_config_register *set;
9855 };
9856
9857 const struct bahama_config_register *p;
9858
9859 u8 version;
9860
9861 const struct bahama_config_register v10_bt_on[] = {
9862 { 0xE9, 0x00, 0xFF },
9863 { 0xF4, 0x80, 0xFF },
9864 { 0xE4, 0x00, 0xFF },
9865 { 0xE5, 0x00, 0x0F },
9866#ifdef CONFIG_WLAN
9867 { 0xE6, 0x38, 0x7F },
9868 { 0xE7, 0x06, 0xFF },
9869#endif
9870 { 0xE9, 0x21, 0xFF },
9871 { 0x01, 0x0C, 0x1F },
9872 { 0x01, 0x08, 0x1F },
9873 };
9874
9875 const struct bahama_config_register v20_bt_on_fm_off[] = {
9876 { 0x11, 0x0C, 0xFF },
9877 { 0x13, 0x01, 0xFF },
9878 { 0xF4, 0x80, 0xFF },
9879 { 0xF0, 0x00, 0xFF },
9880 { 0xE9, 0x00, 0xFF },
9881#ifdef CONFIG_WLAN
9882 { 0x81, 0x00, 0x7F },
9883 { 0x82, 0x00, 0xFF },
9884 { 0xE6, 0x38, 0x7F },
9885 { 0xE7, 0x06, 0xFF },
9886#endif
9887 { 0xE9, 0x21, 0xFF },
9888 };
9889
9890 const struct bahama_config_register v20_bt_on_fm_on[] = {
9891 { 0x11, 0x0C, 0xFF },
9892 { 0x13, 0x01, 0xFF },
9893 { 0xF4, 0x86, 0xFF },
9894 { 0xF0, 0x06, 0xFF },
9895 { 0xE9, 0x00, 0xFF },
9896#ifdef CONFIG_WLAN
9897 { 0x81, 0x00, 0x7F },
9898 { 0x82, 0x00, 0xFF },
9899 { 0xE6, 0x38, 0x7F },
9900 { 0xE7, 0x06, 0xFF },
9901#endif
9902 { 0xE9, 0x21, 0xFF },
9903 };
9904
9905 const struct bahama_config_register v10_bt_off[] = {
9906 { 0xE9, 0x00, 0xFF },
9907 };
9908
9909 const struct bahama_config_register v20_bt_off_fm_off[] = {
9910 { 0xF4, 0x84, 0xFF },
9911 { 0xF0, 0x04, 0xFF },
9912 { 0xE9, 0x00, 0xFF }
9913 };
9914
9915 const struct bahama_config_register v20_bt_off_fm_on[] = {
9916 { 0xF4, 0x86, 0xFF },
9917 { 0xF0, 0x06, 0xFF },
9918 { 0xE9, 0x00, 0xFF }
9919 };
9920 const struct bahama_variant_register bt_bahama[2][3] = {
9921 {
9922 { ARRAY_SIZE(v10_bt_off), v10_bt_off },
9923 { ARRAY_SIZE(v20_bt_off_fm_off), v20_bt_off_fm_off },
9924 { ARRAY_SIZE(v20_bt_off_fm_on), v20_bt_off_fm_on }
9925 },
9926 {
9927 { ARRAY_SIZE(v10_bt_on), v10_bt_on },
9928 { ARRAY_SIZE(v20_bt_on_fm_off), v20_bt_on_fm_off },
9929 { ARRAY_SIZE(v20_bt_on_fm_on), v20_bt_on_fm_on }
9930 }
9931 };
9932
9933 u8 offset = 0; /* index into bahama configs */
9934
9935 on = on ? 1 : 0;
9936 version = read_bahama_ver();
9937
9938 if (version == VER_UNSUPPORTED) {
9939 dev_err(&msm_bt_power_device.dev,
9940 "%s: unsupported version\n",
9941 __func__);
9942 return -EIO;
9943 }
9944
9945 if (version == VER_2_0) {
9946 if (marimba_get_fm_status(&config))
9947 offset = 0x01;
9948 }
9949
9950 /* Voting off 1.3V S2 Regulator,BahamaV2 used in Normal mode */
9951 if (on && (version == VER_2_0)) {
9952 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
9953 if ((!strcmp(bt_regs_info[i].name, "8058_s2"))
9954 && (bt_regs_status[i].enabled == true)) {
9955 if (regulator_disable(bt_regs[i])) {
9956 dev_err(&msm_bt_power_device.dev,
9957 "%s: regulator disable failed",
9958 __func__);
9959 }
9960 bt_regs_status[i].enabled = false;
9961 break;
9962 }
9963 }
9964 }
9965
9966 p = bt_bahama[on][version + offset].set;
9967
9968 dev_info(&msm_bt_power_device.dev,
9969 "%s: found version %d\n", __func__, version);
9970
9971 for (i = 0; i < bt_bahama[on][version + offset].size; i++) {
9972 u8 value = (p+i)->value;
9973 rc = marimba_write_bit_mask(&config,
9974 (p+i)->reg,
9975 &value,
9976 sizeof((p+i)->value),
9977 (p+i)->mask);
9978 if (rc < 0) {
9979 dev_err(&msm_bt_power_device.dev,
9980 "%s: reg %d write failed: %d\n",
9981 __func__, (p+i)->reg, rc);
9982 return rc;
9983 }
9984 dev_dbg(&msm_bt_power_device.dev,
9985 "%s: reg 0x%02x write value 0x%02x mask 0x%02x\n",
9986 __func__, (p+i)->reg,
9987 value, (p+i)->mask);
9988 }
9989 /* Update BT Status */
9990 if (on)
9991 marimba_set_bt_status(&config, true);
9992 else
9993 marimba_set_bt_status(&config, false);
9994
9995 return 0;
9996}
9997
9998static int bluetooth_use_regulators(int on)
9999{
10000 int i, recover = -1, rc = 0;
10001
10002 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
10003 bt_regs[i] = on ? regulator_get(&msm_bt_power_device.dev,
10004 bt_regs_info[i].name) :
10005 (regulator_put(bt_regs[i]), NULL);
10006 if (IS_ERR(bt_regs[i])) {
10007 rc = PTR_ERR(bt_regs[i]);
10008 dev_err(&msm_bt_power_device.dev,
10009 "regulator %s get failed (%d)\n",
10010 bt_regs_info[i].name, rc);
10011 recover = i - 1;
10012 bt_regs[i] = NULL;
10013 break;
10014 }
10015
10016 if (!on)
10017 continue;
10018
10019 rc = regulator_set_voltage(bt_regs[i],
10020 bt_regs_info[i].vmin,
10021 bt_regs_info[i].vmax);
10022 if (rc < 0) {
10023 dev_err(&msm_bt_power_device.dev,
10024 "regulator %s voltage set (%d)\n",
10025 bt_regs_info[i].name, rc);
10026 recover = i;
10027 break;
10028 }
10029 }
10030
10031 if (on && (recover > -1))
10032 for (i = recover; i >= 0; i--) {
10033 regulator_put(bt_regs[i]);
10034 bt_regs[i] = NULL;
10035 }
10036
10037 return rc;
10038}
10039
10040static int bluetooth_switch_regulators(int on)
10041{
10042 int i, rc = 0;
10043
10044 for (i = 0; i < ARRAY_SIZE(bt_regs_info); i++) {
10045 if (on && (bt_regs_status[i].enabled == false)) {
10046 rc = regulator_enable(bt_regs[i]);
10047 if (rc < 0) {
10048 dev_err(&msm_bt_power_device.dev,
10049 "regulator %s %s failed (%d)\n",
10050 bt_regs_info[i].name,
10051 "enable", rc);
10052 if (i > 0) {
10053 while (--i) {
10054 regulator_disable(bt_regs[i]);
10055 bt_regs_status[i].enabled
10056 = false;
10057 }
10058 break;
10059 }
10060 }
10061 bt_regs_status[i].enabled = true;
10062 } else if (!on && (bt_regs_status[i].enabled == true)) {
10063 rc = regulator_disable(bt_regs[i]);
10064 if (rc < 0) {
10065 dev_err(&msm_bt_power_device.dev,
10066 "regulator %s %s failed (%d)\n",
10067 bt_regs_info[i].name,
10068 "disable", rc);
10069 break;
10070 }
10071 bt_regs_status[i].enabled = false;
10072 }
10073 }
10074 return rc;
10075}
10076
10077static struct msm_xo_voter *bt_clock;
10078
10079static int bluetooth_power(int on)
10080{
10081 int rc = 0;
10082 int id;
10083
10084 /* In case probe function fails, cur_connv_type would be -1 */
10085 id = adie_get_detected_connectivity_type();
10086 if (id != BAHAMA_ID) {
10087 pr_err("%s: unexpected adie connectivity type: %d\n",
10088 __func__, id);
10089 return -ENODEV;
10090 }
10091
10092 if (on) {
10093
10094 rc = bluetooth_use_regulators(1);
10095 if (rc < 0)
10096 goto out;
10097
10098 rc = bluetooth_switch_regulators(1);
10099
10100 if (rc < 0)
10101 goto fail_put;
10102
10103 bt_clock = msm_xo_get(MSM_XO_TCXO_D0, "bt_power");
10104
10105 if (IS_ERR(bt_clock)) {
10106 pr_err("Couldn't get TCXO_D0 voter\n");
10107 goto fail_switch;
10108 }
10109
10110 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_ON);
10111
10112 if (rc < 0) {
10113 pr_err("Failed to vote for TCXO_DO ON\n");
10114 goto fail_vote;
10115 }
10116
10117 rc = bahama_bt(1);
10118
10119 if (rc < 0)
10120 goto fail_clock;
10121
10122 msleep(10);
10123
10124 rc = msm_xo_mode_vote(bt_clock, MSM_XO_MODE_PIN_CTRL);
10125
10126 if (rc < 0) {
10127 pr_err("Failed to vote for TCXO_DO pin control\n");
10128 goto fail_vote;
10129 }
10130 } else {
10131 /* check for initial RFKILL block (power off) */
10132 /* some RFKILL versions/configurations rfkill_register */
10133 /* calls here for an initial set_block */
10134 /* avoid calling i2c and regulator before unblock (on) */
10135 if (platform_get_drvdata(&msm_bt_power_device) == NULL) {
10136 dev_info(&msm_bt_power_device.dev,
10137 "%s: initialized OFF/blocked\n", __func__);
10138 goto out;
10139 }
10140
10141 bahama_bt(0);
10142
10143fail_clock:
10144 msm_xo_mode_vote(bt_clock, MSM_XO_MODE_OFF);
10145fail_vote:
10146 msm_xo_put(bt_clock);
10147fail_switch:
10148 bluetooth_switch_regulators(0);
10149fail_put:
10150 bluetooth_use_regulators(0);
10151 }
10152
10153out:
10154 if (rc < 0)
10155 on = 0;
10156 dev_info(&msm_bt_power_device.dev,
10157 "Bluetooth power switch: state %d result %d\n", on, rc);
10158
10159 return rc;
10160}
10161
10162#endif /*CONFIG_MARIMBA_CORE, CONFIG_MSM_BT_POWER, CONFIG_MSM_BT_POWER_MODULE*/
10163
10164static void __init msm8x60_cfg_smsc911x(void)
10165{
10166 smsc911x_resources[1].start =
10167 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10168 smsc911x_resources[1].end =
10169 PM8058_GPIO_IRQ(PM8058_IRQ_BASE, 6);
10170}
10171
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010172void msm_fusion_setup_pinctrl(void)
10173{
10174 struct msm_xo_voter *a1;
10175
10176 if (socinfo_get_platform_subtype() == 0x3) {
10177 /*
10178 * Vote for the A1 clock to be in pin control mode before
10179 * the external images are loaded.
10180 */
10181 a1 = msm_xo_get(MSM_XO_TCXO_A1, "mdm");
10182 BUG_ON(!a1);
10183 msm_xo_mode_vote(a1, MSM_XO_MODE_PIN_CTRL);
10184 }
10185}
10186
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010187struct msm_board_data {
10188 struct msm_gpiomux_configs *gpiomux_cfgs;
10189};
10190
10191static struct msm_board_data msm8x60_rumi3_board_data __initdata = {
10192 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10193};
10194
10195static struct msm_board_data msm8x60_sim_board_data __initdata = {
10196 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10197};
10198
10199static struct msm_board_data msm8x60_surf_board_data __initdata = {
10200 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10201};
10202
10203static struct msm_board_data msm8x60_ffa_board_data __initdata = {
10204 .gpiomux_cfgs = msm8x60_surf_ffa_gpiomux_cfgs,
10205};
10206
10207static struct msm_board_data msm8x60_fluid_board_data __initdata = {
10208 .gpiomux_cfgs = msm8x60_fluid_gpiomux_cfgs,
10209};
10210
10211static struct msm_board_data msm8x60_charm_surf_board_data __initdata = {
10212 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10213};
10214
10215static struct msm_board_data msm8x60_charm_ffa_board_data __initdata = {
10216 .gpiomux_cfgs = msm8x60_charm_gpiomux_cfgs,
10217};
10218
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010219static struct msm_board_data msm8x60_dragon_board_data __initdata = {
10220 .gpiomux_cfgs = msm8x60_dragon_gpiomux_cfgs,
10221};
10222
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010223static void __init msm8x60_init(struct msm_board_data *board_data)
10224{
10225 uint32_t soc_platform_version;
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010226#ifdef CONFIG_USB_EHCI_MSM_72K
10227 struct pm8xxx_mpp_config_data hsusb_phy_mpp = {
10228 .type = PM8XXX_MPP_TYPE_D_OUTPUT,
10229 .level = PM8901_MPP_DIG_LEVEL_L5,
10230 .control = PM8XXX_MPP_DOUT_CTRL_HIGH,
10231 };
10232#endif
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010233 pmic_reset_irq = PM8058_IRQ_BASE + PM8058_RESOUT_IRQ;
Abhijeet Dharmapurikar6d565fd2011-09-15 18:49:56 -070010234
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010235 /*
10236 * Initialize RPM first as other drivers and devices may need
10237 * it for their initialization.
10238 */
Praveen Chidambaram78499012011-11-01 17:15:17 -060010239 BUG_ON(msm_rpm_init(&msm8660_rpm_data));
10240 BUG_ON(msm_rpmrs_levels_init(&msm_rpmrs_data));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010241 if (msm_xo_init())
10242 pr_err("Failed to initialize XO votes\n");
10243
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010244 msm8x60_check_2d_hardware();
10245
10246 /* Change SPM handling of core 1 if PMM 8160 is present. */
10247 soc_platform_version = socinfo_get_platform_version();
10248 if (SOCINFO_VERSION_MAJOR(soc_platform_version) == 1 &&
10249 SOCINFO_VERSION_MINOR(soc_platform_version) >= 2) {
10250 struct msm_spm_platform_data *spm_data;
10251
10252 spm_data = &msm_spm_data_v1[1];
10253 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10254 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10255
10256 spm_data = &msm_spm_data[1];
10257 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] &= ~0x0F00UL;
10258 spm_data->reg_init_values[MSM_SPM_REG_SAW_CFG] |= 0x0100UL;
10259 }
10260
10261 /*
10262 * Initialize SPM before acpuclock as the latter calls into SPM
10263 * driver to set ACPU voltages.
10264 */
10265 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10266 msm_spm_init(msm_spm_data, ARRAY_SIZE(msm_spm_data));
10267 else
10268 msm_spm_init(msm_spm_data_v1, ARRAY_SIZE(msm_spm_data_v1));
10269
10270 /*
10271 * Set regulators 8901_l4 and 8901_l6 to be always on in HPM for SURF
10272 * devices so that the RPM doesn't drop into a low power mode that an
10273 * un-reworked SURF cannot resume from.
10274 */
10275 if (machine_is_msm8x60_surf()) {
David Collins6f032ba2011-08-31 14:08:15 -070010276 int i;
10277
10278 for (i = 0; i < ARRAY_SIZE(rpm_regulator_init_data); i++)
10279 if (rpm_regulator_init_data[i].id
10280 == RPM_VREG_ID_PM8901_L4
10281 || rpm_regulator_init_data[i].id
10282 == RPM_VREG_ID_PM8901_L6)
10283 rpm_regulator_init_data[i]
10284 .init_data.constraints.always_on = 1;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010285 }
10286
10287 /*
10288 * Disable regulator info printing so that regulator registration
10289 * messages do not enter the kmsg log.
10290 */
10291 regulator_suppress_info_printing();
10292
10293 /* Initialize regulators needed for clock_init. */
10294 platform_add_devices(early_regulators, ARRAY_SIZE(early_regulators));
10295
Stephen Boydbb600ae2011-08-02 20:11:40 -070010296 msm_clock_init(&msm8x60_clock_init_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010297
10298 /* Buses need to be initialized before early-device registration
10299 * to get the platform data for fabrics.
10300 */
10301 msm8x60_init_buses();
10302 platform_add_devices(early_devices, ARRAY_SIZE(early_devices));
10303 /* CPU frequency control is not supported on simulated targets. */
10304 if (!machine_is_msm8x60_rumi3() && !machine_is_msm8x60_sim())
Matt Wagantallec57f062011-08-16 23:54:46 -070010305 acpuclk_init(&acpuclk_8x60_soc_data);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010306
Terence Hampsonb36a38c2011-09-19 19:10:40 -040010307 /*
10308 * Enable EBI2 only for boards which make use of it. Leave
10309 * it disabled for all others for additional power savings.
10310 */
10311 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10312 machine_is_msm8x60_rumi3() ||
10313 machine_is_msm8x60_sim() ||
10314 machine_is_msm8x60_fluid() ||
10315 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010316 msm8x60_init_ebi2();
10317 msm8x60_init_tlmm();
10318 msm8x60_init_gpiomux(board_data->gpiomux_cfgs);
10319 msm8x60_init_uart12dm();
10320 msm8x60_init_mmc();
10321
10322#if defined(CONFIG_PMIC8058_OTHC) || defined(CONFIG_PMIC8058_OTHC_MODULE)
10323 msm8x60_init_pm8058_othc();
10324#endif
10325
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010326 if (machine_is_msm8x60_fluid())
10327 pm8058_platform_data.keypad_pdata = &fluid_keypad_data;
10328 else if (machine_is_msm8x60_dragon())
10329 pm8058_platform_data.keypad_pdata = &dragon_keypad_data;
10330 else
10331 pm8058_platform_data.keypad_pdata = &ffa_keypad_data;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010332
Jilai Wang53d27a82011-07-13 14:32:58 -040010333 /* Specify reset pin for OV9726 */
10334 if (machine_is_msm8x60_dragon()) {
10335 msm_camera_sensor_ov9726_data.sensor_reset = 62;
10336 ov9726_sensor_8660_info.mount_angle = 270;
10337 }
10338
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010339#ifdef CONFIG_BATTERY_MSM8X60
10340 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10341 machine_is_msm8x60_fusion() || machine_is_msm8x60_dragon() ||
10342 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_fluid())
10343 platform_device_register(&msm_charger_device);
10344#endif
10345
10346 if (machine_is_msm8x60_dragon())
10347 pm8058_platform_data.charger_pdata = &pmic8058_charger_dragon;
10348 if (!machine_is_msm8x60_fluid())
10349 pm8058_platform_data.charger_pdata = &pmic8058_charger_ffa_surf;
10350
10351 /* configure pmic leds */
10352 if (machine_is_msm8x60_fluid())
10353 pm8058_platform_data.leds_pdata = &pm8058_fluid_flash_leds_data;
10354 else if (machine_is_msm8x60_dragon())
10355 pm8058_platform_data.leds_pdata = &pm8058_dragon_leds_data;
10356 else
10357 pm8058_platform_data.leds_pdata = &pm8058_flash_leds_data;
10358
10359 if (machine_is_msm8x60_ffa() || machine_is_msm8x60_fusn_ffa() ||
10360 machine_is_msm8x60_dragon()) {
10361 pm8058_platform_data.vibrator_pdata = &pm8058_vib_pdata;
10362 }
10363
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010364 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10365 machine_is_msm8x60_fluid() || machine_is_msm8x60_fusion() ||
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010366 machine_is_msm8x60_fusn_ffa() || machine_is_msm8x60_dragon()) {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010367 msm8x60_cfg_smsc911x();
10368 if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) != 1)
10369 platform_add_devices(msm_footswitch_devices,
10370 msm_num_footswitch_devices);
10371 platform_add_devices(surf_devices,
10372 ARRAY_SIZE(surf_devices));
10373
10374#ifdef CONFIG_MSM_DSPS
10375 if (machine_is_msm8x60_fluid()) {
10376 platform_device_unregister(&msm_gsbi12_qup_i2c_device);
10377 msm8x60_init_dsps();
10378 }
10379#endif
10380
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010381 pm8901_vreg_mpp0_init();
10382
10383 platform_device_register(&msm8x60_8901_mpp_vreg);
10384
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010385#ifdef CONFIG_USB_EHCI_MSM_72K
10386 /*
10387 * Drive MPP2 pin HIGH for PHY to generate ID interrupts on 8660
10388 * fluid
10389 */
Anirudh Ghayal9f77e962011-12-06 12:38:21 +053010390 if (machine_is_msm8x60_fluid())
10391 pm8xxx_mpp_config(PM8901_MPP_PM_TO_SYS(1), &hsusb_phy_mpp);
10392 msm_add_host(0, &msm_usb_host_pdata);
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010393#endif
Lei Zhou338cab82011-08-19 13:38:17 -040010394
10395#ifdef CONFIG_SND_SOC_MSM8660_APQ
10396 if (machine_is_msm8x60_dragon())
10397 platform_add_devices(dragon_alsa_devices,
10398 ARRAY_SIZE(dragon_alsa_devices));
10399 else
10400#endif
10401 platform_add_devices(asoc_devices,
10402 ARRAY_SIZE(asoc_devices));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010403 } else {
10404 msm8x60_configure_smc91x();
10405 platform_add_devices(rumi_sim_devices,
10406 ARRAY_SIZE(rumi_sim_devices));
10407 }
10408#if defined(CONFIG_USB_PEHCI_HCD) || defined(CONFIG_USB_PEHCI_HCD_MODULE)
Zhang Chang Ken6baadf02011-08-05 09:48:15 -040010409 if (machine_is_msm8x60_surf() || machine_is_msm8x60_ffa() ||
10410 machine_is_msm8x60_dragon())
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010411 msm8x60_cfg_isp1763();
10412#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010413
10414 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10415 platform_add_devices(charm_devices, ARRAY_SIZE(charm_devices));
10416
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010417
10418#if defined(CONFIG_SPI_QUP) || defined(CONFIG_SPI_QUP_MODULE)
10419 if (machine_is_msm8x60_fluid())
10420 platform_device_register(&msm_gsbi10_qup_spi_device);
10421 else
10422 platform_device_register(&msm_gsbi1_qup_spi_device);
10423#endif
10424
10425#if defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C) || \
10426 defined(CONFIG_TOUCHSCREEN_CYTTSP_I2C_MODULE)
10427 if (machine_is_msm8x60_fluid())
10428 cyttsp_set_params();
10429#endif
10430 if (!machine_is_msm8x60_sim())
10431 msm_fb_add_devices();
10432 fixup_i2c_configs();
10433 register_i2c_devices();
10434
Terence Hampson1c73fef2011-07-19 17:10:49 -040010435 if (machine_is_msm8x60_dragon())
10436 smsc911x_config.reset_gpio
10437 = GPIO_ETHERNET_RESET_N_DRAGON;
10438
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010439 platform_device_register(&smsc911x_device);
10440
10441#if (defined(CONFIG_SPI_QUP)) && \
10442 (defined(CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT) || \
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010443 defined(CONFIG_FB_MSM_LCDC_AUO_WVGA) || \
10444 defined(CONFIG_FB_MSM_LCDC_NT35582_WVGA))
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010445
10446 if (machine_is_msm8x60_fluid()) {
10447#ifdef CONFIG_FB_MSM_LCDC_SAMSUNG_OLED_PT
10448 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3) {
10449 spi_register_board_info(lcdc_samsung_spi_board_info,
10450 ARRAY_SIZE(lcdc_samsung_spi_board_info));
10451 } else
10452#endif
10453 {
10454#ifdef CONFIG_FB_MSM_LCDC_AUO_WVGA
10455 spi_register_board_info(lcdc_auo_spi_board_info,
10456 ARRAY_SIZE(lcdc_auo_spi_board_info));
10457#endif
10458 }
Zhang Chang Ken3a8b8512011-08-04 18:41:39 -040010459#ifdef CONFIG_FB_MSM_LCDC_NT35582_WVGA
10460 } else if (machine_is_msm8x60_dragon()) {
10461 spi_register_board_info(lcdc_nt35582_spi_board_info,
10462 ARRAY_SIZE(lcdc_nt35582_spi_board_info));
10463#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010464 }
10465#endif
10466
10467 msm_pm_set_platform_data(msm_pm_data, ARRAY_SIZE(msm_pm_data));
10468 msm_pm_set_rpm_wakeup_irq(RPM_SCSS_CPU0_WAKE_UP_IRQ);
10469 msm_cpuidle_set_states(msm_cstates, ARRAY_SIZE(msm_cstates),
10470 msm_pm_data);
Maheshkumar Sivasubramanianc6c55032011-10-25 16:01:32 -060010471 BUG_ON(msm_pm_boot_init(&msm_pm_boot_pdata));
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010472
Anirudh Ghayalc2019332011-11-12 06:29:10 +053010473 pm8058_gpios_init();
10474
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010475#ifdef CONFIG_SENSORS_MSM_ADC
10476 if (machine_is_msm8x60_fluid()) {
10477 msm_adc_pdata.dev_names = msm_adc_fluid_device_names;
10478 msm_adc_pdata.num_adc = ARRAY_SIZE(msm_adc_fluid_device_names);
10479 if (SOCINFO_VERSION_MAJOR(soc_platform_version) < 3)
10480 msm_adc_pdata.gpio_config = APROC_CONFIG;
10481 else
10482 msm_adc_pdata.gpio_config = MPROC_CONFIG;
10483 }
10484 msm_adc_pdata.target_hw = MSM_8x60;
10485#endif
10486#ifdef CONFIG_MSM8X60_AUDIO
10487 msm_snddev_init();
10488#endif
10489#if defined(CONFIG_GPIO_SX150X) || defined(CONFIG_GPIO_SX150X_MODULE)
10490 if (machine_is_msm8x60_fluid())
10491 platform_device_register(&fluid_leds_gpio);
10492 else
10493 platform_device_register(&gpio_leds);
10494#endif
10495
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010496 msm8x60_multi_sdio_init();
Laura Abbott5d2d1e62011-08-10 16:27:35 -070010497
10498 if (machine_is_msm8x60_fusion() || machine_is_msm8x60_fusn_ffa())
10499 msm_fusion_setup_pinctrl();
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010500}
10501
10502static void __init msm8x60_rumi3_init(void)
10503{
10504 msm8x60_init(&msm8x60_rumi3_board_data);
10505}
10506
10507static void __init msm8x60_sim_init(void)
10508{
10509 msm8x60_init(&msm8x60_sim_board_data);
10510}
10511
10512static void __init msm8x60_surf_init(void)
10513{
10514 msm8x60_init(&msm8x60_surf_board_data);
10515}
10516
10517static void __init msm8x60_ffa_init(void)
10518{
10519 msm8x60_init(&msm8x60_ffa_board_data);
10520}
10521
10522static void __init msm8x60_fluid_init(void)
10523{
10524 msm8x60_init(&msm8x60_fluid_board_data);
10525}
10526
10527static void __init msm8x60_charm_surf_init(void)
10528{
10529 msm8x60_init(&msm8x60_charm_surf_board_data);
10530}
10531
10532static void __init msm8x60_charm_ffa_init(void)
10533{
10534 msm8x60_init(&msm8x60_charm_ffa_board_data);
10535}
10536
10537static void __init msm8x60_charm_init_early(void)
10538{
10539 msm8x60_allocate_memory_regions();
Steve Mucklea55df6e2010-01-07 12:43:24 -080010540}
10541
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010542static void __init msm8x60_dragon_init(void)
10543{
10544 msm8x60_init(&msm8x60_dragon_board_data);
10545}
10546
Steve Mucklea55df6e2010-01-07 12:43:24 -080010547MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
10548 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010549 .reserve = msm8x60_reserve,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010550 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010551 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010552 .init_machine = msm8x60_rumi3_init,
Steve Mucklea55df6e2010-01-07 12:43:24 -080010553 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010554 .init_early = msm8x60_charm_init_early,
Steve Muckle49b76f72010-03-19 17:00:08 -070010555MACHINE_END
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010556
10557MACHINE_START(MSM8X60_SIM, "QCT MSM8X60 SIMULATOR")
10558 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010559 .reserve = msm8x60_reserve,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010560 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010561 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010562 .init_machine = msm8x60_sim_init,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010563 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010564 .init_early = msm8x60_charm_init_early,
10565MACHINE_END
10566
10567MACHINE_START(MSM8X60_SURF, "QCT MSM8X60 SURF")
10568 .map_io = msm8x60_map_io,
10569 .reserve = msm8x60_reserve,
10570 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010571 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010572 .init_machine = msm8x60_surf_init,
10573 .timer = &msm_timer,
10574 .init_early = msm8x60_charm_init_early,
Steve Muckle57bbf1c2010-01-07 12:51:10 -080010575MACHINE_END
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010576
10577MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
10578 .map_io = msm8x60_map_io,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010579 .reserve = msm8x60_reserve,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010580 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010581 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010582 .init_machine = msm8x60_ffa_init,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010583 .timer = &msm_timer,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010584 .init_early = msm8x60_charm_init_early,
10585MACHINE_END
10586
10587MACHINE_START(MSM8X60_FLUID, "QCT MSM8X60 FLUID")
10588 .map_io = msm8x60_map_io,
10589 .reserve = msm8x60_reserve,
10590 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010591 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010592 .init_machine = msm8x60_fluid_init,
10593 .timer = &msm_timer,
10594 .init_early = msm8x60_charm_init_early,
10595MACHINE_END
10596
10597MACHINE_START(MSM8X60_FUSION, "QCT MSM8X60 FUSION SURF")
10598 .map_io = msm8x60_map_io,
10599 .reserve = msm8x60_reserve,
10600 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010601 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010602 .init_machine = msm8x60_charm_surf_init,
10603 .timer = &msm_timer,
10604 .init_early = msm8x60_charm_init_early,
10605MACHINE_END
10606
10607MACHINE_START(MSM8X60_FUSN_FFA, "QCT MSM8X60 FUSION FFA")
10608 .map_io = msm8x60_map_io,
10609 .reserve = msm8x60_reserve,
10610 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010611 .handle_irq = gic_handle_irq,
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070010612 .init_machine = msm8x60_charm_ffa_init,
10613 .timer = &msm_timer,
10614 .init_early = msm8x60_charm_init_early,
Gregory Bean69b7f6f2010-04-04 22:29:02 -070010615MACHINE_END
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010616
10617MACHINE_START(MSM8X60_DRAGON, "QCT MSM8X60 DRAGON")
10618 .map_io = msm8x60_map_io,
10619 .reserve = msm8x60_reserve,
10620 .init_irq = msm8x60_init_irq,
Marc Zyngier89bdafd12011-12-22 11:39:20 +053010621 .handle_irq = gic_handle_irq,
Zhang Chang Kenef05b172011-07-27 15:28:13 -040010622 .init_machine = msm8x60_dragon_init,
10623 .timer = &msm_timer,
10624 .init_early = msm8x60_charm_init_early,
10625MACHINE_END