Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * arch/sh/mm/tlb-sh4.c |
| 3 | * |
| 4 | * SH-4 specific TLB operations |
| 5 | * |
| 6 | * Copyright (C) 1999 Niibe Yutaka |
| 7 | * Copyright (C) 2002 Paul Mundt |
| 8 | * |
| 9 | * Released under the terms of the GNU GPL v2.0. |
| 10 | */ |
Paul Mundt | 26b7a78 | 2006-12-28 10:31:48 +0900 | [diff] [blame^] | 11 | #include <linux/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 12 | #include <asm/system.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 13 | #include <asm/mmu_context.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | |
| 15 | void __flush_tlb_page(unsigned long asid, unsigned long page) |
| 16 | { |
| 17 | unsigned long addr, data; |
| 18 | |
| 19 | /* |
| 20 | * NOTE: PTEH.ASID should be set to this MM |
| 21 | * _AND_ we need to write ASID to the array. |
| 22 | * |
| 23 | * It would be simple if we didn't need to set PTEH.ASID... |
| 24 | */ |
| 25 | addr = MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT; |
| 26 | data = page | asid; /* VALID bit is off */ |
| 27 | jump_to_P2(); |
| 28 | ctrl_outl(data, addr); |
| 29 | back_to_P1(); |
| 30 | } |