blob: c1b880c1e5ff2c366d03605a83ed713b71675d9b [file] [log] [blame]
Stepan Moskovchenko39236d72011-11-30 17:42:23 -08001/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/platform_device.h>
17#include <linux/bootmem.h>
18#include <asm/mach-types.h>
19#include <mach/msm_bus_board.h>
Huaibin Yanga5419422011-12-08 23:52:10 -080020#include <mach/msm_memtypes.h>
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080021#include <mach/board.h>
22#include <mach/gpio.h>
23#include <mach/gpiomux.h>
Ajay Dudani9114be72011-12-03 07:46:35 -080024#include <mach/socinfo.h>
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080025#include "devices.h"
Jay Chokshi06fa7542011-12-07 13:09:17 -080026
27/* TODO: Remove this once PM8038 physically becomes
28 * available.
29 */
30#ifndef MSM8930_PHASE_2
31#include "board-8960.h"
32#else
Stepan Moskovchenko5a83dba2011-12-05 17:30:17 -080033#include "board-8930.h"
Jay Chokshi06fa7542011-12-07 13:09:17 -080034#endif
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080035
36#ifdef CONFIG_FB_MSM_TRIPLE_BUFFER
37#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 3) /* 4 bpp x 3 pages */
38#else
39#define MSM_FB_PRIM_BUF_SIZE (1376 * 768 * 4 * 2) /* 4 bpp x 2 pages */
40#endif
41
42#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
43#define MSM_FB_EXT_BUF_SIZE (1920 * 1088 * 2 * 1) /* 2 bpp x 1 page */
44#elif defined(CONFIG_FB_MSM_TVOUT)
45#define MSM_FB_EXT_BUF_SIZE (720 * 576 * 2 * 2) /* 2 bpp x 2 pages */
46#else
47#define MSM_FB_EXT_BUF_SIZE 0
48#endif
49
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080050#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
51/* 4 bpp x 2 page HDMI case */
52#define MSM_FB_SIZE roundup((1920 * 1088 * 4 * 2), 4096)
53#else
54/* Note: must be multiple of 4096 */
Huaibin Yang27634b82011-12-09 00:16:25 -080055#define MSM_FB_SIZE roundup(MSM_FB_PRIM_BUF_SIZE + MSM_FB_EXT_BUF_SIZE, 4096)
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080056#endif
57
Huaibin Yanga5419422011-12-08 23:52:10 -080058#ifdef CONFIG_FB_MSM_OVERLAY0_WRITEBACK
59#define MSM_FB_OVERLAY0_WRITEBACK_SIZE roundup((1376 * 768 * 3 * 2), 4096)
60#else
61#define MSM_FB_OVERLAY0_WRITEBACK_SIZE (0)
62#endif /* CONFIG_FB_MSM_OVERLAY0_WRITEBACK */
63
64#ifdef CONFIG_FB_MSM_OVERLAY1_WRITEBACK
65#define MSM_FB_OVERLAY1_WRITEBACK_SIZE roundup((1920 * 1088 * 3 * 2), 4096)
66#else
67#define MSM_FB_OVERLAY1_WRITEBACK_SIZE (0)
68#endif /* CONFIG_FB_MSM_OVERLAY1_WRITEBACK */
69
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080070#define MDP_VSYNC_GPIO 0
71
72#define PANEL_NAME_MAX_LEN 30
73#define MIPI_CMD_NOVATEK_QHD_PANEL_NAME "mipi_cmd_novatek_qhd"
74#define MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME "mipi_video_novatek_qhd"
75#define MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME "mipi_video_toshiba_wsvga"
76#define MIPI_VIDEO_CHIMEI_WXGA_PANEL_NAME "mipi_video_chimei_wxga"
77#define MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME "mipi_video_simulator_vga"
78#define MIPI_CMD_RENESAS_FWVGA_PANEL_NAME "mipi_cmd_renesas_fwvga"
79#define HDMI_PANEL_NAME "hdmi_msm"
80#define TVOUT_PANEL_NAME "tvout_msm"
81
Stepan Moskovchenko39236d72011-11-30 17:42:23 -080082static struct resource msm_fb_resources[] = {
83 {
84 .flags = IORESOURCE_DMA,
85 }
86};
87
88static int msm_fb_detect_panel(const char *name)
89{
90 if (!strncmp(name, MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
91 strnlen(MIPI_VIDEO_TOSHIBA_WSVGA_PANEL_NAME,
92 PANEL_NAME_MAX_LEN)))
93 return 0;
94
95#ifndef CONFIG_FB_MSM_MIPI_PANEL_DETECT
96 if (!strncmp(name, MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
97 strnlen(MIPI_VIDEO_NOVATEK_QHD_PANEL_NAME,
98 PANEL_NAME_MAX_LEN)))
99 return 0;
100
101 if (!strncmp(name, MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
102 strnlen(MIPI_CMD_NOVATEK_QHD_PANEL_NAME,
103 PANEL_NAME_MAX_LEN)))
104 return 0;
105
106 if (!strncmp(name, MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
107 strnlen(MIPI_VIDEO_SIMULATOR_VGA_PANEL_NAME,
108 PANEL_NAME_MAX_LEN)))
109 return 0;
110
111 if (!strncmp(name, MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
112 strnlen(MIPI_CMD_RENESAS_FWVGA_PANEL_NAME,
113 PANEL_NAME_MAX_LEN)))
114 return 0;
115#endif
116
117 if (!strncmp(name, HDMI_PANEL_NAME,
118 strnlen(HDMI_PANEL_NAME,
119 PANEL_NAME_MAX_LEN)))
120 return 0;
121
122 if (!strncmp(name, TVOUT_PANEL_NAME,
123 strnlen(TVOUT_PANEL_NAME,
124 PANEL_NAME_MAX_LEN)))
125 return 0;
126
127 pr_warning("%s: not supported '%s'", __func__, name);
128 return -ENODEV;
129}
130
131static struct msm_fb_platform_data msm_fb_pdata = {
132 .detect_client = msm_fb_detect_panel,
133};
134
135static struct platform_device msm_fb_device = {
136 .name = "msm_fb",
137 .id = 0,
138 .num_resources = ARRAY_SIZE(msm_fb_resources),
139 .resource = msm_fb_resources,
140 .dev.platform_data = &msm_fb_pdata,
141};
142
143static bool dsi_power_on;
144
Jay Chokshi06fa7542011-12-07 13:09:17 -0800145/*
146 * TODO: When physical 8930/PM8038 hardware becomes
147 * available, replace mipi_dsi_cdp_panel_power with
148 * appropriate function.
149 */
150#ifndef MSM8930_PHASE_2
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800151static int mipi_dsi_cdp_panel_power(int on)
152{
153 static struct regulator *reg_l8, *reg_l23, *reg_l2;
154 static int gpio43;
155 int rc;
156
157 pr_info("%s: state : %d\n", __func__, on);
158
159 if (!dsi_power_on) {
160
161 reg_l8 = regulator_get(&msm_mipi_dsi1_device.dev,
162 "dsi_vdc");
163 if (IS_ERR(reg_l8)) {
164 pr_err("could not get 8921_l8, rc = %ld\n",
165 PTR_ERR(reg_l8));
166 return -ENODEV;
167 }
168 reg_l23 = regulator_get(&msm_mipi_dsi1_device.dev,
169 "dsi_vddio");
170 if (IS_ERR(reg_l23)) {
171 pr_err("could not get 8921_l23, rc = %ld\n",
172 PTR_ERR(reg_l23));
173 return -ENODEV;
174 }
175 reg_l2 = regulator_get(&msm_mipi_dsi1_device.dev,
176 "dsi_vdda");
177 if (IS_ERR(reg_l2)) {
178 pr_err("could not get 8921_l2, rc = %ld\n",
179 PTR_ERR(reg_l2));
180 return -ENODEV;
181 }
182 rc = regulator_set_voltage(reg_l8, 2800000, 3000000);
183 if (rc) {
184 pr_err("set_voltage l8 failed, rc=%d\n", rc);
185 return -EINVAL;
186 }
187 rc = regulator_set_voltage(reg_l23, 1800000, 1800000);
188 if (rc) {
189 pr_err("set_voltage l23 failed, rc=%d\n", rc);
190 return -EINVAL;
191 }
192 rc = regulator_set_voltage(reg_l2, 1200000, 1200000);
193 if (rc) {
194 pr_err("set_voltage l2 failed, rc=%d\n", rc);
195 return -EINVAL;
196 }
197 gpio43 = PM8921_GPIO_PM_TO_SYS(43);
198 rc = gpio_request(gpio43, "disp_rst_n");
199 if (rc) {
200 pr_err("request gpio 43 failed, rc=%d\n", rc);
201 return -ENODEV;
202 }
203 dsi_power_on = true;
204 }
205 if (on) {
206 rc = regulator_set_optimum_mode(reg_l8, 100000);
207 if (rc < 0) {
208 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
209 return -EINVAL;
210 }
211 rc = regulator_set_optimum_mode(reg_l23, 100000);
212 if (rc < 0) {
213 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
214 return -EINVAL;
215 }
216 rc = regulator_set_optimum_mode(reg_l2, 100000);
217 if (rc < 0) {
218 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
219 return -EINVAL;
220 }
221 rc = regulator_enable(reg_l8);
222 if (rc) {
223 pr_err("enable l8 failed, rc=%d\n", rc);
224 return -ENODEV;
225 }
226 rc = regulator_enable(reg_l23);
227 if (rc) {
228 pr_err("enable l8 failed, rc=%d\n", rc);
229 return -ENODEV;
230 }
231 rc = regulator_enable(reg_l2);
232 if (rc) {
233 pr_err("enable l2 failed, rc=%d\n", rc);
234 return -ENODEV;
235 }
236 gpio_set_value_cansleep(gpio43, 1);
237 } else {
238 rc = regulator_disable(reg_l2);
239 if (rc) {
240 pr_err("disable reg_l2 failed, rc=%d\n", rc);
241 return -ENODEV;
242 }
243 rc = regulator_disable(reg_l8);
244 if (rc) {
245 pr_err("disable reg_l8 failed, rc=%d\n", rc);
246 return -ENODEV;
247 }
248 rc = regulator_disable(reg_l23);
249 if (rc) {
250 pr_err("disable reg_l23 failed, rc=%d\n", rc);
251 return -ENODEV;
252 }
253 rc = regulator_set_optimum_mode(reg_l8, 100);
254 if (rc < 0) {
255 pr_err("set_optimum_mode l8 failed, rc=%d\n", rc);
256 return -EINVAL;
257 }
258 rc = regulator_set_optimum_mode(reg_l23, 100);
259 if (rc < 0) {
260 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
261 return -EINVAL;
262 }
263 rc = regulator_set_optimum_mode(reg_l2, 100);
264 if (rc < 0) {
265 pr_err("set_optimum_mode l2 failed, rc=%d\n", rc);
266 return -EINVAL;
267 }
268 gpio_set_value_cansleep(gpio43, 0);
269 }
270 return 0;
271}
Jay Chokshi06fa7542011-12-07 13:09:17 -0800272#endif
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800273
274static int mipi_dsi_panel_power(int on)
275{
276 pr_info("%s: on=%d\n", __func__, on);
277
278 return mipi_dsi_cdp_panel_power(on);
279}
280
281static struct mipi_dsi_platform_data mipi_dsi_pdata = {
282 .vsync_gpio = MDP_VSYNC_GPIO,
283 .dsi_power_save = mipi_dsi_panel_power,
284};
285
286#ifdef CONFIG_MSM_BUS_SCALING
287
288static struct msm_bus_vectors mdp_init_vectors[] = {
289 {
290 .src = MSM_BUS_MASTER_MDP_PORT0,
291 .dst = MSM_BUS_SLAVE_EBI_CH0,
292 .ab = 0,
293 .ib = 0,
294 },
295};
296
297#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
298static struct msm_bus_vectors hdmi_as_primary_vectors[] = {
299 /* If HDMI is used as primary */
300 {
301 .src = MSM_BUS_MASTER_MDP_PORT0,
302 .dst = MSM_BUS_SLAVE_EBI_CH0,
303 .ab = 2000000000,
304 .ib = 2000000000,
305 },
306};
307static struct msm_bus_paths mdp_bus_scale_usecases[] = {
308 {
309 ARRAY_SIZE(mdp_init_vectors),
310 mdp_init_vectors,
311 },
312 {
313 ARRAY_SIZE(hdmi_as_primary_vectors),
314 hdmi_as_primary_vectors,
315 },
316 {
317 ARRAY_SIZE(hdmi_as_primary_vectors),
318 hdmi_as_primary_vectors,
319 },
320 {
321 ARRAY_SIZE(hdmi_as_primary_vectors),
322 hdmi_as_primary_vectors,
323 },
324 {
325 ARRAY_SIZE(hdmi_as_primary_vectors),
326 hdmi_as_primary_vectors,
327 },
328 {
329 ARRAY_SIZE(hdmi_as_primary_vectors),
330 hdmi_as_primary_vectors,
331 },
332};
333#else
334static struct msm_bus_vectors mdp_ui_vectors[] = {
335 {
336 .src = MSM_BUS_MASTER_MDP_PORT0,
337 .dst = MSM_BUS_SLAVE_EBI_CH0,
338 .ab = 216000000 * 2,
339 .ib = 270000000 * 2,
340 },
341};
342
343static struct msm_bus_vectors mdp_vga_vectors[] = {
344 /* VGA and less video */
345 {
346 .src = MSM_BUS_MASTER_MDP_PORT0,
347 .dst = MSM_BUS_SLAVE_EBI_CH0,
348 .ab = 216000000 * 2,
349 .ib = 270000000 * 2,
350 },
351};
352
353static struct msm_bus_vectors mdp_720p_vectors[] = {
354 /* 720p and less video */
355 {
356 .src = MSM_BUS_MASTER_MDP_PORT0,
357 .dst = MSM_BUS_SLAVE_EBI_CH0,
358 .ab = 230400000 * 2,
359 .ib = 288000000 * 2,
360 },
361};
362
363static struct msm_bus_vectors mdp_1080p_vectors[] = {
364 /* 1080p and less video */
365 {
366 .src = MSM_BUS_MASTER_MDP_PORT0,
367 .dst = MSM_BUS_SLAVE_EBI_CH0,
368 .ab = 334080000 * 2,
369 .ib = 417600000 * 2,
370 },
371};
372
373static struct msm_bus_paths mdp_bus_scale_usecases[] = {
374 {
375 ARRAY_SIZE(mdp_init_vectors),
376 mdp_init_vectors,
377 },
378 {
379 ARRAY_SIZE(mdp_ui_vectors),
380 mdp_ui_vectors,
381 },
382 {
383 ARRAY_SIZE(mdp_ui_vectors),
384 mdp_ui_vectors,
385 },
386 {
387 ARRAY_SIZE(mdp_vga_vectors),
388 mdp_vga_vectors,
389 },
390 {
391 ARRAY_SIZE(mdp_720p_vectors),
392 mdp_720p_vectors,
393 },
394 {
395 ARRAY_SIZE(mdp_1080p_vectors),
396 mdp_1080p_vectors,
397 },
398};
399#endif
400
401static struct msm_bus_scale_pdata mdp_bus_scale_pdata = {
402 mdp_bus_scale_usecases,
403 ARRAY_SIZE(mdp_bus_scale_usecases),
404 .name = "mdp",
405};
406
407#endif
408
409#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
410static int mdp_core_clk_rate_table[] = {
411 200000000,
412 200000000,
413 200000000,
414 200000000,
415};
416#else
417static int mdp_core_clk_rate_table[] = {
418 85330000,
419 85330000,
420 160000000,
421 200000000,
422};
423#endif
424
425static struct msm_panel_common_pdata mdp_pdata = {
426 .gpio = MDP_VSYNC_GPIO,
427#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
428 .mdp_core_clk_rate = 200000000,
429#else
430 .mdp_core_clk_rate = 85330000,
431#endif
432 .mdp_core_clk_table = mdp_core_clk_rate_table,
433 .num_mdp_clk = ARRAY_SIZE(mdp_core_clk_rate_table),
434#ifdef CONFIG_MSM_BUS_SCALING
435 .mdp_bus_scale_table = &mdp_bus_scale_pdata,
436#endif
437 .mdp_rev = MDP_REV_42,
Huaibin Yanga5419422011-12-08 23:52:10 -0800438 .mdp_writeback_memtype = MEMTYPE_EBI1,
439 .mdp_writeback_phys = NULL,
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800440};
441
Huaibin Yanga5419422011-12-08 23:52:10 -0800442void __init msm8930_mdp_writeback(struct memtype_reserve* reserve_table)
443{
444 mdp_pdata.mdp_writeback_size_ov0 = MSM_FB_OVERLAY0_WRITEBACK_SIZE;
445 mdp_pdata.mdp_writeback_size_ov1 = MSM_FB_OVERLAY1_WRITEBACK_SIZE;
446
447 reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
448 mdp_pdata.mdp_writeback_size_ov0;
449 reserve_table[mdp_pdata.mdp_writeback_memtype].size +=
450 mdp_pdata.mdp_writeback_size_ov1;
451}
452
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800453#define LPM_CHANNEL0 0
454static int toshiba_gpio[] = {LPM_CHANNEL0};
455
456static struct mipi_dsi_panel_platform_data toshiba_pdata = {
457 .gpio = toshiba_gpio,
458};
459
460static struct platform_device mipi_dsi_toshiba_panel_device = {
461 .name = "mipi_toshiba",
462 .id = 0,
463 .dev = {
464 .platform_data = &toshiba_pdata,
465 }
466};
467
468#define FPGA_3D_GPIO_CONFIG_ADDR 0xB5
469
470static struct mipi_dsi_phy_ctrl dsi_novatek_cmd_mode_phy_db = {
471
472/* DSI_BIT_CLK at 500MHz, 2 lane, RGB888 */
473 {0x0F, 0x0a, 0x04, 0x00, 0x20}, /* regulator */
474 /* timing */
475 {0xab, 0x8a, 0x18, 0x00, 0x92, 0x97, 0x1b, 0x8c,
476 0x0c, 0x03, 0x04, 0xa0},
477 {0x5f, 0x00, 0x00, 0x10}, /* phy ctrl */
478 {0xff, 0x00, 0x06, 0x00}, /* strength */
479 /* pll control */
480 {0x40, 0xf9, 0x30, 0xda, 0x00, 0x40, 0x03, 0x62,
481 0x40, 0x07, 0x03,
482 0x00, 0x1a, 0x00, 0x00, 0x02, 0x00, 0x20, 0x00, 0x01},
483};
484
485static struct mipi_dsi_panel_platform_data novatek_pdata = {
486 .fpga_3d_config_addr = FPGA_3D_GPIO_CONFIG_ADDR,
487 .fpga_ctrl_mode = FPGA_SPI_INTF,
488 .phy_ctrl_settings = &dsi_novatek_cmd_mode_phy_db,
489};
490
491static struct platform_device mipi_dsi_novatek_panel_device = {
492 .name = "mipi_novatek",
493 .id = 0,
494 .dev = {
495 .platform_data = &novatek_pdata,
496 }
497};
498
499#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
500static struct resource hdmi_msm_resources[] = {
501 {
502 .name = "hdmi_msm_qfprom_addr",
503 .start = 0x00700000,
504 .end = 0x007060FF,
505 .flags = IORESOURCE_MEM,
506 },
507 {
508 .name = "hdmi_msm_hdmi_addr",
509 .start = 0x04A00000,
510 .end = 0x04A00FFF,
511 .flags = IORESOURCE_MEM,
512 },
513 {
514 .name = "hdmi_msm_irq",
515 .start = HDMI_IRQ,
516 .end = HDMI_IRQ,
517 .flags = IORESOURCE_IRQ,
518 },
519};
520
521static int hdmi_enable_5v(int on);
522static int hdmi_core_power(int on, int show);
523static int hdmi_cec_power(int on);
524
525static struct msm_hdmi_platform_data hdmi_msm_data = {
526 .irq = HDMI_IRQ,
527 .enable_5v = hdmi_enable_5v,
528 .core_power = hdmi_core_power,
529 .cec_power = hdmi_cec_power,
530};
531
532static struct platform_device hdmi_msm_device = {
533 .name = "hdmi_msm",
534 .id = 0,
535 .num_resources = ARRAY_SIZE(hdmi_msm_resources),
536 .resource = hdmi_msm_resources,
537 .dev.platform_data = &hdmi_msm_data,
538};
539#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
540
541#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
542static struct platform_device wfd_panel_device = {
543 .name = "wfd_panel",
544 .id = 0,
545 .dev.platform_data = NULL,
546};
547
548static struct platform_device wfd_device = {
549 .name = "msm_wfd",
550 .id = -1,
551};
552#endif
553
554#ifdef CONFIG_MSM_BUS_SCALING
555static struct msm_bus_vectors dtv_bus_init_vectors[] = {
556 {
557 .src = MSM_BUS_MASTER_MDP_PORT0,
558 .dst = MSM_BUS_SLAVE_EBI_CH0,
559 .ab = 0,
560 .ib = 0,
561 },
562};
563
564#ifdef CONFIG_FB_MSM_HDMI_AS_PRIMARY
565static struct msm_bus_vectors dtv_bus_def_vectors[] = {
566 {
567 .src = MSM_BUS_MASTER_MDP_PORT0,
568 .dst = MSM_BUS_SLAVE_EBI_CH0,
569 .ab = 2000000000,
570 .ib = 2000000000,
571 },
572};
573#else
574static struct msm_bus_vectors dtv_bus_def_vectors[] = {
575 {
576 .src = MSM_BUS_MASTER_MDP_PORT0,
577 .dst = MSM_BUS_SLAVE_EBI_CH0,
578 .ab = 566092800 * 2,
579 .ib = 707616000 * 2,
580 },
581};
582#endif
583
584static struct msm_bus_paths dtv_bus_scale_usecases[] = {
585 {
586 ARRAY_SIZE(dtv_bus_init_vectors),
587 dtv_bus_init_vectors,
588 },
589 {
590 ARRAY_SIZE(dtv_bus_def_vectors),
591 dtv_bus_def_vectors,
592 },
593};
594static struct msm_bus_scale_pdata dtv_bus_scale_pdata = {
595 dtv_bus_scale_usecases,
596 ARRAY_SIZE(dtv_bus_scale_usecases),
597 .name = "dtv",
598};
599
600static struct lcdc_platform_data dtv_pdata = {
601 .bus_scale_table = &dtv_bus_scale_pdata,
602};
603#endif
604
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800605#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800606static int hdmi_enable_5v(int on)
607{
608 /* TBD: PM8921 regulator instead of 8901 */
609 static struct regulator *reg_8921_hdmi_mvs; /* HDMI_5V */
610 static int prev_on;
611 int rc;
612
613 if (on == prev_on)
614 return 0;
615
616 if (!reg_8921_hdmi_mvs)
617 reg_8921_hdmi_mvs = regulator_get(&hdmi_msm_device.dev,
618 "hdmi_mvs");
619
620 if (on) {
621 rc = regulator_enable(reg_8921_hdmi_mvs);
622 if (rc) {
623 pr_err("'%s' regulator enable failed, rc=%d\n",
624 "8921_hdmi_mvs", rc);
625 return rc;
626 }
627 pr_debug("%s(on): success\n", __func__);
628 } else {
629 rc = regulator_disable(reg_8921_hdmi_mvs);
630 if (rc)
631 pr_warning("'%s' regulator disable failed, rc=%d\n",
632 "8921_hdmi_mvs", rc);
633 pr_debug("%s(off): success\n", __func__);
634 }
635
636 prev_on = on;
637
638 return 0;
639}
640
641static int hdmi_core_power(int on, int show)
642{
643 static struct regulator *reg_8921_l23, *reg_8921_s4;
644 static int prev_on;
645 int rc;
646
647 if (on == prev_on)
648 return 0;
649
650 /* TBD: PM8921 regulator instead of 8901 */
651 if (!reg_8921_l23) {
652 reg_8921_l23 = regulator_get(&hdmi_msm_device.dev, "hdmi_avdd");
653 if (IS_ERR(reg_8921_l23)) {
654 pr_err("could not get reg_8921_l23, rc = %ld\n",
655 PTR_ERR(reg_8921_l23));
656 return -ENODEV;
657 }
658 rc = regulator_set_voltage(reg_8921_l23, 1800000, 1800000);
659 if (rc) {
660 pr_err("set_voltage failed for 8921_l23, rc=%d\n", rc);
661 return -EINVAL;
662 }
663 }
664 if (!reg_8921_s4) {
665 reg_8921_s4 = regulator_get(&hdmi_msm_device.dev, "hdmi_vcc");
666 if (IS_ERR(reg_8921_s4)) {
667 pr_err("could not get reg_8921_s4, rc = %ld\n",
668 PTR_ERR(reg_8921_s4));
669 return -ENODEV;
670 }
671 rc = regulator_set_voltage(reg_8921_s4, 1800000, 1800000);
672 if (rc) {
673 pr_err("set_voltage failed for 8921_s4, rc=%d\n", rc);
674 return -EINVAL;
675 }
676 }
677
678 if (on) {
679 rc = regulator_set_optimum_mode(reg_8921_l23, 100000);
680 if (rc < 0) {
681 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
682 return -EINVAL;
683 }
684 rc = regulator_enable(reg_8921_l23);
685 if (rc) {
686 pr_err("'%s' regulator enable failed, rc=%d\n",
687 "hdmi_avdd", rc);
688 return rc;
689 }
690 rc = regulator_enable(reg_8921_s4);
691 if (rc) {
692 pr_err("'%s' regulator enable failed, rc=%d\n",
693 "hdmi_vcc", rc);
694 return rc;
695 }
696 rc = gpio_request(100, "HDMI_DDC_CLK");
697 if (rc) {
698 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
699 "HDMI_DDC_CLK", 100, rc);
700 goto error1;
701 }
702 rc = gpio_request(101, "HDMI_DDC_DATA");
703 if (rc) {
704 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
705 "HDMI_DDC_DATA", 101, rc);
706 goto error2;
707 }
708 rc = gpio_request(102, "HDMI_HPD");
709 if (rc) {
710 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
711 "HDMI_HPD", 102, rc);
712 goto error3;
713 }
714 pr_debug("%s(on): success\n", __func__);
715 } else {
716 gpio_free(100);
717 gpio_free(101);
718 gpio_free(102);
719
720 rc = regulator_disable(reg_8921_l23);
721 if (rc) {
722 pr_err("disable reg_8921_l23 failed, rc=%d\n", rc);
723 return -ENODEV;
724 }
725 rc = regulator_disable(reg_8921_s4);
726 if (rc) {
727 pr_err("disable reg_8921_s4 failed, rc=%d\n", rc);
728 return -ENODEV;
729 }
730 rc = regulator_set_optimum_mode(reg_8921_l23, 100);
731 if (rc < 0) {
732 pr_err("set_optimum_mode l23 failed, rc=%d\n", rc);
733 return -EINVAL;
734 }
735 pr_debug("%s(off): success\n", __func__);
736 }
737
738 prev_on = on;
739
740 return 0;
741
742error3:
743 gpio_free(101);
744error2:
745 gpio_free(100);
746error1:
747 regulator_disable(reg_8921_l23);
748 regulator_disable(reg_8921_s4);
749 return rc;
750}
751
752static int hdmi_cec_power(int on)
753{
754 static int prev_on;
755 int rc;
756
757 if (on == prev_on)
758 return 0;
759
760 if (on) {
761 rc = gpio_request(99, "HDMI_CEC_VAR");
762 if (rc) {
763 pr_err("'%s'(%d) gpio_request failed, rc=%d\n",
764 "HDMI_CEC_VAR", 99, rc);
765 goto error;
766 }
767 pr_debug("%s(on): success\n", __func__);
768 } else {
769 gpio_free(99);
770 pr_debug("%s(off): success\n", __func__);
771 }
772
773 prev_on = on;
774
775 return 0;
776error:
777 return rc;
778}
779#endif /* CONFIG_FB_MSM_HDMI_MSM_PANEL */
780
781void __init msm8930_init_fb(void)
782{
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800783 platform_device_register(&msm_fb_device);
784
785#ifdef CONFIG_FB_MSM_WRITEBACK_MSM_PANEL
786 platform_device_register(&wfd_panel_device);
787 platform_device_register(&wfd_device);
788#endif
789
790 platform_device_register(&mipi_dsi_novatek_panel_device);
791
792#ifdef CONFIG_FB_MSM_HDMI_MSM_PANEL
Ajay Dudani52e88232011-12-13 13:33:10 -0800793 if (!cpu_is_msm8930())
Ajay Dudani9114be72011-12-03 07:46:35 -0800794 platform_device_register(&hdmi_msm_device);
Stepan Moskovchenko39236d72011-11-30 17:42:23 -0800795#endif
796
797 platform_device_register(&mipi_dsi_toshiba_panel_device);
798
799 msm_fb_register_device("mdp", &mdp_pdata);
800 msm_fb_register_device("mipi_dsi", &mipi_dsi_pdata);
801#ifdef CONFIG_MSM_BUS_SCALING
802 msm_fb_register_device("dtv", &dtv_pdata);
803#endif
804}
805
806void __init msm8930_allocate_fb_region(void)
807{
808 void *addr;
809 unsigned long size;
810
811 size = MSM_FB_SIZE;
812 addr = alloc_bootmem_align(size, 0x1000);
813 msm_fb_resources[0].start = __pa(addr);
814 msm_fb_resources[0].end = msm_fb_resources[0].start + size - 1;
815 pr_info("allocating %lu bytes at %p (%lx physical) for fb\n",
816 size, addr, __pa(addr));
817}