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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 *
3 * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
4 *
5 * Module name: ppc403_pic.c
6 *
7 * Description:
8 * Interrupt controller driver for PowerPC 403-based processors.
9 */
10
11/*
12 * The PowerPC 403 cores' Asynchronous Interrupt Controller (AIC) has
13 * 32 possible interrupts, a majority of which are not implemented on
14 * all cores. There are six configurable, external interrupt pins and
15 * there are eight internal interrupts for the on-chip serial port
16 * (SPU), DMA controller, and JTAG controller.
17 *
18 */
19
20#include <linux/init.h>
21#include <linux/sched.h>
22#include <linux/signal.h>
23#include <linux/stddef.h>
24
25#include <asm/processor.h>
26#include <asm/system.h>
27#include <asm/irq.h>
28#include <asm/ppc4xx_pic.h>
29
30/* Function Prototypes */
31
32static void ppc403_aic_enable(unsigned int irq);
33static void ppc403_aic_disable(unsigned int irq);
34static void ppc403_aic_disable_and_ack(unsigned int irq);
35
36static struct hw_interrupt_type ppc403_aic = {
Thomas Gleixner2830e212005-09-10 00:26:40 -070037 .typename = "403GC AIC",
38 .enable = ppc403_aic_enable,
39 .disable = ppc403_aic_disable,
40 .ack = ppc403_aic_disable_and_ack,
Linus Torvalds1da177e2005-04-16 15:20:36 -070041};
42
43int
44ppc403_pic_get_irq(struct pt_regs *regs)
45{
46 int irq;
47 unsigned long bits;
48
49 /*
50 * Only report the status of those interrupts that are actually
51 * enabled.
52 */
53
54 bits = mfdcr(DCRN_EXISR) & mfdcr(DCRN_EXIER);
55
56 /*
57 * Walk through the interrupts from highest priority to lowest, and
58 * report the first pending interrupt found.
59 * We want PPC, not C bit numbering, so just subtract the ffs()
60 * result from 32.
61 */
62 irq = 32 - ffs(bits);
63
64 if (irq == NR_AIC_IRQS)
65 irq = -1;
66
67 return (irq);
68}
69
70static void
71ppc403_aic_enable(unsigned int irq)
72{
73 int bit, word;
74
75 bit = irq & 0x1f;
76 word = irq >> 5;
77
78 ppc_cached_irq_mask[word] |= (1 << (31 - bit));
79 mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
80}
81
82static void
83ppc403_aic_disable(unsigned int irq)
84{
85 int bit, word;
86
87 bit = irq & 0x1f;
88 word = irq >> 5;
89
90 ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
91 mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
92}
93
94static void
95ppc403_aic_disable_and_ack(unsigned int irq)
96{
97 int bit, word;
98
99 bit = irq & 0x1f;
100 word = irq >> 5;
101
102 ppc_cached_irq_mask[word] &= ~(1 << (31 - bit));
103 mtdcr(DCRN_EXIER, ppc_cached_irq_mask[word]);
104 mtdcr(DCRN_EXISR, (1 << (31 - bit)));
105}
106
107void __init
108ppc4xx_pic_init(void)
109{
110 int i;
111
112 /*
113 * Disable all external interrupts until they are
114 * explicity requested.
115 */
116 ppc_cached_irq_mask[0] = 0;
117
118 mtdcr(DCRN_EXIER, ppc_cached_irq_mask[0]);
119
120 ppc_md.get_irq = ppc403_pic_get_irq;
121
122 for (i = 0; i < NR_IRQS; i++)
123 irq_desc[i].handler = &ppc403_aic;
124}