blob: d47f4ed6b9356695d675862dda895d289d496a29 [file] [log] [blame]
Bryan Wu1394f032007-05-06 14:50:22 -07001/*
Robin Getz96f10502009-09-24 14:11:24 +00002 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
Bryan Wu1394f032007-05-06 14:50:22 -07005 *
Robin Getz96f10502009-09-24 14:11:24 +00006 * Licensed under the GPL-2 or later.
Bryan Wu1394f032007-05-06 14:50:22 -07007 */
8
9#include <linux/device.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080010#include <linux/kernel.h>
Bryan Wu1394f032007-05-06 14:50:22 -070011#include <linux/platform_device.h>
Barry Song6e364752009-09-29 03:01:40 +000012#include <linux/io.h>
Bryan Wu1394f032007-05-06 14:50:22 -070013#include <linux/mtd/mtd.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080014#include <linux/mtd/nand.h>
Bryan Wu1394f032007-05-06 14:50:22 -070015#include <linux/mtd/partitions.h>
Mike Frysingerfc689112008-06-25 11:41:42 +080016#include <linux/mtd/plat-ram.h>
Mike Frysingerde8c43f2008-01-24 17:14:04 +080017#include <linux/mtd/physmap.h>
Bryan Wu1394f032007-05-06 14:50:22 -070018#include <linux/spi/spi.h>
19#include <linux/spi/flash.h>
20#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
Mike Frysingerf02bcec2007-11-15 21:29:15 +080021#include <linux/usb/isp1362.h>
Bryan Wu1394f032007-05-06 14:50:22 -070022#endif
Sonic Zhang7a9cc482009-12-22 04:47:04 +000023#include <linux/i2c.h>
24#include <linux/i2c/adp5588.h>
Jeff Garzik0a87e3e2008-02-01 18:02:30 -050025#include <linux/ata_platform.h>
Bryan Wu1394f032007-05-06 14:50:22 -070026#include <linux/irq.h>
27#include <linux/interrupt.h>
David Brownell27f5d752007-10-04 18:06:16 -070028#include <linux/usb/sl811.h>
Yi Lif79ea4c2009-01-07 23:14:38 +080029#include <linux/spi/mmc_spi.h>
Michael Hennerich78756c62009-10-13 15:28:33 +000030#include <linux/leds.h>
31#include <linux/input.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080032#include <asm/dma.h>
Mike Frysinger1f83b8f2007-07-12 22:58:21 +080033#include <asm/bfin5xx_spi.h>
Bryan Wuc6c4d7b2007-10-11 01:20:06 +080034#include <asm/reboot.h>
Bryan Wu5d448dd2007-11-12 23:24:42 +080035#include <asm/portmux.h>
Michael Hennerich14b03202008-05-07 11:41:26 +080036#include <asm/dpmc.h>
Bryan Wu1394f032007-05-06 14:50:22 -070037
38/*
39 * Name the Board for the /proc/cpuinfo
40 */
Mike Frysingerfe85cad2008-11-18 17:48:22 +080041const char bfin_board_name[] = "ADI BF537-STAMP";
Bryan Wu1394f032007-05-06 14:50:22 -070042
43/*
44 * Driver needs to know address, irq and flag pin.
45 */
46
Bryan Wu1394f032007-05-06 14:50:22 -070047#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
Michael Hennerich3f375692008-11-18 17:48:22 +080048#include <linux/usb/isp1760.h>
49static struct resource bfin_isp1760_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -070050 [0] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080051 .start = 0x203C0000,
52 .end = 0x203C0000 + 0x000fffff,
Bryan Wu1394f032007-05-06 14:50:22 -070053 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
Michael Hennerich3f375692008-11-18 17:48:22 +080056 .start = IRQ_PF7,
57 .end = IRQ_PF7,
Michael Hennerich6a6be3d2009-01-07 23:14:39 +080058 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Bryan Wu1394f032007-05-06 14:50:22 -070059 },
60};
61
Michael Hennerich3f375692008-11-18 17:48:22 +080062static struct isp1760_platform_data isp1760_priv = {
63 .is_isp1761 = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080064 .bus_width_16 = 1,
65 .port1_otg = 0,
66 .analog_oc = 0,
67 .dack_polarity_high = 0,
68 .dreq_polarity_high = 0,
69};
70
71static struct platform_device bfin_isp1760_device = {
Michael Hennerichc6feb7682009-10-15 10:37:33 +000072 .name = "isp1760",
Bryan Wu1394f032007-05-06 14:50:22 -070073 .id = 0,
Michael Hennerich3f375692008-11-18 17:48:22 +080074 .dev = {
75 .platform_data = &isp1760_priv,
76 },
77 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
78 .resource = bfin_isp1760_resources,
Bryan Wu1394f032007-05-06 14:50:22 -070079};
Bryan Wu1394f032007-05-06 14:50:22 -070080#endif
81
Michael Hennerich2463ef22008-01-27 16:49:48 +080082#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
Michael Hennerich2463ef22008-01-27 16:49:48 +080083#include <linux/gpio_keys.h>
84
85static struct gpio_keys_button bfin_gpio_keys_table[] = {
86 {BTN_0, GPIO_PF2, 1, "gpio-keys: BTN0"},
87 {BTN_1, GPIO_PF3, 1, "gpio-keys: BTN1"},
88 {BTN_2, GPIO_PF4, 1, "gpio-keys: BTN2"},
89 {BTN_3, GPIO_PF5, 1, "gpio-keys: BTN3"},
90};
91
92static struct gpio_keys_platform_data bfin_gpio_keys_data = {
93 .buttons = bfin_gpio_keys_table,
94 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
95};
96
97static struct platform_device bfin_device_gpiokeys = {
98 .name = "gpio-keys",
99 .dev = {
100 .platform_data = &bfin_gpio_keys_data,
101 },
102};
103#endif
104
Bryan Wu1394f032007-05-06 14:50:22 -0700105#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
106static struct resource bfin_pcmcia_cf_resources[] = {
107 {
108 .start = 0x20310000, /* IO PORT */
109 .end = 0x20312000,
110 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800111 }, {
Simon Arlottd2d50aa2007-06-11 15:31:30 +0800112 .start = 0x20311000, /* Attribute Memory */
Bryan Wu1394f032007-05-06 14:50:22 -0700113 .end = 0x20311FFF,
114 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800115 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700116 .start = IRQ_PF4,
117 .end = IRQ_PF4,
118 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800119 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700120 .start = 6, /* Card Detect PF6 */
121 .end = 6,
122 .flags = IORESOURCE_IRQ,
123 },
124};
125
126static struct platform_device bfin_pcmcia_cf_device = {
127 .name = "bfin_cf_pcmcia",
128 .id = -1,
129 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
130 .resource = bfin_pcmcia_cf_resources,
131};
132#endif
133
134#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
135static struct platform_device rtc_device = {
136 .name = "rtc-bfin",
137 .id = -1,
138};
139#endif
140
141#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
Michael Hennerich61f09b52009-07-24 08:48:31 +0000142#include <linux/smc91x.h>
143
144static struct smc91x_platdata smc91x_info = {
145 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
146 .leda = RPC_LED_100_10,
147 .ledb = RPC_LED_TX_RX,
148};
149
Bryan Wu1394f032007-05-06 14:50:22 -0700150static struct resource smc91x_resources[] = {
151 {
152 .name = "smc91x-regs",
153 .start = 0x20300300,
154 .end = 0x20300300 + 16,
155 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800156 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700157
158 .start = IRQ_PF7,
159 .end = IRQ_PF7,
160 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
161 },
162};
163static struct platform_device smc91x_device = {
164 .name = "smc91x",
165 .id = 0,
166 .num_resources = ARRAY_SIZE(smc91x_resources),
167 .resource = smc91x_resources,
Michael Hennerich61f09b52009-07-24 08:48:31 +0000168 .dev = {
169 .platform_data = &smc91x_info,
170 },
Bryan Wu1394f032007-05-06 14:50:22 -0700171};
172#endif
173
Alex Landauf40d24d2007-07-12 12:11:48 +0800174#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
175static struct resource dm9000_resources[] = {
176 [0] = {
177 .start = 0x203FB800,
Barry Songb3dec4a2009-07-27 06:42:50 +0000178 .end = 0x203FB800 + 1,
Alex Landauf40d24d2007-07-12 12:11:48 +0800179 .flags = IORESOURCE_MEM,
180 },
181 [1] = {
Barry Songb3dec4a2009-07-27 06:42:50 +0000182 .start = 0x203FB804,
183 .end = 0x203FB804 + 1,
184 .flags = IORESOURCE_MEM,
185 },
186 [2] = {
Alex Landauf40d24d2007-07-12 12:11:48 +0800187 .start = IRQ_PF9,
188 .end = IRQ_PF9,
189 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
190 },
191};
192
193static struct platform_device dm9000_device = {
194 .name = "dm9000",
195 .id = -1,
196 .num_resources = ARRAY_SIZE(dm9000_resources),
197 .resource = dm9000_resources,
198};
199#endif
200
Bryan Wu1394f032007-05-06 14:50:22 -0700201#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
202static struct resource sl811_hcd_resources[] = {
203 {
204 .start = 0x20340000,
205 .end = 0x20340000,
206 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800207 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700208 .start = 0x20340004,
209 .end = 0x20340004,
210 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800211 }, {
Mike Frysinger01218652009-12-21 15:07:43 +0000212 .start = IRQ_PF4,
213 .end = IRQ_PF4,
Bryan Wu1394f032007-05-06 14:50:22 -0700214 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
215 },
216};
217
218#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
219void sl811_port_power(struct device *dev, int is_on)
220{
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800221 gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
Michael Hennerichacbcd262008-01-22 18:36:20 +0800222 gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
Bryan Wu1394f032007-05-06 14:50:22 -0700223}
224#endif
225
226static struct sl811_platform_data sl811_priv = {
227 .potpg = 10,
228 .power = 250, /* == 500mA */
229#if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
230 .port_power = &sl811_port_power,
231#endif
232};
233
234static struct platform_device sl811_hcd_device = {
235 .name = "sl811-hcd",
236 .id = 0,
237 .dev = {
238 .platform_data = &sl811_priv,
239 },
240 .num_resources = ARRAY_SIZE(sl811_hcd_resources),
241 .resource = sl811_hcd_resources,
242};
243#endif
244
245#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
246static struct resource isp1362_hcd_resources[] = {
247 {
248 .start = 0x20360000,
249 .end = 0x20360000,
250 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800251 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700252 .start = 0x20360004,
253 .end = 0x20360004,
254 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800255 }, {
Mike Frysinger21b03cf2009-09-24 05:44:36 +0000256 .start = IRQ_PF3,
257 .end = IRQ_PF3,
Bryan Wu1394f032007-05-06 14:50:22 -0700258 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
259 },
260};
261
262static struct isp1362_platform_data isp1362_priv = {
263 .sel15Kres = 1,
264 .clknotstop = 0,
265 .oc_enable = 0,
266 .int_act_high = 0,
267 .int_edge_triggered = 0,
268 .remote_wakeup_connected = 0,
269 .no_power_switching = 1,
270 .power_switching_mode = 0,
271};
272
273static struct platform_device isp1362_hcd_device = {
274 .name = "isp1362-hcd",
275 .id = 0,
276 .dev = {
277 .platform_data = &isp1362_priv,
278 },
279 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
280 .resource = isp1362_hcd_resources,
281};
282#endif
283
Barry Song706a01b2009-11-02 07:29:07 +0000284#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
285unsigned short bfin_can_peripherals[] = {
286 P_CAN0_RX, P_CAN0_TX, 0
287};
288
289static struct resource bfin_can_resources[] = {
290 {
291 .start = 0xFFC02A00,
292 .end = 0xFFC02FFF,
293 .flags = IORESOURCE_MEM,
294 },
295 {
296 .start = IRQ_CAN_RX,
297 .end = IRQ_CAN_RX,
298 .flags = IORESOURCE_IRQ,
299 },
300 {
301 .start = IRQ_CAN_TX,
302 .end = IRQ_CAN_TX,
303 .flags = IORESOURCE_IRQ,
304 },
305 {
306 .start = IRQ_CAN_ERROR,
307 .end = IRQ_CAN_ERROR,
308 .flags = IORESOURCE_IRQ,
309 },
310};
311
312static struct platform_device bfin_can_device = {
313 .name = "bfin_can",
314 .num_resources = ARRAY_SIZE(bfin_can_resources),
315 .resource = bfin_can_resources,
316 .dev = {
317 .platform_data = &bfin_can_peripherals, /* Passed to driver */
318 },
319};
320#endif
321
Bryan Wu1394f032007-05-06 14:50:22 -0700322#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +0800323static struct platform_device bfin_mii_bus = {
324 .name = "bfin_mii_bus",
325};
326
Bryan Wu1394f032007-05-06 14:50:22 -0700327static struct platform_device bfin_mac_device = {
328 .name = "bfin_mac",
Graf Yang65319622009-02-04 16:49:45 +0800329 .dev.platform_data = &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -0700330};
331#endif
332
333#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
334static struct resource net2272_bfin_resources[] = {
335 {
336 .start = 0x20300000,
337 .end = 0x20300000 + 0x100,
338 .flags = IORESOURCE_MEM,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800339 }, {
Bryan Wu1394f032007-05-06 14:50:22 -0700340 .start = IRQ_PF7,
341 .end = IRQ_PF7,
342 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
343 },
344};
345
346static struct platform_device net2272_bfin_device = {
347 .name = "net2272",
348 .id = -1,
349 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
350 .resource = net2272_bfin_resources,
351};
352#endif
353
Mike Frysingerfc689112008-06-25 11:41:42 +0800354#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
355#ifdef CONFIG_MTD_PARTITIONS
356const char *part_probes[] = { "cmdlinepart", "RedBoot", NULL };
357
358static struct mtd_partition bfin_plat_nand_partitions[] = {
359 {
Robin Getzaa582972008-08-05 17:47:29 +0800360 .name = "linux kernel(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800361 .size = 0x400000,
362 .offset = 0,
363 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800364 .name = "file system(nand)",
Mike Frysingerfc689112008-06-25 11:41:42 +0800365 .size = MTDPART_SIZ_FULL,
366 .offset = MTDPART_OFS_APPEND,
367 },
368};
369#endif
370
371#define BFIN_NAND_PLAT_CLE 2
372#define BFIN_NAND_PLAT_ALE 1
373static void bfin_plat_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
374{
375 struct nand_chip *this = mtd->priv;
376
377 if (cmd == NAND_CMD_NONE)
378 return;
379
380 if (ctrl & NAND_CLE)
381 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_CLE));
382 else
383 writeb(cmd, this->IO_ADDR_W + (1 << BFIN_NAND_PLAT_ALE));
384}
385
386#define BFIN_NAND_PLAT_READY GPIO_PF3
387static int bfin_plat_nand_dev_ready(struct mtd_info *mtd)
388{
389 return gpio_get_value(BFIN_NAND_PLAT_READY);
390}
391
392static struct platform_nand_data bfin_plat_nand_data = {
393 .chip = {
394 .chip_delay = 30,
395#ifdef CONFIG_MTD_PARTITIONS
396 .part_probe_types = part_probes,
397 .partitions = bfin_plat_nand_partitions,
398 .nr_partitions = ARRAY_SIZE(bfin_plat_nand_partitions),
399#endif
400 },
401 .ctrl = {
402 .cmd_ctrl = bfin_plat_nand_cmd_ctrl,
403 .dev_ready = bfin_plat_nand_dev_ready,
404 },
405};
406
407#define MAX(x, y) (x > y ? x : y)
408static struct resource bfin_plat_nand_resources = {
409 .start = 0x20212000,
410 .end = 0x20212000 + (1 << MAX(BFIN_NAND_PLAT_CLE, BFIN_NAND_PLAT_ALE)),
411 .flags = IORESOURCE_IO,
412};
413
414static struct platform_device bfin_async_nand_device = {
415 .name = "gen_nand",
416 .id = -1,
417 .num_resources = 1,
418 .resource = &bfin_plat_nand_resources,
419 .dev = {
420 .platform_data = &bfin_plat_nand_data,
421 },
422};
423
424static void bfin_plat_nand_init(void)
425{
426 gpio_request(BFIN_NAND_PLAT_READY, "bfin_nand_plat");
427}
428#else
429static void bfin_plat_nand_init(void) {}
430#endif
431
Mike Frysinger793dc272008-03-26 08:09:12 +0800432#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800433static struct mtd_partition stamp_partitions[] = {
434 {
Robin Getzaa582972008-08-05 17:47:29 +0800435 .name = "bootloader(nor)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800436 .size = 0x40000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800437 .offset = 0,
438 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800439 .name = "linux kernel(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800440 .size = 0x180000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800441 .offset = MTDPART_OFS_APPEND,
442 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800443 .name = "file system(nor)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800444 .size = 0x400000 - 0x40000 - 0x180000 - 0x10000,
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800445 .offset = MTDPART_OFS_APPEND,
446 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800447 .name = "MAC Address(nor)",
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800448 .size = MTDPART_SIZ_FULL,
449 .offset = 0x3F0000,
450 .mask_flags = MTD_WRITEABLE,
451 }
452};
453
454static struct physmap_flash_data stamp_flash_data = {
455 .width = 2,
456 .parts = stamp_partitions,
457 .nr_parts = ARRAY_SIZE(stamp_partitions),
458};
459
460static struct resource stamp_flash_resource = {
461 .start = 0x20000000,
462 .end = 0x203fffff,
463 .flags = IORESOURCE_MEM,
464};
465
466static struct platform_device stamp_flash_device = {
467 .name = "physmap-flash",
468 .id = 0,
469 .dev = {
470 .platform_data = &stamp_flash_data,
471 },
472 .num_resources = 1,
473 .resource = &stamp_flash_resource,
474};
Mike Frysinger793dc272008-03-26 08:09:12 +0800475#endif
Mike Frysingerde8c43f2008-01-24 17:14:04 +0800476
Bryan Wu1394f032007-05-06 14:50:22 -0700477#if defined(CONFIG_MTD_M25P80) \
478 || defined(CONFIG_MTD_M25P80_MODULE)
479static struct mtd_partition bfin_spi_flash_partitions[] = {
480 {
Robin Getzaa582972008-08-05 17:47:29 +0800481 .name = "bootloader(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800482 .size = 0x00040000,
Bryan Wu1394f032007-05-06 14:50:22 -0700483 .offset = 0,
484 .mask_flags = MTD_CAP_ROM
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800485 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800486 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800487 .size = 0x180000,
Mike Frysingeredf05642008-02-25 11:38:11 +0800488 .offset = MTDPART_OFS_APPEND,
Mike Frysinger1f83b8f2007-07-12 22:58:21 +0800489 }, {
Robin Getzaa582972008-08-05 17:47:29 +0800490 .name = "file system(spi)",
Mike Frysingeredf05642008-02-25 11:38:11 +0800491 .size = MTDPART_SIZ_FULL,
492 .offset = MTDPART_OFS_APPEND,
Bryan Wu1394f032007-05-06 14:50:22 -0700493 }
494};
495
496static struct flash_platform_data bfin_spi_flash_data = {
497 .name = "m25p80",
498 .parts = bfin_spi_flash_partitions,
499 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
Michael Hennerich88a80782008-11-18 17:48:22 +0800500 /* .type = "m25p64", */
Bryan Wu1394f032007-05-06 14:50:22 -0700501};
502
503/* SPI flash chip (m25p64) */
504static struct bfin5xx_spi_chip spi_flash_chip_info = {
505 .enable_dma = 0, /* use dma transfer with this chip*/
506 .bits_per_word = 8,
507};
508#endif
509
Mike Frysingera261eec2009-05-20 14:05:36 +0000510#if defined(CONFIG_BFIN_SPI_ADC) \
511 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700512/* SPI ADC chip */
513static struct bfin5xx_spi_chip spi_adc_chip_info = {
514 .enable_dma = 1, /* use dma transfer with this chip*/
515 .bits_per_word = 16,
516};
517#endif
518
Barry Song83124402009-08-06 21:03:02 +0000519#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
520 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700521static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
522 .enable_dma = 0,
523 .bits_per_word = 16,
524};
525#endif
526
Barry Songd4b834c2009-06-04 10:14:17 +0000527#if defined(CONFIG_SND_BF5XX_SOC_AD1938) \
528 || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
529static struct bfin5xx_spi_chip ad1938_spi_chip_info = {
530 .enable_dma = 0,
531 .bits_per_word = 8,
Barry Songd4b834c2009-06-04 10:14:17 +0000532};
533#endif
534
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000535#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000536#include <linux/input/ad714x.h>
537static struct bfin5xx_spi_chip ad7147_spi_chip_info = {
538 .enable_dma = 0,
539 .bits_per_word = 16,
540};
541
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000542static struct ad714x_slider_plat ad7147_spi_slider_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000543 {
544 .start_stage = 0,
545 .end_stage = 7,
546 .max_coord = 128,
547 },
548};
549
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000550static struct ad714x_button_plat ad7147_spi_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000551 {
552 .keycode = BTN_FORWARD,
553 .l_mask = 0,
554 .h_mask = 0x600,
555 },
556 {
557 .keycode = BTN_LEFT,
558 .l_mask = 0,
559 .h_mask = 0x500,
560 },
561 {
562 .keycode = BTN_MIDDLE,
563 .l_mask = 0,
564 .h_mask = 0x800,
565 },
566 {
567 .keycode = BTN_RIGHT,
568 .l_mask = 0x100,
569 .h_mask = 0x400,
570 },
571 {
572 .keycode = BTN_BACK,
573 .l_mask = 0x200,
574 .h_mask = 0x400,
575 },
576};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000577static struct ad714x_platform_data ad7147_spi_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000578 .slider_num = 1,
579 .button_num = 5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000580 .slider = ad7147_spi_slider_plat,
581 .button = ad7147_spi_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000582 .stage_cfg_reg = {
583 {0xFBFF, 0x1FFF, 0, 0x2626, 1600, 1600, 1600, 1600},
584 {0xEFFF, 0x1FFF, 0, 0x2626, 1650, 1650, 1650, 1650},
585 {0xFFFF, 0x1FFE, 0, 0x2626, 1650, 1650, 1650, 1650},
586 {0xFFFF, 0x1FFB, 0, 0x2626, 1650, 1650, 1650, 1650},
587 {0xFFFF, 0x1FEF, 0, 0x2626, 1650, 1650, 1650, 1650},
588 {0xFFFF, 0x1FBF, 0, 0x2626, 1650, 1650, 1650, 1650},
589 {0xFFFF, 0x1EFF, 0, 0x2626, 1650, 1650, 1650, 1650},
590 {0xFFFF, 0x1BFF, 0, 0x2626, 1600, 1600, 1600, 1600},
591 {0xFF7B, 0x3FFF, 0x506, 0x2626, 1100, 1100, 1150, 1150},
592 {0xFDFE, 0x3FFF, 0x606, 0x2626, 1100, 1100, 1150, 1150},
593 {0xFEBA, 0x1FFF, 0x1400, 0x2626, 1200, 1200, 1300, 1300},
594 {0xFFEF, 0x1FFF, 0x0, 0x2626, 1100, 1100, 1150, 1150},
595 },
596 .sys_cfg_reg = {0x2B2, 0x0, 0x3233, 0x819, 0x832, 0xCFF, 0xCFF, 0x0},
597};
598#endif
599
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000600#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000601#include <linux/input/ad714x.h>
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000602static struct ad714x_button_plat ad7142_i2c_button_plat[] = {
Barry Song427f2772009-07-17 07:04:55 +0000603 {
604 .keycode = BTN_1,
605 .l_mask = 0,
606 .h_mask = 0x1,
607 },
608 {
609 .keycode = BTN_2,
610 .l_mask = 0,
611 .h_mask = 0x2,
612 },
613 {
614 .keycode = BTN_3,
615 .l_mask = 0,
616 .h_mask = 0x4,
617 },
618 {
619 .keycode = BTN_4,
620 .l_mask = 0x0,
621 .h_mask = 0x8,
622 },
623};
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000624static struct ad714x_platform_data ad7142_i2c_platform_data = {
Barry Song427f2772009-07-17 07:04:55 +0000625 .button_num = 4,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000626 .button = ad7142_i2c_button_plat,
Barry Song427f2772009-07-17 07:04:55 +0000627 .stage_cfg_reg = {
628 /* fixme: figure out right setting for all comoponent according
629 * to hardware feature of EVAL-AD7142EB board */
630 {0xE7FF, 0x3FFF, 0x0005, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
631 {0xFDBF, 0x3FFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
632 {0xFFFF, 0x2DFF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
633 {0xFFFF, 0x37BF, 0x0001, 0x2626, 0x01F4, 0x01F4, 0x028A, 0x028A},
634 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
635 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
636 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
637 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
638 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
639 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
640 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
641 {0xFFFF, 0x3FFF, 0x0000, 0x0606, 0x01F4, 0x01F4, 0x0320, 0x0320},
642 },
643 .sys_cfg_reg = {0x0B2, 0x0, 0x690, 0x664, 0x290F, 0xF, 0xF, 0x0},
644};
645#endif
646
Yi Lif79ea4c2009-01-07 23:14:38 +0800647#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
648#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
649
650static int bfin_mmc_spi_init(struct device *dev,
651 irqreturn_t (*detect_int)(int, void *), void *data)
652{
653 return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
654 IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
655}
656
657static void bfin_mmc_spi_exit(struct device *dev, void *data)
658{
659 free_irq(MMC_SPI_CARD_DETECT_INT, data);
660}
661
662static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
663 .init = bfin_mmc_spi_init,
664 .exit = bfin_mmc_spi_exit,
665 .detect_delay = 100, /* msecs */
666};
667
668static struct bfin5xx_spi_chip mmc_spi_chip_info = {
669 .enable_dma = 0,
670 .bits_per_word = 8,
Yi Lie68d1eb2009-06-03 09:46:22 +0000671 .pio_interrupt = 0,
Yi Lif79ea4c2009-01-07 23:14:38 +0800672};
673#endif
674
Bryan Wu1394f032007-05-06 14:50:22 -0700675#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800676#include <linux/spi/ad7877.h>
Bryan Wu1394f032007-05-06 14:50:22 -0700677static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
Bryan Wu1394f032007-05-06 14:50:22 -0700678 .enable_dma = 0,
679 .bits_per_word = 16,
680};
681
682static const struct ad7877_platform_data bfin_ad7877_ts_info = {
683 .model = 7877,
684 .vref_delay_usecs = 50, /* internal, no capacitor */
685 .x_plate_ohms = 419,
686 .y_plate_ohms = 486,
687 .pressure_max = 1000,
688 .pressure_min = 0,
689 .stopacq_polarity = 1,
690 .first_conversion_delay = 3,
691 .acquisition_time = 1,
692 .averaging = 1,
693 .pen_down_acc_interval = 1,
694};
695#endif
696
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800697#if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
698#include <linux/spi/ad7879.h>
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800699static const struct ad7879_platform_data bfin_ad7879_ts_info = {
700 .model = 7879, /* Model = AD7879 */
701 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
702 .pressure_max = 10000,
703 .pressure_min = 0,
704 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
705 .acquisition_time = 1, /* 4us acquisition time per sample */
706 .median = 2, /* do 8 measurements */
707 .averaging = 1, /* take the average of 4 middle samples */
708 .pen_down_acc_interval = 255, /* 9.4 ms */
Michael Hennerich244d3422009-12-18 09:29:39 +0000709 .gpio_export = 1, /* Export GPIO to gpiolib */
710 .gpio_base = -1, /* Dynamic allocation */
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800711};
712#endif
713
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000714#if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000715#include <linux/input/adxl34x.h>
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000716static const struct adxl34x_platform_data adxl34x_info = {
717 .x_axis_offset = 0,
718 .y_axis_offset = 0,
719 .z_axis_offset = 0,
720 .tap_threshold = 0x31,
721 .tap_duration = 0x10,
722 .tap_latency = 0x60,
723 .tap_window = 0xF0,
724 .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
725 .act_axis_control = 0xFF,
726 .activity_threshold = 5,
727 .inactivity_threshold = 3,
728 .inactivity_time = 4,
729 .free_fall_threshold = 0x7,
730 .free_fall_time = 0x20,
731 .data_rate = 0x8,
732 .data_range = ADXL_FULL_RES,
733
734 .ev_type = EV_ABS,
735 .ev_code_x = ABS_X, /* EV_REL */
736 .ev_code_y = ABS_Y, /* EV_REL */
737 .ev_code_z = ABS_Z, /* EV_REL */
738
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000739 .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
Michael Hennerichffc4d8b2009-05-29 15:41:18 +0000740
741/* .ev_code_ff = KEY_F,*/ /* EV_KEY */
742/* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
743 .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
744 .fifo_mode = ADXL_FIFO_STREAM,
745};
746#endif
747
Michael Hennerichf5150152008-10-16 23:23:18 +0800748#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
749static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
750 .enable_dma = 0,
751 .bits_per_word = 16,
752};
753#endif
754
Michael Hennerich6e668932008-02-09 01:54:09 +0800755#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
756static struct bfin5xx_spi_chip spidev_chip_info = {
757 .enable_dma = 0,
758 .bits_per_word = 8,
759};
760#endif
761
Michael Hennerich2043f3f2008-10-13 14:46:30 +0800762#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
763static struct bfin5xx_spi_chip lq035q1_spi_chip_info = {
764 .enable_dma = 0,
765 .bits_per_word = 8,
766};
767#endif
768
Michael Hennerich85a192e2009-01-07 23:14:38 +0800769#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
770static struct bfin5xx_spi_chip enc28j60_spi_chip_info = {
771 .enable_dma = 1,
772 .bits_per_word = 8,
773 .cs_gpio = GPIO_PF10,
774};
775#endif
776
Michael Hennerichefaf7cd2009-11-12 16:54:08 +0000777#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
778static struct bfin5xx_spi_chip adf7021_spi_chip_info = {
779 .bits_per_word = 16,
780 .cs_gpio = GPIO_PF10,
781};
782
783#include <linux/spi/adf702x.h>
784#define TXREG 0x0160A470
785static const u32 adf7021_regs[] = {
786 0x09608FA0,
787 0x00575011,
788 0x00A7F092,
789 0x2B141563,
790 0x81F29E94,
791 0x00003155,
792 0x050A4F66,
793 0x00000007,
794 0x00000008,
795 0x000231E9,
796 0x3296354A,
797 0x891A2B3B,
798 0x00000D9C,
799 0x0000000D,
800 0x0000000E,
801 0x0000000F,
802};
803
804static struct adf702x_platform_data adf7021_platform_data = {
805 .regs_base = (void *)SPORT1_TCR1,
806 .dma_ch_rx = CH_SPORT1_RX,
807 .dma_ch_tx = CH_SPORT1_TX,
808 .irq_sport_err = IRQ_SPORT1_ERROR,
809 .gpio_int_rfs = GPIO_PF8,
810 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_RFS, P_SPORT1_DRPRI,
811 P_SPORT1_RSCLK, P_SPORT1_TSCLK, 0},
812 .adf702x_model = MODEL_ADF7021,
813 .adf702x_regs = adf7021_regs,
814 .tx_reg = TXREG,
815};
816#endif
817
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800818#if defined(CONFIG_MTD_DATAFLASH) \
819 || defined(CONFIG_MTD_DATAFLASH_MODULE)
Michael Hennerichceac2652008-08-25 17:39:11 +0800820
821static struct mtd_partition bfin_spi_dataflash_partitions[] = {
822 {
823 .name = "bootloader(spi)",
824 .size = 0x00040000,
825 .offset = 0,
826 .mask_flags = MTD_CAP_ROM
827 }, {
828 .name = "linux kernel(spi)",
Grace Pan6ecb5b62009-01-07 23:14:38 +0800829 .size = 0x180000,
Michael Hennerichceac2652008-08-25 17:39:11 +0800830 .offset = MTDPART_OFS_APPEND,
831 }, {
832 .name = "file system(spi)",
833 .size = MTDPART_SIZ_FULL,
834 .offset = MTDPART_OFS_APPEND,
835 }
836};
837
838static struct flash_platform_data bfin_spi_dataflash_data = {
839 .name = "SPI Dataflash",
840 .parts = bfin_spi_dataflash_partitions,
841 .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
842};
843
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800844/* DataFlash chip */
845static struct bfin5xx_spi_chip data_flash_chip_info = {
846 .enable_dma = 0, /* use dma transfer with this chip*/
847 .bits_per_word = 8,
848};
849#endif
850
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000851#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
852static struct bfin5xx_spi_chip spi_adxl34x_chip_info = {
853 .enable_dma = 0, /* use dma transfer with this chip*/
854 .bits_per_word = 8,
855};
856#endif
857
Bryan Wu1394f032007-05-06 14:50:22 -0700858static struct spi_board_info bfin_spi_board_info[] __initdata = {
859#if defined(CONFIG_MTD_M25P80) \
860 || defined(CONFIG_MTD_M25P80_MODULE)
861 {
862 /* the modalias must be the same as spi device driver name */
863 .modalias = "m25p80", /* Name of spi_driver for this device */
864 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800865 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -0700866 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
867 .platform_data = &bfin_spi_flash_data,
868 .controller_data = &spi_flash_chip_info,
869 .mode = SPI_MODE_3,
870 },
871#endif
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800872#if defined(CONFIG_MTD_DATAFLASH) \
873 || defined(CONFIG_MTD_DATAFLASH_MODULE)
874 { /* DataFlash chip */
875 .modalias = "mtd_dataflash",
Michael Hennerichceac2652008-08-25 17:39:11 +0800876 .max_speed_hz = 33250000, /* max spi clock (SCK) speed in HZ */
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800877 .bus_num = 0, /* Framework bus number */
878 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
Michael Hennerichceac2652008-08-25 17:39:11 +0800879 .platform_data = &bfin_spi_dataflash_data,
Michael Hennerich8e9d5c72008-04-24 08:46:19 +0800880 .controller_data = &data_flash_chip_info,
881 .mode = SPI_MODE_3,
882 },
883#endif
Mike Frysingera261eec2009-05-20 14:05:36 +0000884#if defined(CONFIG_BFIN_SPI_ADC) \
885 || defined(CONFIG_BFIN_SPI_ADC_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700886 {
887 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
888 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800889 .bus_num = 0, /* Framework bus number */
Bryan Wu1394f032007-05-06 14:50:22 -0700890 .chip_select = 1, /* Framework chip select. */
891 .platform_data = NULL, /* No spi_driver specific config */
892 .controller_data = &spi_adc_chip_info,
893 },
894#endif
895
Barry Song83124402009-08-06 21:03:02 +0000896#if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
897 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -0700898 {
Barry Songdac98172009-08-13 21:07:37 +0000899 .modalias = "ad1836",
Bryan Wu1394f032007-05-06 14:50:22 -0700900 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +0800901 .bus_num = 0,
Barry Song83124402009-08-06 21:03:02 +0000902 .chip_select = 4,/* CONFIG_SND_BLACKFIN_SPI_PFBIT */
Bryan Wu1394f032007-05-06 14:50:22 -0700903 .controller_data = &ad1836_spi_chip_info,
Barry Song83124402009-08-06 21:03:02 +0000904 .mode = SPI_MODE_3,
Bryan Wu1394f032007-05-06 14:50:22 -0700905 },
906#endif
Barry Songd4b834c2009-06-04 10:14:17 +0000907
908#if defined(CONFIG_SND_BF5XX_SOC_AD1938) || defined(CONFIG_SND_BF5XX_SOC_AD1938_MODULE)
909 {
Barry Songdac98172009-08-13 21:07:37 +0000910 .modalias = "ad1938",
Barry Songd4b834c2009-06-04 10:14:17 +0000911 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
912 .bus_num = 0,
Barry Song08a54bf2009-09-18 09:14:38 +0000913 .chip_select = 5,
Barry Songd4b834c2009-06-04 10:14:17 +0000914 .controller_data = &ad1938_spi_chip_info,
915 .mode = SPI_MODE_3,
916 },
917#endif
918
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000919#if defined(CONFIG_INPUT_AD714X_SPI) || defined(CONFIG_INPUT_AD714X_SPI_MODULE)
Barry Song427f2772009-07-17 07:04:55 +0000920 {
921 .modalias = "ad714x_captouch",
922 .max_speed_hz = 1000000, /* max spi clock (SCK) speed in HZ */
923 .irq = IRQ_PF4,
924 .bus_num = 0,
925 .chip_select = 5,
926 .mode = SPI_MODE_3,
Mike Frysinger5b7c5772009-10-12 15:56:58 +0000927 .platform_data = &ad7147_spi_platform_data,
Barry Song427f2772009-07-17 07:04:55 +0000928 .controller_data = &ad7147_spi_chip_info,
929 },
930#endif
931
Yi Lif79ea4c2009-01-07 23:14:38 +0800932#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
933 {
934 .modalias = "mmc_spi",
935 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
936 .bus_num = 0,
937 .chip_select = 4,
938 .platform_data = &bfin_mmc_spi_pdata,
939 .controller_data = &mmc_spi_chip_info,
940 .mode = SPI_MODE_3,
941 },
942#endif
Bryan Wu1394f032007-05-06 14:50:22 -0700943#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
944 {
945 .modalias = "ad7877",
946 .platform_data = &bfin_ad7877_ts_info,
947 .irq = IRQ_PF6,
948 .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
Michael Hennerichc7d48962007-11-15 21:33:31 +0800949 .bus_num = 0,
Bryan Wu1394f032007-05-06 14:50:22 -0700950 .chip_select = 1,
951 .controller_data = &spi_ad7877_chip_info,
952 },
953#endif
Michael Hennerichf5150152008-10-16 23:23:18 +0800954#if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800955 {
956 .modalias = "ad7879",
957 .platform_data = &bfin_ad7879_ts_info,
958 .irq = IRQ_PF7,
959 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
960 .bus_num = 0,
961 .chip_select = 1,
962 .controller_data = &spi_ad7879_chip_info,
963 .mode = SPI_CPHA | SPI_CPOL,
964 },
965#endif
Michael Hennerich6e668932008-02-09 01:54:09 +0800966#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
967 {
968 .modalias = "spidev",
969 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
970 .bus_num = 0,
971 .chip_select = 1,
972 .controller_data = &spidev_chip_info,
973 },
974#endif
Michael Hennerich2043f3f2008-10-13 14:46:30 +0800975#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
976 {
977 .modalias = "bfin-lq035q1-spi",
978 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
979 .bus_num = 0,
Michael Hennerich46aa04f2008-10-13 11:30:17 +0800980 .chip_select = 2,
Michael Hennerich2043f3f2008-10-13 14:46:30 +0800981 .controller_data = &lq035q1_spi_chip_info,
982 .mode = SPI_CPHA | SPI_CPOL,
983 },
984#endif
Michael Hennerich85a192e2009-01-07 23:14:38 +0800985#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE)
986 {
987 .modalias = "enc28j60",
988 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
989 .irq = IRQ_PF6,
990 .bus_num = 0,
991 .chip_select = 0, /* GPIO controlled SSEL */
992 .controller_data = &enc28j60_spi_chip_info,
993 .mode = SPI_MODE_0,
994 },
995#endif
Michael Hennerich57af8ed2009-10-16 12:35:20 +0000996#if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
997 {
998 .modalias = "adxl34x",
999 .platform_data = &adxl34x_info,
1000 .irq = IRQ_PF6,
1001 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
1002 .bus_num = 0,
1003 .chip_select = 2,
1004 .controller_data = &spi_adxl34x_chip_info,
1005 .mode = SPI_MODE_3,
1006 },
1007#endif
Michael Hennerichefaf7cd2009-11-12 16:54:08 +00001008#if defined(CONFIG_ADF702X) || defined(CONFIG_ADF702X_MODULE)
1009 {
1010 .modalias = "adf702x",
1011 .max_speed_hz = 16000000, /* max spi clock (SCK) speed in HZ */
1012 .bus_num = 0,
1013 .chip_select = 0, /* GPIO controlled SSEL */
1014 .controller_data = &adf7021_spi_chip_info,
1015 .platform_data = &adf7021_platform_data,
1016 .mode = SPI_MODE_0,
1017 },
1018#endif
1019
Bryan Wu1394f032007-05-06 14:50:22 -07001020};
1021
Mike Frysinger5bda2722008-06-07 15:03:01 +08001022#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wu1394f032007-05-06 14:50:22 -07001023/* SPI controller data */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001024static struct bfin5xx_spi_master bfin_spi0_info = {
Bryan Wu1394f032007-05-06 14:50:22 -07001025 .num_chipselect = 8,
1026 .enable_dma = 1, /* master has the ability to do dma transfer */
Bryan Wu5d448dd2007-11-12 23:24:42 +08001027 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
Bryan Wu1394f032007-05-06 14:50:22 -07001028};
1029
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001030/* SPI (0) */
1031static struct resource bfin_spi0_resource[] = {
1032 [0] = {
1033 .start = SPI0_REGBASE,
1034 .end = SPI0_REGBASE + 0xFF,
1035 .flags = IORESOURCE_MEM,
1036 },
1037 [1] = {
1038 .start = CH_SPI,
1039 .end = CH_SPI,
Yi Lie68d1eb2009-06-03 09:46:22 +00001040 .flags = IORESOURCE_DMA,
1041 },
1042 [2] = {
1043 .start = IRQ_SPI,
1044 .end = IRQ_SPI,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001045 .flags = IORESOURCE_IRQ,
1046 },
1047};
1048
1049static struct platform_device bfin_spi0_device = {
1050 .name = "bfin-spi",
1051 .id = 0, /* Bus number */
1052 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1053 .resource = bfin_spi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001054 .dev = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001055 .platform_data = &bfin_spi0_info, /* Passed to driver */
Bryan Wu1394f032007-05-06 14:50:22 -07001056 },
1057};
1058#endif /* spi master and devices */
1059
Cliff Cai1e9aa952009-03-28 23:28:51 +08001060#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1061
1062/* SPORT SPI controller data */
1063static struct bfin5xx_spi_master bfin_sport_spi0_info = {
1064 .num_chipselect = 1, /* master only supports one device */
1065 .enable_dma = 0, /* master don't support DMA */
1066 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
1067 P_SPORT0_RSCLK, P_SPORT0_TFS, P_SPORT0_RFS, 0},
1068};
1069
1070static struct resource bfin_sport_spi0_resource[] = {
1071 [0] = {
1072 .start = SPORT0_TCR1,
1073 .end = SPORT0_TCR1 + 0xFF,
1074 .flags = IORESOURCE_MEM,
1075 },
1076 [1] = {
1077 .start = IRQ_SPORT0_ERROR,
1078 .end = IRQ_SPORT0_ERROR,
1079 .flags = IORESOURCE_IRQ,
1080 },
1081};
1082
1083static struct platform_device bfin_sport_spi0_device = {
1084 .name = "bfin-sport-spi",
1085 .id = 1, /* Bus number */
1086 .num_resources = ARRAY_SIZE(bfin_sport_spi0_resource),
1087 .resource = bfin_sport_spi0_resource,
1088 .dev = {
1089 .platform_data = &bfin_sport_spi0_info, /* Passed to driver */
1090 },
1091};
1092
1093static struct bfin5xx_spi_master bfin_sport_spi1_info = {
1094 .num_chipselect = 1, /* master only supports one device */
1095 .enable_dma = 0, /* master don't support DMA */
1096 .pin_req = {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_DRPRI,
1097 P_SPORT1_RSCLK, P_SPORT1_TFS, P_SPORT1_RFS, 0},
1098};
1099
1100static struct resource bfin_sport_spi1_resource[] = {
1101 [0] = {
1102 .start = SPORT1_TCR1,
1103 .end = SPORT1_TCR1 + 0xFF,
1104 .flags = IORESOURCE_MEM,
1105 },
1106 [1] = {
1107 .start = IRQ_SPORT1_ERROR,
1108 .end = IRQ_SPORT1_ERROR,
1109 .flags = IORESOURCE_IRQ,
1110 },
1111};
1112
1113static struct platform_device bfin_sport_spi1_device = {
1114 .name = "bfin-sport-spi",
1115 .id = 2, /* Bus number */
1116 .num_resources = ARRAY_SIZE(bfin_sport_spi1_resource),
1117 .resource = bfin_sport_spi1_resource,
1118 .dev = {
1119 .platform_data = &bfin_sport_spi1_info, /* Passed to driver */
1120 },
1121};
1122
1123#endif /* sport spi master and devices */
1124
Bryan Wu1394f032007-05-06 14:50:22 -07001125#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1126static struct platform_device bfin_fb_device = {
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001127 .name = "bf537-lq035",
1128};
1129#endif
1130
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001131#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1132#include <asm/bfin-lq035q1.h>
1133
1134static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001135 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
1136 .ppi_mode = USE_RGB565_16_BIT_PPI,
1137 .use_bl = 0, /* let something else control the LCD Blacklight */
1138 .gpio_bl = GPIO_PF7,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001139};
1140
1141static struct resource bfin_lq035q1_resources[] = {
1142 {
1143 .start = IRQ_PPI_ERROR,
1144 .end = IRQ_PPI_ERROR,
1145 .flags = IORESOURCE_IRQ,
1146 },
1147};
1148
1149static struct platform_device bfin_lq035q1_device = {
1150 .name = "bfin-lq035q1",
1151 .id = -1,
Michael Hennerichd94a1aa2009-12-08 11:45:55 +00001152 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
1153 .resource = bfin_lq035q1_resources,
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001154 .dev = {
1155 .platform_data = &bfin_lq035q1_data,
1156 },
1157};
1158#endif
1159
Bryan Wu1394f032007-05-06 14:50:22 -07001160#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang233b28a2007-11-21 17:04:41 +08001161#ifdef CONFIG_SERIAL_BFIN_UART0
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001162static struct resource bfin_uart0_resources[] = {
Bryan Wu1394f032007-05-06 14:50:22 -07001163 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001164 .start = UART0_THR,
1165 .end = UART0_GCTL+2,
Bryan Wu1394f032007-05-06 14:50:22 -07001166 .flags = IORESOURCE_MEM,
Sonic Zhang233b28a2007-11-21 17:04:41 +08001167 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001168 {
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001169 .start = IRQ_UART0_RX,
1170 .end = IRQ_UART0_RX+1,
1171 .flags = IORESOURCE_IRQ,
1172 },
1173 {
1174 .start = IRQ_UART0_ERROR,
1175 .end = IRQ_UART0_ERROR,
1176 .flags = IORESOURCE_IRQ,
1177 },
1178 {
1179 .start = CH_UART0_TX,
1180 .end = CH_UART0_TX,
1181 .flags = IORESOURCE_DMA,
1182 },
1183 {
1184 .start = CH_UART0_RX,
1185 .end = CH_UART0_RX,
1186 .flags = IORESOURCE_DMA,
1187 },
1188#ifdef CONFIG_BFIN_UART0_CTSRTS
1189 { /* CTS pin */
1190 .start = GPIO_PG7,
1191 .end = GPIO_PG7,
1192 .flags = IORESOURCE_IO,
1193 },
1194 { /* RTS pin */
1195 .start = GPIO_PG6,
1196 .end = GPIO_PG6,
1197 .flags = IORESOURCE_IO,
Bryan Wu1394f032007-05-06 14:50:22 -07001198 },
Sonic Zhang233b28a2007-11-21 17:04:41 +08001199#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001200};
1201
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001202unsigned short bfin_uart0_peripherals[] = {
1203 P_UART0_TX, P_UART0_RX, 0
1204};
1205
1206static struct platform_device bfin_uart0_device = {
1207 .name = "bfin-uart",
1208 .id = 0,
1209 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
1210 .resource = bfin_uart0_resources,
1211 .dev = {
1212 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
1213 },
1214};
1215#endif
1216#ifdef CONFIG_SERIAL_BFIN_UART1
1217static struct resource bfin_uart1_resources[] = {
1218 {
1219 .start = UART1_THR,
1220 .end = UART1_GCTL+2,
1221 .flags = IORESOURCE_MEM,
1222 },
1223 {
1224 .start = IRQ_UART1_RX,
1225 .end = IRQ_UART1_RX+1,
1226 .flags = IORESOURCE_IRQ,
1227 },
1228 {
1229 .start = IRQ_UART1_ERROR,
1230 .end = IRQ_UART1_ERROR,
1231 .flags = IORESOURCE_IRQ,
1232 },
1233 {
1234 .start = CH_UART1_TX,
1235 .end = CH_UART1_TX,
1236 .flags = IORESOURCE_DMA,
1237 },
1238 {
1239 .start = CH_UART1_RX,
1240 .end = CH_UART1_RX,
1241 .flags = IORESOURCE_DMA,
1242 },
1243};
1244
1245unsigned short bfin_uart1_peripherals[] = {
1246 P_UART1_TX, P_UART1_RX, 0
1247};
1248
1249static struct platform_device bfin_uart1_device = {
Bryan Wu1394f032007-05-06 14:50:22 -07001250 .name = "bfin-uart",
1251 .id = 1,
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001252 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
1253 .resource = bfin_uart1_resources,
1254 .dev = {
1255 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
1256 },
Bryan Wu1394f032007-05-06 14:50:22 -07001257};
1258#endif
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001259#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001260
Graf Yang5be36d22008-04-25 03:09:15 +08001261#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang5be36d22008-04-25 03:09:15 +08001262#ifdef CONFIG_BFIN_SIR0
Graf Yang42bd8bc2009-01-07 23:14:39 +08001263static struct resource bfin_sir0_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001264 {
1265 .start = 0xFFC00400,
1266 .end = 0xFFC004FF,
1267 .flags = IORESOURCE_MEM,
1268 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001269 {
1270 .start = IRQ_UART0_RX,
1271 .end = IRQ_UART0_RX+1,
1272 .flags = IORESOURCE_IRQ,
1273 },
1274 {
1275 .start = CH_UART0_RX,
1276 .end = CH_UART0_RX+1,
1277 .flags = IORESOURCE_DMA,
1278 },
1279};
1280
1281static struct platform_device bfin_sir0_device = {
1282 .name = "bfin_sir",
1283 .id = 0,
1284 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
1285 .resource = bfin_sir0_resources,
1286};
Graf Yang5be36d22008-04-25 03:09:15 +08001287#endif
1288#ifdef CONFIG_BFIN_SIR1
Graf Yang42bd8bc2009-01-07 23:14:39 +08001289static struct resource bfin_sir1_resources[] = {
Graf Yang5be36d22008-04-25 03:09:15 +08001290 {
1291 .start = 0xFFC02000,
1292 .end = 0xFFC020FF,
1293 .flags = IORESOURCE_MEM,
1294 },
Graf Yang42bd8bc2009-01-07 23:14:39 +08001295 {
1296 .start = IRQ_UART1_RX,
1297 .end = IRQ_UART1_RX+1,
1298 .flags = IORESOURCE_IRQ,
1299 },
1300 {
1301 .start = CH_UART1_RX,
1302 .end = CH_UART1_RX+1,
1303 .flags = IORESOURCE_DMA,
1304 },
Graf Yang5be36d22008-04-25 03:09:15 +08001305};
1306
Graf Yang42bd8bc2009-01-07 23:14:39 +08001307static struct platform_device bfin_sir1_device = {
Graf Yang5be36d22008-04-25 03:09:15 +08001308 .name = "bfin_sir",
Graf Yang42bd8bc2009-01-07 23:14:39 +08001309 .id = 1,
1310 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
1311 .resource = bfin_sir1_resources,
Graf Yang5be36d22008-04-25 03:09:15 +08001312};
1313#endif
Graf Yang42bd8bc2009-01-07 23:14:39 +08001314#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001315
Bryan Wu1394f032007-05-06 14:50:22 -07001316#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001317static struct resource bfin_twi0_resource[] = {
1318 [0] = {
1319 .start = TWI0_REGBASE,
1320 .end = TWI0_REGBASE,
1321 .flags = IORESOURCE_MEM,
1322 },
1323 [1] = {
1324 .start = IRQ_TWI,
1325 .end = IRQ_TWI,
1326 .flags = IORESOURCE_IRQ,
1327 },
1328};
1329
Bryan Wu1394f032007-05-06 14:50:22 -07001330static struct platform_device i2c_bfin_twi_device = {
1331 .name = "i2c-bfin-twi",
1332 .id = 0,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001333 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1334 .resource = bfin_twi0_resource,
Bryan Wu1394f032007-05-06 14:50:22 -07001335};
1336#endif
1337
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001338#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001339static const unsigned short adp5588_keymap[ADP5588_KEYMAPSIZE] = {
1340 [0] = KEY_GRAVE,
1341 [1] = KEY_1,
1342 [2] = KEY_2,
1343 [3] = KEY_3,
1344 [4] = KEY_4,
1345 [5] = KEY_5,
1346 [6] = KEY_6,
1347 [7] = KEY_7,
1348 [8] = KEY_8,
1349 [9] = KEY_9,
1350 [10] = KEY_0,
1351 [11] = KEY_MINUS,
1352 [12] = KEY_EQUAL,
1353 [13] = KEY_BACKSLASH,
1354 [15] = KEY_KP0,
1355 [16] = KEY_Q,
1356 [17] = KEY_W,
1357 [18] = KEY_E,
1358 [19] = KEY_R,
1359 [20] = KEY_T,
1360 [21] = KEY_Y,
1361 [22] = KEY_U,
1362 [23] = KEY_I,
1363 [24] = KEY_O,
1364 [25] = KEY_P,
1365 [26] = KEY_LEFTBRACE,
1366 [27] = KEY_RIGHTBRACE,
1367 [29] = KEY_KP1,
1368 [30] = KEY_KP2,
1369 [31] = KEY_KP3,
1370 [32] = KEY_A,
1371 [33] = KEY_S,
1372 [34] = KEY_D,
1373 [35] = KEY_F,
1374 [36] = KEY_G,
1375 [37] = KEY_H,
1376 [38] = KEY_J,
1377 [39] = KEY_K,
1378 [40] = KEY_L,
1379 [41] = KEY_SEMICOLON,
1380 [42] = KEY_APOSTROPHE,
1381 [43] = KEY_BACKSLASH,
1382 [45] = KEY_KP4,
1383 [46] = KEY_KP5,
1384 [47] = KEY_KP6,
1385 [48] = KEY_102ND,
1386 [49] = KEY_Z,
1387 [50] = KEY_X,
1388 [51] = KEY_C,
1389 [52] = KEY_V,
1390 [53] = KEY_B,
1391 [54] = KEY_N,
1392 [55] = KEY_M,
1393 [56] = KEY_COMMA,
1394 [57] = KEY_DOT,
1395 [58] = KEY_SLASH,
1396 [60] = KEY_KPDOT,
1397 [61] = KEY_KP7,
1398 [62] = KEY_KP8,
1399 [63] = KEY_KP9,
1400 [64] = KEY_SPACE,
1401 [65] = KEY_BACKSPACE,
1402 [66] = KEY_TAB,
1403 [67] = KEY_KPENTER,
1404 [68] = KEY_ENTER,
1405 [69] = KEY_ESC,
1406 [70] = KEY_DELETE,
1407 [74] = KEY_KPMINUS,
1408 [76] = KEY_UP,
1409 [77] = KEY_DOWN,
1410 [78] = KEY_RIGHT,
1411 [79] = KEY_LEFT,
1412};
1413
1414static struct adp5588_kpad_platform_data adp5588_kpad_data = {
1415 .rows = 8,
1416 .cols = 10,
1417 .keymap = adp5588_keymap,
1418 .keymapsize = ARRAY_SIZE(adp5588_keymap),
1419 .repeat = 0,
1420};
1421#endif
1422
Michael Hennerich3ea57212009-03-28 22:15:07 +08001423#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1424#include <linux/mfd/adp5520.h>
1425
1426 /*
1427 * ADP5520/5501 Backlight Data
1428 */
1429
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001430static struct adp5520_backlight_platform_data adp5520_backlight_data = {
1431 .fade_in = ADP5520_FADE_T_1200ms,
1432 .fade_out = ADP5520_FADE_T_1200ms,
1433 .fade_led_law = ADP5520_BL_LAW_LINEAR,
1434 .en_ambl_sens = 1,
1435 .abml_filt = ADP5520_BL_AMBL_FILT_640ms,
1436 .l1_daylight_max = ADP5520_BL_CUR_mA(15),
1437 .l1_daylight_dim = ADP5520_BL_CUR_mA(0),
1438 .l2_office_max = ADP5520_BL_CUR_mA(7),
1439 .l2_office_dim = ADP5520_BL_CUR_mA(0),
1440 .l3_dark_max = ADP5520_BL_CUR_mA(3),
1441 .l3_dark_dim = ADP5520_BL_CUR_mA(0),
1442 .l2_trip = ADP5520_L2_COMP_CURR_uA(700),
1443 .l2_hyst = ADP5520_L2_COMP_CURR_uA(50),
1444 .l3_trip = ADP5520_L3_COMP_CURR_uA(80),
1445 .l3_hyst = ADP5520_L3_COMP_CURR_uA(20),
Michael Hennerich3ea57212009-03-28 22:15:07 +08001446};
1447
1448 /*
1449 * ADP5520/5501 LEDs Data
1450 */
1451
Michael Hennerich3ea57212009-03-28 22:15:07 +08001452static struct led_info adp5520_leds[] = {
1453 {
1454 .name = "adp5520-led1",
1455 .default_trigger = "none",
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001456 .flags = FLAG_ID_ADP5520_LED1_ADP5501_LED0 | ADP5520_LED_OFFT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001457 },
1458#ifdef ADP5520_EN_ALL_LEDS
1459 {
1460 .name = "adp5520-led2",
1461 .default_trigger = "none",
1462 .flags = FLAG_ID_ADP5520_LED2_ADP5501_LED1,
1463 },
1464 {
1465 .name = "adp5520-led3",
1466 .default_trigger = "none",
1467 .flags = FLAG_ID_ADP5520_LED3_ADP5501_LED2,
1468 },
1469#endif
1470};
1471
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001472static struct adp5520_leds_platform_data adp5520_leds_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001473 .num_leds = ARRAY_SIZE(adp5520_leds),
1474 .leds = adp5520_leds,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001475 .fade_in = ADP5520_FADE_T_600ms,
1476 .fade_out = ADP5520_FADE_T_600ms,
1477 .led_on_time = ADP5520_LED_ONT_600ms,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001478};
1479
1480 /*
1481 * ADP5520 GPIO Data
1482 */
1483
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001484static struct adp5520_gpio_platform_data adp5520_gpio_data = {
Michael Hennerich3ea57212009-03-28 22:15:07 +08001485 .gpio_start = 50,
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001486 .gpio_en_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
1487 .gpio_pullup_mask = ADP5520_GPIO_C1 | ADP5520_GPIO_C2 | ADP5520_GPIO_R2,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001488};
1489
1490 /*
1491 * ADP5520 Keypad Data
1492 */
1493
Michael Hennerich3ea57212009-03-28 22:15:07 +08001494static const unsigned short adp5520_keymap[ADP5520_KEYMAPSIZE] = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001495 [ADP5520_KEY(0, 0)] = KEY_GRAVE,
1496 [ADP5520_KEY(0, 1)] = KEY_1,
1497 [ADP5520_KEY(0, 2)] = KEY_2,
1498 [ADP5520_KEY(0, 3)] = KEY_3,
1499 [ADP5520_KEY(1, 0)] = KEY_4,
1500 [ADP5520_KEY(1, 1)] = KEY_5,
1501 [ADP5520_KEY(1, 2)] = KEY_6,
1502 [ADP5520_KEY(1, 3)] = KEY_7,
1503 [ADP5520_KEY(2, 0)] = KEY_8,
1504 [ADP5520_KEY(2, 1)] = KEY_9,
1505 [ADP5520_KEY(2, 2)] = KEY_0,
1506 [ADP5520_KEY(2, 3)] = KEY_MINUS,
1507 [ADP5520_KEY(3, 0)] = KEY_EQUAL,
1508 [ADP5520_KEY(3, 1)] = KEY_BACKSLASH,
1509 [ADP5520_KEY(3, 2)] = KEY_BACKSPACE,
1510 [ADP5520_KEY(3, 3)] = KEY_ENTER,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001511};
1512
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001513static struct adp5520_keys_platform_data adp5520_keys_data = {
1514 .rows_en_mask = ADP5520_ROW_R3 | ADP5520_ROW_R2 | ADP5520_ROW_R1 | ADP5520_ROW_R0,
1515 .cols_en_mask = ADP5520_COL_C3 | ADP5520_COL_C2 | ADP5520_COL_C1 | ADP5520_COL_C0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001516 .keymap = adp5520_keymap,
1517 .keymapsize = ARRAY_SIZE(adp5520_keymap),
1518 .repeat = 0,
1519};
1520
1521 /*
1522 * ADP5520/5501 Multifuction Device Init Data
1523 */
1524
Michael Hennerich3ea57212009-03-28 22:15:07 +08001525static struct adp5520_platform_data adp5520_pdev_data = {
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001526 .backlight = &adp5520_backlight_data,
1527 .leds = &adp5520_leds_data,
1528 .gpio = &adp5520_gpio_data,
1529 .keys = &adp5520_keys_data,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001530};
1531
1532#endif
1533
Michael Hennerichba877d42009-08-27 04:09:32 +00001534#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
Michael Hennerich1d23dc82009-10-05 13:33:11 +00001535static struct adp5588_gpio_platform_data adp5588_gpio_data = {
Michael Hennerichba877d42009-08-27 04:09:32 +00001536 .gpio_start = 50,
1537 .pullup_dis_mask = 0,
1538};
1539#endif
1540
Michael Hennerich78756c62009-10-13 15:28:33 +00001541#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1542#include <linux/i2c/adp8870.h>
1543static struct led_info adp8870_leds[] = {
1544 {
1545 .name = "adp8870-led7",
1546 .default_trigger = "none",
1547 .flags = ADP8870_LED_D7 | ADP8870_LED_OFFT_600ms,
1548 },
1549};
1550
1551
1552static struct adp8870_backlight_platform_data adp8870_pdata = {
1553 .bl_led_assign = ADP8870_BL_D1 | ADP8870_BL_D2 | ADP8870_BL_D3 |
1554 ADP8870_BL_D4 | ADP8870_BL_D5 | ADP8870_BL_D6, /* 1 = Backlight 0 = Individual LED */
1555 .pwm_assign = 0, /* 1 = Enables PWM mode */
1556
1557 .bl_fade_in = ADP8870_FADE_T_1200ms, /* Backlight Fade-In Timer */
1558 .bl_fade_out = ADP8870_FADE_T_1200ms, /* Backlight Fade-Out Timer */
1559 .bl_fade_law = ADP8870_FADE_LAW_CUBIC1, /* fade-on/fade-off transfer characteristic */
1560
1561 .en_ambl_sens = 1, /* 1 = enable ambient light sensor */
1562 .abml_filt = ADP8870_BL_AMBL_FILT_320ms, /* Light sensor filter time */
1563
1564 .l1_daylight_max = ADP8870_BL_CUR_mA(20), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1565 .l1_daylight_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1566 .l2_bright_max = ADP8870_BL_CUR_mA(14), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1567 .l2_bright_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1568 .l3_office_max = ADP8870_BL_CUR_mA(6), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1569 .l3_office_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1570 .l4_indoor_max = ADP8870_BL_CUR_mA(3), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1571 .l4_indor_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1572 .l5_dark_max = ADP8870_BL_CUR_mA(2), /* use BL_CUR_mA(I) 0 <= I <= 30 mA */
1573 .l5_dark_dim = ADP8870_BL_CUR_mA(0), /* typ = 0, use BL_CUR_mA(I) 0 <= I <= 30 mA */
1574
1575 .l2_trip = ADP8870_L2_COMP_CURR_uA(710), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1576 .l2_hyst = ADP8870_L2_COMP_CURR_uA(73), /* use L2_COMP_CURR_uA(I) 0 <= I <= 1106 uA */
1577 .l3_trip = ADP8870_L3_COMP_CURR_uA(389), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1578 .l3_hyst = ADP8870_L3_COMP_CURR_uA(54), /* use L3_COMP_CURR_uA(I) 0 <= I <= 551 uA */
1579 .l4_trip = ADP8870_L4_COMP_CURR_uA(167), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1580 .l4_hyst = ADP8870_L4_COMP_CURR_uA(16), /* use L4_COMP_CURR_uA(I) 0 <= I <= 275 uA */
1581 .l5_trip = ADP8870_L5_COMP_CURR_uA(43), /* use L5_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1582 .l5_hyst = ADP8870_L5_COMP_CURR_uA(11), /* use L6_COMP_CURR_uA(I) 0 <= I <= 138 uA */
1583
1584 .leds = adp8870_leds,
1585 .num_leds = ARRAY_SIZE(adp8870_leds),
1586 .led_fade_law = ADP8870_FADE_LAW_SQUARE, /* fade-on/fade-off transfer characteristic */
1587 .led_fade_in = ADP8870_FADE_T_600ms,
1588 .led_fade_out = ADP8870_FADE_T_600ms,
1589 .led_on_time = ADP8870_LED_ONT_200ms,
1590};
1591#endif
1592
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001593static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001594#if defined(CONFIG_INPUT_AD714X_I2C) || defined(CONFIG_INPUT_AD714X_I2C_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001595 {
Barry Song427f2772009-07-17 07:04:55 +00001596 I2C_BOARD_INFO("ad7142_captouch", 0x2C),
Barry Song4c94c3e2009-07-07 07:41:50 +00001597 .irq = IRQ_PG5,
Mike Frysinger5b7c5772009-10-12 15:56:58 +00001598 .platform_data = (void *)&ad7142_i2c_platform_data,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001599 },
1600#endif
Michael Hennerichebd58332009-07-02 11:00:38 +00001601#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001602 {
1603 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001604 },
1605#endif
Michael Hennerich204844e2009-06-30 14:57:22 +00001606#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001607 {
1608 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
Michael Hennerichf5150152008-10-16 23:23:18 +08001609 .irq = IRQ_PG6,
1610 },
1611#endif
1612#if defined(CONFIG_TOUCHSCREEN_AD7879_I2C) || defined(CONFIG_TOUCHSCREEN_AD7879_I2C_MODULE)
1613 {
1614 I2C_BOARD_INFO("ad7879", 0x2F),
1615 .irq = IRQ_PG5,
1616 .platform_data = (void *)&bfin_ad7879_ts_info,
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001617 },
1618#endif
Michael Hennerich51ed9ad2009-01-07 23:14:38 +08001619#if defined(CONFIG_KEYBOARD_ADP5588) || defined(CONFIG_KEYBOARD_ADP5588_MODULE)
1620 {
1621 I2C_BOARD_INFO("adp5588-keys", 0x34),
1622 .irq = IRQ_PG0,
1623 .platform_data = (void *)&adp5588_kpad_data,
1624 },
1625#endif
Michael Hennerich3ea57212009-03-28 22:15:07 +08001626#if defined(CONFIG_PMIC_ADP5520) || defined(CONFIG_PMIC_ADP5520_MODULE)
1627 {
1628 I2C_BOARD_INFO("pmic-adp5520", 0x32),
Mike Frysinger4f84b6e2009-06-10 20:45:48 -04001629 .irq = IRQ_PG0,
Michael Hennerich3ea57212009-03-28 22:15:07 +08001630 .platform_data = (void *)&adp5520_pdev_data,
1631 },
1632#endif
Michael Hennerichffc4d8b2009-05-29 15:41:18 +00001633#if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1634 {
1635 I2C_BOARD_INFO("adxl34x", 0x53),
1636 .irq = IRQ_PG3,
1637 .platform_data = (void *)&adxl34x_info,
1638 },
1639#endif
Michael Hennerichba877d42009-08-27 04:09:32 +00001640#if defined(CONFIG_GPIO_ADP5588) || defined(CONFIG_GPIO_ADP5588_MODULE)
1641 {
1642 I2C_BOARD_INFO("adp5588-gpio", 0x34),
1643 .platform_data = (void *)&adp5588_gpio_data,
1644 },
1645#endif
Michael Hennerich50c4c082009-09-22 13:10:09 +00001646#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
1647 {
1648 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
1649 },
1650#endif
Michael Hennerichddcd7cb2009-09-22 15:36:55 +00001651#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1652 {
1653 I2C_BOARD_INFO("bf537-lq035-ad5280", 0x2C),
1654 },
1655#endif
Michael Hennerich78756c62009-10-13 15:28:33 +00001656#if defined(CONFIG_BACKLIGHT_ADP8870) || defined(CONFIG_BACKLIGHT_ADP8870_MODULE)
1657 {
1658 I2C_BOARD_INFO("adp8870", 0x2B),
1659 .platform_data = (void *)&adp8870_pdata,
1660 },
1661#endif
Cliff Caid53127f2009-10-15 02:33:04 +00001662#if defined(CONFIG_SND_SOC_ADAU1371) || defined(CONFIG_SND_SOC_ADAU1371_MODULE)
1663 {
1664 I2C_BOARD_INFO("adau1371", 0x1A),
1665 },
1666#endif
Cliff Cai04267632009-10-28 06:50:36 +00001667#if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1668 {
1669 I2C_BOARD_INFO("adau1761", 0x38),
1670 },
1671#endif
Michael Hennerich1f13f2f2009-11-17 10:18:27 +00001672#if defined(CONFIG_AD525X_DPOT) || defined(CONFIG_AD525X_DPOT_MODULE)
1673 {
1674 I2C_BOARD_INFO("ad5258", 0x18),
1675 },
1676#endif
Cliff Cai29bb3bc2010-01-14 08:28:38 +00001677#if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1678 {
1679 I2C_BOARD_INFO("ssm2602", 0x1b),
1680 },
1681#endif
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001682};
Bryan Wu81d9c7f2008-03-26 10:02:13 +08001683
Bryan Wu1394f032007-05-06 14:50:22 -07001684#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00001685#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1686static struct resource bfin_sport0_uart_resources[] = {
1687 {
1688 .start = SPORT0_TCR1,
1689 .end = SPORT0_MRCS3+4,
1690 .flags = IORESOURCE_MEM,
1691 },
1692 {
1693 .start = IRQ_SPORT0_RX,
1694 .end = IRQ_SPORT0_RX+1,
1695 .flags = IORESOURCE_IRQ,
1696 },
1697 {
1698 .start = IRQ_SPORT0_ERROR,
1699 .end = IRQ_SPORT0_ERROR,
1700 .flags = IORESOURCE_IRQ,
1701 },
1702};
1703
1704unsigned short bfin_sport0_peripherals[] = {
1705 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
1706 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
1707};
1708
Bryan Wu1394f032007-05-06 14:50:22 -07001709static struct platform_device bfin_sport0_uart_device = {
1710 .name = "bfin-sport-uart",
1711 .id = 0,
Sonic Zhangdf5de262009-09-23 05:01:56 +00001712 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
1713 .resource = bfin_sport0_uart_resources,
1714 .dev = {
1715 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
1716 },
1717};
1718#endif
1719#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1720static struct resource bfin_sport1_uart_resources[] = {
1721 {
1722 .start = SPORT1_TCR1,
1723 .end = SPORT1_MRCS3+4,
1724 .flags = IORESOURCE_MEM,
1725 },
1726 {
1727 .start = IRQ_SPORT1_RX,
1728 .end = IRQ_SPORT1_RX+1,
1729 .flags = IORESOURCE_IRQ,
1730 },
1731 {
1732 .start = IRQ_SPORT1_ERROR,
1733 .end = IRQ_SPORT1_ERROR,
1734 .flags = IORESOURCE_IRQ,
1735 },
1736};
1737
1738unsigned short bfin_sport1_peripherals[] = {
1739 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
1740 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
Bryan Wu1394f032007-05-06 14:50:22 -07001741};
1742
1743static struct platform_device bfin_sport1_uart_device = {
1744 .name = "bfin-sport-uart",
1745 .id = 1,
Sonic Zhangdf5de262009-09-23 05:01:56 +00001746 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
1747 .resource = bfin_sport1_uart_resources,
1748 .dev = {
1749 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
1750 },
Bryan Wu1394f032007-05-06 14:50:22 -07001751};
1752#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00001753#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001754
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001755#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001756#define CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1757/* #define CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE */
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001758
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001759#ifdef CF_IDE_NAND_CARD_USE_HDD_INTERFACE
1760#define PATA_INT IRQ_PF5
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001761static struct pata_platform_info bfin_pata_platform_data = {
1762 .ioport_shift = 1,
Mike Frysinger64e5c512007-10-30 11:56:13 +08001763 .irq_flags = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001764};
1765
1766static struct resource bfin_pata_resources[] = {
1767 {
1768 .start = 0x20314020,
1769 .end = 0x2031403F,
1770 .flags = IORESOURCE_MEM,
1771 },
1772 {
1773 .start = 0x2031401C,
1774 .end = 0x2031401F,
1775 .flags = IORESOURCE_MEM,
1776 },
1777 {
1778 .start = PATA_INT,
1779 .end = PATA_INT,
1780 .flags = IORESOURCE_IRQ,
1781 },
1782};
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001783#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
1784static struct pata_platform_info bfin_pata_platform_data = {
1785 .ioport_shift = 0,
1786};
Michael Hennerich648882d2009-04-21 12:05:50 +00001787/* CompactFlash Storage Card Memory Mapped Adressing
1788 * /REG = A11 = 1
1789 */
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001790static struct resource bfin_pata_resources[] = {
1791 {
Michael Hennerich648882d2009-04-21 12:05:50 +00001792 .start = 0x20211800,
1793 .end = 0x20211807,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001794 .flags = IORESOURCE_MEM,
1795 },
1796 {
Michael Hennerich648882d2009-04-21 12:05:50 +00001797 .start = 0x2021180E, /* Device Ctl */
1798 .end = 0x2021180E,
Michael Hennerich2c8beb22009-03-28 22:13:43 +08001799 .flags = IORESOURCE_MEM,
1800 },
1801};
1802#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001803
1804static struct platform_device bfin_pata_device = {
1805 .name = "pata_platform",
1806 .id = -1,
1807 .num_resources = ARRAY_SIZE(bfin_pata_resources),
1808 .resource = bfin_pata_resources,
1809 .dev = {
1810 .platform_data = &bfin_pata_platform_data,
1811 }
1812};
1813#endif
1814
Michael Hennerich14b03202008-05-07 11:41:26 +08001815static const unsigned int cclk_vlev_datasheet[] =
1816{
1817 VRPAIR(VLEV_085, 250000000),
1818 VRPAIR(VLEV_090, 376000000),
1819 VRPAIR(VLEV_095, 426000000),
1820 VRPAIR(VLEV_100, 426000000),
1821 VRPAIR(VLEV_105, 476000000),
1822 VRPAIR(VLEV_110, 476000000),
1823 VRPAIR(VLEV_115, 476000000),
1824 VRPAIR(VLEV_120, 500000000),
1825 VRPAIR(VLEV_125, 533000000),
1826 VRPAIR(VLEV_130, 600000000),
1827};
1828
1829static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1830 .tuple_tab = cclk_vlev_datasheet,
1831 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1832 .vr_settling_time = 25 /* us */,
1833};
1834
1835static struct platform_device bfin_dpmc = {
1836 .name = "bfin dpmc",
1837 .dev = {
1838 .platform_data = &bfin_dmpc_vreg_data,
1839 },
1840};
1841
Barry Song83124402009-08-06 21:03:02 +00001842#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1843static struct platform_device bfin_tdm = {
1844 .name = "bfin-tdm",
1845 /* TODO: add platform data here */
1846};
1847#endif
1848
Bryan Wu1394f032007-05-06 14:50:22 -07001849static struct platform_device *stamp_devices[] __initdata = {
Michael Hennerich14b03202008-05-07 11:41:26 +08001850
1851 &bfin_dpmc,
1852
Bryan Wu1394f032007-05-06 14:50:22 -07001853#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
1854 &bfin_pcmcia_cf_device,
1855#endif
1856
1857#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1858 &rtc_device,
1859#endif
1860
1861#if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
1862 &sl811_hcd_device,
1863#endif
1864
1865#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
1866 &isp1362_hcd_device,
1867#endif
1868
Michael Hennerich3f375692008-11-18 17:48:22 +08001869#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1870 &bfin_isp1760_device,
1871#endif
1872
Bryan Wu1394f032007-05-06 14:50:22 -07001873#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
1874 &smc91x_device,
1875#endif
1876
Alex Landauf40d24d2007-07-12 12:11:48 +08001877#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
1878 &dm9000_device,
1879#endif
1880
Barry Song706a01b2009-11-02 07:29:07 +00001881#if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1882 &bfin_can_device,
1883#endif
1884
Bryan Wu1394f032007-05-06 14:50:22 -07001885#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
Graf Yang65319622009-02-04 16:49:45 +08001886 &bfin_mii_bus,
Bryan Wu1394f032007-05-06 14:50:22 -07001887 &bfin_mac_device,
1888#endif
1889
1890#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
1891 &net2272_bfin_device,
1892#endif
1893
1894#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001895 &bfin_spi0_device,
Bryan Wu1394f032007-05-06 14:50:22 -07001896#endif
1897
Cliff Cai1e9aa952009-03-28 23:28:51 +08001898#if defined(CONFIG_SPI_BFIN_SPORT) || defined(CONFIG_SPI_BFIN_SPORT_MODULE)
1899 &bfin_sport_spi0_device,
1900 &bfin_sport_spi1_device,
1901#endif
1902
Bryan Wu1394f032007-05-06 14:50:22 -07001903#if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
1904 &bfin_fb_device,
1905#endif
1906
Michael Hennerich2043f3f2008-10-13 14:46:30 +08001907#if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
1908 &bfin_lq035q1_device,
1909#endif
1910
Bryan Wu1394f032007-05-06 14:50:22 -07001911#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
Sonic Zhang6bd1fbe2009-09-09 10:46:19 +00001912#ifdef CONFIG_SERIAL_BFIN_UART0
1913 &bfin_uart0_device,
1914#endif
1915#ifdef CONFIG_SERIAL_BFIN_UART1
1916 &bfin_uart1_device,
1917#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001918#endif
1919
Graf Yang5be36d22008-04-25 03:09:15 +08001920#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
Graf Yang42bd8bc2009-01-07 23:14:39 +08001921#ifdef CONFIG_BFIN_SIR0
1922 &bfin_sir0_device,
1923#endif
1924#ifdef CONFIG_BFIN_SIR1
1925 &bfin_sir1_device,
1926#endif
Graf Yang5be36d22008-04-25 03:09:15 +08001927#endif
1928
Bryan Wu1394f032007-05-06 14:50:22 -07001929#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1930 &i2c_bfin_twi_device,
1931#endif
1932
1933#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
Sonic Zhangdf5de262009-09-23 05:01:56 +00001934#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
Bryan Wu1394f032007-05-06 14:50:22 -07001935 &bfin_sport0_uart_device,
Sonic Zhangdf5de262009-09-23 05:01:56 +00001936#endif
1937#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
Bryan Wu1394f032007-05-06 14:50:22 -07001938 &bfin_sport1_uart_device,
1939#endif
Sonic Zhangdf5de262009-09-23 05:01:56 +00001940#endif
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001941
1942#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
1943 &bfin_pata_device,
1944#endif
Michael Hennerich2463ef22008-01-27 16:49:48 +08001945
1946#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1947 &bfin_device_gpiokeys,
1948#endif
Mike Frysingercad2ab62008-02-22 17:01:31 +08001949
Mike Frysingerfc689112008-06-25 11:41:42 +08001950#if defined(CONFIG_MTD_NAND_PLATFORM) || defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
1951 &bfin_async_nand_device,
1952#endif
1953
Mike Frysinger793dc272008-03-26 08:09:12 +08001954#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
Mike Frysingerde8c43f2008-01-24 17:14:04 +08001955 &stamp_flash_device,
Mike Frysinger793dc272008-03-26 08:09:12 +08001956#endif
Barry Song83124402009-08-06 21:03:02 +00001957
1958#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
1959 &bfin_tdm,
1960#endif
Bryan Wu1394f032007-05-06 14:50:22 -07001961};
1962
1963static int __init stamp_init(void)
1964{
Harvey Harrisonb85d8582008-04-23 09:39:01 +08001965 printk(KERN_INFO "%s(): registering device resources\n", __func__);
Mike Frysingerfc689112008-06-25 11:41:42 +08001966 bfin_plat_nand_init();
Bryan Wu1394f032007-05-06 14:50:22 -07001967 platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
Sonic Zhangdf5de262009-09-23 05:01:56 +00001968 i2c_register_board_info(0, bfin_i2c_board_info,
1969 ARRAY_SIZE(bfin_i2c_board_info));
Mike Frysinger5bda2722008-06-07 15:03:01 +08001970 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001971
Bryan Wu1394f032007-05-06 14:50:22 -07001972 return 0;
1973}
1974
1975arch_initcall(stamp_init);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08001976
Sonic Zhangc13ce9f2009-09-23 09:37:46 +00001977
1978static struct platform_device *stamp_early_devices[] __initdata = {
1979#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1980#ifdef CONFIG_SERIAL_BFIN_UART0
1981 &bfin_uart0_device,
1982#endif
1983#ifdef CONFIG_SERIAL_BFIN_UART1
1984 &bfin_uart1_device,
1985#endif
1986#endif
1987
1988#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1989#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1990 &bfin_sport0_uart_device,
1991#endif
1992#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1993 &bfin_sport1_uart_device,
1994#endif
1995#endif
1996};
1997
1998void __init native_machine_early_platform_add_devices(void)
1999{
2000 printk(KERN_INFO "register early platform devices\n");
2001 early_platform_add_devices(stamp_early_devices,
2002 ARRAY_SIZE(stamp_early_devices));
2003}
2004
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002005void native_machine_restart(char *cmd)
2006{
2007 /* workaround reboot hang when booting from SPI */
2008 if ((bfin_read_SYSCR() & 0x7) == 0x3)
Sonic Zhangb52dae32009-02-04 16:49:45 +08002009 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
Bryan Wuc6c4d7b2007-10-11 01:20:06 +08002010}
Mike Frysinger137b1522007-11-22 16:07:03 +08002011
2012/*
2013 * Currently the MAC address is saved in Flash by U-Boot
2014 */
2015#define FLASH_MAC 0x203f0000
Mike Frysinger9862cc52007-11-15 21:21:20 +08002016void bfin_get_ether_addr(char *addr)
Mike Frysinger137b1522007-11-22 16:07:03 +08002017{
2018 *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
2019 *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
2020}
Mike Frysinger9862cc52007-11-15 21:21:20 +08002021EXPORT_SYMBOL(bfin_get_ether_addr);