| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 1 | /******************************************************************************* | 
|  | 2 |  | 
|  | 3 | Intel 10 Gigabit PCI Express Linux driver | 
| Emil Tantilov | 3a338cb | 2010-10-20 22:59:40 +0000 | [diff] [blame] | 4 | Copyright(c) 1999 - 2010 Intel Corporation. | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 5 |  | 
|  | 6 | This program is free software; you can redistribute it and/or modify it | 
|  | 7 | under the terms and conditions of the GNU General Public License, | 
|  | 8 | version 2, as published by the Free Software Foundation. | 
|  | 9 |  | 
|  | 10 | This program is distributed in the hope it will be useful, but WITHOUT | 
|  | 11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | 
|  | 12 | FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for | 
|  | 13 | more details. | 
|  | 14 |  | 
|  | 15 | You should have received a copy of the GNU General Public License along with | 
|  | 16 | this program; if not, write to the Free Software Foundation, Inc., | 
|  | 17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | 
|  | 18 |  | 
|  | 19 | The full GNU General Public License is included in this distribution in | 
|  | 20 | the file called "COPYING". | 
|  | 21 |  | 
|  | 22 | Contact Information: | 
|  | 23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | 
|  | 24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | 
|  | 25 |  | 
|  | 26 | *******************************************************************************/ | 
|  | 27 |  | 
|  | 28 | #include <linux/pci.h> | 
|  | 29 | #include <linux/delay.h> | 
|  | 30 | #include "ixgbe_type.h" | 
|  | 31 | #include "ixgbe_common.h" | 
|  | 32 | #include "ixgbe_mbx.h" | 
|  | 33 |  | 
|  | 34 | /** | 
|  | 35 | *  ixgbe_read_mbx - Reads a message from the mailbox | 
|  | 36 | *  @hw: pointer to the HW structure | 
|  | 37 | *  @msg: The message buffer | 
|  | 38 | *  @size: Length of buffer | 
|  | 39 | *  @mbx_id: id of mailbox to read | 
|  | 40 | * | 
|  | 41 | *  returns SUCCESS if it successfuly read message from buffer | 
|  | 42 | **/ | 
|  | 43 | s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) | 
|  | 44 | { | 
|  | 45 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 46 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 47 |  | 
|  | 48 | /* limit read to size of mailbox */ | 
|  | 49 | if (size > mbx->size) | 
|  | 50 | size = mbx->size; | 
|  | 51 |  | 
|  | 52 | if (mbx->ops.read) | 
|  | 53 | ret_val = mbx->ops.read(hw, msg, size, mbx_id); | 
|  | 54 |  | 
|  | 55 | return ret_val; | 
|  | 56 | } | 
|  | 57 |  | 
|  | 58 | /** | 
|  | 59 | *  ixgbe_write_mbx - Write a message to the mailbox | 
|  | 60 | *  @hw: pointer to the HW structure | 
|  | 61 | *  @msg: The message buffer | 
|  | 62 | *  @size: Length of buffer | 
|  | 63 | *  @mbx_id: id of mailbox to write | 
|  | 64 | * | 
|  | 65 | *  returns SUCCESS if it successfully copied message into the buffer | 
|  | 66 | **/ | 
|  | 67 | s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id) | 
|  | 68 | { | 
|  | 69 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 70 | s32 ret_val = 0; | 
|  | 71 |  | 
|  | 72 | if (size > mbx->size) | 
|  | 73 | ret_val = IXGBE_ERR_MBX; | 
|  | 74 |  | 
|  | 75 | else if (mbx->ops.write) | 
|  | 76 | ret_val = mbx->ops.write(hw, msg, size, mbx_id); | 
|  | 77 |  | 
|  | 78 | return ret_val; | 
|  | 79 | } | 
|  | 80 |  | 
|  | 81 | /** | 
|  | 82 | *  ixgbe_check_for_msg - checks to see if someone sent us mail | 
|  | 83 | *  @hw: pointer to the HW structure | 
|  | 84 | *  @mbx_id: id of mailbox to check | 
|  | 85 | * | 
|  | 86 | *  returns SUCCESS if the Status bit was found or else ERR_MBX | 
|  | 87 | **/ | 
|  | 88 | s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id) | 
|  | 89 | { | 
|  | 90 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 91 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 92 |  | 
|  | 93 | if (mbx->ops.check_for_msg) | 
|  | 94 | ret_val = mbx->ops.check_for_msg(hw, mbx_id); | 
|  | 95 |  | 
|  | 96 | return ret_val; | 
|  | 97 | } | 
|  | 98 |  | 
|  | 99 | /** | 
|  | 100 | *  ixgbe_check_for_ack - checks to see if someone sent us ACK | 
|  | 101 | *  @hw: pointer to the HW structure | 
|  | 102 | *  @mbx_id: id of mailbox to check | 
|  | 103 | * | 
|  | 104 | *  returns SUCCESS if the Status bit was found or else ERR_MBX | 
|  | 105 | **/ | 
|  | 106 | s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id) | 
|  | 107 | { | 
|  | 108 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 109 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 110 |  | 
|  | 111 | if (mbx->ops.check_for_ack) | 
|  | 112 | ret_val = mbx->ops.check_for_ack(hw, mbx_id); | 
|  | 113 |  | 
|  | 114 | return ret_val; | 
|  | 115 | } | 
|  | 116 |  | 
|  | 117 | /** | 
|  | 118 | *  ixgbe_check_for_rst - checks to see if other side has reset | 
|  | 119 | *  @hw: pointer to the HW structure | 
|  | 120 | *  @mbx_id: id of mailbox to check | 
|  | 121 | * | 
|  | 122 | *  returns SUCCESS if the Status bit was found or else ERR_MBX | 
|  | 123 | **/ | 
|  | 124 | s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id) | 
|  | 125 | { | 
|  | 126 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 127 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 128 |  | 
|  | 129 | if (mbx->ops.check_for_rst) | 
|  | 130 | ret_val = mbx->ops.check_for_rst(hw, mbx_id); | 
|  | 131 |  | 
|  | 132 | return ret_val; | 
|  | 133 | } | 
|  | 134 |  | 
|  | 135 | /** | 
|  | 136 | *  ixgbe_poll_for_msg - Wait for message notification | 
|  | 137 | *  @hw: pointer to the HW structure | 
|  | 138 | *  @mbx_id: id of mailbox to write | 
|  | 139 | * | 
|  | 140 | *  returns SUCCESS if it successfully received a message notification | 
|  | 141 | **/ | 
|  | 142 | static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id) | 
|  | 143 | { | 
|  | 144 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 145 | int countdown = mbx->timeout; | 
|  | 146 |  | 
|  | 147 | if (!countdown || !mbx->ops.check_for_msg) | 
|  | 148 | goto out; | 
|  | 149 |  | 
|  | 150 | while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) { | 
|  | 151 | countdown--; | 
|  | 152 | if (!countdown) | 
|  | 153 | break; | 
|  | 154 | udelay(mbx->usec_delay); | 
|  | 155 | } | 
|  | 156 |  | 
|  | 157 | /* if we failed, all future posted messages fail until reset */ | 
|  | 158 | if (!countdown) | 
|  | 159 | mbx->timeout = 0; | 
|  | 160 | out: | 
|  | 161 | return countdown ? 0 : IXGBE_ERR_MBX; | 
|  | 162 | } | 
|  | 163 |  | 
|  | 164 | /** | 
|  | 165 | *  ixgbe_poll_for_ack - Wait for message acknowledgement | 
|  | 166 | *  @hw: pointer to the HW structure | 
|  | 167 | *  @mbx_id: id of mailbox to write | 
|  | 168 | * | 
|  | 169 | *  returns SUCCESS if it successfully received a message acknowledgement | 
|  | 170 | **/ | 
|  | 171 | static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id) | 
|  | 172 | { | 
|  | 173 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 174 | int countdown = mbx->timeout; | 
|  | 175 |  | 
|  | 176 | if (!countdown || !mbx->ops.check_for_ack) | 
|  | 177 | goto out; | 
|  | 178 |  | 
|  | 179 | while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) { | 
|  | 180 | countdown--; | 
|  | 181 | if (!countdown) | 
|  | 182 | break; | 
|  | 183 | udelay(mbx->usec_delay); | 
|  | 184 | } | 
|  | 185 |  | 
|  | 186 | /* if we failed, all future posted messages fail until reset */ | 
|  | 187 | if (!countdown) | 
|  | 188 | mbx->timeout = 0; | 
|  | 189 | out: | 
|  | 190 | return countdown ? 0 : IXGBE_ERR_MBX; | 
|  | 191 | } | 
|  | 192 |  | 
|  | 193 | /** | 
|  | 194 | *  ixgbe_read_posted_mbx - Wait for message notification and receive message | 
|  | 195 | *  @hw: pointer to the HW structure | 
|  | 196 | *  @msg: The message buffer | 
|  | 197 | *  @size: Length of buffer | 
|  | 198 | *  @mbx_id: id of mailbox to write | 
|  | 199 | * | 
|  | 200 | *  returns SUCCESS if it successfully received a message notification and | 
|  | 201 | *  copied it into the receive buffer. | 
|  | 202 | **/ | 
| Emil Tantilov | 5d5b7c3 | 2010-10-12 22:20:59 +0000 | [diff] [blame] | 203 | static s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, | 
|  | 204 | u16 mbx_id) | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 205 | { | 
|  | 206 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 207 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 208 |  | 
|  | 209 | if (!mbx->ops.read) | 
|  | 210 | goto out; | 
|  | 211 |  | 
|  | 212 | ret_val = ixgbe_poll_for_msg(hw, mbx_id); | 
|  | 213 |  | 
|  | 214 | /* if ack received read message, otherwise we timed out */ | 
|  | 215 | if (!ret_val) | 
|  | 216 | ret_val = mbx->ops.read(hw, msg, size, mbx_id); | 
|  | 217 | out: | 
|  | 218 | return ret_val; | 
|  | 219 | } | 
|  | 220 |  | 
|  | 221 | /** | 
|  | 222 | *  ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack | 
|  | 223 | *  @hw: pointer to the HW structure | 
|  | 224 | *  @msg: The message buffer | 
|  | 225 | *  @size: Length of buffer | 
|  | 226 | *  @mbx_id: id of mailbox to write | 
|  | 227 | * | 
|  | 228 | *  returns SUCCESS if it successfully copied message into the buffer and | 
|  | 229 | *  received an ack to that message within delay * timeout period | 
|  | 230 | **/ | 
| Emil Tantilov | 5d5b7c3 | 2010-10-12 22:20:59 +0000 | [diff] [blame] | 231 | static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 232 | u16 mbx_id) | 
|  | 233 | { | 
|  | 234 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 235 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 236 |  | 
|  | 237 | /* exit if either we can't write or there isn't a defined timeout */ | 
|  | 238 | if (!mbx->ops.write || !mbx->timeout) | 
|  | 239 | goto out; | 
|  | 240 |  | 
|  | 241 | /* send msg */ | 
|  | 242 | ret_val = mbx->ops.write(hw, msg, size, mbx_id); | 
|  | 243 |  | 
|  | 244 | /* if msg sent wait until we receive an ack */ | 
|  | 245 | if (!ret_val) | 
|  | 246 | ret_val = ixgbe_poll_for_ack(hw, mbx_id); | 
|  | 247 | out: | 
|  | 248 | return ret_val; | 
|  | 249 | } | 
|  | 250 |  | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 251 | static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index) | 
|  | 252 | { | 
|  | 253 | u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index)); | 
|  | 254 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 255 |  | 
|  | 256 | if (mbvficr & mask) { | 
|  | 257 | ret_val = 0; | 
|  | 258 | IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask); | 
|  | 259 | } | 
|  | 260 |  | 
|  | 261 | return ret_val; | 
|  | 262 | } | 
|  | 263 |  | 
|  | 264 | /** | 
|  | 265 | *  ixgbe_check_for_msg_pf - checks to see if the VF has sent mail | 
|  | 266 | *  @hw: pointer to the HW structure | 
|  | 267 | *  @vf_number: the VF index | 
|  | 268 | * | 
|  | 269 | *  returns SUCCESS if the VF has set the Status bit or else ERR_MBX | 
|  | 270 | **/ | 
|  | 271 | static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number) | 
|  | 272 | { | 
|  | 273 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 274 | s32 index = IXGBE_MBVFICR_INDEX(vf_number); | 
|  | 275 | u32 vf_bit = vf_number % 16; | 
|  | 276 |  | 
|  | 277 | if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit, | 
|  | 278 | index)) { | 
|  | 279 | ret_val = 0; | 
|  | 280 | hw->mbx.stats.reqs++; | 
|  | 281 | } | 
|  | 282 |  | 
|  | 283 | return ret_val; | 
|  | 284 | } | 
|  | 285 |  | 
|  | 286 | /** | 
|  | 287 | *  ixgbe_check_for_ack_pf - checks to see if the VF has ACKed | 
|  | 288 | *  @hw: pointer to the HW structure | 
|  | 289 | *  @vf_number: the VF index | 
|  | 290 | * | 
|  | 291 | *  returns SUCCESS if the VF has set the Status bit or else ERR_MBX | 
|  | 292 | **/ | 
|  | 293 | static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number) | 
|  | 294 | { | 
|  | 295 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 296 | s32 index = IXGBE_MBVFICR_INDEX(vf_number); | 
|  | 297 | u32 vf_bit = vf_number % 16; | 
|  | 298 |  | 
|  | 299 | if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit, | 
|  | 300 | index)) { | 
|  | 301 | ret_val = 0; | 
|  | 302 | hw->mbx.stats.acks++; | 
|  | 303 | } | 
|  | 304 |  | 
|  | 305 | return ret_val; | 
|  | 306 | } | 
|  | 307 |  | 
|  | 308 | /** | 
|  | 309 | *  ixgbe_check_for_rst_pf - checks to see if the VF has reset | 
|  | 310 | *  @hw: pointer to the HW structure | 
|  | 311 | *  @vf_number: the VF index | 
|  | 312 | * | 
|  | 313 | *  returns SUCCESS if the VF has set the Status bit or else ERR_MBX | 
|  | 314 | **/ | 
|  | 315 | static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number) | 
|  | 316 | { | 
|  | 317 | u32 reg_offset = (vf_number < 32) ? 0 : 1; | 
|  | 318 | u32 vf_shift = vf_number % 32; | 
|  | 319 | u32 vflre = 0; | 
|  | 320 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 321 |  | 
| Don Skidmore | b93a222 | 2010-11-16 19:27:17 -0800 | [diff] [blame] | 322 | switch (hw->mac.type) { | 
|  | 323 | case ixgbe_mac_82599EB: | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 324 | vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset)); | 
| Don Skidmore | b93a222 | 2010-11-16 19:27:17 -0800 | [diff] [blame] | 325 | break; | 
| Greg Rose | 3377eba | 2010-12-07 08:16:45 +0000 | [diff] [blame] | 326 | case ixgbe_mac_X540: | 
|  | 327 | vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset)); | 
|  | 328 | break; | 
| Don Skidmore | b93a222 | 2010-11-16 19:27:17 -0800 | [diff] [blame] | 329 | default: | 
|  | 330 | break; | 
|  | 331 | } | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 332 |  | 
|  | 333 | if (vflre & (1 << vf_shift)) { | 
|  | 334 | ret_val = 0; | 
|  | 335 | IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift)); | 
|  | 336 | hw->mbx.stats.rsts++; | 
|  | 337 | } | 
|  | 338 |  | 
|  | 339 | return ret_val; | 
|  | 340 | } | 
|  | 341 |  | 
|  | 342 | /** | 
|  | 343 | *  ixgbe_obtain_mbx_lock_pf - obtain mailbox lock | 
|  | 344 | *  @hw: pointer to the HW structure | 
|  | 345 | *  @vf_number: the VF index | 
|  | 346 | * | 
|  | 347 | *  return SUCCESS if we obtained the mailbox lock | 
|  | 348 | **/ | 
|  | 349 | static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number) | 
|  | 350 | { | 
|  | 351 | s32 ret_val = IXGBE_ERR_MBX; | 
|  | 352 | u32 p2v_mailbox; | 
|  | 353 |  | 
|  | 354 | /* Take ownership of the buffer */ | 
|  | 355 | IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU); | 
|  | 356 |  | 
|  | 357 | /* reserve mailbox for vf use */ | 
|  | 358 | p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number)); | 
|  | 359 | if (p2v_mailbox & IXGBE_PFMAILBOX_PFU) | 
|  | 360 | ret_val = 0; | 
|  | 361 |  | 
|  | 362 | return ret_val; | 
|  | 363 | } | 
|  | 364 |  | 
|  | 365 | /** | 
|  | 366 | *  ixgbe_write_mbx_pf - Places a message in the mailbox | 
|  | 367 | *  @hw: pointer to the HW structure | 
|  | 368 | *  @msg: The message buffer | 
|  | 369 | *  @size: Length of buffer | 
|  | 370 | *  @vf_number: the VF index | 
|  | 371 | * | 
|  | 372 | *  returns SUCCESS if it successfully copied message into the buffer | 
|  | 373 | **/ | 
|  | 374 | static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, | 
|  | 375 | u16 vf_number) | 
|  | 376 | { | 
|  | 377 | s32 ret_val; | 
|  | 378 | u16 i; | 
|  | 379 |  | 
|  | 380 | /* lock the mailbox to prevent pf/vf race condition */ | 
|  | 381 | ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number); | 
|  | 382 | if (ret_val) | 
|  | 383 | goto out_no_write; | 
|  | 384 |  | 
|  | 385 | /* flush msg and acks as we are overwriting the message buffer */ | 
|  | 386 | ixgbe_check_for_msg_pf(hw, vf_number); | 
|  | 387 | ixgbe_check_for_ack_pf(hw, vf_number); | 
|  | 388 |  | 
|  | 389 | /* copy the caller specified message to the mailbox memory buffer */ | 
|  | 390 | for (i = 0; i < size; i++) | 
|  | 391 | IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]); | 
|  | 392 |  | 
|  | 393 | /* Interrupt VF to tell it a message has been sent and release buffer*/ | 
|  | 394 | IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS); | 
|  | 395 |  | 
|  | 396 | /* update stats */ | 
|  | 397 | hw->mbx.stats.msgs_tx++; | 
|  | 398 |  | 
|  | 399 | out_no_write: | 
|  | 400 | return ret_val; | 
|  | 401 |  | 
|  | 402 | } | 
|  | 403 |  | 
|  | 404 | /** | 
|  | 405 | *  ixgbe_read_mbx_pf - Read a message from the mailbox | 
|  | 406 | *  @hw: pointer to the HW structure | 
|  | 407 | *  @msg: The message buffer | 
|  | 408 | *  @size: Length of buffer | 
|  | 409 | *  @vf_number: the VF index | 
|  | 410 | * | 
|  | 411 | *  This function copies a message from the mailbox buffer to the caller's | 
|  | 412 | *  memory buffer.  The presumption is that the caller knows that there was | 
|  | 413 | *  a message due to a VF request so no polling for message is needed. | 
|  | 414 | **/ | 
|  | 415 | static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size, | 
|  | 416 | u16 vf_number) | 
|  | 417 | { | 
|  | 418 | s32 ret_val; | 
|  | 419 | u16 i; | 
|  | 420 |  | 
|  | 421 | /* lock the mailbox to prevent pf/vf race condition */ | 
|  | 422 | ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number); | 
|  | 423 | if (ret_val) | 
|  | 424 | goto out_no_read; | 
|  | 425 |  | 
|  | 426 | /* copy the message to the mailbox memory buffer */ | 
|  | 427 | for (i = 0; i < size; i++) | 
|  | 428 | msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i); | 
|  | 429 |  | 
|  | 430 | /* Acknowledge the message and release buffer */ | 
|  | 431 | IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK); | 
|  | 432 |  | 
|  | 433 | /* update stats */ | 
|  | 434 | hw->mbx.stats.msgs_rx++; | 
|  | 435 |  | 
|  | 436 | out_no_read: | 
|  | 437 | return ret_val; | 
|  | 438 | } | 
|  | 439 |  | 
|  | 440 | /** | 
|  | 441 | *  ixgbe_init_mbx_params_pf - set initial values for pf mailbox | 
|  | 442 | *  @hw: pointer to the HW structure | 
|  | 443 | * | 
|  | 444 | *  Initializes the hw->mbx struct to correct values for pf mailbox | 
|  | 445 | */ | 
|  | 446 | void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw) | 
|  | 447 | { | 
|  | 448 | struct ixgbe_mbx_info *mbx = &hw->mbx; | 
|  | 449 |  | 
| Don Skidmore | b93a222 | 2010-11-16 19:27:17 -0800 | [diff] [blame] | 450 | switch (hw->mac.type) { | 
|  | 451 | case ixgbe_mac_82599EB: | 
|  | 452 | case ixgbe_mac_X540: | 
|  | 453 | mbx->timeout = 0; | 
|  | 454 | mbx->usec_delay = 0; | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 455 |  | 
| Don Skidmore | b93a222 | 2010-11-16 19:27:17 -0800 | [diff] [blame] | 456 | mbx->size = IXGBE_VFMAILBOX_SIZE; | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 457 |  | 
| Don Skidmore | b93a222 | 2010-11-16 19:27:17 -0800 | [diff] [blame] | 458 | mbx->stats.msgs_tx = 0; | 
|  | 459 | mbx->stats.msgs_rx = 0; | 
|  | 460 | mbx->stats.reqs = 0; | 
|  | 461 | mbx->stats.acks = 0; | 
|  | 462 | mbx->stats.rsts = 0; | 
|  | 463 | break; | 
|  | 464 | default: | 
|  | 465 | break; | 
|  | 466 | } | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 467 | } | 
|  | 468 |  | 
| Don Skidmore | a391f1d | 2010-11-16 19:27:15 -0800 | [diff] [blame] | 469 | struct ixgbe_mbx_operations mbx_ops_generic = { | 
| Greg Rose | 10ca132 | 2010-01-09 02:25:10 +0000 | [diff] [blame] | 470 | .read                   = ixgbe_read_mbx_pf, | 
|  | 471 | .write                  = ixgbe_write_mbx_pf, | 
|  | 472 | .read_posted            = ixgbe_read_posted_mbx, | 
|  | 473 | .write_posted           = ixgbe_write_posted_mbx, | 
|  | 474 | .check_for_msg          = ixgbe_check_for_msg_pf, | 
|  | 475 | .check_for_ack          = ixgbe_check_for_ack_pf, | 
|  | 476 | .check_for_rst          = ixgbe_check_for_rst_pf, | 
|  | 477 | }; | 
|  | 478 |  |