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Shubhraprakash Daseb6df1d2012-05-01 00:55:35 -06001/* Copyright (c) 2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
13#ifndef __KGSL_IOMMU_H
14#define __KGSL_IOMMU_H
15
16#include <mach/iommu.h>
17
Shubhraprakash Das2b8716b2012-05-04 16:58:40 -060018/* IOMMU registers and masks */
19#define KGSL_IOMMU_TTBR0 0x10
20#define KGSL_IOMMU_TTBR1 0x14
21#define KGSL_IOMMU_TTBR0_PA_MASK 0x0003FFFF
22#define KGSL_IOMMU_TTBR0_PA_SHIFT 14
23#define KGSL_IOMMU_CTX_TLBIALL 0x800
24#define KGSL_IOMMU_CONTEXTIDR 0x8
25#define KGSL_IOMMU_CONTEXTIDR_ASID_MASK 0xFF
26#define KGSL_IOMMU_CONTEXTIDR_ASID_SHIFT 0
27#define KGSL_IOMMU_CTX_TLBIASID 0x804
28#define KGSL_IOMMU_CTX_SHIFT 12
Shubhraprakash Daseb6df1d2012-05-01 00:55:35 -060029/*
30 * Max number of iommu units that the gpu core can have
31 * On APQ8064, KGSL can control a maximum of 2 IOMMU units.
32 */
33#define KGSL_IOMMU_MAX_UNITS 2
34
35/* Max number of iommu contexts per IOMMU unit */
36#define KGSL_IOMMU_MAX_DEVS_PER_UNIT 2
37
38/*
39 * struct kgsl_iommu_device - Structure holding data about iommu contexts
40 * @dev: Device pointer to iommu context
41 * @attached: Indicates whether this iommu context is presently attached to
42 * a pagetable/domain or not
43 * @pt_lsb: The LSB of IOMMU_TTBR0 register which is the pagetable
44 * register
45 * @ctx_id: This iommu units context id. It can be either 0 or 1
46 * @clk_enabled: If set indicates that iommu clocks of this iommu context
47 * are on, else the clocks are off
48 */
49struct kgsl_iommu_device {
50 struct device *dev;
51 bool attached;
52 unsigned int pt_lsb;
53 enum kgsl_iommu_context_id ctx_id;
54 bool clk_enabled;
55};
56
57/*
58 * struct kgsl_iommu_unit - Structure holding data about iommu units. An IOMMU
59 * units is basically a separte IOMMU h/w block with it's own IOMMU contexts
60 * @dev: Pointer to array of struct kgsl_iommu_device which has information
61 * about the IOMMU contexts under this IOMMU unit
62 * @dev_count: Number of IOMMU contexts that are valid in the previous feild
63 * @reg_map: Memory descriptor which holds the mapped address of this IOMMU
64 * units register range
65 */
66struct kgsl_iommu_unit {
67 struct kgsl_iommu_device dev[KGSL_IOMMU_MAX_DEVS_PER_UNIT];
68 unsigned int dev_count;
69 struct kgsl_memdesc reg_map;
70};
71
72/*
73 * struct kgsl_iommu - Structure holding iommu data for kgsl driver
74 * @dev: Array of kgsl_iommu_device which contain information about
75 * iommu contexts owned by graphics cores
76 * @unit_count: Number of IOMMU units that are available for this
77 * instance of the IOMMU driver
78 * @iommu_last_cmd_ts: The timestamp of last command submitted that
79 * aceeses iommu registers
80 * @device: Pointer to kgsl device
81 * @asids: A bit structure indicating which id's are presently used
82 * @asid: Contains the initial value of IOMMU_CONTEXTIDR when a domain
83 * is first attached
84 */
85struct kgsl_iommu {
86 struct kgsl_iommu_unit iommu_units[KGSL_IOMMU_MAX_UNITS];
87 unsigned int unit_count;
88 unsigned int iommu_last_cmd_ts;
89 struct kgsl_device *device;
90 unsigned long *asids;
91 unsigned int asid;
92 unsigned int active_ctx;
93};
94
95#endif