| Mauro Carvalho Chehab | 2ba890e | 2008-04-17 21:42:58 -0300 | [diff] [blame^] | 1 | #define EM_GPIO_0 (1 << 0) |
| 2 | #define EM_GPIO_1 (1 << 1) |
| 3 | #define EM_GPIO_2 (1 << 2) |
| 4 | #define EM_GPIO_3 (1 << 3) |
| 5 | #define EM_GPIO_4 (1 << 4) |
| 6 | #define EM_GPIO_5 (1 << 5) |
| 7 | #define EM_GPIO_6 (1 << 6) |
| 8 | #define EM_GPIO_7 (1 << 7) |
| 9 | |
| 10 | #define EM_GPO_0 (1 << 0) |
| 11 | #define EM_GPO_1 (1 << 1) |
| 12 | #define EM_GPO_2 (1 << 2) |
| 13 | #define EM_GPO_3 (1 << 3) |
| 14 | |
| 15 | /* em2800 registers */ |
| 16 | #define EM2800_AUDIOSRC_REG 0x08 |
| 17 | |
| 18 | /* em28xx registers */ |
| 19 | |
| 20 | /* GPIO/GPO registers */ |
| 21 | #define EM_R04_GPO 0x04 /* em2880-em2883 only */ |
| 22 | #define EM_R08_GPIO 0x08 /* em2820 or upper */ |
| 23 | |
| 24 | #define I2C_CLK_REG 0x06 |
| 25 | #define CHIPID_REG 0x0a |
| 26 | #define USBSUSP_REG 0x0c /* */ |
| 27 | |
| 28 | #define AUDIOSRC_REG 0x0e |
| 29 | #define XCLK_REG 0x0f |
| 30 | |
| 31 | #define VINMODE_REG 0x10 |
| 32 | #define VINCTRL_REG 0x11 |
| 33 | #define VINENABLE_REG 0x12 /* */ |
| 34 | |
| 35 | #define GAMMA_REG 0x14 |
| 36 | #define RGAIN_REG 0x15 |
| 37 | #define GGAIN_REG 0x16 |
| 38 | #define BGAIN_REG 0x17 |
| 39 | #define ROFFSET_REG 0x18 |
| 40 | #define GOFFSET_REG 0x19 |
| 41 | #define BOFFSET_REG 0x1a |
| 42 | |
| 43 | #define OFLOW_REG 0x1b |
| 44 | #define HSTART_REG 0x1c |
| 45 | #define VSTART_REG 0x1d |
| 46 | #define CWIDTH_REG 0x1e |
| 47 | #define CHEIGHT_REG 0x1f |
| 48 | |
| 49 | #define YGAIN_REG 0x20 |
| 50 | #define YOFFSET_REG 0x21 |
| 51 | #define UVGAIN_REG 0x22 |
| 52 | #define UOFFSET_REG 0x23 |
| 53 | #define VOFFSET_REG 0x24 |
| 54 | #define SHARPNESS_REG 0x25 |
| 55 | |
| 56 | #define COMPR_REG 0x26 |
| 57 | #define OUTFMT_REG 0x27 |
| 58 | |
| 59 | #define XMIN_REG 0x28 |
| 60 | #define XMAX_REG 0x29 |
| 61 | #define YMIN_REG 0x2a |
| 62 | #define YMAX_REG 0x2b |
| 63 | |
| 64 | #define HSCALELOW_REG 0x30 |
| 65 | #define HSCALEHIGH_REG 0x31 |
| 66 | #define VSCALELOW_REG 0x32 |
| 67 | #define VSCALEHIGH_REG 0x33 |
| 68 | |
| 69 | #define AC97LSB_REG 0x40 |
| 70 | #define AC97MSB_REG 0x41 |
| 71 | #define AC97ADDR_REG 0x42 |
| 72 | #define AC97BUSY_REG 0x43 |
| 73 | |
| 74 | /* em202 registers */ |
| 75 | #define MASTER_AC97 0x02 |
| 76 | #define LINE_IN_AC97 0x10 |
| 77 | #define VIDEO_AC97 0x14 |
| 78 | |
| 79 | /* register settings */ |
| 80 | #define EM2800_AUDIO_SRC_TUNER 0x0d |
| 81 | #define EM2800_AUDIO_SRC_LINE 0x0c |
| 82 | #define EM28XX_AUDIO_SRC_TUNER 0xc0 |
| 83 | #define EM28XX_AUDIO_SRC_LINE 0x80 |
| 84 | |
| 85 | /* FIXME: Need to be populated with the other chip ID's */ |
| 86 | enum em28xx_chip_id { |
| 87 | CHIP_ID_EM2883 = 36, |
| 88 | }; |