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review.evervolv.com / android_kernel_htc_msm8960 / 2bcb2b641a8f1524f7a9801eb9e52a00b8f18c6e / . / drivers / net / sfc / falcon_gmac.c
blob: 7dadfcbd6ce7e75e8c22a1e3a6a4ce89de1ce21e [file] [log] [blame]
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
Ben Hutchings906bb262009-11-29 15:16:19 +0000[diff] [blame]4 * Copyright 2006-2009 Solarflare Communications Inc.
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#include <linux/delay.h>
12#include "net_driver.h"
13#include "efx.h"
Ben Hutchings744093c2009-11-29 15:12:08 +0000[diff] [blame]14#include "nic.h"
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]15#include "mac.h"
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]16#include "regs.h"
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]17#include "io.h"
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]18
19/**************************************************************************
20 *
21 * MAC operations
22 *
23 *************************************************************************/
24
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000[diff] [blame]25static int falcon_reconfigure_gmac(struct efx_nic *efx)
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]26{
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000[diff] [blame]27 struct efx_link_state *link_state = &efx->link_state;
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]28 bool loopback, tx_fc, rx_fc, bytemode;
29 int if_mode;
30 unsigned int max_frame_len;
31 efx_oword_t reg;
32
33 /* Configuration register 1 */
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000[diff] [blame]34 tx_fc = (link_state->fc & EFX_FC_TX) || !link_state->fd;
35 rx_fc = !!(link_state->fc & EFX_FC_RX);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]36 loopback = (efx->loopback_mode == LOOPBACK_GMAC);
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000[diff] [blame]37 bytemode = (link_state->speed == 1000);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]38
39 EFX_POPULATE_OWORD_5(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]40 FRF_AB_GM_LOOP, loopback,
41 FRF_AB_GM_TX_EN, 1,
42 FRF_AB_GM_TX_FC_EN, tx_fc,
43 FRF_AB_GM_RX_EN, 1,
44 FRF_AB_GM_RX_FC_EN, rx_fc);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]45 efx_writeo(efx, &reg, FR_AB_GM_CFG1);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]46 udelay(10);
47
48 /* Configuration register 2 */
49 if_mode = (bytemode) ? 2 : 1;
50 EFX_POPULATE_OWORD_5(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]51 FRF_AB_GM_IF_MODE, if_mode,
52 FRF_AB_GM_PAD_CRC_EN, 1,
53 FRF_AB_GM_LEN_CHK, 1,
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000[diff] [blame]54 FRF_AB_GM_FD, link_state->fd,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]55 FRF_AB_GM_PAMBL_LEN, 0x7/*datasheet recommended */);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]56
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]57 efx_writeo(efx, &reg, FR_AB_GM_CFG2);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]58 udelay(10);
59
60 /* Max frame len register */
61 max_frame_len = EFX_MAX_FRAME_LEN(efx->net_dev->mtu);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]62 EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_MAX_FLEN, max_frame_len);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]63 efx_writeo(efx, &reg, FR_AB_GM_MAX_FLEN);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]64 udelay(10);
65
66 /* FIFO configuration register 0 */
67 EFX_POPULATE_OWORD_5(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]68 FRF_AB_GMF_FTFENREQ, 1,
69 FRF_AB_GMF_STFENREQ, 1,
70 FRF_AB_GMF_FRFENREQ, 1,
71 FRF_AB_GMF_SRFENREQ, 1,
72 FRF_AB_GMF_WTMENREQ, 1);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]73 efx_writeo(efx, &reg, FR_AB_GMF_CFG0);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]74 udelay(10);
75
76 /* FIFO configuration register 1 */
77 EFX_POPULATE_OWORD_2(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]78 FRF_AB_GMF_CFGFRTH, 0x12,
79 FRF_AB_GMF_CFGXOFFRTX, 0xffff);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]80 efx_writeo(efx, &reg, FR_AB_GMF_CFG1);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]81 udelay(10);
82
83 /* FIFO configuration register 2 */
84 EFX_POPULATE_OWORD_2(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]85 FRF_AB_GMF_CFGHWM, 0x3f,
86 FRF_AB_GMF_CFGLWM, 0xa);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]87 efx_writeo(efx, &reg, FR_AB_GMF_CFG2);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]88 udelay(10);
89
90 /* FIFO configuration register 3 */
91 EFX_POPULATE_OWORD_2(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]92 FRF_AB_GMF_CFGHWMFT, 0x1c,
93 FRF_AB_GMF_CFGFTTH, 0x08);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]94 efx_writeo(efx, &reg, FR_AB_GMF_CFG3);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]95 udelay(10);
96
97 /* FIFO configuration register 4 */
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]98 EFX_POPULATE_OWORD_1(reg, FRF_AB_GMF_HSTFLTRFRM_PAUSE, 1);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]99 efx_writeo(efx, &reg, FR_AB_GMF_CFG4);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]100 udelay(10);
101
102 /* FIFO configuration register 5 */
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]103 efx_reado(efx, &reg, FR_AB_GMF_CFG5);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]104 EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_CFGBYTMODE, bytemode);
Ben Hutchingseb50c0d2009-11-23 16:06:30 +0000[diff] [blame]105 EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_CFGHDPLX, !link_state->fd);
106 EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_HSTDRPLT64, !link_state->fd);
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]107 EFX_SET_OWORD_FIELD(reg, FRF_AB_GMF_HSTFLTRFRMDC_PAUSE, 0);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]108 efx_writeo(efx, &reg, FR_AB_GMF_CFG5);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]109 udelay(10);
110
111 /* MAC address */
112 EFX_POPULATE_OWORD_4(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]113 FRF_AB_GM_ADR_B0, efx->net_dev->dev_addr[5],
114 FRF_AB_GM_ADR_B1, efx->net_dev->dev_addr[4],
115 FRF_AB_GM_ADR_B2, efx->net_dev->dev_addr[3],
116 FRF_AB_GM_ADR_B3, efx->net_dev->dev_addr[2]);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]117 efx_writeo(efx, &reg, FR_AB_GM_ADR1);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]118 udelay(10);
119 EFX_POPULATE_OWORD_2(reg,
Ben Hutchings3e6c4532009-10-23 08:30:36 +0000[diff] [blame]120 FRF_AB_GM_ADR_B4, efx->net_dev->dev_addr[1],
121 FRF_AB_GM_ADR_B5, efx->net_dev->dev_addr[0]);
Ben Hutchings12d00ca2009-10-23 08:30:46 +0000[diff] [blame]122 efx_writeo(efx, &reg, FR_AB_GM_ADR2);
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]123 udelay(10);
124
125 falcon_reconfigure_mac_wrapper(efx);
Ben Hutchingsd3245b22009-11-29 03:42:41 +0000[diff] [blame]126
127 return 0;
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]128}
129
130static void falcon_update_stats_gmac(struct efx_nic *efx)
131{
132 struct efx_mac_stats *mac_stats = &efx->mac_stats;
133 unsigned long old_rx_pause, old_tx_pause;
134 unsigned long new_rx_pause, new_tx_pause;
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]135
136 /* Pause frames are erroneously counted as errors (SFC bug 3269) */
137 old_rx_pause = mac_stats->rx_pause;
138 old_tx_pause = mac_stats->tx_pause;
139
140 /* Update MAC stats from DMAed values */
141 FALCON_STAT(efx, GRxGoodOct, rx_good_bytes);
142 FALCON_STAT(efx, GRxBadOct, rx_bad_bytes);
143 FALCON_STAT(efx, GRxMissPkt, rx_missed);
144 FALCON_STAT(efx, GRxFalseCRS, rx_false_carrier);
145 FALCON_STAT(efx, GRxPausePkt, rx_pause);
146 FALCON_STAT(efx, GRxBadPkt, rx_bad);
147 FALCON_STAT(efx, GRxUcastPkt, rx_unicast);
148 FALCON_STAT(efx, GRxMcastPkt, rx_multicast);
149 FALCON_STAT(efx, GRxBcastPkt, rx_broadcast);
150 FALCON_STAT(efx, GRxGoodLt64Pkt, rx_good_lt64);
151 FALCON_STAT(efx, GRxBadLt64Pkt, rx_bad_lt64);
152 FALCON_STAT(efx, GRx64Pkt, rx_64);
153 FALCON_STAT(efx, GRx65to127Pkt, rx_65_to_127);
154 FALCON_STAT(efx, GRx128to255Pkt, rx_128_to_255);
155 FALCON_STAT(efx, GRx256to511Pkt, rx_256_to_511);
156 FALCON_STAT(efx, GRx512to1023Pkt, rx_512_to_1023);
157 FALCON_STAT(efx, GRx1024to15xxPkt, rx_1024_to_15xx);
158 FALCON_STAT(efx, GRx15xxtoJumboPkt, rx_15xx_to_jumbo);
159 FALCON_STAT(efx, GRxGtJumboPkt, rx_gtjumbo);
160 FALCON_STAT(efx, GRxFcsErr64to15xxPkt, rx_bad_64_to_15xx);
161 FALCON_STAT(efx, GRxFcsErr15xxtoJumboPkt, rx_bad_15xx_to_jumbo);
162 FALCON_STAT(efx, GRxFcsErrGtJumboPkt, rx_bad_gtjumbo);
163 FALCON_STAT(efx, GTxGoodBadOct, tx_bytes);
164 FALCON_STAT(efx, GTxGoodOct, tx_good_bytes);
165 FALCON_STAT(efx, GTxSglColPkt, tx_single_collision);
166 FALCON_STAT(efx, GTxMultColPkt, tx_multiple_collision);
167 FALCON_STAT(efx, GTxExColPkt, tx_excessive_collision);
168 FALCON_STAT(efx, GTxDefPkt, tx_deferred);
169 FALCON_STAT(efx, GTxLateCol, tx_late_collision);
170 FALCON_STAT(efx, GTxExDefPkt, tx_excessive_deferred);
171 FALCON_STAT(efx, GTxPausePkt, tx_pause);
172 FALCON_STAT(efx, GTxBadPkt, tx_bad);
173 FALCON_STAT(efx, GTxUcastPkt, tx_unicast);
174 FALCON_STAT(efx, GTxMcastPkt, tx_multicast);
175 FALCON_STAT(efx, GTxBcastPkt, tx_broadcast);
176 FALCON_STAT(efx, GTxLt64Pkt, tx_lt64);
177 FALCON_STAT(efx, GTx64Pkt, tx_64);
178 FALCON_STAT(efx, GTx65to127Pkt, tx_65_to_127);
179 FALCON_STAT(efx, GTx128to255Pkt, tx_128_to_255);
180 FALCON_STAT(efx, GTx256to511Pkt, tx_256_to_511);
181 FALCON_STAT(efx, GTx512to1023Pkt, tx_512_to_1023);
182 FALCON_STAT(efx, GTx1024to15xxPkt, tx_1024_to_15xx);
183 FALCON_STAT(efx, GTx15xxtoJumboPkt, tx_15xx_to_jumbo);
184 FALCON_STAT(efx, GTxGtJumboPkt, tx_gtjumbo);
185 FALCON_STAT(efx, GTxNonTcpUdpPkt, tx_non_tcpudp);
186 FALCON_STAT(efx, GTxMacSrcErrPkt, tx_mac_src_error);
187 FALCON_STAT(efx, GTxIpSrcErrPkt, tx_ip_src_error);
188
189 /* Pause frames are erroneously counted as errors (SFC bug 3269) */
190 new_rx_pause = mac_stats->rx_pause;
191 new_tx_pause = mac_stats->tx_pause;
192 mac_stats->rx_bad -= (new_rx_pause - old_rx_pause);
193 mac_stats->tx_bad -= (new_tx_pause - old_tx_pause);
194
195 /* Derive stats that the MAC doesn't provide directly */
196 mac_stats->tx_bad_bytes =
197 mac_stats->tx_bytes - mac_stats->tx_good_bytes;
198 mac_stats->tx_packets =
199 mac_stats->tx_lt64 + mac_stats->tx_64 +
200 mac_stats->tx_65_to_127 + mac_stats->tx_128_to_255 +
201 mac_stats->tx_256_to_511 + mac_stats->tx_512_to_1023 +
202 mac_stats->tx_1024_to_15xx + mac_stats->tx_15xx_to_jumbo +
203 mac_stats->tx_gtjumbo;
204 mac_stats->tx_collision =
205 mac_stats->tx_single_collision +
206 mac_stats->tx_multiple_collision +
207 mac_stats->tx_excessive_collision +
208 mac_stats->tx_late_collision;
209 mac_stats->rx_bytes =
210 mac_stats->rx_good_bytes + mac_stats->rx_bad_bytes;
211 mac_stats->rx_packets =
212 mac_stats->rx_good_lt64 + mac_stats->rx_bad_lt64 +
213 mac_stats->rx_64 + mac_stats->rx_65_to_127 +
214 mac_stats->rx_128_to_255 + mac_stats->rx_256_to_511 +
215 mac_stats->rx_512_to_1023 + mac_stats->rx_1024_to_15xx +
216 mac_stats->rx_15xx_to_jumbo + mac_stats->rx_gtjumbo;
217 mac_stats->rx_good = mac_stats->rx_packets - mac_stats->rx_bad;
218 mac_stats->rx_lt64 = mac_stats->rx_good_lt64 + mac_stats->rx_bad_lt64;
219}
220
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000[diff] [blame]221static bool falcon_gmac_check_fault(struct efx_nic *efx)
222{
223 return false;
224}
225
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]226struct efx_mac_operations falcon_gmac_operations = {
227 .reconfigure = falcon_reconfigure_gmac,
228 .update_stats = falcon_update_stats_gmac,
Ben Hutchings9007b9f2009-11-25 16:12:01 +0000[diff] [blame]229 .check_fault = falcon_gmac_check_fault,
Ben Hutchings177dfcd2008-12-12 21:50:08 -0800[diff] [blame]230};