blob: 16028112738136d34092ecc50ed611fe7d5ed4f3 [file] [log] [blame]
Jeff Ohlsteine14411d2010-11-30 13:06:36 -08001/*
Jeff Ohlsteine14411d2010-11-30 13:06:36 -08002 * Copyright (c) 2003 ARM Limited
3 * All Rights Reserved
Stephen Boydb29750d2012-02-21 01:21:32 -08004 * Copyright (c) 2010, 2012 Code Aurora Forum. All rights reserved.
Jeff Ohlsteine14411d2010-11-30 13:06:36 -08005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/linkage.h>
11#include <linux/init.h>
12
Stephen Boydb29750d2012-02-21 01:21:32 -080013__CPUINIT
14
Jeff Ohlsteine14411d2010-11-30 13:06:36 -080015/*
16 * MSM specific entry point for secondary CPUs. This provides
17 * a "holding pen" into which all secondary cores are held until we're
18 * ready for them to initialise.
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070019 *
20 * This is executing in physical space with cache's off.
Jeff Ohlsteine14411d2010-11-30 13:06:36 -080021 */
22ENTRY(msm_secondary_startup)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070023 mrc p15, 0, r0, c0, c0, 5 @ MPIDR
24 and r0, r0, #15 @ What CPU am I
25 adr r4, 1f @ address of
26 ldmia r4, {r5, r6} @ load curr addr and pen_rel addr
27 sub r4, r4, r5 @ determine virtual/phys offsets
28 add r6, r6, r4 @ apply
29pen:
30 wfe
31 dsb @ ensure subsequent access is
32 @ after event
33
34 ldr r7, [r6] @ pen_rel has cpu to remove from reset
35 cmp r7, r0 @ are we lucky?
Jeff Ohlsteine14411d2010-11-30 13:06:36 -080036 bne pen
37
38 /*
39 * we've been released from the holding pen: secondary_stack
40 * should now contain the SVC stack for this core
41 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070042 mvn r7, #0 @ -1 to registers
43 str r7,[r6] @ back to the pen for ack
Jeff Ohlsteine14411d2010-11-30 13:06:36 -080044 b secondary_startup
45
Jeff Ohlsteine14411d2010-11-30 13:06:36 -0800461: .long .
47 .long pen_release