blob: 48058e6bc5f6d0aa5ff31bd3a3654707490f33a2 [file] [log] [blame]
Kiran Kumar H Ndd128472011-12-01 09:35:34 -08001/* Copyright (c) 2009-2012, Code Aurora Forum. All rights reserved.
2 *
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 */
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070013#ifndef __LINUX_MSM_CAMERA_H
14#define __LINUX_MSM_CAMERA_H
15
16#ifdef MSM_CAMERA_BIONIC
17#include <sys/types.h>
18#endif
19#include <linux/types.h>
20#include <linux/ioctl.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070021#ifdef __KERNEL__
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070022#include <linux/cdev.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070023#endif
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070024#ifdef MSM_CAMERA_GCC
25#include <time.h>
26#else
27#include <linux/time.h>
28#endif
29
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -070030#include <linux/ion.h>
Philippe Gravel4a3b9422012-03-23 14:21:04 -070031
Nishant Pandit5dd54422012-06-26 22:52:44 +053032#define BIT(nr) (1UL << (nr))
33
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -070034#define MSM_CAM_IOCTL_MAGIC 'm'
35
36#define MSM_CAM_IOCTL_GET_SENSOR_INFO \
37 _IOR(MSM_CAM_IOCTL_MAGIC, 1, struct msm_camsensor_info *)
38
39#define MSM_CAM_IOCTL_REGISTER_PMEM \
40 _IOW(MSM_CAM_IOCTL_MAGIC, 2, struct msm_pmem_info *)
41
42#define MSM_CAM_IOCTL_UNREGISTER_PMEM \
43 _IOW(MSM_CAM_IOCTL_MAGIC, 3, unsigned)
44
45#define MSM_CAM_IOCTL_CTRL_COMMAND \
46 _IOW(MSM_CAM_IOCTL_MAGIC, 4, struct msm_ctrl_cmd *)
47
48#define MSM_CAM_IOCTL_CONFIG_VFE \
49 _IOW(MSM_CAM_IOCTL_MAGIC, 5, struct msm_camera_vfe_cfg_cmd *)
50
51#define MSM_CAM_IOCTL_GET_STATS \
52 _IOR(MSM_CAM_IOCTL_MAGIC, 6, struct msm_camera_stats_event_ctrl *)
53
54#define MSM_CAM_IOCTL_GETFRAME \
55 _IOR(MSM_CAM_IOCTL_MAGIC, 7, struct msm_camera_get_frame *)
56
57#define MSM_CAM_IOCTL_ENABLE_VFE \
58 _IOW(MSM_CAM_IOCTL_MAGIC, 8, struct camera_enable_cmd *)
59
60#define MSM_CAM_IOCTL_CTRL_CMD_DONE \
61 _IOW(MSM_CAM_IOCTL_MAGIC, 9, struct camera_cmd *)
62
63#define MSM_CAM_IOCTL_CONFIG_CMD \
64 _IOW(MSM_CAM_IOCTL_MAGIC, 10, struct camera_cmd *)
65
66#define MSM_CAM_IOCTL_DISABLE_VFE \
67 _IOW(MSM_CAM_IOCTL_MAGIC, 11, struct camera_enable_cmd *)
68
69#define MSM_CAM_IOCTL_PAD_REG_RESET2 \
70 _IOW(MSM_CAM_IOCTL_MAGIC, 12, struct camera_enable_cmd *)
71
72#define MSM_CAM_IOCTL_VFE_APPS_RESET \
73 _IOW(MSM_CAM_IOCTL_MAGIC, 13, struct camera_enable_cmd *)
74
75#define MSM_CAM_IOCTL_RELEASE_FRAME_BUFFER \
76 _IOW(MSM_CAM_IOCTL_MAGIC, 14, struct camera_enable_cmd *)
77
78#define MSM_CAM_IOCTL_RELEASE_STATS_BUFFER \
79 _IOW(MSM_CAM_IOCTL_MAGIC, 15, struct msm_stats_buf *)
80
81#define MSM_CAM_IOCTL_AXI_CONFIG \
82 _IOW(MSM_CAM_IOCTL_MAGIC, 16, struct msm_camera_vfe_cfg_cmd *)
83
84#define MSM_CAM_IOCTL_GET_PICTURE \
85 _IOW(MSM_CAM_IOCTL_MAGIC, 17, struct msm_frame *)
86
87#define MSM_CAM_IOCTL_SET_CROP \
88 _IOW(MSM_CAM_IOCTL_MAGIC, 18, struct crop_info *)
89
90#define MSM_CAM_IOCTL_PICT_PP \
91 _IOW(MSM_CAM_IOCTL_MAGIC, 19, uint8_t *)
92
93#define MSM_CAM_IOCTL_PICT_PP_DONE \
94 _IOW(MSM_CAM_IOCTL_MAGIC, 20, struct msm_snapshot_pp_status *)
95
96#define MSM_CAM_IOCTL_SENSOR_IO_CFG \
97 _IOW(MSM_CAM_IOCTL_MAGIC, 21, struct sensor_cfg_data *)
98
99#define MSM_CAM_IOCTL_FLASH_LED_CFG \
100 _IOW(MSM_CAM_IOCTL_MAGIC, 22, unsigned *)
101
102#define MSM_CAM_IOCTL_UNBLOCK_POLL_FRAME \
103 _IO(MSM_CAM_IOCTL_MAGIC, 23)
104
105#define MSM_CAM_IOCTL_CTRL_COMMAND_2 \
106 _IOW(MSM_CAM_IOCTL_MAGIC, 24, struct msm_ctrl_cmd *)
107
108#define MSM_CAM_IOCTL_AF_CTRL \
109 _IOR(MSM_CAM_IOCTL_MAGIC, 25, struct msm_ctrl_cmt_t *)
110
111#define MSM_CAM_IOCTL_AF_CTRL_DONE \
112 _IOW(MSM_CAM_IOCTL_MAGIC, 26, struct msm_ctrl_cmt_t *)
113
114#define MSM_CAM_IOCTL_CONFIG_VPE \
115 _IOW(MSM_CAM_IOCTL_MAGIC, 27, struct msm_camera_vpe_cfg_cmd *)
116
117#define MSM_CAM_IOCTL_AXI_VPE_CONFIG \
118 _IOW(MSM_CAM_IOCTL_MAGIC, 28, struct msm_camera_vpe_cfg_cmd *)
119
120#define MSM_CAM_IOCTL_STROBE_FLASH_CFG \
121 _IOW(MSM_CAM_IOCTL_MAGIC, 29, uint32_t *)
122
123#define MSM_CAM_IOCTL_STROBE_FLASH_CHARGE \
124 _IOW(MSM_CAM_IOCTL_MAGIC, 30, uint32_t *)
125
126#define MSM_CAM_IOCTL_STROBE_FLASH_RELEASE \
127 _IO(MSM_CAM_IOCTL_MAGIC, 31)
128
129#define MSM_CAM_IOCTL_FLASH_CTRL \
130 _IOW(MSM_CAM_IOCTL_MAGIC, 32, struct flash_ctrl_data *)
131
132#define MSM_CAM_IOCTL_ERROR_CONFIG \
133 _IOW(MSM_CAM_IOCTL_MAGIC, 33, uint32_t *)
134
135#define MSM_CAM_IOCTL_ABORT_CAPTURE \
136 _IO(MSM_CAM_IOCTL_MAGIC, 34)
137
138#define MSM_CAM_IOCTL_SET_FD_ROI \
139 _IOW(MSM_CAM_IOCTL_MAGIC, 35, struct fd_roi_info *)
140
141#define MSM_CAM_IOCTL_GET_CAMERA_INFO \
142 _IOR(MSM_CAM_IOCTL_MAGIC, 36, struct msm_camera_info *)
143
144#define MSM_CAM_IOCTL_UNBLOCK_POLL_PIC_FRAME \
145 _IO(MSM_CAM_IOCTL_MAGIC, 37)
146
147#define MSM_CAM_IOCTL_RELEASE_PIC_BUFFER \
148 _IOW(MSM_CAM_IOCTL_MAGIC, 38, struct camera_enable_cmd *)
149
150#define MSM_CAM_IOCTL_PUT_ST_FRAME \
151 _IOW(MSM_CAM_IOCTL_MAGIC, 39, struct msm_camera_st_frame *)
152
Mansoor Aftab5d418372011-07-26 17:01:26 -0700153#define MSM_CAM_IOCTL_V4L2_EVT_NOTIFY \
Kevin Chan94b4c832012-03-02 21:27:16 -0800154 _IOR(MSM_CAM_IOCTL_MAGIC, 40, struct v4l2_event *)
Mansoor Aftab5d418372011-07-26 17:01:26 -0700155
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700156#define MSM_CAM_IOCTL_SET_MEM_MAP_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800157 _IOR(MSM_CAM_IOCTL_MAGIC, 41, struct msm_mem_map_info *)
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700158
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700159#define MSM_CAM_IOCTL_ACTUATOR_IO_CFG \
Kevin Chan94b4c832012-03-02 21:27:16 -0800160 _IOW(MSM_CAM_IOCTL_MAGIC, 42, struct msm_actuator_cfg_data *)
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -0700161
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700162#define MSM_CAM_IOCTL_MCTL_POST_PROC \
Kevin Chan94b4c832012-03-02 21:27:16 -0800163 _IOW(MSM_CAM_IOCTL_MAGIC, 43, struct msm_mctl_post_proc_cmd *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700164
165#define MSM_CAM_IOCTL_RESERVE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800166 _IOW(MSM_CAM_IOCTL_MAGIC, 44, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700167
168#define MSM_CAM_IOCTL_RELEASE_FREE_FRAME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800169 _IOR(MSM_CAM_IOCTL_MAGIC, 45, struct msm_cam_evt_divert_frame *)
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700170
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800171#define MSM_CAM_IOCTL_PICT_PP_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800172 _IOR(MSM_CAM_IOCTL_MAGIC, 46, struct msm_pp_frame *)
Mingcheng Zhu8feaa3f2011-11-23 11:33:52 -0800173
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800174#define MSM_CAM_IOCTL_SENSOR_V4l2_S_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800175 _IOR(MSM_CAM_IOCTL_MAGIC, 47, struct v4l2_control)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800176
177#define MSM_CAM_IOCTL_SENSOR_V4l2_QUERY_CTRL \
Kevin Chan94b4c832012-03-02 21:27:16 -0800178 _IOR(MSM_CAM_IOCTL_MAGIC, 48, struct v4l2_queryctrl)
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800179
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800180#define MSM_CAM_IOCTL_GET_KERNEL_SYSTEM_TIME \
Kevin Chan94b4c832012-03-02 21:27:16 -0800181 _IOW(MSM_CAM_IOCTL_MAGIC, 49, struct timeval *)
Guruprasad Gaonkar4c7758f2011-12-16 17:30:00 -0800182
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800183#define MSM_CAM_IOCTL_SET_VFE_OUTPUT_TYPE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800184 _IOW(MSM_CAM_IOCTL_MAGIC, 50, uint32_t *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800185
186#define MSM_CAM_IOCTL_MCTL_DIVERT_DONE \
Kevin Chan94b4c832012-03-02 21:27:16 -0800187 _IOR(MSM_CAM_IOCTL_MAGIC, 51, struct msm_cam_evt_divert_frame *)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800188
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800189#define MSM_CAM_IOCTL_GET_ACTUATOR_INFO \
Kevin Chan94b4c832012-03-02 21:27:16 -0800190 _IOW(MSM_CAM_IOCTL_MAGIC, 52, struct msm_actuator_cfg_data *)
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800191
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700192#define MSM_CAM_IOCTL_EEPROM_IO_CFG \
193 _IOW(MSM_CAM_IOCTL_MAGIC, 53, struct msm_eeprom_cfg_data *)
194
Nishant Panditb2157c92012-04-25 01:09:28 +0530195#define MSM_CAM_IOCTL_ISPIF_IO_CFG \
196 _IOR(MSM_CAM_IOCTL_MAGIC, 54, struct ispif_cfg_data *)
197
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700198#define MSM_CAM_IOCTL_STATS_REQBUF \
199 _IOR(MSM_CAM_IOCTL_MAGIC, 55, struct msm_stats_reqbuf *)
200
201#define MSM_CAM_IOCTL_STATS_ENQUEUEBUF \
202 _IOR(MSM_CAM_IOCTL_MAGIC, 56, struct msm_stats_buf_info *)
203
204#define MSM_CAM_IOCTL_STATS_FLUSH_BUFQ \
205 _IOR(MSM_CAM_IOCTL_MAGIC, 57, struct msm_stats_flush_bufq *)
206
207struct msm_stats_reqbuf {
208 int num_buf; /* how many buffers requested */
209 int stats_type; /* stats type */
210};
211
212struct msm_stats_flush_bufq {
213 int stats_type; /* enum msm_stats_enum_type */
214};
215
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700216struct msm_mctl_pp_cmd {
217 int32_t id;
218 uint16_t length;
219 void *value;
220};
221
222struct msm_mctl_post_proc_cmd {
223 int32_t type;
224 struct msm_mctl_pp_cmd cmd;
225};
226
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700227#define MSM_CAMERA_LED_OFF 0
228#define MSM_CAMERA_LED_LOW 1
229#define MSM_CAMERA_LED_HIGH 2
Nishant Pandit474f2252011-07-23 23:17:56 +0530230#define MSM_CAMERA_LED_INIT 3
231#define MSM_CAMERA_LED_RELEASE 4
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700232
233#define MSM_CAMERA_STROBE_FLASH_NONE 0
234#define MSM_CAMERA_STROBE_FLASH_XENON 1
235
236#define MSM_MAX_CAMERA_SENSORS 5
237#define MAX_SENSOR_NAME 32
Rajakumar Govindaram6627b362012-01-29 19:00:30 -0800238#define MAX_CAM_NAME_SIZE 32
239#define MAX_ACT_MOD_NAME_SIZE 32
240#define MAX_ACT_NAME_SIZE 32
241#define NUM_ACTUATOR_DIR 2
242#define MAX_ACTUATOR_SCENARIO 8
243#define MAX_ACTUATOR_REGION 5
244#define MAX_ACTUATOR_INIT_SET 12
245#define MAX_ACTUATOR_TYPE_SIZE 32
246#define MAX_ACTUATOR_REG_TBL_SIZE 8
247
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700248
249#define MSM_MAX_CAMERA_CONFIGS 2
250
251#define PP_SNAP 0x01
252#define PP_RAW_SNAP ((0x01)<<1)
253#define PP_PREV ((0x01)<<2)
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800254#define PP_THUMB ((0x01)<<3)
255#define PP_MASK (PP_SNAP|PP_RAW_SNAP|PP_PREV|PP_THUMB)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700256
257#define MSM_CAM_CTRL_CMD_DONE 0
258#define MSM_CAM_SENSOR_VFE_CMD 1
259
Kiran Kumar H Nceea7622011-08-23 14:01:03 -0700260/* Should be same as VIDEO_MAX_PLANES in videodev2.h */
261#define MAX_PLANES 8
262
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700263/*****************************************************
264 * structure
265 *****************************************************/
266
267/* define five type of structures for userspace <==> kernel
268 * space communication:
269 * command 1 - 2 are from userspace ==> kernel
270 * command 3 - 4 are from kernel ==> userspace
271 *
272 * 1. control command: control command(from control thread),
273 * control status (from config thread);
274 */
275struct msm_ctrl_cmd {
276 uint16_t type;
277 uint16_t length;
278 void *value;
279 uint16_t status;
280 uint32_t timeout_ms;
281 int resp_fd; /* FIXME: to be used by the kernel, pass-through for now */
282 int vnode_id; /* video dev id. Can we overload resp_fd? */
Kevin Chan94b4c832012-03-02 21:27:16 -0800283 int queue_idx;
284 uint32_t evt_id;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700285 uint32_t stream_type; /* used to pass value to qcamera server */
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -0700286 int config_ident; /*used as identifier for config node*/
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700287};
288
289struct msm_cam_evt_msg {
290 unsigned short type; /* 1 == event (RPC), 0 == message (adsp) */
291 unsigned short msg_id;
292 unsigned int len; /* size in, number of bytes out */
293 uint32_t frame_id;
294 void *data;
Ninad Mahimkaree55c192012-04-25 14:36:17 -0700295 struct timespec timestamp;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700296};
297
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700298struct msm_pp_frame_sp {
299 /* phy addr of the buffer */
300 unsigned long phy_addr;
301 uint32_t y_off;
302 uint32_t cbcr_off;
303 /* buffer length */
304 uint32_t length;
305 int32_t fd;
306 uint32_t addr_offset;
307 /* mapped addr */
308 unsigned long vaddr;
309};
310
311struct msm_pp_frame_mp {
312 /* phy addr of the plane */
313 unsigned long phy_addr;
314 /* offset of plane data */
315 uint32_t data_offset;
316 /* plane length */
317 uint32_t length;
318 int32_t fd;
319 uint32_t addr_offset;
320 /* mapped addr */
321 unsigned long vaddr;
322};
323
324struct msm_pp_frame {
325 uint32_t handle; /* stores vb cookie */
326 uint32_t frame_id;
Kevin Chan318d7cb2011-11-29 14:24:26 -0800327 unsigned short buf_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700328 int path;
329 unsigned short image_type;
330 unsigned short num_planes; /* 1 for sp */
331 struct timeval timestamp;
332 union {
333 struct msm_pp_frame_sp sp;
334 struct msm_pp_frame_mp mp[MAX_PLANES];
335 };
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800336 int node_type;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700337};
338
Mingcheng Zhu49505502011-07-19 20:44:36 -0700339struct msm_cam_evt_divert_frame {
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700340 unsigned short image_mode;
341 unsigned short op_mode;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700342 unsigned short inst_idx;
343 unsigned short node_idx;
Kiran Kumar H Ncd7bc3b2011-10-12 16:14:48 -0700344 struct msm_pp_frame frame;
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700345 int do_pp;
Mingcheng Zhu49505502011-07-19 20:44:36 -0700346};
347
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700348struct msm_mctl_pp_cmd_ack_event {
349 uint32_t cmd; /* VPE_CMD_ZOOM? */
350 int status; /* 0 done, < 0 err */
351 uint32_t cookie; /* daemon's cookie */
352};
353
354struct msm_mctl_pp_event_info {
355 int32_t event;
356 union {
357 struct msm_mctl_pp_cmd_ack_event ack;
358 };
359};
360
361struct msm_isp_event_ctrl {
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700362 unsigned short resptype;
363 union {
364 struct msm_cam_evt_msg isp_msg;
365 struct msm_ctrl_cmd ctrl;
Kiran Kumar H N0b517802011-10-05 09:49:51 -0700366 struct msm_cam_evt_divert_frame div_frame;
367 struct msm_mctl_pp_event_info pp_event_info;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700368 } isp_data;
369};
370
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700371#define MSM_CAM_RESP_CTRL 0
372#define MSM_CAM_RESP_STAT_EVT_MSG 1
373#define MSM_CAM_RESP_STEREO_OP_1 2
374#define MSM_CAM_RESP_STEREO_OP_2 3
375#define MSM_CAM_RESP_V4L2 4
Mingcheng Zhu49505502011-07-19 20:44:36 -0700376#define MSM_CAM_RESP_DIV_FRAME_EVT_MSG 5
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700377#define MSM_CAM_RESP_DONE_EVENT 6
378#define MSM_CAM_RESP_MCTL_PP_EVENT 7
379#define MSM_CAM_RESP_MAX 8
Mingcheng Zhu49505502011-07-19 20:44:36 -0700380
Mingcheng Zhu270813a2011-08-10 17:23:18 -0700381#define MSM_CAM_APP_NOTIFY_EVENT 0
Kevin Chan4bb6ead2012-02-29 01:01:41 -0800382#define MSM_CAM_APP_NOTIFY_ERROR_EVENT 1
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700383
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700384/* this one is used to send ctrl/status up to config thread */
Mingcheng Zhu8e9f99e2011-08-26 16:33:32 -0700385
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700386struct msm_stats_event_ctrl {
387 /* 0 - ctrl_cmd from control thread,
388 * 1 - stats/event kernel,
389 * 2 - V4L control or read request */
390 int resptype;
391 int timeout_ms;
392 struct msm_ctrl_cmd ctrl_cmd;
393 /* struct vfe_event_t stats_event; */
394 struct msm_cam_evt_msg stats_event;
395};
396
397/* 2. config command: config command(from config thread); */
398struct msm_camera_cfg_cmd {
399 /* what to config:
400 * 1 - sensor config, 2 - vfe config */
401 uint16_t cfg_type;
402
403 /* sensor config type */
404 uint16_t cmd_type;
405 uint16_t queue;
406 uint16_t length;
407 void *value;
408};
409
410#define CMD_GENERAL 0
411#define CMD_AXI_CFG_OUT1 1
412#define CMD_AXI_CFG_SNAP_O1_AND_O2 2
413#define CMD_AXI_CFG_OUT2 3
414#define CMD_PICT_T_AXI_CFG 4
415#define CMD_PICT_M_AXI_CFG 5
416#define CMD_RAW_PICT_AXI_CFG 6
417
418#define CMD_FRAME_BUF_RELEASE 7
419#define CMD_PREV_BUF_CFG 8
420#define CMD_SNAP_BUF_RELEASE 9
421#define CMD_SNAP_BUF_CFG 10
422#define CMD_STATS_DISABLE 11
423#define CMD_STATS_AEC_AWB_ENABLE 12
424#define CMD_STATS_AF_ENABLE 13
425#define CMD_STATS_AEC_ENABLE 14
426#define CMD_STATS_AWB_ENABLE 15
427#define CMD_STATS_ENABLE 16
428
429#define CMD_STATS_AXI_CFG 17
430#define CMD_STATS_AEC_AXI_CFG 18
431#define CMD_STATS_AF_AXI_CFG 19
432#define CMD_STATS_AWB_AXI_CFG 20
433#define CMD_STATS_RS_AXI_CFG 21
434#define CMD_STATS_CS_AXI_CFG 22
435#define CMD_STATS_IHIST_AXI_CFG 23
436#define CMD_STATS_SKIN_AXI_CFG 24
437
438#define CMD_STATS_BUF_RELEASE 25
439#define CMD_STATS_AEC_BUF_RELEASE 26
440#define CMD_STATS_AF_BUF_RELEASE 27
441#define CMD_STATS_AWB_BUF_RELEASE 28
442#define CMD_STATS_RS_BUF_RELEASE 29
443#define CMD_STATS_CS_BUF_RELEASE 30
444#define CMD_STATS_IHIST_BUF_RELEASE 31
445#define CMD_STATS_SKIN_BUF_RELEASE 32
446
447#define UPDATE_STATS_INVALID 33
448#define CMD_AXI_CFG_SNAP_GEMINI 34
449#define CMD_AXI_CFG_SNAP 35
450#define CMD_AXI_CFG_PREVIEW 36
451#define CMD_AXI_CFG_VIDEO 37
452
453#define CMD_STATS_IHIST_ENABLE 38
454#define CMD_STATS_RS_ENABLE 39
455#define CMD_STATS_CS_ENABLE 40
456#define CMD_VPE 41
457#define CMD_AXI_CFG_VPE 42
458#define CMD_AXI_CFG_ZSL 43
459#define CMD_AXI_CFG_SNAP_VPE 44
460#define CMD_AXI_CFG_SNAP_THUMB_VPE 45
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530461#define CMD_CONFIG_PING_ADDR 46
462#define CMD_CONFIG_PONG_ADDR 47
463#define CMD_CONFIG_FREE_BUF_ADDR 48
464#define CMD_AXI_CFG_ZSL_ALL_CHNLS 49
465#define CMD_AXI_CFG_VIDEO_ALL_CHNLS 50
Suresh Vankadara055cb8e2012-01-18 00:50:04 +0530466#define CMD_VFE_BUFFER_RELEASE 51
Kevin Chancf264862012-04-19 19:10:38 -0700467#define CMD_VFE_PROCESS_IRQ 52
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700468
Nishant Pandit5dd54422012-06-26 22:52:44 +0530469#define CMD_AXI_CFG_PRIM BIT(8)
470#define CMD_AXI_CFG_PRIM_ALL_CHNLS BIT(9)
471#define CMD_AXI_CFG_SEC BIT(10)
472#define CMD_AXI_CFG_SEC_ALL_CHNLS BIT(11)
473#define CMD_AXI_CFG_TERT1 BIT(12)
474#define CMD_AXI_CFG_TERT2 BIT(13)
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800475
Azam Sadiq Pasha Kapatrala Syed7c815182012-05-31 19:28:09 -0700476#define CMD_AXI_START 0xE1
477#define CMD_AXI_STOP 0xE2
478
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700479/* vfe config command: config command(from config thread)*/
480struct msm_vfe_cfg_cmd {
481 int cmd_type;
482 uint16_t length;
483 void *value;
484};
485
486struct msm_vpe_cfg_cmd {
487 int cmd_type;
488 uint16_t length;
489 void *value;
490};
491
492#define MAX_CAMERA_ENABLE_NAME_LEN 32
493struct camera_enable_cmd {
494 char name[MAX_CAMERA_ENABLE_NAME_LEN];
495};
496
497#define MSM_PMEM_OUTPUT1 0
498#define MSM_PMEM_OUTPUT2 1
499#define MSM_PMEM_OUTPUT1_OUTPUT2 2
500#define MSM_PMEM_THUMBNAIL 3
501#define MSM_PMEM_MAINIMG 4
502#define MSM_PMEM_RAW_MAINIMG 5
503#define MSM_PMEM_AEC_AWB 6
504#define MSM_PMEM_AF 7
505#define MSM_PMEM_AEC 8
506#define MSM_PMEM_AWB 9
507#define MSM_PMEM_RS 10
508#define MSM_PMEM_CS 11
509#define MSM_PMEM_IHIST 12
510#define MSM_PMEM_SKIN 13
511#define MSM_PMEM_VIDEO 14
512#define MSM_PMEM_PREVIEW 15
513#define MSM_PMEM_VIDEO_VPE 16
514#define MSM_PMEM_C2D 17
515#define MSM_PMEM_MAINIMG_VPE 18
516#define MSM_PMEM_THUMBNAIL_VPE 19
517#define MSM_PMEM_MAX 20
518
519#define STAT_AEAW 0
520#define STAT_AEC 1
521#define STAT_AF 2
522#define STAT_AWB 3
523#define STAT_RS 4
524#define STAT_CS 5
525#define STAT_IHIST 6
526#define STAT_SKIN 7
527#define STAT_MAX 8
528
529#define FRAME_PREVIEW_OUTPUT1 0
530#define FRAME_PREVIEW_OUTPUT2 1
531#define FRAME_SNAPSHOT 2
532#define FRAME_THUMBNAIL 3
533#define FRAME_RAW_SNAPSHOT 4
534#define FRAME_MAX 5
535
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700536enum msm_stats_enum_type {
537 MSM_STATS_TYPE_AEC, /* legacy based AEC */
538 MSM_STATS_TYPE_AF, /* legacy based AF */
539 MSM_STATS_TYPE_AWB, /* legacy based AWB */
540 MSM_STATS_TYPE_RS, /* legacy based RS */
541 MSM_STATS_TYPE_CS, /* legacy based CS */
542 MSM_STATS_TYPE_IHIST, /* legacy based HIST */
543 MSM_STATS_TYPE_SKIN, /* legacy based SKIN */
544 MSM_STATS_TYPE_BG, /* Bayer Grids */
545 MSM_STATS_TYPE_BF, /* Bayer Focus */
546 MSM_STATS_TYPE_BHIST, /* Bayer Hist */
547 MSM_STATS_TYPE_AE_AW, /* legacy stats for vfe 2.x*/
548 MSM_STATS_TYPE_MAX /* MAX */
549};
550
551struct msm_stats_buf_info {
552 int type; /* msm_stats_enum_type */
553 int fd;
554 void *vaddr;
555 uint32_t offset;
556 uint32_t len;
557 uint32_t y_off;
558 uint32_t cbcr_off;
559 uint32_t planar0_off;
560 uint32_t planar1_off;
561 uint32_t planar2_off;
562 uint8_t active;
563 int buf_idx;
564};
565
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700566struct msm_pmem_info {
567 int type;
568 int fd;
569 void *vaddr;
570 uint32_t offset;
571 uint32_t len;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700572 uint32_t y_off;
573 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530574 uint32_t planar0_off;
575 uint32_t planar1_off;
576 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700577 uint8_t active;
578};
579
580struct outputCfg {
581 uint32_t height;
582 uint32_t width;
583
584 uint32_t window_height_firstline;
585 uint32_t window_height_lastline;
586};
587
Ankit Premrajka70613ec2012-01-26 16:24:23 -0800588#define VIDEO_NODE 0
589#define MCTL_NODE 1
590
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700591#define OUTPUT_1 0
592#define OUTPUT_2 1
593#define OUTPUT_1_AND_2 2 /* snapshot only */
594#define OUTPUT_1_AND_3 3 /* video */
595#define CAMIF_TO_AXI_VIA_OUTPUT_2 4
596#define OUTPUT_1_AND_CAMIF_TO_AXI_VIA_OUTPUT_2 5
597#define OUTPUT_2_AND_CAMIF_TO_AXI_VIA_OUTPUT_1 6
598#define OUTPUT_1_2_AND_3 7
Kiran Kumar H N4cff94a2011-10-17 11:37:33 -0700599#define OUTPUT_ALL_CHNLS 8
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530600#define OUTPUT_VIDEO_ALL_CHNLS 9
601#define OUTPUT_ZSL_ALL_CHNLS 10
602#define LAST_AXI_OUTPUT_MODE_ENUM = OUTPUT_ZSL_ALL_CHNLS
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700603
Nishant Pandit5dd54422012-06-26 22:52:44 +0530604#define OUTPUT_PRIM BIT(8)
605#define OUTPUT_PRIM_ALL_CHNLS BIT(9)
606#define OUTPUT_SEC BIT(10)
607#define OUTPUT_SEC_ALL_CHNLS BIT(11)
608#define OUTPUT_TERT1 BIT(12)
609#define OUTPUT_TERT2 BIT(13)
610
Kiran Kumar H Ndd128472011-12-01 09:35:34 -0800611
612
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700613#define MSM_FRAME_PREV_1 0
614#define MSM_FRAME_PREV_2 1
615#define MSM_FRAME_ENC 2
616
Nishant Pandit5dd54422012-06-26 22:52:44 +0530617#define OUTPUT_TYPE_P BIT(0)
618#define OUTPUT_TYPE_T BIT(1)
619#define OUTPUT_TYPE_S BIT(2)
620#define OUTPUT_TYPE_V BIT(3)
621#define OUTPUT_TYPE_L BIT(4)
622#define OUTPUT_TYPE_ST_L BIT(5)
623#define OUTPUT_TYPE_ST_R BIT(6)
624#define OUTPUT_TYPE_ST_D BIT(7)
625#define OUTPUT_TYPE_R BIT(8)
626#define OUTPUT_TYPE_R1 BIT(9)
627
628
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700629
630struct fd_roi_info {
631 void *info;
632 int info_len;
633};
634
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700635struct msm_mem_map_info {
636 uint32_t cookie;
637 uint32_t length;
Mingcheng Zhufe7abc02011-08-09 13:27:39 -0700638 uint32_t mem_type;
Mingcheng Zhu9559ee42011-08-09 11:54:22 -0700639};
640
Mingcheng Zhu49505502011-07-19 20:44:36 -0700641#define MSM_MEM_MMAP 0
642#define MSM_MEM_USERPTR 1
643#define MSM_PLANE_MAX 8
644#define MSM_PLANE_Y 0
645#define MSM_PLANE_UV 1
646
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700647struct msm_frame {
648 struct timespec ts;
649 int path;
650 int type;
651 unsigned long buffer;
652 uint32_t phy_offset;
Kiran Kumar H N5a19c682011-07-23 11:34:34 -0700653 uint32_t y_off;
654 uint32_t cbcr_off;
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530655 uint32_t planar0_off;
656 uint32_t planar1_off;
657 uint32_t planar2_off;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700658 int fd;
659
660 void *cropinfo;
661 int croplen;
662 uint32_t error_code;
663 struct fd_roi_info roi_info;
664 uint32_t frame_id;
665 int stcam_quality_ind;
666 uint32_t stcam_conv_value;
Ankit Premrajka3e90b9f2011-11-01 18:48:45 -0700667
668 struct ion_allocation_data ion_alloc;
669 struct ion_fd_data fd_data;
Ankit Premrajkae2c9c0b2012-06-07 17:18:25 -0700670 int ion_dev_fd;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700671};
672
673enum msm_st_frame_packing {
674 SIDE_BY_SIDE_HALF,
675 SIDE_BY_SIDE_FULL,
676 TOP_DOWN_HALF,
677 TOP_DOWN_FULL,
678};
679
680struct msm_st_crop {
681 uint32_t in_w;
682 uint32_t in_h;
683 uint32_t out_w;
684 uint32_t out_h;
685};
686
687struct msm_st_half {
Alekhya,Monikafc81e102011-12-29 15:17:33 +0530688 uint32_t buf_p0_off;
689 uint32_t buf_p1_off;
690 uint32_t buf_p0_stride;
691 uint32_t buf_p1_stride;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700692 uint32_t pix_x_off;
693 uint32_t pix_y_off;
694 struct msm_st_crop stCropInfo;
695};
696
697struct msm_st_frame {
698 struct msm_frame buf_info;
699 int type;
700 enum msm_st_frame_packing packing;
701 struct msm_st_half L;
702 struct msm_st_half R;
703 int frame_id;
704};
705
706#define MSM_CAMERA_ERR_MASK (0xFFFFFFFF & 1)
707
708struct stats_buff {
709 unsigned long buff;
710 int fd;
711};
712
713struct msm_stats_buf {
Lakshmi Narayana Kalavala4ab97a92011-07-26 15:30:14 -0700714 uint8_t awb_ymin;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700715 struct stats_buff aec;
716 struct stats_buff awb;
717 struct stats_buff af;
718 struct stats_buff ihist;
719 struct stats_buff rs;
720 struct stats_buff cs;
721 struct stats_buff skin;
722 int type;
723 uint32_t status_bits;
724 unsigned long buffer;
725 int fd;
Ankit Premrajka073e0ca2012-03-06 12:26:08 -0800726 int length;
727 struct ion_handle *handle;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700728 uint32_t frame_id;
Lakshmi Narayana Kalavala2db33842012-06-26 22:41:32 -0700729 int buf_idx;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700730};
731#define MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT 0
732/* video capture mode in VIDIOC_S_PARM */
733#define MSM_V4L2_EXT_CAPTURE_MODE_PREVIEW \
734 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+1)
735/* extendedmode for video recording in VIDIOC_S_PARM */
736#define MSM_V4L2_EXT_CAPTURE_MODE_VIDEO \
737 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+2)
738/* extendedmode for the full size main image in VIDIOC_S_PARM */
739#define MSM_V4L2_EXT_CAPTURE_MODE_MAIN (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+3)
740/* extendedmode for the thumb nail image in VIDIOC_S_PARM */
741#define MSM_V4L2_EXT_CAPTURE_MODE_THUMBNAIL \
742 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+4)
743#define MSM_V4L2_EXT_CAPTURE_MODE_RAW \
744 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+5)
Nishant Pandit5dd54422012-06-26 22:52:44 +0530745#define MSM_V4L2_EXT_CAPTURE_MODE_RDI \
746 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+6)
747#define MSM_V4L2_EXT_CAPTURE_MODE_RDI1 \
748 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+7)
749#define MSM_V4L2_EXT_CAPTURE_MODE_RDI2 \
750 (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+8)
751#define MSM_V4L2_EXT_CAPTURE_MODE_MAX (MSM_V4L2_EXT_CAPTURE_MODE_DEFAULT+9)
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700752
753
754#define MSM_V4L2_PID_MOTION_ISO V4L2_CID_PRIVATE_BASE
755#define MSM_V4L2_PID_EFFECT (V4L2_CID_PRIVATE_BASE+1)
756#define MSM_V4L2_PID_HJR (V4L2_CID_PRIVATE_BASE+2)
757#define MSM_V4L2_PID_LED_MODE (V4L2_CID_PRIVATE_BASE+3)
758#define MSM_V4L2_PID_PREP_SNAPSHOT (V4L2_CID_PRIVATE_BASE+4)
759#define MSM_V4L2_PID_EXP_METERING (V4L2_CID_PRIVATE_BASE+5)
760#define MSM_V4L2_PID_ISO (V4L2_CID_PRIVATE_BASE+6)
761#define MSM_V4L2_PID_CAM_MODE (V4L2_CID_PRIVATE_BASE+7)
762#define MSM_V4L2_PID_LUMA_ADAPTATION (V4L2_CID_PRIVATE_BASE+8)
763#define MSM_V4L2_PID_BEST_SHOT (V4L2_CID_PRIVATE_BASE+9)
764#define MSM_V4L2_PID_FOCUS_MODE (V4L2_CID_PRIVATE_BASE+10)
765#define MSM_V4L2_PID_BL_DETECTION (V4L2_CID_PRIVATE_BASE+11)
766#define MSM_V4L2_PID_SNOW_DETECTION (V4L2_CID_PRIVATE_BASE+12)
767#define MSM_V4L2_PID_CTRL_CMD (V4L2_CID_PRIVATE_BASE+13)
768#define MSM_V4L2_PID_EVT_SUB_INFO (V4L2_CID_PRIVATE_BASE+14)
Mingcheng Zhu5b04d352011-07-22 21:18:42 -0700769#define MSM_V4L2_PID_STROBE_FLASH (V4L2_CID_PRIVATE_BASE+15)
770#define MSM_V4L2_PID_MMAP_ENTRY (V4L2_CID_PRIVATE_BASE+16)
771#define MSM_V4L2_PID_MMAP_INST (V4L2_CID_PRIVATE_BASE+17)
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -0800772#define MSM_V4L2_PID_PP_PLANE_INFO (V4L2_CID_PRIVATE_BASE+18)
773#define MSM_V4L2_PID_MAX MSM_V4L2_PID_PP_PLANE_INFO
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700774
775/* camera operation mode for video recording - two frame output queues */
776#define MSM_V4L2_CAM_OP_DEFAULT 0
777/* camera operation mode for video recording - two frame output queues */
778#define MSM_V4L2_CAM_OP_PREVIEW (MSM_V4L2_CAM_OP_DEFAULT+1)
779/* camera operation mode for video recording - two frame output queues */
780#define MSM_V4L2_CAM_OP_VIDEO (MSM_V4L2_CAM_OP_DEFAULT+2)
781/* camera operation mode for standard shapshot - two frame output queues */
782#define MSM_V4L2_CAM_OP_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+3)
783/* camera operation mode for zsl shapshot - three output queues */
784#define MSM_V4L2_CAM_OP_ZSL (MSM_V4L2_CAM_OP_DEFAULT+4)
785/* camera operation mode for raw snapshot - one frame output queue */
786#define MSM_V4L2_CAM_OP_RAW (MSM_V4L2_CAM_OP_DEFAULT+5)
Jignesh Mehta6cf8a742012-02-04 23:40:50 -0800787/* camera operation mode for jpeg snapshot - one frame output queue */
788#define MSM_V4L2_CAM_OP_JPEG_CAPTURE (MSM_V4L2_CAM_OP_DEFAULT+6)
789
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700790
791#define MSM_V4L2_VID_CAP_TYPE 0
792#define MSM_V4L2_STREAM_ON 1
793#define MSM_V4L2_STREAM_OFF 2
794#define MSM_V4L2_SNAPSHOT 3
795#define MSM_V4L2_QUERY_CTRL 4
796#define MSM_V4L2_GET_CTRL 5
797#define MSM_V4L2_SET_CTRL 6
798#define MSM_V4L2_QUERY 7
799#define MSM_V4L2_GET_CROP 8
800#define MSM_V4L2_SET_CROP 9
801#define MSM_V4L2_OPEN 10
802#define MSM_V4L2_CLOSE 11
803#define MSM_V4L2_SET_CTRL_CMD 12
804#define MSM_V4L2_EVT_SUB_MASK 13
805#define MSM_V4L2_MAX 14
806#define V4L2_CAMERA_EXIT 43
807
808struct crop_info {
809 void *info;
810 int len;
811};
812
813struct msm_postproc {
814 int ftnum;
815 struct msm_frame fthumnail;
816 int fmnum;
817 struct msm_frame fmain;
818};
819
820struct msm_snapshot_pp_status {
821 void *status;
822};
823
824#define CFG_SET_MODE 0
825#define CFG_SET_EFFECT 1
826#define CFG_START 2
827#define CFG_PWR_UP 3
828#define CFG_PWR_DOWN 4
829#define CFG_WRITE_EXPOSURE_GAIN 5
830#define CFG_SET_DEFAULT_FOCUS 6
831#define CFG_MOVE_FOCUS 7
832#define CFG_REGISTER_TO_REAL_GAIN 8
833#define CFG_REAL_TO_REGISTER_GAIN 9
834#define CFG_SET_FPS 10
835#define CFG_SET_PICT_FPS 11
836#define CFG_SET_BRIGHTNESS 12
837#define CFG_SET_CONTRAST 13
838#define CFG_SET_ZOOM 14
839#define CFG_SET_EXPOSURE_MODE 15
840#define CFG_SET_WB 16
841#define CFG_SET_ANTIBANDING 17
842#define CFG_SET_EXP_GAIN 18
843#define CFG_SET_PICT_EXP_GAIN 19
844#define CFG_SET_LENS_SHADING 20
845#define CFG_GET_PICT_FPS 21
846#define CFG_GET_PREV_L_PF 22
847#define CFG_GET_PREV_P_PL 23
848#define CFG_GET_PICT_L_PF 24
849#define CFG_GET_PICT_P_PL 25
850#define CFG_GET_AF_MAX_STEPS 26
851#define CFG_GET_PICT_MAX_EXP_LC 27
852#define CFG_SEND_WB_INFO 28
853#define CFG_SENSOR_INIT 29
854#define CFG_GET_3D_CALI_DATA 30
855#define CFG_GET_CALIB_DATA 31
Kevin Chana980f392011-08-01 20:55:00 -0700856#define CFG_GET_OUTPUT_INFO 32
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700857#define CFG_GET_EEPROM_INFO 33
858#define CFG_GET_EEPROM_DATA 34
859#define CFG_SET_ACTUATOR_INFO 35
860#define CFG_GET_ACTUATOR_INFO 36
Su Liu6c3bb322012-02-14 02:15:05 +0530861/* TBD: QRD */
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -0700862#define CFG_SET_SATURATION 37
863#define CFG_SET_SHARPNESS 38
864#define CFG_SET_TOUCHAEC 39
865#define CFG_SET_AUTO_FOCUS 40
866#define CFG_SET_AUTOFLASH 41
867#define CFG_SET_EXPOSURE_COMPENSATION 42
868#define CFG_SET_ISO 43
Nishant Panditb2157c92012-04-25 01:09:28 +0530869#define CFG_START_STREAM 44
870#define CFG_STOP_STREAM 45
871#define CFG_GET_CSI_PARAMS 46
872#define CFG_MAX 47
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700873
874
875#define MOVE_NEAR 0
876#define MOVE_FAR 1
877
878#define SENSOR_PREVIEW_MODE 0
879#define SENSOR_SNAPSHOT_MODE 1
880#define SENSOR_RAW_SNAPSHOT_MODE 2
881#define SENSOR_HFR_60FPS_MODE 3
882#define SENSOR_HFR_90FPS_MODE 4
883#define SENSOR_HFR_120FPS_MODE 5
884
885#define SENSOR_QTR_SIZE 0
886#define SENSOR_FULL_SIZE 1
887#define SENSOR_QVGA_SIZE 2
888#define SENSOR_INVALID_SIZE 3
889
890#define CAMERA_EFFECT_OFF 0
891#define CAMERA_EFFECT_MONO 1
892#define CAMERA_EFFECT_NEGATIVE 2
893#define CAMERA_EFFECT_SOLARIZE 3
894#define CAMERA_EFFECT_SEPIA 4
895#define CAMERA_EFFECT_POSTERIZE 5
896#define CAMERA_EFFECT_WHITEBOARD 6
897#define CAMERA_EFFECT_BLACKBOARD 7
898#define CAMERA_EFFECT_AQUA 8
Yonggui Maoc0055a12011-09-29 19:31:47 -0700899#define CAMERA_EFFECT_EMBOSS 9
900#define CAMERA_EFFECT_SKETCH 10
901#define CAMERA_EFFECT_NEON 11
902#define CAMERA_EFFECT_MAX 12
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -0700903
Taniya Dasa9bdb012011-09-08 11:21:33 +0530904/* QRD */
905#define CAMERA_EFFECT_BW 10
906#define CAMERA_EFFECT_BLUISH 12
907#define CAMERA_EFFECT_REDDISH 13
908#define CAMERA_EFFECT_GREENISH 14
909
910/* QRD */
911#define CAMERA_ANTIBANDING_OFF 0
912#define CAMERA_ANTIBANDING_50HZ 2
913#define CAMERA_ANTIBANDING_60HZ 1
914#define CAMERA_ANTIBANDING_AUTO 3
915
916#define CAMERA_CONTRAST_LV0 0
917#define CAMERA_CONTRAST_LV1 1
918#define CAMERA_CONTRAST_LV2 2
919#define CAMERA_CONTRAST_LV3 3
920#define CAMERA_CONTRAST_LV4 4
921#define CAMERA_CONTRAST_LV5 5
922#define CAMERA_CONTRAST_LV6 6
923#define CAMERA_CONTRAST_LV7 7
924#define CAMERA_CONTRAST_LV8 8
925#define CAMERA_CONTRAST_LV9 9
926
927#define CAMERA_BRIGHTNESS_LV0 0
928#define CAMERA_BRIGHTNESS_LV1 1
929#define CAMERA_BRIGHTNESS_LV2 2
930#define CAMERA_BRIGHTNESS_LV3 3
931#define CAMERA_BRIGHTNESS_LV4 4
932#define CAMERA_BRIGHTNESS_LV5 5
933#define CAMERA_BRIGHTNESS_LV6 6
934#define CAMERA_BRIGHTNESS_LV7 7
935#define CAMERA_BRIGHTNESS_LV8 8
936
937
938#define CAMERA_SATURATION_LV0 0
939#define CAMERA_SATURATION_LV1 1
940#define CAMERA_SATURATION_LV2 2
941#define CAMERA_SATURATION_LV3 3
942#define CAMERA_SATURATION_LV4 4
943#define CAMERA_SATURATION_LV5 5
944#define CAMERA_SATURATION_LV6 6
945#define CAMERA_SATURATION_LV7 7
946#define CAMERA_SATURATION_LV8 8
947
948#define CAMERA_SHARPNESS_LV0 0
949#define CAMERA_SHARPNESS_LV1 3
950#define CAMERA_SHARPNESS_LV2 6
951#define CAMERA_SHARPNESS_LV3 9
952#define CAMERA_SHARPNESS_LV4 12
953#define CAMERA_SHARPNESS_LV5 15
954#define CAMERA_SHARPNESS_LV6 18
955#define CAMERA_SHARPNESS_LV7 21
956#define CAMERA_SHARPNESS_LV8 24
957#define CAMERA_SHARPNESS_LV9 27
958#define CAMERA_SHARPNESS_LV10 30
959
960#define CAMERA_SETAE_AVERAGE 0
961#define CAMERA_SETAE_CENWEIGHT 1
962
Taniya Dasa9bdb012011-09-08 11:21:33 +0530963#define CAMERA_WB_AUTO 1 /* This list must match aeecamera.h */
964#define CAMERA_WB_CUSTOM 2
965#define CAMERA_WB_INCANDESCENT 3
966#define CAMERA_WB_FLUORESCENT 4
967#define CAMERA_WB_DAYLIGHT 5
968#define CAMERA_WB_CLOUDY_DAYLIGHT 6
969#define CAMERA_WB_TWILIGHT 7
970#define CAMERA_WB_SHADE 8
971
972#define CAMERA_EXPOSURE_COMPENSATION_LV0 12
973#define CAMERA_EXPOSURE_COMPENSATION_LV1 6
974#define CAMERA_EXPOSURE_COMPENSATION_LV2 0
975#define CAMERA_EXPOSURE_COMPENSATION_LV3 -6
976#define CAMERA_EXPOSURE_COMPENSATION_LV4 -12
977
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -0800978enum msm_v4l2_saturation_level {
979 MSM_V4L2_SATURATION_L0,
980 MSM_V4L2_SATURATION_L1,
981 MSM_V4L2_SATURATION_L2,
982 MSM_V4L2_SATURATION_L3,
983 MSM_V4L2_SATURATION_L4,
984 MSM_V4L2_SATURATION_L5,
985 MSM_V4L2_SATURATION_L6,
986 MSM_V4L2_SATURATION_L7,
987 MSM_V4L2_SATURATION_L8,
988 MSM_V4L2_SATURATION_L9,
989 MSM_V4L2_SATURATION_L10,
990};
991
Suresh Vankadara212d9722012-05-30 15:51:20 +0530992enum msm_v4l2_contrast_level {
993 MSM_V4L2_CONTRAST_L0,
994 MSM_V4L2_CONTRAST_L1,
995 MSM_V4L2_CONTRAST_L2,
996 MSM_V4L2_CONTRAST_L3,
997 MSM_V4L2_CONTRAST_L4,
998 MSM_V4L2_CONTRAST_L5,
999 MSM_V4L2_CONTRAST_L6,
1000 MSM_V4L2_CONTRAST_L7,
1001 MSM_V4L2_CONTRAST_L8,
1002 MSM_V4L2_CONTRAST_L9,
1003 MSM_V4L2_CONTRAST_L10,
1004};
1005
1006
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001007enum msm_v4l2_exposure_level {
1008 MSM_V4L2_EXPOSURE_N2,
1009 MSM_V4L2_EXPOSURE_N1,
1010 MSM_V4L2_EXPOSURE_D,
1011 MSM_V4L2_EXPOSURE_P1,
1012 MSM_V4L2_EXPOSURE_P2,
1013};
1014
1015enum msm_v4l2_sharpness_level {
1016 MSM_V4L2_SHARPNESS_L0,
1017 MSM_V4L2_SHARPNESS_L1,
1018 MSM_V4L2_SHARPNESS_L2,
1019 MSM_V4L2_SHARPNESS_L3,
1020 MSM_V4L2_SHARPNESS_L4,
1021 MSM_V4L2_SHARPNESS_L5,
1022 MSM_V4L2_SHARPNESS_L6,
1023};
1024
1025enum msm_v4l2_expo_metering_mode {
1026 MSM_V4L2_EXP_FRAME_AVERAGE,
1027 MSM_V4L2_EXP_CENTER_WEIGHTED,
1028 MSM_V4L2_EXP_SPOT_METERING,
1029};
1030
1031enum msm_v4l2_iso_mode {
1032 MSM_V4L2_ISO_AUTO = 0,
1033 MSM_V4L2_ISO_DEBLUR,
1034 MSM_V4L2_ISO_100,
1035 MSM_V4L2_ISO_200,
1036 MSM_V4L2_ISO_400,
1037 MSM_V4L2_ISO_800,
1038 MSM_V4L2_ISO_1600,
1039};
1040
1041enum msm_v4l2_wb_mode {
Suresh Vankadara212d9722012-05-30 15:51:20 +05301042 MSM_V4L2_WB_OFF,
1043 MSM_V4L2_WB_AUTO ,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001044 MSM_V4L2_WB_CUSTOM,
1045 MSM_V4L2_WB_INCANDESCENT,
1046 MSM_V4L2_WB_FLUORESCENT,
1047 MSM_V4L2_WB_DAYLIGHT,
1048 MSM_V4L2_WB_CLOUDY_DAYLIGHT,
Suresh Vankadara212d9722012-05-30 15:51:20 +05301049};
1050
1051enum msm_v4l2_special_effect {
1052 MSM_V4L2_EFFECT_OFF,
1053 MSM_V4L2_EFFECT_MONO,
1054 MSM_V4L2_EFFECT_NEGATIVE,
1055 MSM_V4L2_EFFECT_SOLARIZE,
1056 MSM_V4L2_EFFECT_SEPIA,
1057 MSM_V4L2_EFFECT_POSTERAIZE,
1058 MSM_V4L2_EFFECT_WHITEBOARD,
1059 MSM_V4L2_EFFECT_BLACKBOARD,
1060 MSM_V4L2_EFFECT_AQUA,
1061 MSM_V4L2_EFFECT_EMBOSS,
1062 MSM_V4L2_EFFECT_SKETCH,
1063 MSM_V4L2_EFFECT_NEON,
1064 MSM_V4L2_EFFECT_MAX,
Rajakumar Govindaram6bc004a2011-12-05 20:58:19 -08001065};
1066
1067enum msm_v4l2_power_line_frequency {
1068 MSM_V4L2_POWER_LINE_OFF,
1069 MSM_V4L2_POWER_LINE_60HZ,
1070 MSM_V4L2_POWER_LINE_50HZ,
1071 MSM_V4L2_POWER_LINE_AUTO,
1072};
Taniya Dasa9bdb012011-09-08 11:21:33 +05301073
Su Liu6c3bb322012-02-14 02:15:05 +05301074#define CAMERA_ISO_TYPE_AUTO 0
1075#define CAMEAR_ISO_TYPE_HJR 1
1076#define CAMEAR_ISO_TYPE_100 2
1077#define CAMERA_ISO_TYPE_200 3
1078#define CAMERA_ISO_TYPE_400 4
1079#define CAMEAR_ISO_TYPE_800 5
1080#define CAMERA_ISO_TYPE_1600 6
1081
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001082struct sensor_pict_fps {
1083 uint16_t prevfps;
1084 uint16_t pictfps;
1085};
1086
1087struct exp_gain_cfg {
1088 uint16_t gain;
1089 uint32_t line;
1090};
1091
1092struct focus_cfg {
1093 int32_t steps;
1094 int dir;
1095};
1096
1097struct fps_cfg {
1098 uint16_t f_mult;
1099 uint16_t fps_div;
1100 uint32_t pict_fps_div;
1101};
1102struct wb_info_cfg {
1103 uint16_t red_gain;
1104 uint16_t green_gain;
1105 uint16_t blue_gain;
1106};
1107struct sensor_3d_exp_cfg {
1108 uint16_t gain;
1109 uint32_t line;
1110 uint16_t r_gain;
1111 uint16_t b_gain;
1112 uint16_t gr_gain;
1113 uint16_t gb_gain;
1114 uint16_t gain_adjust;
1115};
1116struct sensor_3d_cali_data_t{
1117 unsigned char left_p_matrix[3][4][8];
1118 unsigned char right_p_matrix[3][4][8];
1119 unsigned char square_len[8];
1120 unsigned char focal_len[8];
1121 unsigned char pixel_pitch[8];
1122 uint16_t left_r;
1123 uint16_t left_b;
1124 uint16_t left_gb;
1125 uint16_t left_af_far;
1126 uint16_t left_af_mid;
1127 uint16_t left_af_short;
1128 uint16_t left_af_5um;
1129 uint16_t left_af_50up;
1130 uint16_t left_af_50down;
1131 uint16_t right_r;
1132 uint16_t right_b;
1133 uint16_t right_gb;
1134 uint16_t right_af_far;
1135 uint16_t right_af_mid;
1136 uint16_t right_af_short;
1137 uint16_t right_af_5um;
1138 uint16_t right_af_50up;
1139 uint16_t right_af_50down;
1140};
1141struct sensor_init_cfg {
1142 uint8_t prev_res;
1143 uint8_t pict_res;
1144};
1145
1146struct sensor_calib_data {
1147 /* Color Related Measurements */
1148 uint16_t r_over_g;
1149 uint16_t b_over_g;
1150 uint16_t gr_over_gb;
1151
1152 /* Lens Related Measurements */
1153 uint16_t macro_2_inf;
1154 uint16_t inf_2_macro;
1155 uint16_t stroke_amt;
1156 uint16_t af_pos_1m;
1157 uint16_t af_pos_inf;
1158};
1159
Kevin Chana980f392011-08-01 20:55:00 -07001160enum msm_sensor_resolution_t {
Kevin Chan36e2bdc2011-08-30 17:21:21 -07001161 MSM_SENSOR_RES_FULL,
1162 MSM_SENSOR_RES_QTR,
Kevin Chana980f392011-08-01 20:55:00 -07001163 MSM_SENSOR_RES_2,
1164 MSM_SENSOR_RES_3,
1165 MSM_SENSOR_RES_4,
1166 MSM_SENSOR_RES_5,
1167 MSM_SENSOR_RES_6,
1168 MSM_SENSOR_RES_7,
1169 MSM_SENSOR_INVALID_RES,
1170};
1171
1172struct msm_sensor_output_info_t {
1173 uint16_t x_output;
1174 uint16_t y_output;
1175 uint16_t line_length_pclk;
1176 uint16_t frame_length_lines;
Kevin Chane30d3692011-10-14 16:11:01 -07001177 uint32_t vt_pixel_clk;
1178 uint32_t op_pixel_clk;
Kevin Chan272f6602011-10-18 14:20:03 -07001179 uint16_t binning_factor;
Kevin Chana980f392011-08-01 20:55:00 -07001180};
1181
1182struct sensor_output_info_t {
1183 struct msm_sensor_output_info_t *output_info;
1184 uint16_t num_info;
1185};
1186
Taniya Dasa9bdb012011-09-08 11:21:33 +05301187struct mirror_flip {
1188 int32_t x_mirror;
1189 int32_t y_flip;
1190};
1191
1192struct cord {
1193 uint32_t x;
1194 uint32_t y;
1195};
1196
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001197struct msm_eeprom_data_t {
1198 void *eeprom_data;
1199 uint16_t index;
1200};
1201
Nishant Panditb2157c92012-04-25 01:09:28 +05301202struct msm_camera_csid_vc_cfg {
1203 uint8_t cid;
1204 uint8_t dt;
1205 uint8_t decode_format;
1206};
1207
1208struct csi_lane_params_t {
1209 uint8_t csi_lane_assign;
1210 uint8_t csi_lane_mask;
1211 uint8_t csi_if;
1212 uint8_t csid_core;
1213 uint32_t csid_version;
1214};
1215
1216#define CSI_EMBED_DATA 0x12
1217#define CSI_RESERVED_DATA_0 0x13
1218#define CSI_YUV422_8 0x1E
1219#define CSI_RAW8 0x2A
1220#define CSI_RAW10 0x2B
1221#define CSI_RAW12 0x2C
1222
1223#define CSI_DECODE_6BIT 0
1224#define CSI_DECODE_8BIT 1
1225#define CSI_DECODE_10BIT 2
1226#define CSI_DECODE_DPCM_10_8_10 5
1227
1228#define ISPIF_STREAM(intf, action) (((intf)<<ISPIF_S_STREAM_SHIFT)+(action))
1229#define ISPIF_ON_FRAME_BOUNDARY (0x01 << 0)
1230#define ISPIF_OFF_FRAME_BOUNDARY (0x01 << 1)
1231#define ISPIF_OFF_IMMEDIATELY (0x01 << 2)
1232#define ISPIF_S_STREAM_SHIFT 4
1233
1234
1235#define PIX_0 (0x01 << 0)
1236#define RDI_0 (0x01 << 1)
1237#define PIX_1 (0x01 << 2)
1238#define RDI_1 (0x01 << 3)
1239#define PIX_2 (0x01 << 4)
1240#define RDI_2 (0x01 << 5)
1241
1242
1243enum msm_ispif_intftype {
1244 PIX0,
1245 RDI0,
1246 PIX1,
1247 RDI1,
1248 PIX2,
1249 RDI2,
1250 INTF_MAX,
1251};
1252
1253enum msm_ispif_vc {
1254 VC0,
1255 VC1,
1256 VC2,
1257 VC3,
1258};
1259
1260enum msm_ispif_cid {
1261 CID0,
1262 CID1,
1263 CID2,
1264 CID3,
1265 CID4,
1266 CID5,
1267 CID6,
1268 CID7,
1269 CID8,
1270 CID9,
1271 CID10,
1272 CID11,
1273 CID12,
1274 CID13,
1275 CID14,
1276 CID15,
1277};
1278
1279struct msm_ispif_params {
1280 uint8_t intftype;
1281 uint16_t cid_mask;
1282 uint8_t csid;
1283};
1284
1285struct msm_ispif_params_list {
1286 uint32_t len;
1287 struct msm_ispif_params params[4];
1288};
1289
1290enum ispif_cfg_type_t {
1291 ISPIF_INIT,
1292 ISPIF_SET_CFG,
1293 ISPIF_SET_ON_FRAME_BOUNDARY,
1294 ISPIF_SET_OFF_FRAME_BOUNDARY,
1295 ISPIF_SET_OFF_IMMEDIATELY,
1296 ISPIF_RELEASE,
1297};
1298
1299struct ispif_cfg_data {
1300 enum ispif_cfg_type_t cfgtype;
1301 union {
1302 uint32_t csid_version;
1303 int cmd;
1304 struct msm_ispif_params_list ispif_params;
1305 } cfg;
1306};
1307
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001308struct sensor_cfg_data {
1309 int cfgtype;
1310 int mode;
1311 int rs;
1312 uint8_t max_steps;
1313
1314 union {
1315 int8_t effect;
1316 uint8_t lens_shading;
1317 uint16_t prevl_pf;
1318 uint16_t prevp_pl;
1319 uint16_t pictl_pf;
1320 uint16_t pictp_pl;
1321 uint32_t pict_max_exp_lc;
1322 uint16_t p_fps;
Su Liu6c3bb322012-02-14 02:15:05 +05301323 uint8_t iso_type;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001324 struct sensor_init_cfg init_info;
1325 struct sensor_pict_fps gfps;
1326 struct exp_gain_cfg exp_gain;
1327 struct focus_cfg focus;
1328 struct fps_cfg fps;
1329 struct wb_info_cfg wb_info;
1330 struct sensor_3d_exp_cfg sensor_3d_exp;
1331 struct sensor_calib_data calib_info;
Kevin Chana980f392011-08-01 20:55:00 -07001332 struct sensor_output_info_t output_info;
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001333 struct msm_eeprom_data_t eeprom_data;
Nishant Panditb2157c92012-04-25 01:09:28 +05301334 struct csi_lane_params_t csi_lane_params;
Taniya Dasa9bdb012011-09-08 11:21:33 +05301335 /* QRD */
1336 uint16_t antibanding;
1337 uint8_t contrast;
1338 uint8_t saturation;
1339 uint8_t sharpness;
1340 int8_t brightness;
1341 int ae_mode;
1342 uint8_t wb_val;
1343 int8_t exp_compensation;
1344 struct cord aec_cord;
1345 int is_autoflash;
1346 struct mirror_flip mirror_flip;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001347 } cfg;
1348};
1349
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001350struct damping_params_t {
1351 uint32_t damping_step;
1352 uint32_t damping_delay;
1353 uint32_t hw_params;
1354};
1355
1356enum actuator_type {
1357 ACTUATOR_VCM,
1358 ACTUATOR_PIEZO,
1359};
1360
1361enum msm_actuator_data_type {
1362 MSM_ACTUATOR_BYTE_DATA = 1,
1363 MSM_ACTUATOR_WORD_DATA,
1364};
1365
1366enum msm_actuator_addr_type {
1367 MSM_ACTUATOR_BYTE_ADDR = 1,
1368 MSM_ACTUATOR_WORD_ADDR,
1369};
1370
1371enum msm_actuator_write_type {
1372 MSM_ACTUATOR_WRITE_HW_DAMP,
1373 MSM_ACTUATOR_WRITE_DAC,
1374};
1375
1376struct msm_actuator_reg_params_t {
1377 enum msm_actuator_write_type reg_write_type;
1378 uint32_t hw_mask;
1379 uint16_t reg_addr;
1380 uint16_t hw_shift;
1381 uint16_t data_shift;
1382};
1383
1384struct reg_settings_t {
1385 uint16_t reg_addr;
1386 uint16_t reg_data;
1387};
1388
1389struct region_params_t {
1390 /* [0] = ForwardDirection Macro boundary
1391 [1] = ReverseDirection Inf boundary
1392 */
1393 uint16_t step_bound[2];
1394 uint16_t code_per_step;
1395};
1396
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001397struct msm_actuator_move_params_t {
1398 int8_t dir;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001399 int8_t sign_dir;
1400 int16_t dest_step_pos;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001401 int32_t num_steps;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001402 struct damping_params_t *ringing_params;
1403};
1404
1405struct msm_actuator_tuning_params_t {
1406 int16_t initial_code;
1407 uint16_t pwd_step;
1408 uint16_t region_size;
1409 uint32_t total_steps;
1410 struct region_params_t *region_params;
1411};
1412
1413struct msm_actuator_params_t {
1414 enum actuator_type act_type;
1415 uint8_t reg_tbl_size;
1416 uint16_t data_size;
1417 uint16_t init_setting_size;
1418 uint32_t i2c_addr;
1419 enum msm_actuator_addr_type i2c_addr_type;
1420 enum msm_actuator_data_type i2c_data_type;
1421 struct msm_actuator_reg_params_t *reg_tbl_params;
1422 struct reg_settings_t *init_settings;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001423};
1424
1425struct msm_actuator_set_info_t {
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001426 struct msm_actuator_params_t actuator_params;
1427 struct msm_actuator_tuning_params_t af_tuning_params;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001428};
1429
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001430struct msm_actuator_get_info_t {
1431 uint32_t focal_length_num;
1432 uint32_t focal_length_den;
1433 uint32_t f_number_num;
1434 uint32_t f_number_den;
1435 uint32_t f_pix_num;
1436 uint32_t f_pix_den;
1437 uint32_t total_f_dist_num;
1438 uint32_t total_f_dist_den;
Jeyaprakash Soundrapandian04592002012-02-08 10:29:50 -08001439 uint32_t hor_view_angle_num;
1440 uint32_t hor_view_angle_den;
1441 uint32_t ver_view_angle_num;
1442 uint32_t ver_view_angle_den;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001443};
1444
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001445enum af_camera_name {
1446 ACTUATOR_MAIN_CAM_0,
1447 ACTUATOR_MAIN_CAM_1,
1448 ACTUATOR_MAIN_CAM_2,
1449 ACTUATOR_MAIN_CAM_3,
1450 ACTUATOR_MAIN_CAM_4,
1451 ACTUATOR_MAIN_CAM_5,
1452 ACTUATOR_WEB_CAM_0,
1453 ACTUATOR_WEB_CAM_1,
1454 ACTUATOR_WEB_CAM_2,
1455};
1456
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001457struct msm_actuator_cfg_data {
1458 int cfgtype;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001459 uint8_t is_af_supported;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001460 union {
1461 struct msm_actuator_move_params_t move;
Sreesudhan Ramakrish Ramkumar5f4b3442011-09-08 14:56:35 -07001462 struct msm_actuator_set_info_t set_info;
1463 struct msm_actuator_get_info_t get_info;
Rajakumar Govindaram6627b362012-01-29 19:00:30 -08001464 enum af_camera_name cam_name;
Sreesudhan Ramakrish Ramkumara4b5f302011-09-12 16:23:22 -07001465 } cfg;
1466};
1467
Jeyaprakash Soundrapandian734476b2012-05-03 20:08:15 -07001468struct msm_eeprom_support {
1469 uint16_t is_supported;
1470 uint16_t size;
1471 uint16_t index;
1472 uint16_t qvalue;
1473};
1474
1475struct msm_calib_wb {
1476 uint16_t r_over_g;
1477 uint16_t b_over_g;
1478 uint16_t gr_over_gb;
1479};
1480
1481struct msm_calib_af {
1482 uint16_t macro_dac;
1483 uint16_t inf_dac;
1484 uint16_t start_dac;
1485};
1486
1487struct msm_calib_lsc {
1488 uint16_t r_gain[221];
1489 uint16_t b_gain[221];
1490 uint16_t gr_gain[221];
1491 uint16_t gb_gain[221];
1492};
1493
1494struct pixel_t {
1495 int x;
1496 int y;
1497};
1498
1499struct msm_calib_dpc {
1500 uint16_t validcount;
1501 struct pixel_t snapshot_coord[128];
1502 struct pixel_t preview_coord[128];
1503 struct pixel_t video_coord[128];
1504};
1505
1506struct msm_camera_eeprom_info_t {
1507 struct msm_eeprom_support af;
1508 struct msm_eeprom_support wb;
1509 struct msm_eeprom_support lsc;
1510 struct msm_eeprom_support dpc;
1511};
1512
1513struct msm_eeprom_cfg_data {
1514 int cfgtype;
1515 uint8_t is_eeprom_supported;
1516 union {
1517 struct msm_eeprom_data_t get_data;
1518 struct msm_camera_eeprom_info_t get_info;
1519 } cfg;
1520};
1521
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001522struct sensor_large_data {
1523 int cfgtype;
1524 union {
1525 struct sensor_3d_cali_data_t sensor_3d_cali_data;
1526 } data;
1527};
1528
1529enum sensor_type_t {
1530 BAYER,
1531 YUV,
1532 JPEG_SOC,
1533};
1534
1535enum flash_type {
1536 LED_FLASH,
1537 STROBE_FLASH,
1538};
1539
1540enum strobe_flash_ctrl_type {
1541 STROBE_FLASH_CTRL_INIT,
1542 STROBE_FLASH_CTRL_CHARGE,
1543 STROBE_FLASH_CTRL_RELEASE
1544};
1545
1546struct strobe_flash_ctrl_data {
1547 enum strobe_flash_ctrl_type type;
1548 int charge_en;
1549};
1550
1551struct msm_camera_info {
1552 int num_cameras;
1553 uint8_t has_3d_support[MSM_MAX_CAMERA_SENSORS];
1554 uint8_t is_internal_cam[MSM_MAX_CAMERA_SENSORS];
1555 uint32_t s_mount_angle[MSM_MAX_CAMERA_SENSORS];
1556 const char *video_dev_name[MSM_MAX_CAMERA_SENSORS];
1557 enum sensor_type_t sensor_type[MSM_MAX_CAMERA_SENSORS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001558};
1559
1560struct msm_cam_config_dev_info {
1561 int num_config_nodes;
1562 const char *config_dev_name[MSM_MAX_CAMERA_CONFIGS];
Ankit Premrajkaf94bcc62011-08-22 15:23:53 -07001563 int config_dev_id[MSM_MAX_CAMERA_CONFIGS];
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001564};
1565
Kiran Kumar H Nc3cb9ea2012-01-06 15:11:10 -08001566struct msm_mctl_node_info {
1567 int num_mctl_nodes;
1568 const char *mctl_node_name[MSM_MAX_CAMERA_SENSORS];
1569};
1570
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001571struct flash_ctrl_data {
1572 int flashtype;
1573 union {
1574 int led_state;
1575 struct strobe_flash_ctrl_data strobe_ctrl;
1576 } ctrl_data;
1577};
1578
1579#define GET_NAME 0
1580#define GET_PREVIEW_LINE_PER_FRAME 1
1581#define GET_PREVIEW_PIXELS_PER_LINE 2
1582#define GET_SNAPSHOT_LINE_PER_FRAME 3
1583#define GET_SNAPSHOT_PIXELS_PER_LINE 4
1584#define GET_SNAPSHOT_FPS 5
1585#define GET_SNAPSHOT_MAX_EP_LINE_CNT 6
1586
1587struct msm_camsensor_info {
1588 char name[MAX_SENSOR_NAME];
1589 uint8_t flash_enabled;
Sreesudhan Ramakrish Ramkumara2688822012-04-05 20:22:50 -07001590 uint8_t strobe_flash_enabled;
1591 uint8_t actuator_enabled;
Nishant Panditb2157c92012-04-25 01:09:28 +05301592 uint8_t ispif_supported;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001593 int8_t total_steps;
1594 uint8_t support_3d;
Mingcheng Zhuc85b8ad2012-03-08 17:47:17 -08001595 enum flash_type flashtype;
1596 enum sensor_type_t sensor_type;
1597 uint32_t pxlcode; /* enum v4l2_mbus_pixelcode */
1598 uint32_t camera_type; /* msm_camera_type */
1599 int mount_angle;
1600 uint32_t max_width;
1601 uint32_t max_height;
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001602};
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001603
1604#define V4L2_SINGLE_PLANE 0
1605#define V4L2_MULTI_PLANE_Y 0
1606#define V4L2_MULTI_PLANE_CBCR 1
1607#define V4L2_MULTI_PLANE_CB 1
1608#define V4L2_MULTI_PLANE_CR 2
1609
1610struct plane_data {
1611 int plane_id;
1612 uint32_t offset;
1613 unsigned long size;
1614};
1615
1616struct img_plane_info {
1617 uint32_t width;
1618 uint32_t height;
1619 uint32_t pixelformat;
1620 uint8_t buffer_type; /*Single/Multi planar*/
1621 uint8_t output_port;
1622 uint32_t ext_mode;
1623 uint8_t num_planes;
1624 struct plane_data plane[MAX_PLANES];
Mingcheng Zhu996be182011-10-16 16:04:23 -07001625 uint32_t sp_y_offset;
Kiran Kumar H Nceea7622011-08-23 14:01:03 -07001626 uint8_t vpe_can_use;
1627};
1628
Kevin Chan210061f2012-02-14 20:56:16 -08001629#define QCAMERA_NAME "qcamera"
1630#define QCAMERA_DEVICE_GROUP_ID 1
1631#define QCAMERA_VNODE_GROUP_ID 2
1632
Kevin Chan94b4c832012-03-02 21:27:16 -08001633#define MSM_CAM_V4L2_IOCTL_GET_CAMERA_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001634 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001635
1636#define MSM_CAM_V4L2_IOCTL_GET_CONFIG_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001637 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001638
1639#define MSM_CAM_V4L2_IOCTL_GET_MCTL_INFO \
Kevin Chan41a38702012-06-06 22:25:41 -07001640 _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001641
1642#define MSM_CAM_V4L2_IOCTL_CTRL_CMD_DONE \
Kevin Chan41a38702012-06-06 22:25:41 -07001643 _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001644
1645#define MSM_CAM_V4L2_IOCTL_GET_EVENT_PAYLOAD \
Kevin Chan41a38702012-06-06 22:25:41 -07001646 _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_camera_v4l2_ioctl_t)
Kevin Chan94b4c832012-03-02 21:27:16 -08001647
Sunid Wilson4584b5f2012-04-13 12:48:25 -07001648#define MSM_CAM_IOCTL_SEND_EVENT \
1649 _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct v4l2_event)
1650
Kiran Kumar H N64bd23c2012-05-25 12:06:21 -07001651#define MSM_CAM_V4L2_IOCTL_CFG_VPE \
1652 _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vpe_cfg_cmd)
1653
Kevin Chan41a38702012-06-06 22:25:41 -07001654#define MSM_CAM_V4L2_IOCTL_PRIVATE_S_CTRL \
1655 _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_camera_v4l2_ioctl_t)
1656
Kevin Chan94b4c832012-03-02 21:27:16 -08001657struct msm_camera_v4l2_ioctl_t {
Kevin Chan41a38702012-06-06 22:25:41 -07001658 uint32_t id;
Kevin Chan94b4c832012-03-02 21:27:16 -08001659 void __user *ioctl_ptr;
Kevin Chan41a38702012-06-06 22:25:41 -07001660 uint32_t len;
Kevin Chan94b4c832012-03-02 21:27:16 -08001661};
1662
Kiran Kumar H Nb4a278e2012-06-18 19:25:47 -07001663enum msm_camss_irq_idx {
1664 CAMERA_SS_IRQ_0,
1665 CAMERA_SS_IRQ_1,
1666 CAMERA_SS_IRQ_2,
1667 CAMERA_SS_IRQ_3,
1668 CAMERA_SS_IRQ_4,
1669 CAMERA_SS_IRQ_5,
1670 CAMERA_SS_IRQ_6,
1671 CAMERA_SS_IRQ_7,
1672 CAMERA_SS_IRQ_8,
1673 CAMERA_SS_IRQ_9,
1674 CAMERA_SS_IRQ_10,
1675 CAMERA_SS_IRQ_11,
1676 CAMERA_SS_IRQ_12,
1677 CAMERA_SS_IRQ_MAX
1678};
1679
1680enum msm_cam_hw_idx {
1681 MSM_CAM_HW_MICRO,
1682 MSM_CAM_HW_CCI,
1683 MSM_CAM_HW_CSI0,
1684 MSM_CAM_HW_CSI1,
1685 MSM_CAM_HW_CSI2,
1686 MSM_CAM_HW_CSI3,
1687 MSM_CAM_HW_ISPIF,
1688 MSM_CAM_HW_CPP,
1689 MSM_CAM_HW_VFE0,
1690 MSM_CAM_HW_VFE1,
1691 MSM_CAM_HW_JPEG0,
1692 MSM_CAM_HW_JPEG1,
1693 MSM_CAM_HW_JPEG2,
1694 MSM_CAM_HW_MAX
1695};
1696
1697struct msm_camera_irq_cfg {
1698 /* Bit mask of all the camera hardwares that needs to
1699 * be composited into a single IRQ to the MSM.
1700 * Current usage: (may be updated based on hw changes)
1701 * Bits 31:13 - Reserved.
1702 * Bits 12:0
1703 * 12 - MSM_CAM_HW_JPEG2
1704 * 11 - MSM_CAM_HW_JPEG1
1705 * 10 - MSM_CAM_HW_JPEG0
1706 * 9 - MSM_CAM_HW_VFE1
1707 * 8 - MSM_CAM_HW_VFE0
1708 * 7 - MSM_CAM_HW_CPP
1709 * 6 - MSM_CAM_HW_ISPIF
1710 * 5 - MSM_CAM_HW_CSI3
1711 * 4 - MSM_CAM_HW_CSI2
1712 * 3 - MSM_CAM_HW_CSI1
1713 * 2 - MSM_CAM_HW_CSI0
1714 * 1 - MSM_CAM_HW_CCI
1715 * 0 - MSM_CAM_HW_MICRO
1716 */
1717 uint32_t cam_hw_mask;
1718 uint8_t irq_idx;
1719 uint8_t num_hwcore;
1720};
1721
1722#define MSM_IRQROUTER_CFG_COMPIRQ \
1723 _IOWR('V', BASE_VIDIOC_PRIVATE, void __user *)
1724
Kevin Chan73ec7282012-06-07 01:32:00 -07001725#define MAX_NUM_CPP_STRIPS 8
1726
1727enum msm_cpp_frame_type {
1728 MSM_CPP_OFFLINE_FRAME,
1729 MSM_CPP_REALTIME_FRAME,
1730};
1731
1732struct msm_cpp_frame_strip_info {
1733 int scale_v_en;
1734 int scale_h_en;
1735
1736 int upscale_v_en;
1737 int upscale_h_en;
1738
1739 int src_start_x;
1740 int src_end_x;
1741 int src_start_y;
1742 int src_end_y;
1743
1744 /* Padding is required for upscaler because it does not
1745 * pad internally like other blocks, also needed for rotation
1746 * rotation expects all the blocks in the stripe to be the same size
1747 * Padding is done such that all the extra padded pixels
1748 * are on the right and bottom
1749 */
1750 int pad_bottom;
1751 int pad_top;
1752 int pad_right;
1753 int pad_left;
1754
1755 int v_init_phase;
1756 int h_init_phase;
1757 int h_phase_step;
1758 int v_phase_step;
1759
1760 int prescale_crop_width_first_pixel;
1761 int prescale_crop_width_last_pixel;
1762 int prescale_crop_height_first_line;
1763 int prescale_crop_height_last_line;
1764
1765 int postscale_crop_height_first_line;
1766 int postscale_crop_height_last_line;
1767 int postscale_crop_width_first_pixel;
1768 int postscale_crop_width_last_pixel;
1769
1770 int dst_start_x;
1771 int dst_end_x;
1772 int dst_start_y;
1773 int dst_end_y;
1774
1775 int bytes_per_pixel;
1776 unsigned int source_address;
1777 unsigned int destination_address;
1778 unsigned int src_stride;
1779 unsigned int dst_stride;
1780 int rotate_270;
1781 int horizontal_flip;
1782 int vertical_flip;
1783 int scale_output_width;
1784 int scale_output_height;
1785};
1786
1787struct msm_cpp_frame_info_t {
1788 int32_t frame_id;
1789 uint32_t inst_id;
1790 uint32_t client_id;
1791 enum msm_cpp_frame_type frame_type;
1792 uint32_t num_strips;
1793 struct msm_cpp_frame_strip_info *strip_info;
1794};
1795
1796#define VIDIOC_MSM_CPP_CFG \
1797 _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_camera_v4l2_ioctl_t)
1798
1799#define VIDIOC_MSM_CPP_GET_EVENTPAYLOAD \
1800 _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_camera_v4l2_ioctl_t)
1801
1802#define VIDIOC_MSM_CPP_GET_INST_INFO \
1803 _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_camera_v4l2_ioctl_t)
1804
1805#define V4L2_EVENT_CPP_FRAME_DONE (V4L2_EVENT_PRIVATE_START + 0)
1806
Bryan Huntsman3f2bc4d2011-08-16 17:27:22 -07001807#endif /* __LINUX_MSM_CAMERA_H */