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Christian Lamparter32ddf072008-08-08 21:17:37 +02001#ifndef P54COMMON_H
2#define P54COMMON_H
Michael Wueff1a592007-09-25 18:11:01 -07003
4/*
5 * Common code specific definitions for mac80211 Prism54 drivers
6 *
7 * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
8 * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
9 *
10 * Based on the islsm (softmac prism54) driver, which is:
11 * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17
18struct bootrec {
19 __le32 code;
20 __le32 len;
Larry Finger1f1c0e32008-09-25 14:54:28 -050021 u32 data[10];
Michael Wueff1a592007-09-25 18:11:01 -070022} __attribute__((packed));
23
24struct bootrec_exp_if {
25 __le16 role;
26 __le16 if_id;
27 __le16 variant;
28 __le16 btm_compat;
29 __le16 top_compat;
30} __attribute__((packed));
31
Christian Lamparter4e416a62008-09-01 22:48:41 +020032struct bootrec_desc {
33 __le16 modes;
34 __le16 flags;
35 __le32 rx_start;
36 __le32 rx_end;
37 u8 headroom;
38 u8 tailroom;
39 u8 unimportant[6];
40 u8 rates[16];
Larry Finger2e20cc32008-10-09 17:38:52 -070041 u8 padding2[4];
42 __le16 rx_mtu;
Christian Lamparter4e416a62008-09-01 22:48:41 +020043} __attribute__((packed));
44
Michael Wueff1a592007-09-25 18:11:01 -070045#define BR_CODE_MIN 0x80000000
46#define BR_CODE_COMPONENT_ID 0x80000001
47#define BR_CODE_COMPONENT_VERSION 0x80000002
48#define BR_CODE_DEPENDENT_IF 0x80000003
49#define BR_CODE_EXPOSED_IF 0x80000004
50#define BR_CODE_DESCR 0x80000101
51#define BR_CODE_MAX 0x8FFFFFFF
52#define BR_CODE_END_OF_BRA 0xFF0000FF
53#define LEGACY_BR_CODE_END_OF_BRA 0xFFFFFFFF
54
Michael Wueff1a592007-09-25 18:11:01 -070055/* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
56
57struct pda_entry {
58 __le16 len; /* includes both code and data */
59 __le16 code;
60 u8 data[0];
61} __attribute__ ((packed));
62
63struct eeprom_pda_wrap {
Johannes Berg8c282932008-02-29 13:56:33 +010064 __le32 magic;
65 __le16 pad;
66 __le16 len;
67 __le32 arm_opcode;
Michael Wueff1a592007-09-25 18:11:01 -070068 u8 data[0];
69} __attribute__ ((packed));
70
71struct pda_iq_autocal_entry {
72 __le16 freq;
73 __le16 iq_param[4];
74} __attribute__ ((packed));
75
76struct pda_channel_output_limit {
77 __le16 freq;
78 u8 val_bpsk;
79 u8 val_qpsk;
80 u8 val_16qam;
81 u8 val_64qam;
82 u8 rate_set_mask;
83 u8 rate_set_size;
84} __attribute__ ((packed));
85
86struct pda_pa_curve_data_sample_rev0 {
87 u8 rf_power;
88 u8 pa_detector;
89 u8 pcv;
90} __attribute__ ((packed));
91
92struct pda_pa_curve_data_sample_rev1 {
93 u8 rf_power;
94 u8 pa_detector;
95 u8 data_barker;
96 u8 data_bpsk;
97 u8 data_qpsk;
98 u8 data_16qam;
99 u8 data_64qam;
Christian Lamparter154e3af2008-08-23 22:15:25 +0200100} __attribute__ ((packed));
101
102struct p54_pa_curve_data_sample {
103 u8 rf_power;
104 u8 pa_detector;
105 u8 data_barker;
106 u8 data_bpsk;
107 u8 data_qpsk;
108 u8 data_16qam;
109 u8 data_64qam;
Michael Wueff1a592007-09-25 18:11:01 -0700110 u8 padding;
111} __attribute__ ((packed));
112
113struct pda_pa_curve_data {
114 u8 cal_method_rev;
115 u8 channels;
116 u8 points_per_channel;
117 u8 padding;
118 u8 data[0];
119} __attribute__ ((packed));
120
121/*
122 * this defines the PDR codes used to build PDAs as defined in document
123 * number 553155. The current implementation mirrors version 1.1 of the
124 * document and lists only PDRs supported by the ARM platform.
125 */
126
127/* common and choice range (0x0000 - 0x0fff) */
128#define PDR_END 0x0000
129#define PDR_MANUFACTURING_PART_NUMBER 0x0001
130#define PDR_PDA_VERSION 0x0002
131#define PDR_NIC_SERIAL_NUMBER 0x0003
132
133#define PDR_MAC_ADDRESS 0x0101
134#define PDR_REGULATORY_DOMAIN_LIST 0x0103
135#define PDR_TEMPERATURE_TYPE 0x0107
136
137#define PDR_PRISM_PCI_IDENTIFIER 0x0402
138
139/* ARM range (0x1000 - 0x1fff) */
140#define PDR_COUNTRY_INFORMATION 0x1000
141#define PDR_INTERFACE_LIST 0x1001
142#define PDR_HARDWARE_PLATFORM_COMPONENT_ID 0x1002
143#define PDR_OEM_NAME 0x1003
144#define PDR_PRODUCT_NAME 0x1004
145#define PDR_UTF8_OEM_NAME 0x1005
146#define PDR_UTF8_PRODUCT_NAME 0x1006
147#define PDR_COUNTRY_LIST 0x1007
148#define PDR_DEFAULT_COUNTRY 0x1008
149
150#define PDR_ANTENNA_GAIN 0x1100
151
152#define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA 0x1901
153#define PDR_RSSI_LINEAR_APPROXIMATION 0x1902
154#define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS 0x1903
155#define PDR_PRISM_PA_CAL_CURVE_DATA 0x1904
156#define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
157#define PDR_PRISM_ZIF_TX_IQ_CALIBRATION 0x1906
158#define PDR_REGULATORY_POWER_LIMITS 0x1907
159#define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED 0x1908
160#define PDR_RADIATED_TRANSMISSION_CORRECTION 0x1909
161#define PDR_PRISM_TX_IQ_CALIBRATION 0x190a
162
163/* reserved range (0x2000 - 0x7fff) */
164
165/* customer range (0x8000 - 0xffff) */
166#define PDR_BASEBAND_REGISTERS 0x8000
167#define PDR_PER_CHANNEL_BASEBAND_REGISTERS 0x8001
168
169/* stored in skb->cb */
170struct memrecord {
171 u32 start_addr;
172 u32 end_addr;
Michael Wueff1a592007-09-25 18:11:01 -0700173};
174
175struct p54_eeprom_lm86 {
176 __le16 offset;
177 __le16 len;
178 u8 data[0];
179} __attribute__ ((packed));
180
181struct p54_rx_hdr {
182 __le16 magic;
183 __le16 len;
184 __le16 freq;
185 u8 antenna;
186 u8 rate;
187 u8 rssi;
188 u8 quality;
189 u16 unknown2;
Christian Lampartera0db6632008-09-06 02:56:04 +0200190 __le32 tsf32;
191 __le32 unalloc0;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200192 u8 align[0];
Michael Wueff1a592007-09-25 18:11:01 -0700193} __attribute__ ((packed));
194
195struct p54_frame_sent_hdr {
196 u8 status;
197 u8 retries;
198 __le16 ack_rssi;
199 __le16 seq;
200 u16 rate;
201} __attribute__ ((packed));
202
203struct p54_tx_control_allocdata {
204 u8 rateset[8];
Christian Lamparteraaa15532008-08-09 19:20:47 -0500205 u8 unalloc0[2];
206 u8 key_type;
207 u8 key_len;
208 u8 key[16];
209 u8 hw_queue;
210 u8 unalloc1[9];
211 u8 tx_antenna;
Michael Wueff1a592007-09-25 18:11:01 -0700212 u8 output_power;
Christian Lamparteraaa15532008-08-09 19:20:47 -0500213 u8 cts_rate;
214 u8 unalloc2[3];
Michael Wueff1a592007-09-25 18:11:01 -0700215 u8 align[0];
216} __attribute__ ((packed));
217
218struct p54_tx_control_filter {
219 __le16 filter_type;
Christian Lampartere0a58ea2008-09-03 22:25:20 +0200220 u8 mac_addr[ETH_ALEN];
221 u8 bssid[ETH_ALEN];
222 u8 rx_antenna;
223 u8 rx_align;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200224 union {
225 struct {
226 __le32 basic_rate_mask;
227 u8 rts_rates[8];
228 __le32 rx_addr;
229 __le16 max_rx;
230 __le16 rxhw;
231 __le16 wakeup_timer;
232 __le16 unalloc0;
233 } v1 __attribute__ ((packed));
234 struct {
235 __le32 rx_addr;
236 __le16 max_rx;
237 __le16 rxhw;
238 __le16 timer;
239 __le16 unalloc0;
240 __le32 unalloc1;
241 } v2 __attribute__ ((packed));
242 } __attribute__ ((packed));
Michael Wueff1a592007-09-25 18:11:01 -0700243} __attribute__ ((packed));
244
Christian Lamparter19c19d52008-09-03 22:25:25 +0200245#define P54_TX_CONTROL_FILTER_V1_LEN (sizeof(struct p54_tx_control_filter))
246#define P54_TX_CONTROL_FILTER_V2_LEN (sizeof(struct p54_tx_control_filter)-8)
247
Michael Wueff1a592007-09-25 18:11:01 -0700248struct p54_tx_control_channel {
Christian Lamparter154e3af2008-08-23 22:15:25 +0200249 __le16 flags;
250 __le16 dwell;
Michael Wueff1a592007-09-25 18:11:01 -0700251 u8 padding1[20];
252 struct pda_iq_autocal_entry iq_autocal;
253 u8 pa_points_per_curve;
254 u8 val_barker;
255 u8 val_bpsk;
256 u8 val_qpsk;
257 u8 val_16qam;
258 u8 val_64qam;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200259 struct p54_pa_curve_data_sample curve_data[8];
Christian Lamparter154e3af2008-08-23 22:15:25 +0200260 u8 dup_bpsk;
261 u8 dup_qpsk;
262 u8 dup_16qam;
263 u8 dup_64qam;
Christian Lamparter19c19d52008-09-03 22:25:25 +0200264 union {
265 struct {
266 __le16 rssical_mul;
267 __le16 rssical_add;
268 } v1 __attribute__ ((packed));
269
270 struct {
271 __le32 basic_rate_mask;
272 u8 rts_rates[8];
273 __le16 rssical_mul;
274 __le16 rssical_add;
275 } v2 __attribute__ ((packed));
276 } __attribute__ ((packed));
Michael Wueff1a592007-09-25 18:11:01 -0700277} __attribute__ ((packed));
278
Christian Lamparter19c19d52008-09-03 22:25:25 +0200279#define P54_TX_CONTROL_CHANNEL_V1_LEN (sizeof(struct p54_tx_control_channel)-12)
280#define P54_TX_CONTROL_CHANNEL_V2_LEN (sizeof(struct p54_tx_control_channel))
281
Michael Wueff1a592007-09-25 18:11:01 -0700282struct p54_tx_control_led {
283 __le16 mode;
284 __le16 led_temporary;
285 __le16 led_permanent;
286 __le16 duration;
287} __attribute__ ((packed));
288
289struct p54_tx_vdcf_queues {
290 __le16 aifs;
291 __le16 cwmin;
292 __le16 cwmax;
293 __le16 txop;
294} __attribute__ ((packed));
295
296struct p54_tx_control_vdcf {
297 u8 padding;
298 u8 slottime;
299 u8 magic1;
300 u8 magic2;
301 struct p54_tx_vdcf_queues queue[8];
302 u8 pad2[4];
303 __le16 frameburst;
304} __attribute__ ((packed));
305
Christian Lampartercc6de662008-09-06 02:56:23 +0200306struct p54_statistics {
307 __le32 rx_success;
308 __le32 rx_bad_fcs;
309 __le32 rx_abort;
310 __le32 rx_abort_phy;
311 __le32 rts_success;
312 __le32 rts_fail;
313 __le32 tsf32;
314 __le32 airtime;
315 __le32 noise;
316 __le32 unkn[10]; /* CCE / CCA / RADAR */
317} __attribute__ ((packed));
318
Christian Lamparter1b997532008-09-06 14:25:58 +0200319struct p54_tx_control_xbow_synth {
320 __le16 magic1;
321 __le16 magic2;
322 __le16 freq;
323 u32 padding[5];
324} __attribute__ ((packed));
325
Christian Lamparter32ddf072008-08-08 21:17:37 +0200326#endif /* P54COMMON_H */